1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * da7218.h - DA7218 ALSA SoC Codec Driver 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2015 Dialog Semiconductor 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef _DA7218_H 11*4882a593Smuzhiyun #define _DA7218_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/regmap.h> 14*4882a593Smuzhiyun #include <linux/regulator/consumer.h> 15*4882a593Smuzhiyun #include <sound/da7218.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* 19*4882a593Smuzhiyun * Registers 20*4882a593Smuzhiyun */ 21*4882a593Smuzhiyun #define DA7218_SYSTEM_ACTIVE 0x0 22*4882a593Smuzhiyun #define DA7218_CIF_CTRL 0x1 23*4882a593Smuzhiyun #define DA7218_CHIP_ID1 0x4 24*4882a593Smuzhiyun #define DA7218_CHIP_ID2 0x5 25*4882a593Smuzhiyun #define DA7218_CHIP_REVISION 0x6 26*4882a593Smuzhiyun #define DA7218_SPARE1 0x7 27*4882a593Smuzhiyun #define DA7218_STATUS1 0x8 28*4882a593Smuzhiyun #define DA7218_SOFT_RESET 0x9 29*4882a593Smuzhiyun #define DA7218_SR 0xB 30*4882a593Smuzhiyun #define DA7218_PC_COUNT 0xC 31*4882a593Smuzhiyun #define DA7218_GAIN_RAMP_CTRL 0xD 32*4882a593Smuzhiyun #define DA7218_CIF_TIMEOUT_CTRL 0x10 33*4882a593Smuzhiyun #define DA7218_SYSTEM_MODES_INPUT 0x14 34*4882a593Smuzhiyun #define DA7218_SYSTEM_MODES_OUTPUT 0x15 35*4882a593Smuzhiyun #define DA7218_SYSTEM_STATUS 0x16 36*4882a593Smuzhiyun #define DA7218_IN_1L_FILTER_CTRL 0x18 37*4882a593Smuzhiyun #define DA7218_IN_1R_FILTER_CTRL 0x19 38*4882a593Smuzhiyun #define DA7218_IN_2L_FILTER_CTRL 0x1A 39*4882a593Smuzhiyun #define DA7218_IN_2R_FILTER_CTRL 0x1B 40*4882a593Smuzhiyun #define DA7218_OUT_1L_FILTER_CTRL 0x20 41*4882a593Smuzhiyun #define DA7218_OUT_1R_FILTER_CTRL 0x21 42*4882a593Smuzhiyun #define DA7218_OUT_1_HPF_FILTER_CTRL 0x24 43*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_12_FILTER_CTRL 0x25 44*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_34_FILTER_CTRL 0x26 45*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_5_FILTER_CTRL 0x27 46*4882a593Smuzhiyun #define DA7218_OUT_1_BIQ_5STAGE_CTRL 0x28 47*4882a593Smuzhiyun #define DA7218_OUT_1_BIQ_5STAGE_DATA 0x29 48*4882a593Smuzhiyun #define DA7218_OUT_1_BIQ_5STAGE_ADDR 0x2A 49*4882a593Smuzhiyun #define DA7218_MIXIN_1_CTRL 0x2C 50*4882a593Smuzhiyun #define DA7218_MIXIN_1_GAIN 0x2D 51*4882a593Smuzhiyun #define DA7218_MIXIN_2_CTRL 0x2E 52*4882a593Smuzhiyun #define DA7218_MIXIN_2_GAIN 0x2F 53*4882a593Smuzhiyun #define DA7218_ALC_CTRL1 0x30 54*4882a593Smuzhiyun #define DA7218_ALC_CTRL2 0x31 55*4882a593Smuzhiyun #define DA7218_ALC_CTRL3 0x32 56*4882a593Smuzhiyun #define DA7218_ALC_NOISE 0x33 57*4882a593Smuzhiyun #define DA7218_ALC_TARGET_MIN 0x34 58*4882a593Smuzhiyun #define DA7218_ALC_TARGET_MAX 0x35 59*4882a593Smuzhiyun #define DA7218_ALC_GAIN_LIMITS 0x36 60*4882a593Smuzhiyun #define DA7218_ALC_ANA_GAIN_LIMITS 0x37 61*4882a593Smuzhiyun #define DA7218_ALC_ANTICLIP_CTRL 0x38 62*4882a593Smuzhiyun #define DA7218_AGS_ENABLE 0x3C 63*4882a593Smuzhiyun #define DA7218_AGS_TRIGGER 0x3D 64*4882a593Smuzhiyun #define DA7218_AGS_ATT_MAX 0x3E 65*4882a593Smuzhiyun #define DA7218_AGS_TIMEOUT 0x3F 66*4882a593Smuzhiyun #define DA7218_AGS_ANTICLIP_CTRL 0x40 67*4882a593Smuzhiyun #define DA7218_CALIB_CTRL 0x44 68*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_AUTO_M_1 0x45 69*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_AUTO_U_1 0x46 70*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_AUTO_M_2 0x47 71*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_AUTO_U_2 0x48 72*4882a593Smuzhiyun #define DA7218_ENV_TRACK_CTRL 0x4C 73*4882a593Smuzhiyun #define DA7218_LVL_DET_CTRL 0x50 74*4882a593Smuzhiyun #define DA7218_LVL_DET_LEVEL 0x51 75*4882a593Smuzhiyun #define DA7218_DGS_TRIGGER 0x54 76*4882a593Smuzhiyun #define DA7218_DGS_ENABLE 0x55 77*4882a593Smuzhiyun #define DA7218_DGS_RISE_FALL 0x56 78*4882a593Smuzhiyun #define DA7218_DGS_SYNC_DELAY 0x57 79*4882a593Smuzhiyun #define DA7218_DGS_SYNC_DELAY2 0x58 80*4882a593Smuzhiyun #define DA7218_DGS_SYNC_DELAY3 0x59 81*4882a593Smuzhiyun #define DA7218_DGS_LEVELS 0x5A 82*4882a593Smuzhiyun #define DA7218_DGS_GAIN_CTRL 0x5B 83*4882a593Smuzhiyun #define DA7218_DROUTING_OUTDAI_1L 0x5C 84*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1L_INFILT_1L_GAIN 0x5D 85*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1L_INFILT_1R_GAIN 0x5E 86*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1L_INFILT_2L_GAIN 0x5F 87*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1L_INFILT_2R_GAIN 0x60 88*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1L_TONEGEN_GAIN 0x61 89*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1L_INDAI_1L_GAIN 0x62 90*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1L_INDAI_1R_GAIN 0x63 91*4882a593Smuzhiyun #define DA7218_DROUTING_OUTDAI_1R 0x64 92*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1R_INFILT_1L_GAIN 0x65 93*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1R_INFILT_1R_GAIN 0x66 94*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1R_INFILT_2L_GAIN 0x67 95*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1R_INFILT_2R_GAIN 0x68 96*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1R_TONEGEN_GAIN 0x69 97*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1R_INDAI_1L_GAIN 0x6A 98*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_1R_INDAI_1R_GAIN 0x6B 99*4882a593Smuzhiyun #define DA7218_DROUTING_OUTFILT_1L 0x6C 100*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1L_INFILT_1L_GAIN 0x6D 101*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1L_INFILT_1R_GAIN 0x6E 102*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1L_INFILT_2L_GAIN 0x6F 103*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1L_INFILT_2R_GAIN 0x70 104*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1L_TONEGEN_GAIN 0x71 105*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1L_INDAI_1L_GAIN 0x72 106*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1L_INDAI_1R_GAIN 0x73 107*4882a593Smuzhiyun #define DA7218_DROUTING_OUTFILT_1R 0x74 108*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1R_INFILT_1L_GAIN 0x75 109*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1R_INFILT_1R_GAIN 0x76 110*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1R_INFILT_2L_GAIN 0x77 111*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1R_INFILT_2R_GAIN 0x78 112*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1R_TONEGEN_GAIN 0x79 113*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1R_INDAI_1L_GAIN 0x7A 114*4882a593Smuzhiyun #define DA7218_DMIX_OUTFILT_1R_INDAI_1R_GAIN 0x7B 115*4882a593Smuzhiyun #define DA7218_DROUTING_OUTDAI_2L 0x7C 116*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2L_INFILT_1L_GAIN 0x7D 117*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2L_INFILT_1R_GAIN 0x7E 118*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2L_INFILT_2L_GAIN 0x7F 119*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2L_INFILT_2R_GAIN 0x80 120*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2L_TONEGEN_GAIN 0x81 121*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2L_INDAI_1L_GAIN 0x82 122*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2L_INDAI_1R_GAIN 0x83 123*4882a593Smuzhiyun #define DA7218_DROUTING_OUTDAI_2R 0x84 124*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2R_INFILT_1L_GAIN 0x85 125*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2R_INFILT_1R_GAIN 0x86 126*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2R_INFILT_2L_GAIN 0x87 127*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2R_INFILT_2R_GAIN 0x88 128*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2R_TONEGEN_GAIN 0x89 129*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2R_INDAI_1L_GAIN 0x8A 130*4882a593Smuzhiyun #define DA7218_DMIX_OUTDAI_2R_INDAI_1R_GAIN 0x8B 131*4882a593Smuzhiyun #define DA7218_DAI_CTRL 0x8C 132*4882a593Smuzhiyun #define DA7218_DAI_TDM_CTRL 0x8D 133*4882a593Smuzhiyun #define DA7218_DAI_OFFSET_LOWER 0x8E 134*4882a593Smuzhiyun #define DA7218_DAI_OFFSET_UPPER 0x8F 135*4882a593Smuzhiyun #define DA7218_DAI_CLK_MODE 0x90 136*4882a593Smuzhiyun #define DA7218_PLL_CTRL 0x91 137*4882a593Smuzhiyun #define DA7218_PLL_FRAC_TOP 0x92 138*4882a593Smuzhiyun #define DA7218_PLL_FRAC_BOT 0x93 139*4882a593Smuzhiyun #define DA7218_PLL_INTEGER 0x94 140*4882a593Smuzhiyun #define DA7218_PLL_STATUS 0x95 141*4882a593Smuzhiyun #define DA7218_PLL_REFOSC_CAL 0x98 142*4882a593Smuzhiyun #define DA7218_DAC_NG_CTRL 0x9C 143*4882a593Smuzhiyun #define DA7218_DAC_NG_SETUP_TIME 0x9D 144*4882a593Smuzhiyun #define DA7218_DAC_NG_OFF_THRESH 0x9E 145*4882a593Smuzhiyun #define DA7218_DAC_NG_ON_THRESH 0x9F 146*4882a593Smuzhiyun #define DA7218_TONE_GEN_CFG1 0xA0 147*4882a593Smuzhiyun #define DA7218_TONE_GEN_CFG2 0xA1 148*4882a593Smuzhiyun #define DA7218_TONE_GEN_FREQ1_L 0xA2 149*4882a593Smuzhiyun #define DA7218_TONE_GEN_FREQ1_U 0xA3 150*4882a593Smuzhiyun #define DA7218_TONE_GEN_FREQ2_L 0xA4 151*4882a593Smuzhiyun #define DA7218_TONE_GEN_FREQ2_U 0xA5 152*4882a593Smuzhiyun #define DA7218_TONE_GEN_CYCLES 0xA6 153*4882a593Smuzhiyun #define DA7218_TONE_GEN_ON_PER 0xA7 154*4882a593Smuzhiyun #define DA7218_TONE_GEN_OFF_PER 0xA8 155*4882a593Smuzhiyun #define DA7218_CP_CTRL 0xAC 156*4882a593Smuzhiyun #define DA7218_CP_DELAY 0xAD 157*4882a593Smuzhiyun #define DA7218_CP_VOL_THRESHOLD1 0xAE 158*4882a593Smuzhiyun #define DA7218_MIC_1_CTRL 0xB4 159*4882a593Smuzhiyun #define DA7218_MIC_1_GAIN 0xB5 160*4882a593Smuzhiyun #define DA7218_MIC_1_SELECT 0xB7 161*4882a593Smuzhiyun #define DA7218_MIC_2_CTRL 0xB8 162*4882a593Smuzhiyun #define DA7218_MIC_2_GAIN 0xB9 163*4882a593Smuzhiyun #define DA7218_MIC_2_SELECT 0xBB 164*4882a593Smuzhiyun #define DA7218_IN_1_HPF_FILTER_CTRL 0xBC 165*4882a593Smuzhiyun #define DA7218_IN_2_HPF_FILTER_CTRL 0xBD 166*4882a593Smuzhiyun #define DA7218_ADC_1_CTRL 0xC0 167*4882a593Smuzhiyun #define DA7218_ADC_2_CTRL 0xC1 168*4882a593Smuzhiyun #define DA7218_ADC_MODE 0xC2 169*4882a593Smuzhiyun #define DA7218_MIXOUT_L_CTRL 0xCC 170*4882a593Smuzhiyun #define DA7218_MIXOUT_L_GAIN 0xCD 171*4882a593Smuzhiyun #define DA7218_MIXOUT_R_CTRL 0xCE 172*4882a593Smuzhiyun #define DA7218_MIXOUT_R_GAIN 0xCF 173*4882a593Smuzhiyun #define DA7218_HP_L_CTRL 0xD0 174*4882a593Smuzhiyun #define DA7218_HP_L_GAIN 0xD1 175*4882a593Smuzhiyun #define DA7218_HP_R_CTRL 0xD2 176*4882a593Smuzhiyun #define DA7218_HP_R_GAIN 0xD3 177*4882a593Smuzhiyun #define DA7218_HP_SNGL_CTRL 0xD4 178*4882a593Smuzhiyun #define DA7218_HP_DIFF_CTRL 0xD5 179*4882a593Smuzhiyun #define DA7218_HP_DIFF_UNLOCK 0xD7 180*4882a593Smuzhiyun #define DA7218_HPLDET_JACK 0xD8 181*4882a593Smuzhiyun #define DA7218_HPLDET_CTRL 0xD9 182*4882a593Smuzhiyun #define DA7218_HPLDET_TEST 0xDA 183*4882a593Smuzhiyun #define DA7218_REFERENCES 0xDC 184*4882a593Smuzhiyun #define DA7218_IO_CTRL 0xE0 185*4882a593Smuzhiyun #define DA7218_LDO_CTRL 0xE1 186*4882a593Smuzhiyun #define DA7218_SIDETONE_CTRL 0xE4 187*4882a593Smuzhiyun #define DA7218_SIDETONE_IN_SELECT 0xE5 188*4882a593Smuzhiyun #define DA7218_SIDETONE_GAIN 0xE6 189*4882a593Smuzhiyun #define DA7218_DROUTING_ST_OUTFILT_1L 0xE8 190*4882a593Smuzhiyun #define DA7218_DROUTING_ST_OUTFILT_1R 0xE9 191*4882a593Smuzhiyun #define DA7218_SIDETONE_BIQ_3STAGE_DATA 0xEA 192*4882a593Smuzhiyun #define DA7218_SIDETONE_BIQ_3STAGE_ADDR 0xEB 193*4882a593Smuzhiyun #define DA7218_EVENT_STATUS 0xEC 194*4882a593Smuzhiyun #define DA7218_EVENT 0xED 195*4882a593Smuzhiyun #define DA7218_EVENT_MASK 0xEE 196*4882a593Smuzhiyun #define DA7218_DMIC_1_CTRL 0xF0 197*4882a593Smuzhiyun #define DA7218_DMIC_2_CTRL 0xF1 198*4882a593Smuzhiyun #define DA7218_IN_1L_GAIN 0xF4 199*4882a593Smuzhiyun #define DA7218_IN_1R_GAIN 0xF5 200*4882a593Smuzhiyun #define DA7218_IN_2L_GAIN 0xF6 201*4882a593Smuzhiyun #define DA7218_IN_2R_GAIN 0xF7 202*4882a593Smuzhiyun #define DA7218_OUT_1L_GAIN 0xF8 203*4882a593Smuzhiyun #define DA7218_OUT_1R_GAIN 0xF9 204*4882a593Smuzhiyun #define DA7218_MICBIAS_CTRL 0xFC 205*4882a593Smuzhiyun #define DA7218_MICBIAS_EN 0xFD 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun /* 209*4882a593Smuzhiyun * Bit Fields 210*4882a593Smuzhiyun */ 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun #define DA7218_SWITCH_EN_MAX 0x1 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun /* DA7218_SYSTEM_ACTIVE = 0x0 */ 215*4882a593Smuzhiyun #define DA7218_SYSTEM_ACTIVE_SHIFT 0 216*4882a593Smuzhiyun #define DA7218_SYSTEM_ACTIVE_MASK (0x1 << 0) 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun /* DA7218_CIF_CTRL = 0x1 */ 219*4882a593Smuzhiyun #define DA7218_CIF_I2C_WRITE_MODE_SHIFT 0 220*4882a593Smuzhiyun #define DA7218_CIF_I2C_WRITE_MODE_MASK (0x1 << 0) 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun /* DA7218_CHIP_ID1 = 0x4 */ 223*4882a593Smuzhiyun #define DA7218_CHIP_ID1_SHIFT 0 224*4882a593Smuzhiyun #define DA7218_CHIP_ID1_MASK (0xFF << 0) 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun /* DA7218_CHIP_ID2 = 0x5 */ 227*4882a593Smuzhiyun #define DA7218_CHIP_ID2_SHIFT 0 228*4882a593Smuzhiyun #define DA7218_CHIP_ID2_MASK (0xFF << 0) 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun /* DA7218_CHIP_REVISION = 0x6 */ 231*4882a593Smuzhiyun #define DA7218_CHIP_MINOR_SHIFT 0 232*4882a593Smuzhiyun #define DA7218_CHIP_MINOR_MASK (0xF << 0) 233*4882a593Smuzhiyun #define DA7218_CHIP_MAJOR_SHIFT 4 234*4882a593Smuzhiyun #define DA7218_CHIP_MAJOR_MASK (0xF << 4) 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun /* DA7218_SPARE1 = 0x7 */ 237*4882a593Smuzhiyun #define DA7218_SPARE1_SHIFT 0 238*4882a593Smuzhiyun #define DA7218_SPARE1_MASK (0xFF << 0) 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun /* DA7218_STATUS1 = 0x8 */ 241*4882a593Smuzhiyun #define DA7218_STATUS_SPARE1_SHIFT 0 242*4882a593Smuzhiyun #define DA7218_STATUS_SPARE1_MASK (0xFF << 0) 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun /* DA7218_SOFT_RESET = 0x9 */ 245*4882a593Smuzhiyun #define DA7218_CIF_REG_SOFT_RESET_SHIFT 7 246*4882a593Smuzhiyun #define DA7218_CIF_REG_SOFT_RESET_MASK (0x1 << 7) 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun /* DA7218_SR = 0xB */ 249*4882a593Smuzhiyun #define DA7218_SR_ADC_SHIFT 0 250*4882a593Smuzhiyun #define DA7218_SR_ADC_MASK (0xF << 0) 251*4882a593Smuzhiyun #define DA7218_SR_DAC_SHIFT 4 252*4882a593Smuzhiyun #define DA7218_SR_DAC_MASK (0xF << 4) 253*4882a593Smuzhiyun #define DA7218_SR_8000 0x01 254*4882a593Smuzhiyun #define DA7218_SR_11025 0x02 255*4882a593Smuzhiyun #define DA7218_SR_12000 0x03 256*4882a593Smuzhiyun #define DA7218_SR_16000 0x05 257*4882a593Smuzhiyun #define DA7218_SR_22050 0x06 258*4882a593Smuzhiyun #define DA7218_SR_24000 0x07 259*4882a593Smuzhiyun #define DA7218_SR_32000 0x09 260*4882a593Smuzhiyun #define DA7218_SR_44100 0x0A 261*4882a593Smuzhiyun #define DA7218_SR_48000 0x0B 262*4882a593Smuzhiyun #define DA7218_SR_88200 0x0E 263*4882a593Smuzhiyun #define DA7218_SR_96000 0x0F 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun /* DA7218_PC_COUNT = 0xC */ 266*4882a593Smuzhiyun #define DA7218_PC_FREERUN_SHIFT 0 267*4882a593Smuzhiyun #define DA7218_PC_FREERUN_MASK (0x1 << 0) 268*4882a593Smuzhiyun #define DA7218_PC_RESYNC_AUTO_SHIFT 1 269*4882a593Smuzhiyun #define DA7218_PC_RESYNC_AUTO_MASK (0x1 << 1) 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun /* DA7218_GAIN_RAMP_CTRL = 0xD */ 272*4882a593Smuzhiyun #define DA7218_GAIN_RAMP_RATE_SHIFT 0 273*4882a593Smuzhiyun #define DA7218_GAIN_RAMP_RATE_MASK (0x3 << 0) 274*4882a593Smuzhiyun #define DA7218_GAIN_RAMP_RATE_MAX 4 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun /* DA7218_CIF_TIMEOUT_CTRL = 0x10 */ 277*4882a593Smuzhiyun #define DA7218_I2C_TIMEOUT_EN_SHIFT 0 278*4882a593Smuzhiyun #define DA7218_I2C_TIMEOUT_EN_MASK (0x1 << 0) 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun /* DA7218_SYSTEM_MODES_INPUT = 0x14 */ 281*4882a593Smuzhiyun #define DA7218_MODE_SUBMIT_SHIFT 0 282*4882a593Smuzhiyun #define DA7218_MODE_SUBMIT_MASK (0x1 << 0) 283*4882a593Smuzhiyun #define DA7218_ADC_MODE_SHIFT 1 284*4882a593Smuzhiyun #define DA7218_ADC_MODE_MASK (0x7F << 1) 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun /* DA7218_SYSTEM_MODES_OUTPUT = 0x15 */ 287*4882a593Smuzhiyun #define DA7218_MODE_SUBMIT_SHIFT 0 288*4882a593Smuzhiyun #define DA7218_MODE_SUBMIT_MASK (0x1 << 0) 289*4882a593Smuzhiyun #define DA7218_DAC_MODE_SHIFT 1 290*4882a593Smuzhiyun #define DA7218_DAC_MODE_MASK (0x7F << 1) 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun /* DA7218_SYSTEM_STATUS = 0x16 */ 293*4882a593Smuzhiyun #define DA7218_SC1_BUSY_SHIFT 0 294*4882a593Smuzhiyun #define DA7218_SC1_BUSY_MASK (0x1 << 0) 295*4882a593Smuzhiyun #define DA7218_SC2_BUSY_SHIFT 1 296*4882a593Smuzhiyun #define DA7218_SC2_BUSY_MASK (0x1 << 1) 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun /* DA7218_IN_1L_FILTER_CTRL = 0x18 */ 299*4882a593Smuzhiyun #define DA7218_IN_1L_RAMP_EN_SHIFT 5 300*4882a593Smuzhiyun #define DA7218_IN_1L_RAMP_EN_MASK (0x1 << 5) 301*4882a593Smuzhiyun #define DA7218_IN_1L_MUTE_EN_SHIFT 6 302*4882a593Smuzhiyun #define DA7218_IN_1L_MUTE_EN_MASK (0x1 << 6) 303*4882a593Smuzhiyun #define DA7218_IN_1L_FILTER_EN_SHIFT 7 304*4882a593Smuzhiyun #define DA7218_IN_1L_FILTER_EN_MASK (0x1 << 7) 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun /* DA7218_IN_1R_FILTER_CTRL = 0x19 */ 307*4882a593Smuzhiyun #define DA7218_IN_1R_RAMP_EN_SHIFT 5 308*4882a593Smuzhiyun #define DA7218_IN_1R_RAMP_EN_MASK (0x1 << 5) 309*4882a593Smuzhiyun #define DA7218_IN_1R_MUTE_EN_SHIFT 6 310*4882a593Smuzhiyun #define DA7218_IN_1R_MUTE_EN_MASK (0x1 << 6) 311*4882a593Smuzhiyun #define DA7218_IN_1R_FILTER_EN_SHIFT 7 312*4882a593Smuzhiyun #define DA7218_IN_1R_FILTER_EN_MASK (0x1 << 7) 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun /* DA7218_IN_2L_FILTER_CTRL = 0x1A */ 315*4882a593Smuzhiyun #define DA7218_IN_2L_RAMP_EN_SHIFT 5 316*4882a593Smuzhiyun #define DA7218_IN_2L_RAMP_EN_MASK (0x1 << 5) 317*4882a593Smuzhiyun #define DA7218_IN_2L_MUTE_EN_SHIFT 6 318*4882a593Smuzhiyun #define DA7218_IN_2L_MUTE_EN_MASK (0x1 << 6) 319*4882a593Smuzhiyun #define DA7218_IN_2L_FILTER_EN_SHIFT 7 320*4882a593Smuzhiyun #define DA7218_IN_2L_FILTER_EN_MASK (0x1 << 7) 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun /* DA7218_IN_2R_FILTER_CTRL = 0x1B */ 323*4882a593Smuzhiyun #define DA7218_IN_2R_RAMP_EN_SHIFT 5 324*4882a593Smuzhiyun #define DA7218_IN_2R_RAMP_EN_MASK (0x1 << 5) 325*4882a593Smuzhiyun #define DA7218_IN_2R_MUTE_EN_SHIFT 6 326*4882a593Smuzhiyun #define DA7218_IN_2R_MUTE_EN_MASK (0x1 << 6) 327*4882a593Smuzhiyun #define DA7218_IN_2R_FILTER_EN_SHIFT 7 328*4882a593Smuzhiyun #define DA7218_IN_2R_FILTER_EN_MASK (0x1 << 7) 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun /* DA7218_OUT_1L_FILTER_CTRL = 0x20 */ 331*4882a593Smuzhiyun #define DA7218_OUT_1L_BIQ_5STAGE_SEL_SHIFT 3 332*4882a593Smuzhiyun #define DA7218_OUT_1L_BIQ_5STAGE_SEL_MASK (0x1 << 3) 333*4882a593Smuzhiyun #define DA7218_OUT_BIQ_5STAGE_SEL_MAX 2 334*4882a593Smuzhiyun #define DA7218_OUT_1L_SUBRANGE_EN_SHIFT 4 335*4882a593Smuzhiyun #define DA7218_OUT_1L_SUBRANGE_EN_MASK (0x1 << 4) 336*4882a593Smuzhiyun #define DA7218_OUT_1L_RAMP_EN_SHIFT 5 337*4882a593Smuzhiyun #define DA7218_OUT_1L_RAMP_EN_MASK (0x1 << 5) 338*4882a593Smuzhiyun #define DA7218_OUT_1L_MUTE_EN_SHIFT 6 339*4882a593Smuzhiyun #define DA7218_OUT_1L_MUTE_EN_MASK (0x1 << 6) 340*4882a593Smuzhiyun #define DA7218_OUT_1L_FILTER_EN_SHIFT 7 341*4882a593Smuzhiyun #define DA7218_OUT_1L_FILTER_EN_MASK (0x1 << 7) 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun /* DA7218_OUT_1R_FILTER_CTRL = 0x21 */ 344*4882a593Smuzhiyun #define DA7218_OUT_1R_BIQ_5STAGE_SEL_SHIFT 3 345*4882a593Smuzhiyun #define DA7218_OUT_1R_BIQ_5STAGE_SEL_MASK (0x1 << 3) 346*4882a593Smuzhiyun #define DA7218_OUT_1R_SUBRANGE_EN_SHIFT 4 347*4882a593Smuzhiyun #define DA7218_OUT_1R_SUBRANGE_EN_MASK (0x1 << 4) 348*4882a593Smuzhiyun #define DA7218_OUT_1R_RAMP_EN_SHIFT 5 349*4882a593Smuzhiyun #define DA7218_OUT_1R_RAMP_EN_MASK (0x1 << 5) 350*4882a593Smuzhiyun #define DA7218_OUT_1R_MUTE_EN_SHIFT 6 351*4882a593Smuzhiyun #define DA7218_OUT_1R_MUTE_EN_MASK (0x1 << 6) 352*4882a593Smuzhiyun #define DA7218_OUT_1R_FILTER_EN_SHIFT 7 353*4882a593Smuzhiyun #define DA7218_OUT_1R_FILTER_EN_MASK (0x1 << 7) 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun /* DA7218_OUT_1_HPF_FILTER_CTRL = 0x24 */ 356*4882a593Smuzhiyun #define DA7218_OUT_1_VOICE_HPF_CORNER_SHIFT 0 357*4882a593Smuzhiyun #define DA7218_OUT_1_VOICE_HPF_CORNER_MASK (0x7 << 0) 358*4882a593Smuzhiyun #define DA7218_VOICE_HPF_CORNER_MAX 8 359*4882a593Smuzhiyun #define DA7218_OUT_1_VOICE_EN_SHIFT 3 360*4882a593Smuzhiyun #define DA7218_OUT_1_VOICE_EN_MASK (0x1 << 3) 361*4882a593Smuzhiyun #define DA7218_OUT_1_AUDIO_HPF_CORNER_SHIFT 4 362*4882a593Smuzhiyun #define DA7218_OUT_1_AUDIO_HPF_CORNER_MASK (0x3 << 4) 363*4882a593Smuzhiyun #define DA7218_AUDIO_HPF_CORNER_MAX 4 364*4882a593Smuzhiyun #define DA7218_OUT_1_HPF_EN_SHIFT 7 365*4882a593Smuzhiyun #define DA7218_OUT_1_HPF_EN_MASK (0x1 << 7) 366*4882a593Smuzhiyun #define DA7218_HPF_MODE_SHIFT 0 367*4882a593Smuzhiyun #define DA7218_HPF_DISABLED ((0x0 << 3) | (0x0 << 7)) 368*4882a593Smuzhiyun #define DA7218_HPF_AUDIO_EN ((0x0 << 3) | (0x1 << 7)) 369*4882a593Smuzhiyun #define DA7218_HPF_VOICE_EN ((0x1 << 3) | (0x1 << 7)) 370*4882a593Smuzhiyun #define DA7218_HPF_MODE_MASK ((0x1 << 3) | (0x1 << 7)) 371*4882a593Smuzhiyun #define DA7218_HPF_MODE_MAX 3 372*4882a593Smuzhiyun 373*4882a593Smuzhiyun /* DA7218_OUT_1_EQ_12_FILTER_CTRL = 0x25 */ 374*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_BAND1_SHIFT 0 375*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_BAND1_MASK (0xF << 0) 376*4882a593Smuzhiyun #define DA7218_OUT_EQ_BAND_MAX 0xF 377*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_BAND2_SHIFT 4 378*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_BAND2_MASK (0xF << 4) 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun /* DA7218_OUT_1_EQ_34_FILTER_CTRL = 0x26 */ 381*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_BAND3_SHIFT 0 382*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_BAND3_MASK (0xF << 0) 383*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_BAND4_SHIFT 4 384*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_BAND4_MASK (0xF << 4) 385*4882a593Smuzhiyun 386*4882a593Smuzhiyun /* DA7218_OUT_1_EQ_5_FILTER_CTRL = 0x27 */ 387*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_BAND5_SHIFT 0 388*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_BAND5_MASK (0xF << 0) 389*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_EN_SHIFT 7 390*4882a593Smuzhiyun #define DA7218_OUT_1_EQ_EN_MASK (0x1 << 7) 391*4882a593Smuzhiyun 392*4882a593Smuzhiyun /* DA7218_OUT_1_BIQ_5STAGE_CTRL = 0x28 */ 393*4882a593Smuzhiyun #define DA7218_OUT_1_BIQ_5STAGE_MUTE_EN_SHIFT 6 394*4882a593Smuzhiyun #define DA7218_OUT_1_BIQ_5STAGE_MUTE_EN_MASK (0x1 << 6) 395*4882a593Smuzhiyun #define DA7218_OUT_1_BIQ_5STAGE_FILTER_EN_SHIFT 7 396*4882a593Smuzhiyun #define DA7218_OUT_1_BIQ_5STAGE_FILTER_EN_MASK (0x1 << 7) 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun /* DA7218_OUT_1_BIQ_5STAGE_DATA = 0x29 */ 399*4882a593Smuzhiyun #define DA7218_OUT_1_BIQ_5STAGE_DATA_SHIFT 0 400*4882a593Smuzhiyun #define DA7218_OUT_1_BIQ_5STAGE_DATA_MASK (0xFF << 0) 401*4882a593Smuzhiyun 402*4882a593Smuzhiyun /* DA7218_OUT_1_BIQ_5STAGE_ADDR = 0x2A */ 403*4882a593Smuzhiyun #define DA7218_OUT_1_BIQ_5STAGE_ADDR_SHIFT 0 404*4882a593Smuzhiyun #define DA7218_OUT_1_BIQ_5STAGE_ADDR_MASK (0x3F << 0) 405*4882a593Smuzhiyun #define DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE 50 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun /* DA7218_MIXIN_1_CTRL = 0x2C */ 408*4882a593Smuzhiyun #define DA7218_MIXIN_1_MIX_SEL_SHIFT 3 409*4882a593Smuzhiyun #define DA7218_MIXIN_1_MIX_SEL_MASK (0x1 << 3) 410*4882a593Smuzhiyun #define DA7218_MIXIN_1_AMP_ZC_EN_SHIFT 4 411*4882a593Smuzhiyun #define DA7218_MIXIN_1_AMP_ZC_EN_MASK (0x1 << 4) 412*4882a593Smuzhiyun #define DA7218_MIXIN_1_AMP_RAMP_EN_SHIFT 5 413*4882a593Smuzhiyun #define DA7218_MIXIN_1_AMP_RAMP_EN_MASK (0x1 << 5) 414*4882a593Smuzhiyun #define DA7218_MIXIN_1_AMP_MUTE_EN_SHIFT 6 415*4882a593Smuzhiyun #define DA7218_MIXIN_1_AMP_MUTE_EN_MASK (0x1 << 6) 416*4882a593Smuzhiyun #define DA7218_MIXIN_1_AMP_EN_SHIFT 7 417*4882a593Smuzhiyun #define DA7218_MIXIN_1_AMP_EN_MASK (0x1 << 7) 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun /* DA7218_MIXIN_1_GAIN = 0x2D */ 420*4882a593Smuzhiyun #define DA7218_MIXIN_1_AMP_GAIN_SHIFT 0 421*4882a593Smuzhiyun #define DA7218_MIXIN_1_AMP_GAIN_MASK (0xF << 0) 422*4882a593Smuzhiyun #define DA7218_MIXIN_AMP_GAIN_MAX 0xF 423*4882a593Smuzhiyun 424*4882a593Smuzhiyun /* DA7218_MIXIN_2_CTRL = 0x2E */ 425*4882a593Smuzhiyun #define DA7218_MIXIN_2_MIX_SEL_SHIFT 3 426*4882a593Smuzhiyun #define DA7218_MIXIN_2_MIX_SEL_MASK (0x1 << 3) 427*4882a593Smuzhiyun #define DA7218_MIXIN_2_AMP_ZC_EN_SHIFT 4 428*4882a593Smuzhiyun #define DA7218_MIXIN_2_AMP_ZC_EN_MASK (0x1 << 4) 429*4882a593Smuzhiyun #define DA7218_MIXIN_2_AMP_RAMP_EN_SHIFT 5 430*4882a593Smuzhiyun #define DA7218_MIXIN_2_AMP_RAMP_EN_MASK (0x1 << 5) 431*4882a593Smuzhiyun #define DA7218_MIXIN_2_AMP_MUTE_EN_SHIFT 6 432*4882a593Smuzhiyun #define DA7218_MIXIN_2_AMP_MUTE_EN_MASK (0x1 << 6) 433*4882a593Smuzhiyun #define DA7218_MIXIN_2_AMP_EN_SHIFT 7 434*4882a593Smuzhiyun #define DA7218_MIXIN_2_AMP_EN_MASK (0x1 << 7) 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun /* DA7218_MIXIN_2_GAIN = 0x2F */ 437*4882a593Smuzhiyun #define DA7218_MIXIN_2_AMP_GAIN_SHIFT 0 438*4882a593Smuzhiyun #define DA7218_MIXIN_2_AMP_GAIN_MASK (0xF << 0) 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun /* DA7218_ALC_CTRL1 = 0x30 */ 441*4882a593Smuzhiyun #define DA7218_ALC_EN_SHIFT 0 442*4882a593Smuzhiyun #define DA7218_ALC_EN_MASK (0xF << 0) 443*4882a593Smuzhiyun #define DA7218_ALC_CHAN1_L_EN_SHIFT 0 444*4882a593Smuzhiyun #define DA7218_ALC_CHAN1_R_EN_SHIFT 1 445*4882a593Smuzhiyun #define DA7218_ALC_CHAN2_L_EN_SHIFT 2 446*4882a593Smuzhiyun #define DA7218_ALC_CHAN2_R_EN_SHIFT 3 447*4882a593Smuzhiyun #define DA7218_ALC_SYNC_MODE_SHIFT 4 448*4882a593Smuzhiyun #define DA7218_ALC_SYNC_MODE_MASK (0xF << 4) 449*4882a593Smuzhiyun #define DA7218_ALC_SYNC_MODE_CH1 (0x1 << 4) 450*4882a593Smuzhiyun #define DA7218_ALC_SYNC_MODE_CH2 (0x4 << 4) 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun /* DA7218_ALC_CTRL2 = 0x31 */ 453*4882a593Smuzhiyun #define DA7218_ALC_ATTACK_SHIFT 0 454*4882a593Smuzhiyun #define DA7218_ALC_ATTACK_MASK (0xF << 0) 455*4882a593Smuzhiyun #define DA7218_ALC_ATTACK_MAX 13 456*4882a593Smuzhiyun #define DA7218_ALC_RELEASE_SHIFT 4 457*4882a593Smuzhiyun #define DA7218_ALC_RELEASE_MASK (0xF << 4) 458*4882a593Smuzhiyun #define DA7218_ALC_RELEASE_MAX 11 459*4882a593Smuzhiyun 460*4882a593Smuzhiyun /* DA7218_ALC_CTRL3 = 0x32 */ 461*4882a593Smuzhiyun #define DA7218_ALC_HOLD_SHIFT 0 462*4882a593Smuzhiyun #define DA7218_ALC_HOLD_MASK (0xF << 0) 463*4882a593Smuzhiyun #define DA7218_ALC_HOLD_MAX 16 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun /* DA7218_ALC_NOISE = 0x33 */ 466*4882a593Smuzhiyun #define DA7218_ALC_NOISE_SHIFT 0 467*4882a593Smuzhiyun #define DA7218_ALC_NOISE_MASK (0x3F << 0) 468*4882a593Smuzhiyun #define DA7218_ALC_THRESHOLD_MAX 0x3F 469*4882a593Smuzhiyun 470*4882a593Smuzhiyun /* DA7218_ALC_TARGET_MIN = 0x34 */ 471*4882a593Smuzhiyun #define DA7218_ALC_THRESHOLD_MIN_SHIFT 0 472*4882a593Smuzhiyun #define DA7218_ALC_THRESHOLD_MIN_MASK (0x3F << 0) 473*4882a593Smuzhiyun 474*4882a593Smuzhiyun /* DA7218_ALC_TARGET_MAX = 0x35 */ 475*4882a593Smuzhiyun #define DA7218_ALC_THRESHOLD_MAX_SHIFT 0 476*4882a593Smuzhiyun #define DA7218_ALC_THRESHOLD_MAX_MASK (0x3F << 0) 477*4882a593Smuzhiyun 478*4882a593Smuzhiyun /* DA7218_ALC_GAIN_LIMITS = 0x36 */ 479*4882a593Smuzhiyun #define DA7218_ALC_ATTEN_MAX_SHIFT 0 480*4882a593Smuzhiyun #define DA7218_ALC_ATTEN_MAX_MASK (0xF << 0) 481*4882a593Smuzhiyun #define DA7218_ALC_ATTEN_GAIN_MAX 0xF 482*4882a593Smuzhiyun #define DA7218_ALC_GAIN_MAX_SHIFT 4 483*4882a593Smuzhiyun #define DA7218_ALC_GAIN_MAX_MASK (0xF << 4) 484*4882a593Smuzhiyun 485*4882a593Smuzhiyun /* DA7218_ALC_ANA_GAIN_LIMITS = 0x37 */ 486*4882a593Smuzhiyun #define DA7218_ALC_ANA_GAIN_MIN_SHIFT 0 487*4882a593Smuzhiyun #define DA7218_ALC_ANA_GAIN_MIN_MASK (0x7 << 0) 488*4882a593Smuzhiyun #define DA7218_ALC_ANA_GAIN_MIN 0x1 489*4882a593Smuzhiyun #define DA7218_ALC_ANA_GAIN_MAX 0x7 490*4882a593Smuzhiyun #define DA7218_ALC_ANA_GAIN_MAX_SHIFT 4 491*4882a593Smuzhiyun #define DA7218_ALC_ANA_GAIN_MAX_MASK (0x7 << 4) 492*4882a593Smuzhiyun 493*4882a593Smuzhiyun /* DA7218_ALC_ANTICLIP_CTRL = 0x38 */ 494*4882a593Smuzhiyun #define DA7218_ALC_ANTICLIP_STEP_SHIFT 0 495*4882a593Smuzhiyun #define DA7218_ALC_ANTICLIP_STEP_MASK (0x3 << 0) 496*4882a593Smuzhiyun #define DA7218_ALC_ANTICLIP_STEP_MAX 4 497*4882a593Smuzhiyun #define DA7218_ALC_ANTICLIP_EN_SHIFT 7 498*4882a593Smuzhiyun #define DA7218_ALC_ANTICLIP_EN_MASK (0x1 << 7) 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun /* DA7218_AGS_ENABLE = 0x3C */ 501*4882a593Smuzhiyun #define DA7218_AGS_ENABLE_SHIFT 0 502*4882a593Smuzhiyun #define DA7218_AGS_ENABLE_MASK (0x3 << 0) 503*4882a593Smuzhiyun #define DA7218_AGS_ENABLE_CHAN1_SHIFT 0 504*4882a593Smuzhiyun #define DA7218_AGS_ENABLE_CHAN2_SHIFT 1 505*4882a593Smuzhiyun 506*4882a593Smuzhiyun /* DA7218_AGS_TRIGGER = 0x3D */ 507*4882a593Smuzhiyun #define DA7218_AGS_TRIGGER_SHIFT 0 508*4882a593Smuzhiyun #define DA7218_AGS_TRIGGER_MASK (0xF << 0) 509*4882a593Smuzhiyun #define DA7218_AGS_TRIGGER_MAX 0xF 510*4882a593Smuzhiyun 511*4882a593Smuzhiyun /* DA7218_AGS_ATT_MAX = 0x3E */ 512*4882a593Smuzhiyun #define DA7218_AGS_ATT_MAX_SHIFT 0 513*4882a593Smuzhiyun #define DA7218_AGS_ATT_MAX_MASK (0x7 << 0) 514*4882a593Smuzhiyun #define DA7218_AGS_ATT_MAX_MAX 0x7 515*4882a593Smuzhiyun 516*4882a593Smuzhiyun /* DA7218_AGS_TIMEOUT = 0x3F */ 517*4882a593Smuzhiyun #define DA7218_AGS_TIMEOUT_EN_SHIFT 0 518*4882a593Smuzhiyun #define DA7218_AGS_TIMEOUT_EN_MASK (0x1 << 0) 519*4882a593Smuzhiyun 520*4882a593Smuzhiyun /* DA7218_AGS_ANTICLIP_CTRL = 0x40 */ 521*4882a593Smuzhiyun #define DA7218_AGS_ANTICLIP_EN_SHIFT 7 522*4882a593Smuzhiyun #define DA7218_AGS_ANTICLIP_EN_MASK (0x1 << 7) 523*4882a593Smuzhiyun 524*4882a593Smuzhiyun /* DA7218_CALIB_CTRL = 0x44 */ 525*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_EN_SHIFT 0 526*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_EN_MASK (0x1 << 0) 527*4882a593Smuzhiyun #define DA7218_CALIB_AUTO_EN_SHIFT 2 528*4882a593Smuzhiyun #define DA7218_CALIB_AUTO_EN_MASK (0x1 << 2) 529*4882a593Smuzhiyun #define DA7218_CALIB_OVERFLOW_SHIFT 3 530*4882a593Smuzhiyun #define DA7218_CALIB_OVERFLOW_MASK (0x1 << 3) 531*4882a593Smuzhiyun 532*4882a593Smuzhiyun /* DA7218_CALIB_OFFSET_AUTO_M_1 = 0x45 */ 533*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_AUTO_M_1_SHIFT 0 534*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_AUTO_M_1_MASK (0xFF << 0) 535*4882a593Smuzhiyun 536*4882a593Smuzhiyun /* DA7218_CALIB_OFFSET_AUTO_U_1 = 0x46 */ 537*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_AUTO_U_1_SHIFT 0 538*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_AUTO_U_1_MASK (0xF << 0) 539*4882a593Smuzhiyun 540*4882a593Smuzhiyun /* DA7218_CALIB_OFFSET_AUTO_M_2 = 0x47 */ 541*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_AUTO_M_2_SHIFT 0 542*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_AUTO_M_2_MASK (0xFF << 0) 543*4882a593Smuzhiyun 544*4882a593Smuzhiyun /* DA7218_CALIB_OFFSET_AUTO_U_2 = 0x48 */ 545*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_AUTO_U_2_SHIFT 0 546*4882a593Smuzhiyun #define DA7218_CALIB_OFFSET_AUTO_U_2_MASK (0xF << 0) 547*4882a593Smuzhiyun 548*4882a593Smuzhiyun /* DA7218_ENV_TRACK_CTRL = 0x4C */ 549*4882a593Smuzhiyun #define DA7218_INTEG_ATTACK_SHIFT 0 550*4882a593Smuzhiyun #define DA7218_INTEG_ATTACK_MASK (0x3 << 0) 551*4882a593Smuzhiyun #define DA7218_INTEG_RELEASE_SHIFT 4 552*4882a593Smuzhiyun #define DA7218_INTEG_RELEASE_MASK (0x3 << 4) 553*4882a593Smuzhiyun #define DA7218_INTEG_MAX 4 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun /* DA7218_LVL_DET_CTRL = 0x50 */ 556*4882a593Smuzhiyun #define DA7218_LVL_DET_EN_SHIFT 0 557*4882a593Smuzhiyun #define DA7218_LVL_DET_EN_MASK (0xF << 0) 558*4882a593Smuzhiyun #define DA7218_LVL_DET_EN_CHAN1L_SHIFT 0 559*4882a593Smuzhiyun #define DA7218_LVL_DET_EN_CHAN1R_SHIFT 1 560*4882a593Smuzhiyun #define DA7218_LVL_DET_EN_CHAN2L_SHIFT 2 561*4882a593Smuzhiyun #define DA7218_LVL_DET_EN_CHAN2R_SHIFT 3 562*4882a593Smuzhiyun 563*4882a593Smuzhiyun /* DA7218_LVL_DET_LEVEL = 0x51 */ 564*4882a593Smuzhiyun #define DA7218_LVL_DET_LEVEL_SHIFT 0 565*4882a593Smuzhiyun #define DA7218_LVL_DET_LEVEL_MASK (0x7F << 0) 566*4882a593Smuzhiyun #define DA7218_LVL_DET_LEVEL_MAX 0x7F 567*4882a593Smuzhiyun 568*4882a593Smuzhiyun /* DA7218_DGS_TRIGGER = 0x54 */ 569*4882a593Smuzhiyun #define DA7218_DGS_TRIGGER_LVL_SHIFT 0 570*4882a593Smuzhiyun #define DA7218_DGS_TRIGGER_LVL_MASK (0x3F << 0) 571*4882a593Smuzhiyun #define DA7218_DGS_TRIGGER_MAX 0x3F 572*4882a593Smuzhiyun 573*4882a593Smuzhiyun /* DA7218_DGS_ENABLE = 0x55 */ 574*4882a593Smuzhiyun #define DA7218_DGS_ENABLE_SHIFT 0 575*4882a593Smuzhiyun #define DA7218_DGS_ENABLE_MASK (0x3 << 0) 576*4882a593Smuzhiyun #define DA7218_DGS_ENABLE_L_SHIFT 0 577*4882a593Smuzhiyun #define DA7218_DGS_ENABLE_R_SHIFT 1 578*4882a593Smuzhiyun 579*4882a593Smuzhiyun /* DA7218_DGS_RISE_FALL = 0x56 */ 580*4882a593Smuzhiyun #define DA7218_DGS_RISE_COEFF_SHIFT 0 581*4882a593Smuzhiyun #define DA7218_DGS_RISE_COEFF_MASK (0x7 << 0) 582*4882a593Smuzhiyun #define DA7218_DGS_RISE_COEFF_MAX 7 583*4882a593Smuzhiyun #define DA7218_DGS_FALL_COEFF_SHIFT 4 584*4882a593Smuzhiyun #define DA7218_DGS_FALL_COEFF_MASK (0x7 << 4) 585*4882a593Smuzhiyun #define DA7218_DGS_FALL_COEFF_MAX 8 586*4882a593Smuzhiyun 587*4882a593Smuzhiyun /* DA7218_DGS_SYNC_DELAY = 0x57 */ 588*4882a593Smuzhiyun #define DA7218_DGS_SYNC_DELAY_SHIFT 0 589*4882a593Smuzhiyun #define DA7218_DGS_SYNC_DELAY_MASK (0xFF << 0) 590*4882a593Smuzhiyun #define DA7218_DGS_SYNC_DELAY_MAX 0xFF 591*4882a593Smuzhiyun 592*4882a593Smuzhiyun /* DA7218_DGS_SYNC_DELAY2 = 0x58 */ 593*4882a593Smuzhiyun #define DA7218_DGS_SYNC_DELAY2_SHIFT 0 594*4882a593Smuzhiyun #define DA7218_DGS_SYNC_DELAY2_MASK (0xFF << 0) 595*4882a593Smuzhiyun 596*4882a593Smuzhiyun /* DA7218_DGS_SYNC_DELAY3 = 0x59 */ 597*4882a593Smuzhiyun #define DA7218_DGS_SYNC_DELAY3_SHIFT 0 598*4882a593Smuzhiyun #define DA7218_DGS_SYNC_DELAY3_MASK (0x7F << 0) 599*4882a593Smuzhiyun #define DA7218_DGS_SYNC_DELAY3_MAX 0x7F 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun /* DA7218_DGS_LEVELS = 0x5A */ 602*4882a593Smuzhiyun #define DA7218_DGS_ANTICLIP_LVL_SHIFT 0 603*4882a593Smuzhiyun #define DA7218_DGS_ANTICLIP_LVL_MASK (0x7 << 0) 604*4882a593Smuzhiyun #define DA7218_DGS_ANTICLIP_LVL_MAX 0x7 605*4882a593Smuzhiyun #define DA7218_DGS_SIGNAL_LVL_SHIFT 4 606*4882a593Smuzhiyun #define DA7218_DGS_SIGNAL_LVL_MASK (0xF << 4) 607*4882a593Smuzhiyun #define DA7218_DGS_SIGNAL_LVL_MAX 0xF 608*4882a593Smuzhiyun 609*4882a593Smuzhiyun /* DA7218_DGS_GAIN_CTRL = 0x5B */ 610*4882a593Smuzhiyun #define DA7218_DGS_STEPS_SHIFT 0 611*4882a593Smuzhiyun #define DA7218_DGS_STEPS_MASK (0x1F << 0) 612*4882a593Smuzhiyun #define DA7218_DGS_STEPS_MAX 0x1F 613*4882a593Smuzhiyun #define DA7218_DGS_RAMP_EN_SHIFT 5 614*4882a593Smuzhiyun #define DA7218_DGS_RAMP_EN_MASK (0x1 << 5) 615*4882a593Smuzhiyun #define DA7218_DGS_SUBR_EN_SHIFT 6 616*4882a593Smuzhiyun #define DA7218_DGS_SUBR_EN_MASK (0x1 << 6) 617*4882a593Smuzhiyun 618*4882a593Smuzhiyun /* DA7218_DROUTING_OUTDAI_1L = 0x5C */ 619*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_SRC_SHIFT 0 620*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_SRC_MASK (0x7F << 0) 621*4882a593Smuzhiyun #define DA7218_DMIX_SRC_INFILT1L 0 622*4882a593Smuzhiyun #define DA7218_DMIX_SRC_INFILT1R 1 623*4882a593Smuzhiyun #define DA7218_DMIX_SRC_INFILT2L 2 624*4882a593Smuzhiyun #define DA7218_DMIX_SRC_INFILT2R 3 625*4882a593Smuzhiyun #define DA7218_DMIX_SRC_TONEGEN 4 626*4882a593Smuzhiyun #define DA7218_DMIX_SRC_DAIL 5 627*4882a593Smuzhiyun #define DA7218_DMIX_SRC_DAIR 6 628*4882a593Smuzhiyun 629*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1L_INFILT_1L_GAIN = 0x5D */ 630*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_INFILT_1L_GAIN_SHIFT 0 631*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_INFILT_1L_GAIN_MASK (0x1F << 0) 632*4882a593Smuzhiyun #define DA7218_DMIX_GAIN_MAX 0x1F 633*4882a593Smuzhiyun 634*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1L_INFILT_1R_GAIN = 0x5E */ 635*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_INFILT_1R_GAIN_SHIFT 0 636*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_INFILT_1R_GAIN_MASK (0x1F << 0) 637*4882a593Smuzhiyun 638*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1L_INFILT_2L_GAIN = 0x5F */ 639*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_INFILT_2L_GAIN_SHIFT 0 640*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_INFILT_2L_GAIN_MASK (0x1F << 0) 641*4882a593Smuzhiyun 642*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1L_INFILT_2R_GAIN = 0x60 */ 643*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_INFILT_2R_GAIN_SHIFT 0 644*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_INFILT_2R_GAIN_MASK (0x1F << 0) 645*4882a593Smuzhiyun 646*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1L_TONEGEN_GAIN = 0x61 */ 647*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_TONEGEN_GAIN_SHIFT 0 648*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_TONEGEN_GAIN_MASK (0x1F << 0) 649*4882a593Smuzhiyun 650*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1L_INDAI_1L_GAIN = 0x62 */ 651*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_INDAI_1L_GAIN_SHIFT 0 652*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_INDAI_1L_GAIN_MASK (0x1F << 0) 653*4882a593Smuzhiyun 654*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1L_INDAI_1R_GAIN = 0x63 */ 655*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_INDAI_1R_GAIN_SHIFT 0 656*4882a593Smuzhiyun #define DA7218_OUTDAI_1L_INDAI_1R_GAIN_MASK (0x1F << 0) 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun /* DA7218_DROUTING_OUTDAI_1R = 0x64 */ 659*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_SRC_SHIFT 0 660*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_SRC_MASK (0x7F << 0) 661*4882a593Smuzhiyun 662*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1R_INFILT_1L_GAIN = 0x65 */ 663*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_INFILT_1L_GAIN_SHIFT 0 664*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_INFILT_1L_GAIN_MASK (0x1F << 0) 665*4882a593Smuzhiyun 666*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1R_INFILT_1R_GAIN = 0x66 */ 667*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_INFILT_1R_GAIN_SHIFT 0 668*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_INFILT_1R_GAIN_MASK (0x1F << 0) 669*4882a593Smuzhiyun 670*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1R_INFILT_2L_GAIN = 0x67 */ 671*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_INFILT_2L_GAIN_SHIFT 0 672*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_INFILT_2L_GAIN_MASK (0x1F << 0) 673*4882a593Smuzhiyun 674*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1R_INFILT_2R_GAIN = 0x68 */ 675*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_INFILT_2R_GAIN_SHIFT 0 676*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_INFILT_2R_GAIN_MASK (0x1F << 0) 677*4882a593Smuzhiyun 678*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1R_TONEGEN_GAIN = 0x69 */ 679*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_TONEGEN_GAIN_SHIFT 0 680*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_TONEGEN_GAIN_MASK (0x1F << 0) 681*4882a593Smuzhiyun 682*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1R_INDAI_1L_GAIN = 0x6A */ 683*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_INDAI_1L_GAIN_SHIFT 0 684*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_INDAI_1L_GAIN_MASK (0x1F << 0) 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_1R_INDAI_1R_GAIN = 0x6B */ 687*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_INDAI_1R_GAIN_SHIFT 0 688*4882a593Smuzhiyun #define DA7218_OUTDAI_1R_INDAI_1R_GAIN_MASK (0x1F << 0) 689*4882a593Smuzhiyun 690*4882a593Smuzhiyun /* DA7218_DROUTING_OUTFILT_1L = 0x6C */ 691*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_SRC_SHIFT 0 692*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_SRC_MASK (0x7F << 0) 693*4882a593Smuzhiyun 694*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1L_INFILT_1L_GAIN = 0x6D */ 695*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_INFILT_1L_GAIN_SHIFT 0 696*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_INFILT_1L_GAIN_MASK (0x1F << 0) 697*4882a593Smuzhiyun 698*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1L_INFILT_1R_GAIN = 0x6E */ 699*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_INFILT_1R_GAIN_SHIFT 0 700*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_INFILT_1R_GAIN_MASK (0x1F << 0) 701*4882a593Smuzhiyun 702*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1L_INFILT_2L_GAIN = 0x6F */ 703*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_INFILT_2L_GAIN_SHIFT 0 704*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_INFILT_2L_GAIN_MASK (0x1F << 0) 705*4882a593Smuzhiyun 706*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1L_INFILT_2R_GAIN = 0x70 */ 707*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_INFILT_2R_GAIN_SHIFT 0 708*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_INFILT_2R_GAIN_MASK (0x1F << 0) 709*4882a593Smuzhiyun 710*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1L_TONEGEN_GAIN = 0x71 */ 711*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_TONEGEN_GAIN_SHIFT 0 712*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_TONEGEN_GAIN_MASK (0x1F << 0) 713*4882a593Smuzhiyun 714*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1L_INDAI_1L_GAIN = 0x72 */ 715*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_INDAI_1L_GAIN_SHIFT 0 716*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_INDAI_1L_GAIN_MASK (0x1F << 0) 717*4882a593Smuzhiyun 718*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1L_INDAI_1R_GAIN = 0x73 */ 719*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_INDAI_1R_GAIN_SHIFT 0 720*4882a593Smuzhiyun #define DA7218_OUTFILT_1L_INDAI_1R_GAIN_MASK (0x1F << 0) 721*4882a593Smuzhiyun 722*4882a593Smuzhiyun /* DA7218_DROUTING_OUTFILT_1R = 0x74 */ 723*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_SRC_SHIFT 0 724*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_SRC_MASK (0x7F << 0) 725*4882a593Smuzhiyun 726*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1R_INFILT_1L_GAIN = 0x75 */ 727*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_INFILT_1L_GAIN_SHIFT 0 728*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_INFILT_1L_GAIN_MASK (0x1F << 0) 729*4882a593Smuzhiyun 730*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1R_INFILT_1R_GAIN = 0x76 */ 731*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_INFILT_1R_GAIN_SHIFT 0 732*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_INFILT_1R_GAIN_MASK (0x1F << 0) 733*4882a593Smuzhiyun 734*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1R_INFILT_2L_GAIN = 0x77 */ 735*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_INFILT_2L_GAIN_SHIFT 0 736*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_INFILT_2L_GAIN_MASK (0x1F << 0) 737*4882a593Smuzhiyun 738*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1R_INFILT_2R_GAIN = 0x78 */ 739*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_INFILT_2R_GAIN_SHIFT 0 740*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_INFILT_2R_GAIN_MASK (0x1F << 0) 741*4882a593Smuzhiyun 742*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1R_TONEGEN_GAIN = 0x79 */ 743*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_TONEGEN_GAIN_SHIFT 0 744*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_TONEGEN_GAIN_MASK (0x1F << 0) 745*4882a593Smuzhiyun 746*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1R_INDAI_1L_GAIN = 0x7A */ 747*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_INDAI_1L_GAIN_SHIFT 0 748*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_INDAI_1L_GAIN_MASK (0x1F << 0) 749*4882a593Smuzhiyun 750*4882a593Smuzhiyun /* DA7218_DMIX_OUTFILT_1R_INDAI_1R_GAIN = 0x7B */ 751*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_INDAI_1R_GAIN_SHIFT 0 752*4882a593Smuzhiyun #define DA7218_OUTFILT_1R_INDAI_1R_GAIN_MASK (0x1F << 0) 753*4882a593Smuzhiyun 754*4882a593Smuzhiyun /* DA7218_DROUTING_OUTDAI_2L = 0x7C */ 755*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_SRC_SHIFT 0 756*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_SRC_MASK (0x7F << 0) 757*4882a593Smuzhiyun 758*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2L_INFILT_1L_GAIN = 0x7D */ 759*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_INFILT_1L_GAIN_SHIFT 0 760*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_INFILT_1L_GAIN_MASK (0x1F << 0) 761*4882a593Smuzhiyun 762*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2L_INFILT_1R_GAIN = 0x7E */ 763*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_INFILT_1R_GAIN_SHIFT 0 764*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_INFILT_1R_GAIN_MASK (0x1F << 0) 765*4882a593Smuzhiyun 766*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2L_INFILT_2L_GAIN = 0x7F */ 767*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_INFILT_2L_GAIN_SHIFT 0 768*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_INFILT_2L_GAIN_MASK (0x1F << 0) 769*4882a593Smuzhiyun 770*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2L_INFILT_2R_GAIN = 0x80 */ 771*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_INFILT_2R_GAIN_SHIFT 0 772*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_INFILT_2R_GAIN_MASK (0x1F << 0) 773*4882a593Smuzhiyun 774*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2L_TONEGEN_GAIN = 0x81 */ 775*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_TONEGEN_GAIN_SHIFT 0 776*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_TONEGEN_GAIN_MASK (0x1F << 0) 777*4882a593Smuzhiyun 778*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2L_INDAI_1L_GAIN = 0x82 */ 779*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_INDAI_1L_GAIN_SHIFT 0 780*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_INDAI_1L_GAIN_MASK (0x1F << 0) 781*4882a593Smuzhiyun 782*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2L_INDAI_1R_GAIN = 0x83 */ 783*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_INDAI_1R_GAIN_SHIFT 0 784*4882a593Smuzhiyun #define DA7218_OUTDAI_2L_INDAI_1R_GAIN_MASK (0x1F << 0) 785*4882a593Smuzhiyun 786*4882a593Smuzhiyun /* DA7218_DROUTING_OUTDAI_2R = 0x84 */ 787*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_SRC_SHIFT 0 788*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_SRC_MASK (0x7F << 0) 789*4882a593Smuzhiyun 790*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2R_INFILT_1L_GAIN = 0x85 */ 791*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_INFILT_1L_GAIN_SHIFT 0 792*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_INFILT_1L_GAIN_MASK (0x1F << 0) 793*4882a593Smuzhiyun 794*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2R_INFILT_1R_GAIN = 0x86 */ 795*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_INFILT_1R_GAIN_SHIFT 0 796*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_INFILT_1R_GAIN_MASK (0x1F << 0) 797*4882a593Smuzhiyun 798*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2R_INFILT_2L_GAIN = 0x87 */ 799*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_INFILT_2L_GAIN_SHIFT 0 800*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_INFILT_2L_GAIN_MASK (0x1F << 0) 801*4882a593Smuzhiyun 802*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2R_INFILT_2R_GAIN = 0x88 */ 803*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_INFILT_2R_GAIN_SHIFT 0 804*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_INFILT_2R_GAIN_MASK (0x1F << 0) 805*4882a593Smuzhiyun 806*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2R_TONEGEN_GAIN = 0x89 */ 807*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_TONEGEN_GAIN_SHIFT 0 808*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_TONEGEN_GAIN_MASK (0x1F << 0) 809*4882a593Smuzhiyun 810*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2R_INDAI_1L_GAIN = 0x8A */ 811*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_INDAI_1L_GAIN_SHIFT 0 812*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_INDAI_1L_GAIN_MASK (0x1F << 0) 813*4882a593Smuzhiyun 814*4882a593Smuzhiyun /* DA7218_DMIX_OUTDAI_2R_INDAI_1R_GAIN = 0x8B */ 815*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_INDAI_1R_GAIN_SHIFT 0 816*4882a593Smuzhiyun #define DA7218_OUTDAI_2R_INDAI_1R_GAIN_MASK (0x1F << 0) 817*4882a593Smuzhiyun 818*4882a593Smuzhiyun /* DA7218_DAI_CTRL = 0x8C */ 819*4882a593Smuzhiyun #define DA7218_DAI_FORMAT_SHIFT 0 820*4882a593Smuzhiyun #define DA7218_DAI_FORMAT_MASK (0x3 << 0) 821*4882a593Smuzhiyun #define DA7218_DAI_FORMAT_I2S (0x0 << 0) 822*4882a593Smuzhiyun #define DA7218_DAI_FORMAT_LEFT_J (0x1 << 0) 823*4882a593Smuzhiyun #define DA7218_DAI_FORMAT_RIGHT_J (0x2 << 0) 824*4882a593Smuzhiyun #define DA7218_DAI_FORMAT_DSP (0x3 << 0) 825*4882a593Smuzhiyun #define DA7218_DAI_WORD_LENGTH_SHIFT 2 826*4882a593Smuzhiyun #define DA7218_DAI_WORD_LENGTH_MASK (0x3 << 2) 827*4882a593Smuzhiyun #define DA7218_DAI_WORD_LENGTH_S16_LE (0x0 << 2) 828*4882a593Smuzhiyun #define DA7218_DAI_WORD_LENGTH_S20_LE (0x1 << 2) 829*4882a593Smuzhiyun #define DA7218_DAI_WORD_LENGTH_S24_LE (0x2 << 2) 830*4882a593Smuzhiyun #define DA7218_DAI_WORD_LENGTH_S32_LE (0x3 << 2) 831*4882a593Smuzhiyun #define DA7218_DAI_CH_NUM_SHIFT 4 832*4882a593Smuzhiyun #define DA7218_DAI_CH_NUM_MASK (0x7 << 4) 833*4882a593Smuzhiyun #define DA7218_DAI_CH_NUM_MAX 4 834*4882a593Smuzhiyun #define DA7218_DAI_EN_SHIFT 7 835*4882a593Smuzhiyun #define DA7218_DAI_EN_MASK (0x1 << 7) 836*4882a593Smuzhiyun 837*4882a593Smuzhiyun /* DA7218_DAI_TDM_CTRL = 0x8D */ 838*4882a593Smuzhiyun #define DA7218_DAI_TDM_CH_EN_SHIFT 0 839*4882a593Smuzhiyun #define DA7218_DAI_TDM_CH_EN_MASK (0xF << 0) 840*4882a593Smuzhiyun #define DA7218_DAI_TDM_MAX_SLOTS 4 841*4882a593Smuzhiyun #define DA7218_DAI_OE_SHIFT 6 842*4882a593Smuzhiyun #define DA7218_DAI_OE_MASK (0x1 << 6) 843*4882a593Smuzhiyun #define DA7218_DAI_TDM_MODE_EN_SHIFT 7 844*4882a593Smuzhiyun #define DA7218_DAI_TDM_MODE_EN_MASK (0x1 << 7) 845*4882a593Smuzhiyun 846*4882a593Smuzhiyun /* DA7218_DAI_OFFSET_LOWER = 0x8E */ 847*4882a593Smuzhiyun #define DA7218_DAI_OFFSET_LOWER_SHIFT 0 848*4882a593Smuzhiyun #define DA7218_DAI_OFFSET_LOWER_MASK (0xFF << 0) 849*4882a593Smuzhiyun 850*4882a593Smuzhiyun /* DA7218_DAI_OFFSET_UPPER = 0x8F */ 851*4882a593Smuzhiyun #define DA7218_DAI_OFFSET_UPPER_SHIFT 0 852*4882a593Smuzhiyun #define DA7218_DAI_OFFSET_UPPER_MASK (0x7 << 0) 853*4882a593Smuzhiyun 854*4882a593Smuzhiyun /* DA7218_DAI_CLK_MODE = 0x90 */ 855*4882a593Smuzhiyun #define DA7218_DAI_BCLKS_PER_WCLK_SHIFT 0 856*4882a593Smuzhiyun #define DA7218_DAI_BCLKS_PER_WCLK_MASK (0x3 << 0) 857*4882a593Smuzhiyun #define DA7218_DAI_BCLKS_PER_WCLK_32 (0x0 << 0) 858*4882a593Smuzhiyun #define DA7218_DAI_BCLKS_PER_WCLK_64 (0x1 << 0) 859*4882a593Smuzhiyun #define DA7218_DAI_BCLKS_PER_WCLK_128 (0x2 << 0) 860*4882a593Smuzhiyun #define DA7218_DAI_BCLKS_PER_WCLK_256 (0x3 << 0) 861*4882a593Smuzhiyun #define DA7218_DAI_CLK_POL_SHIFT 2 862*4882a593Smuzhiyun #define DA7218_DAI_CLK_POL_MASK (0x1 << 2) 863*4882a593Smuzhiyun #define DA7218_DAI_CLK_POL_INV (0x1 << 2) 864*4882a593Smuzhiyun #define DA7218_DAI_WCLK_POL_SHIFT 3 865*4882a593Smuzhiyun #define DA7218_DAI_WCLK_POL_MASK (0x1 << 3) 866*4882a593Smuzhiyun #define DA7218_DAI_WCLK_POL_INV (0x1 << 3) 867*4882a593Smuzhiyun #define DA7218_DAI_WCLK_TRI_STATE_SHIFT 4 868*4882a593Smuzhiyun #define DA7218_DAI_WCLK_TRI_STATE_MASK (0x1 << 4) 869*4882a593Smuzhiyun #define DA7218_DAI_CLK_EN_SHIFT 7 870*4882a593Smuzhiyun #define DA7218_DAI_CLK_EN_MASK (0x1 << 7) 871*4882a593Smuzhiyun 872*4882a593Smuzhiyun /* DA7218_PLL_CTRL = 0x91 */ 873*4882a593Smuzhiyun #define DA7218_PLL_INDIV_SHIFT 0 874*4882a593Smuzhiyun #define DA7218_PLL_INDIV_MASK (0x7 << 0) 875*4882a593Smuzhiyun #define DA7218_PLL_INDIV_2_TO_4_5_MHZ (0x0 << 0) 876*4882a593Smuzhiyun #define DA7218_PLL_INDIV_4_5_TO_9_MHZ (0x1 << 0) 877*4882a593Smuzhiyun #define DA7218_PLL_INDIV_9_TO_18_MHZ (0x2 << 0) 878*4882a593Smuzhiyun #define DA7218_PLL_INDIV_18_TO_36_MHZ (0x3 << 0) 879*4882a593Smuzhiyun #define DA7218_PLL_INDIV_36_TO_54_MHZ (0x4 << 0) 880*4882a593Smuzhiyun #define DA7218_PLL_MCLK_SQR_EN_SHIFT 4 881*4882a593Smuzhiyun #define DA7218_PLL_MCLK_SQR_EN_MASK (0x1 << 4) 882*4882a593Smuzhiyun #define DA7218_PLL_MODE_SHIFT 6 883*4882a593Smuzhiyun #define DA7218_PLL_MODE_MASK (0x3 << 6) 884*4882a593Smuzhiyun #define DA7218_PLL_MODE_BYPASS (0x0 << 6) 885*4882a593Smuzhiyun #define DA7218_PLL_MODE_NORMAL (0x1 << 6) 886*4882a593Smuzhiyun #define DA7218_PLL_MODE_SRM (0x2 << 6) 887*4882a593Smuzhiyun 888*4882a593Smuzhiyun /* DA7218_PLL_FRAC_TOP = 0x92 */ 889*4882a593Smuzhiyun #define DA7218_PLL_FBDIV_FRAC_TOP_SHIFT 0 890*4882a593Smuzhiyun #define DA7218_PLL_FBDIV_FRAC_TOP_MASK (0x1F << 0) 891*4882a593Smuzhiyun 892*4882a593Smuzhiyun /* DA7218_PLL_FRAC_BOT = 0x93 */ 893*4882a593Smuzhiyun #define DA7218_PLL_FBDIV_FRAC_BOT_SHIFT 0 894*4882a593Smuzhiyun #define DA7218_PLL_FBDIV_FRAC_BOT_MASK (0xFF << 0) 895*4882a593Smuzhiyun 896*4882a593Smuzhiyun /* DA7218_PLL_INTEGER = 0x94 */ 897*4882a593Smuzhiyun #define DA7218_PLL_FBDIV_INTEGER_SHIFT 0 898*4882a593Smuzhiyun #define DA7218_PLL_FBDIV_INTEGER_MASK (0x7F << 0) 899*4882a593Smuzhiyun 900*4882a593Smuzhiyun /* DA7218_PLL_STATUS = 0x95 */ 901*4882a593Smuzhiyun #define DA7218_PLL_SRM_STATUS_SHIFT 0 902*4882a593Smuzhiyun #define DA7218_PLL_SRM_STATUS_MASK (0xFF << 0) 903*4882a593Smuzhiyun #define DA7218_PLL_SRM_STATUS_SRM_LOCK (0x1 << 7) 904*4882a593Smuzhiyun 905*4882a593Smuzhiyun /* DA7218_PLL_REFOSC_CAL = 0x98 */ 906*4882a593Smuzhiyun #define DA7218_PLL_REFOSC_CAL_CTRL_SHIFT 0 907*4882a593Smuzhiyun #define DA7218_PLL_REFOSC_CAL_CTRL_MASK (0x1F << 0) 908*4882a593Smuzhiyun #define DA7218_PLL_REFOSC_CAL_START_SHIFT 6 909*4882a593Smuzhiyun #define DA7218_PLL_REFOSC_CAL_START_MASK (0x1 << 6) 910*4882a593Smuzhiyun #define DA7218_PLL_REFOSC_CAL_EN_SHIFT 7 911*4882a593Smuzhiyun #define DA7218_PLL_REFOSC_CAL_EN_MASK (0x1 << 7) 912*4882a593Smuzhiyun 913*4882a593Smuzhiyun /* DA7218_DAC_NG_CTRL = 0x9C */ 914*4882a593Smuzhiyun #define DA7218_DAC_NG_EN_SHIFT 7 915*4882a593Smuzhiyun #define DA7218_DAC_NG_EN_MASK (0x1 << 7) 916*4882a593Smuzhiyun 917*4882a593Smuzhiyun /* DA7218_DAC_NG_SETUP_TIME = 0x9D */ 918*4882a593Smuzhiyun #define DA7218_DAC_NG_SETUP_TIME_SHIFT 0 919*4882a593Smuzhiyun #define DA7218_DAC_NG_SETUP_TIME_MASK (0x3 << 0) 920*4882a593Smuzhiyun #define DA7218_DAC_NG_SETUP_TIME_MAX 4 921*4882a593Smuzhiyun #define DA7218_DAC_NG_RAMPUP_RATE_SHIFT 2 922*4882a593Smuzhiyun #define DA7218_DAC_NG_RAMPUP_RATE_MASK (0x1 << 2) 923*4882a593Smuzhiyun #define DA7218_DAC_NG_RAMPUP_RATE_MAX 2 924*4882a593Smuzhiyun #define DA7218_DAC_NG_RAMPDN_RATE_SHIFT 3 925*4882a593Smuzhiyun #define DA7218_DAC_NG_RAMPDN_RATE_MASK (0x1 << 3) 926*4882a593Smuzhiyun #define DA7218_DAC_NG_RAMPDN_RATE_MAX 2 927*4882a593Smuzhiyun 928*4882a593Smuzhiyun /* DA7218_DAC_NG_OFF_THRESH = 0x9E */ 929*4882a593Smuzhiyun #define DA7218_DAC_NG_OFF_THRESHOLD_SHIFT 0 930*4882a593Smuzhiyun #define DA7218_DAC_NG_OFF_THRESHOLD_MASK (0x7 << 0) 931*4882a593Smuzhiyun #define DA7218_DAC_NG_THRESHOLD_MAX 0x7 932*4882a593Smuzhiyun 933*4882a593Smuzhiyun /* DA7218_DAC_NG_ON_THRESH = 0x9F */ 934*4882a593Smuzhiyun #define DA7218_DAC_NG_ON_THRESHOLD_SHIFT 0 935*4882a593Smuzhiyun #define DA7218_DAC_NG_ON_THRESHOLD_MASK (0x7 << 0) 936*4882a593Smuzhiyun 937*4882a593Smuzhiyun /* DA7218_TONE_GEN_CFG1 = 0xA0 */ 938*4882a593Smuzhiyun #define DA7218_DTMF_REG_SHIFT 0 939*4882a593Smuzhiyun #define DA7218_DTMF_REG_MASK (0xF << 0) 940*4882a593Smuzhiyun #define DA7218_DTMF_REG_MAX 16 941*4882a593Smuzhiyun #define DA7218_DTMF_EN_SHIFT 4 942*4882a593Smuzhiyun #define DA7218_DTMF_EN_MASK (0x1 << 4) 943*4882a593Smuzhiyun #define DA7218_START_STOPN_SHIFT 7 944*4882a593Smuzhiyun #define DA7218_START_STOPN_MASK (0x1 << 7) 945*4882a593Smuzhiyun 946*4882a593Smuzhiyun /* DA7218_TONE_GEN_CFG2 = 0xA1 */ 947*4882a593Smuzhiyun #define DA7218_SWG_SEL_SHIFT 0 948*4882a593Smuzhiyun #define DA7218_SWG_SEL_MASK (0x3 << 0) 949*4882a593Smuzhiyun #define DA7218_SWG_SEL_MAX 4 950*4882a593Smuzhiyun 951*4882a593Smuzhiyun /* DA7218_TONE_GEN_FREQ1_L = 0xA2 */ 952*4882a593Smuzhiyun #define DA7218_FREQ1_L_SHIFT 0 953*4882a593Smuzhiyun #define DA7218_FREQ1_L_MASK (0xFF << 0) 954*4882a593Smuzhiyun #define DA7218_FREQ_MAX 0xFFFF 955*4882a593Smuzhiyun 956*4882a593Smuzhiyun /* DA7218_TONE_GEN_FREQ1_U = 0xA3 */ 957*4882a593Smuzhiyun #define DA7218_FREQ1_U_SHIFT 0 958*4882a593Smuzhiyun #define DA7218_FREQ1_U_MASK (0xFF << 0) 959*4882a593Smuzhiyun 960*4882a593Smuzhiyun /* DA7218_TONE_GEN_FREQ2_L = 0xA4 */ 961*4882a593Smuzhiyun #define DA7218_FREQ2_L_SHIFT 0 962*4882a593Smuzhiyun #define DA7218_FREQ2_L_MASK (0xFF << 0) 963*4882a593Smuzhiyun 964*4882a593Smuzhiyun /* DA7218_TONE_GEN_FREQ2_U = 0xA5 */ 965*4882a593Smuzhiyun #define DA7218_FREQ2_U_SHIFT 0 966*4882a593Smuzhiyun #define DA7218_FREQ2_U_MASK (0xFF << 0) 967*4882a593Smuzhiyun 968*4882a593Smuzhiyun /* DA7218_TONE_GEN_CYCLES = 0xA6 */ 969*4882a593Smuzhiyun #define DA7218_BEEP_CYCLES_SHIFT 0 970*4882a593Smuzhiyun #define DA7218_BEEP_CYCLES_MASK (0x7 << 0) 971*4882a593Smuzhiyun 972*4882a593Smuzhiyun /* DA7218_TONE_GEN_ON_PER = 0xA7 */ 973*4882a593Smuzhiyun #define DA7218_BEEP_ON_PER_SHIFT 0 974*4882a593Smuzhiyun #define DA7218_BEEP_ON_PER_MASK (0x3F << 0) 975*4882a593Smuzhiyun 976*4882a593Smuzhiyun /* DA7218_TONE_GEN_OFF_PER = 0xA8 */ 977*4882a593Smuzhiyun #define DA7218_BEEP_OFF_PER_SHIFT 0 978*4882a593Smuzhiyun #define DA7218_BEEP_OFF_PER_MASK (0x3F << 0) 979*4882a593Smuzhiyun #define DA7218_BEEP_ON_OFF_MAX 0x3F 980*4882a593Smuzhiyun 981*4882a593Smuzhiyun /* DA7218_CP_CTRL = 0xAC */ 982*4882a593Smuzhiyun #define DA7218_CP_MOD_SHIFT 2 983*4882a593Smuzhiyun #define DA7218_CP_MOD_MASK (0x3 << 2) 984*4882a593Smuzhiyun #define DA7218_CP_MCHANGE_SHIFT 4 985*4882a593Smuzhiyun #define DA7218_CP_MCHANGE_MASK (0x3 << 4) 986*4882a593Smuzhiyun #define DA7218_CP_MCHANGE_REL_MASK 0x3 987*4882a593Smuzhiyun #define DA7218_CP_MCHANGE_MAX 3 988*4882a593Smuzhiyun #define DA7218_CP_MCHANGE_LARGEST_VOL 0x1 989*4882a593Smuzhiyun #define DA7218_CP_MCHANGE_DAC_VOL 0x2 990*4882a593Smuzhiyun #define DA7218_CP_MCHANGE_SIG_MAG 0x3 991*4882a593Smuzhiyun #define DA7218_CP_SMALL_SWITCH_FREQ_EN_SHIFT 6 992*4882a593Smuzhiyun #define DA7218_CP_SMALL_SWITCH_FREQ_EN_MASK (0x1 << 6) 993*4882a593Smuzhiyun #define DA7218_CP_EN_SHIFT 7 994*4882a593Smuzhiyun #define DA7218_CP_EN_MASK (0x1 << 7) 995*4882a593Smuzhiyun 996*4882a593Smuzhiyun /* DA7218_CP_DELAY = 0xAD */ 997*4882a593Smuzhiyun #define DA7218_CP_FCONTROL_SHIFT 0 998*4882a593Smuzhiyun #define DA7218_CP_FCONTROL_MASK (0x7 << 0) 999*4882a593Smuzhiyun #define DA7218_CP_FCONTROL_MAX 6 1000*4882a593Smuzhiyun #define DA7218_CP_TAU_DELAY_SHIFT 3 1001*4882a593Smuzhiyun #define DA7218_CP_TAU_DELAY_MASK (0x7 << 3) 1002*4882a593Smuzhiyun #define DA7218_CP_TAU_DELAY_MAX 8 1003*4882a593Smuzhiyun 1004*4882a593Smuzhiyun /* DA7218_CP_VOL_THRESHOLD1 = 0xAE */ 1005*4882a593Smuzhiyun #define DA7218_CP_THRESH_VDD2_SHIFT 0 1006*4882a593Smuzhiyun #define DA7218_CP_THRESH_VDD2_MASK (0x3F << 0) 1007*4882a593Smuzhiyun #define DA7218_CP_THRESH_VDD2_MAX 0x3F 1008*4882a593Smuzhiyun 1009*4882a593Smuzhiyun /* DA7218_MIC_1_CTRL = 0xB4 */ 1010*4882a593Smuzhiyun #define DA7218_MIC_1_AMP_MUTE_EN_SHIFT 6 1011*4882a593Smuzhiyun #define DA7218_MIC_1_AMP_MUTE_EN_MASK (0x1 << 6) 1012*4882a593Smuzhiyun #define DA7218_MIC_1_AMP_EN_SHIFT 7 1013*4882a593Smuzhiyun #define DA7218_MIC_1_AMP_EN_MASK (0x1 << 7) 1014*4882a593Smuzhiyun 1015*4882a593Smuzhiyun /* DA7218_MIC_1_GAIN = 0xB5 */ 1016*4882a593Smuzhiyun #define DA7218_MIC_1_AMP_GAIN_SHIFT 0 1017*4882a593Smuzhiyun #define DA7218_MIC_1_AMP_GAIN_MASK (0x7 << 0) 1018*4882a593Smuzhiyun #define DA7218_MIC_AMP_GAIN_MAX 0x7 1019*4882a593Smuzhiyun 1020*4882a593Smuzhiyun /* DA7218_MIC_1_SELECT = 0xB7 */ 1021*4882a593Smuzhiyun #define DA7218_MIC_1_AMP_IN_SEL_SHIFT 0 1022*4882a593Smuzhiyun #define DA7218_MIC_1_AMP_IN_SEL_MASK (0x3 << 0) 1023*4882a593Smuzhiyun 1024*4882a593Smuzhiyun /* DA7218_MIC_2_CTRL = 0xB8 */ 1025*4882a593Smuzhiyun #define DA7218_MIC_2_AMP_MUTE_EN_SHIFT 6 1026*4882a593Smuzhiyun #define DA7218_MIC_2_AMP_MUTE_EN_MASK (0x1 << 6) 1027*4882a593Smuzhiyun #define DA7218_MIC_2_AMP_EN_SHIFT 7 1028*4882a593Smuzhiyun #define DA7218_MIC_2_AMP_EN_MASK (0x1 << 7) 1029*4882a593Smuzhiyun 1030*4882a593Smuzhiyun /* DA7218_MIC_2_GAIN = 0xB9 */ 1031*4882a593Smuzhiyun #define DA7218_MIC_2_AMP_GAIN_SHIFT 0 1032*4882a593Smuzhiyun #define DA7218_MIC_2_AMP_GAIN_MASK (0x7 << 0) 1033*4882a593Smuzhiyun 1034*4882a593Smuzhiyun /* DA7218_MIC_2_SELECT = 0xBB */ 1035*4882a593Smuzhiyun #define DA7218_MIC_2_AMP_IN_SEL_SHIFT 0 1036*4882a593Smuzhiyun #define DA7218_MIC_2_AMP_IN_SEL_MASK (0x3 << 0) 1037*4882a593Smuzhiyun 1038*4882a593Smuzhiyun /* DA7218_IN_1_HPF_FILTER_CTRL = 0xBC */ 1039*4882a593Smuzhiyun #define DA7218_IN_1_VOICE_HPF_CORNER_SHIFT 0 1040*4882a593Smuzhiyun #define DA7218_IN_1_VOICE_HPF_CORNER_MASK (0x7 << 0) 1041*4882a593Smuzhiyun #define DA7218_IN_VOICE_HPF_CORNER_MAX 8 1042*4882a593Smuzhiyun #define DA7218_IN_1_VOICE_EN_SHIFT 3 1043*4882a593Smuzhiyun #define DA7218_IN_1_VOICE_EN_MASK (0x1 << 3) 1044*4882a593Smuzhiyun #define DA7218_IN_1_AUDIO_HPF_CORNER_SHIFT 4 1045*4882a593Smuzhiyun #define DA7218_IN_1_AUDIO_HPF_CORNER_MASK (0x3 << 4) 1046*4882a593Smuzhiyun #define DA7218_IN_1_HPF_EN_SHIFT 7 1047*4882a593Smuzhiyun #define DA7218_IN_1_HPF_EN_MASK (0x1 << 7) 1048*4882a593Smuzhiyun 1049*4882a593Smuzhiyun /* DA7218_IN_2_HPF_FILTER_CTRL = 0xBD */ 1050*4882a593Smuzhiyun #define DA7218_IN_2_VOICE_HPF_CORNER_SHIFT 0 1051*4882a593Smuzhiyun #define DA7218_IN_2_VOICE_HPF_CORNER_MASK (0x7 << 0) 1052*4882a593Smuzhiyun #define DA7218_IN_2_VOICE_EN_SHIFT 3 1053*4882a593Smuzhiyun #define DA7218_IN_2_VOICE_EN_MASK (0x1 << 3) 1054*4882a593Smuzhiyun #define DA7218_IN_2_AUDIO_HPF_CORNER_SHIFT 4 1055*4882a593Smuzhiyun #define DA7218_IN_2_AUDIO_HPF_CORNER_MASK (0x3 << 4) 1056*4882a593Smuzhiyun #define DA7218_IN_2_HPF_EN_SHIFT 7 1057*4882a593Smuzhiyun #define DA7218_IN_2_HPF_EN_MASK (0x1 << 7) 1058*4882a593Smuzhiyun 1059*4882a593Smuzhiyun /* DA7218_ADC_1_CTRL = 0xC0 */ 1060*4882a593Smuzhiyun #define DA7218_ADC_1_AAF_EN_SHIFT 2 1061*4882a593Smuzhiyun #define DA7218_ADC_1_AAF_EN_MASK (0x1 << 2) 1062*4882a593Smuzhiyun 1063*4882a593Smuzhiyun /* DA7218_ADC_2_CTRL = 0xC1 */ 1064*4882a593Smuzhiyun #define DA7218_ADC_2_AAF_EN_SHIFT 2 1065*4882a593Smuzhiyun #define DA7218_ADC_2_AAF_EN_MASK (0x1 << 2) 1066*4882a593Smuzhiyun 1067*4882a593Smuzhiyun /* DA7218_ADC_MODE = 0xC2 */ 1068*4882a593Smuzhiyun #define DA7218_ADC_LP_MODE_SHIFT 0 1069*4882a593Smuzhiyun #define DA7218_ADC_LP_MODE_MASK (0x1 << 0) 1070*4882a593Smuzhiyun #define DA7218_ADC_LVLDET_MODE_SHIFT 1 1071*4882a593Smuzhiyun #define DA7218_ADC_LVLDET_MODE_MASK (0x1 << 1) 1072*4882a593Smuzhiyun #define DA7218_ADC_LVLDET_AUTO_EXIT_SHIFT 2 1073*4882a593Smuzhiyun #define DA7218_ADC_LVLDET_AUTO_EXIT_MASK (0x1 << 2) 1074*4882a593Smuzhiyun 1075*4882a593Smuzhiyun /* DA7218_MIXOUT_L_CTRL = 0xCC */ 1076*4882a593Smuzhiyun #define DA7218_MIXOUT_L_AMP_EN_SHIFT 7 1077*4882a593Smuzhiyun #define DA7218_MIXOUT_L_AMP_EN_MASK (0x1 << 7) 1078*4882a593Smuzhiyun 1079*4882a593Smuzhiyun /* DA7218_MIXOUT_L_GAIN = 0xCD */ 1080*4882a593Smuzhiyun #define DA7218_MIXOUT_L_AMP_GAIN_SHIFT 0 1081*4882a593Smuzhiyun #define DA7218_MIXOUT_L_AMP_GAIN_MASK (0x3 << 0) 1082*4882a593Smuzhiyun #define DA7218_MIXOUT_AMP_GAIN_MIN 0x1 1083*4882a593Smuzhiyun #define DA7218_MIXOUT_AMP_GAIN_MAX 0x3 1084*4882a593Smuzhiyun 1085*4882a593Smuzhiyun /* DA7218_MIXOUT_R_CTRL = 0xCE */ 1086*4882a593Smuzhiyun #define DA7218_MIXOUT_R_AMP_EN_SHIFT 7 1087*4882a593Smuzhiyun #define DA7218_MIXOUT_R_AMP_EN_MASK (0x1 << 7) 1088*4882a593Smuzhiyun 1089*4882a593Smuzhiyun /* DA7218_MIXOUT_R_GAIN = 0xCF */ 1090*4882a593Smuzhiyun #define DA7218_MIXOUT_R_AMP_GAIN_SHIFT 0 1091*4882a593Smuzhiyun #define DA7218_MIXOUT_R_AMP_GAIN_MASK (0x3 << 0) 1092*4882a593Smuzhiyun 1093*4882a593Smuzhiyun /* DA7218_HP_L_CTRL = 0xD0 */ 1094*4882a593Smuzhiyun #define DA7218_HP_L_AMP_MIN_GAIN_EN_SHIFT 2 1095*4882a593Smuzhiyun #define DA7218_HP_L_AMP_MIN_GAIN_EN_MASK (0x1 << 2) 1096*4882a593Smuzhiyun #define DA7218_HP_L_AMP_OE_SHIFT 3 1097*4882a593Smuzhiyun #define DA7218_HP_L_AMP_OE_MASK (0x1 << 3) 1098*4882a593Smuzhiyun #define DA7218_HP_L_AMP_ZC_EN_SHIFT 4 1099*4882a593Smuzhiyun #define DA7218_HP_L_AMP_ZC_EN_MASK (0x1 << 4) 1100*4882a593Smuzhiyun #define DA7218_HP_L_AMP_RAMP_EN_SHIFT 5 1101*4882a593Smuzhiyun #define DA7218_HP_L_AMP_RAMP_EN_MASK (0x1 << 5) 1102*4882a593Smuzhiyun #define DA7218_HP_L_AMP_MUTE_EN_SHIFT 6 1103*4882a593Smuzhiyun #define DA7218_HP_L_AMP_MUTE_EN_MASK (0x1 << 6) 1104*4882a593Smuzhiyun #define DA7218_HP_L_AMP_EN_SHIFT 7 1105*4882a593Smuzhiyun #define DA7218_HP_L_AMP_EN_MASK (0x1 << 7) 1106*4882a593Smuzhiyun #define DA7218_HP_AMP_OE_MASK (0x1 << 3) 1107*4882a593Smuzhiyun 1108*4882a593Smuzhiyun /* DA7218_HP_L_GAIN = 0xD1 */ 1109*4882a593Smuzhiyun #define DA7218_HP_L_AMP_GAIN_SHIFT 0 1110*4882a593Smuzhiyun #define DA7218_HP_L_AMP_GAIN_MASK (0x3F << 0) 1111*4882a593Smuzhiyun #define DA7218_HP_AMP_GAIN_MIN 0x15 1112*4882a593Smuzhiyun #define DA7218_HP_AMP_GAIN_MAX 0x3F 1113*4882a593Smuzhiyun 1114*4882a593Smuzhiyun /* DA7218_HP_R_CTRL = 0xD2 */ 1115*4882a593Smuzhiyun #define DA7218_HP_R_AMP_MIN_GAIN_EN_SHIFT 2 1116*4882a593Smuzhiyun #define DA7218_HP_R_AMP_MIN_GAIN_EN_MASK (0x1 << 2) 1117*4882a593Smuzhiyun #define DA7218_HP_R_AMP_OE_SHIFT 3 1118*4882a593Smuzhiyun #define DA7218_HP_R_AMP_OE_MASK (0x1 << 3) 1119*4882a593Smuzhiyun #define DA7218_HP_R_AMP_ZC_EN_SHIFT 4 1120*4882a593Smuzhiyun #define DA7218_HP_R_AMP_ZC_EN_MASK (0x1 << 4) 1121*4882a593Smuzhiyun #define DA7218_HP_R_AMP_RAMP_EN_SHIFT 5 1122*4882a593Smuzhiyun #define DA7218_HP_R_AMP_RAMP_EN_MASK (0x1 << 5) 1123*4882a593Smuzhiyun #define DA7218_HP_R_AMP_MUTE_EN_SHIFT 6 1124*4882a593Smuzhiyun #define DA7218_HP_R_AMP_MUTE_EN_MASK (0x1 << 6) 1125*4882a593Smuzhiyun #define DA7218_HP_R_AMP_EN_SHIFT 7 1126*4882a593Smuzhiyun #define DA7218_HP_R_AMP_EN_MASK (0x1 << 7) 1127*4882a593Smuzhiyun 1128*4882a593Smuzhiyun /* DA7218_HP_R_GAIN = 0xD3 */ 1129*4882a593Smuzhiyun #define DA7218_HP_R_AMP_GAIN_SHIFT 0 1130*4882a593Smuzhiyun #define DA7218_HP_R_AMP_GAIN_MASK (0x3F << 0) 1131*4882a593Smuzhiyun 1132*4882a593Smuzhiyun /* DA7218_HP_SNGL_CTRL = 0xD4 */ 1133*4882a593Smuzhiyun #define DA7218_HP_AMP_STEREO_DETECT_STATUS_SHIFT 0 1134*4882a593Smuzhiyun #define DA7218_HP_AMP_STEREO_DETECT_STATUS_MASK (0x1 << 0) 1135*4882a593Smuzhiyun #define DA7218_HPL_AMP_LOAD_DETECT_STATUS_SHIFT 1 1136*4882a593Smuzhiyun #define DA7218_HPL_AMP_LOAD_DETECT_STATUS_MASK (0x1 << 1) 1137*4882a593Smuzhiyun #define DA7218_HPR_AMP_LOAD_DETECT_STATUS_SHIFT 2 1138*4882a593Smuzhiyun #define DA7218_HPR_AMP_LOAD_DETECT_STATUS_MASK (0x1 << 2) 1139*4882a593Smuzhiyun #define DA7218_HP_AMP_LOAD_DETECT_EN_SHIFT 6 1140*4882a593Smuzhiyun #define DA7218_HP_AMP_LOAD_DETECT_EN_MASK (0x1 << 6) 1141*4882a593Smuzhiyun #define DA7218_HP_AMP_STEREO_DETECT_EN_SHIFT 7 1142*4882a593Smuzhiyun #define DA7218_HP_AMP_STEREO_DETECT_EN_MASK (0x1 << 7) 1143*4882a593Smuzhiyun 1144*4882a593Smuzhiyun /* DA7218_HP_DIFF_CTRL = 0xD5 */ 1145*4882a593Smuzhiyun #define DA7218_HP_AMP_DIFF_MODE_EN_SHIFT 0 1146*4882a593Smuzhiyun #define DA7218_HP_AMP_DIFF_MODE_EN_MASK (0x1 << 0) 1147*4882a593Smuzhiyun #define DA7218_HP_AMP_SINGLE_SUPPLY_EN_SHIFT 4 1148*4882a593Smuzhiyun #define DA7218_HP_AMP_SINGLE_SUPPLY_EN_MASK (0x1 << 4) 1149*4882a593Smuzhiyun 1150*4882a593Smuzhiyun /* DA7218_HP_DIFF_UNLOCK = 0xD7 */ 1151*4882a593Smuzhiyun #define DA7218_HP_DIFF_UNLOCK_SHIFT 0 1152*4882a593Smuzhiyun #define DA7218_HP_DIFF_UNLOCK_MASK (0x1 << 0) 1153*4882a593Smuzhiyun #define DA7218_HP_DIFF_UNLOCK_VAL 0xC3 1154*4882a593Smuzhiyun 1155*4882a593Smuzhiyun /* DA7218_HPLDET_JACK = 0xD8 */ 1156*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_RATE_SHIFT 0 1157*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_RATE_MASK (0x7 << 0) 1158*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_DEBOUNCE_SHIFT 3 1159*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_DEBOUNCE_MASK (0x3 << 3) 1160*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_THR_SHIFT 5 1161*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_THR_MASK (0x3 << 5) 1162*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_EN_SHIFT 7 1163*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_EN_MASK (0x1 << 7) 1164*4882a593Smuzhiyun 1165*4882a593Smuzhiyun /* DA7218_HPLDET_CTRL = 0xD9 */ 1166*4882a593Smuzhiyun #define DA7218_HPLDET_COMP_INV_SHIFT 0 1167*4882a593Smuzhiyun #define DA7218_HPLDET_COMP_INV_MASK (0x1 << 0) 1168*4882a593Smuzhiyun #define DA7218_HPLDET_HYST_EN_SHIFT 1 1169*4882a593Smuzhiyun #define DA7218_HPLDET_HYST_EN_MASK (0x1 << 1) 1170*4882a593Smuzhiyun #define DA7218_HPLDET_DISCHARGE_EN_SHIFT 7 1171*4882a593Smuzhiyun #define DA7218_HPLDET_DISCHARGE_EN_MASK (0x1 << 7) 1172*4882a593Smuzhiyun 1173*4882a593Smuzhiyun /* DA7218_HPLDET_TEST = 0xDA */ 1174*4882a593Smuzhiyun #define DA7218_HPLDET_COMP_STS_SHIFT 4 1175*4882a593Smuzhiyun #define DA7218_HPLDET_COMP_STS_MASK (0x1 << 4) 1176*4882a593Smuzhiyun 1177*4882a593Smuzhiyun /* DA7218_REFERENCES = 0xDC */ 1178*4882a593Smuzhiyun #define DA7218_BIAS_EN_SHIFT 3 1179*4882a593Smuzhiyun #define DA7218_BIAS_EN_MASK (0x1 << 3) 1180*4882a593Smuzhiyun 1181*4882a593Smuzhiyun /* DA7218_IO_CTRL = 0xE0 */ 1182*4882a593Smuzhiyun #define DA7218_IO_VOLTAGE_LEVEL_SHIFT 0 1183*4882a593Smuzhiyun #define DA7218_IO_VOLTAGE_LEVEL_MASK (0x1 << 0) 1184*4882a593Smuzhiyun #define DA7218_IO_VOLTAGE_LEVEL_2_5V_3_6V 0 1185*4882a593Smuzhiyun #define DA7218_IO_VOLTAGE_LEVEL_1_5V_2_5V 1 1186*4882a593Smuzhiyun 1187*4882a593Smuzhiyun /* DA7218_LDO_CTRL = 0xE1 */ 1188*4882a593Smuzhiyun #define DA7218_LDO_LEVEL_SELECT_SHIFT 4 1189*4882a593Smuzhiyun #define DA7218_LDO_LEVEL_SELECT_MASK (0x3 << 4) 1190*4882a593Smuzhiyun #define DA7218_LDO_EN_SHIFT 7 1191*4882a593Smuzhiyun #define DA7218_LDO_EN_MASK (0x1 << 7) 1192*4882a593Smuzhiyun 1193*4882a593Smuzhiyun /* DA7218_SIDETONE_CTRL = 0xE4 */ 1194*4882a593Smuzhiyun #define DA7218_SIDETONE_MUTE_EN_SHIFT 6 1195*4882a593Smuzhiyun #define DA7218_SIDETONE_MUTE_EN_MASK (0x1 << 6) 1196*4882a593Smuzhiyun #define DA7218_SIDETONE_FILTER_EN_SHIFT 7 1197*4882a593Smuzhiyun #define DA7218_SIDETONE_FILTER_EN_MASK (0x1 << 7) 1198*4882a593Smuzhiyun 1199*4882a593Smuzhiyun /* DA7218_SIDETONE_IN_SELECT = 0xE5 */ 1200*4882a593Smuzhiyun #define DA7218_SIDETONE_IN_SELECT_SHIFT 0 1201*4882a593Smuzhiyun #define DA7218_SIDETONE_IN_SELECT_MASK (0x3 << 0) 1202*4882a593Smuzhiyun #define DA7218_SIDETONE_IN_SELECT_MAX 4 1203*4882a593Smuzhiyun 1204*4882a593Smuzhiyun /* DA7218_SIDETONE_GAIN = 0xE6 */ 1205*4882a593Smuzhiyun #define DA7218_SIDETONE_GAIN_SHIFT 0 1206*4882a593Smuzhiyun #define DA7218_SIDETONE_GAIN_MASK (0x1F << 0) 1207*4882a593Smuzhiyun 1208*4882a593Smuzhiyun /* DA7218_DROUTING_ST_OUTFILT_1L = 0xE8 */ 1209*4882a593Smuzhiyun #define DA7218_OUTFILT_ST_1L_SRC_SHIFT 0 1210*4882a593Smuzhiyun #define DA7218_OUTFILT_ST_1L_SRC_MASK (0x7 << 0) 1211*4882a593Smuzhiyun #define DA7218_DMIX_ST_SRC_OUTFILT1L 0 1212*4882a593Smuzhiyun #define DA7218_DMIX_ST_SRC_OUTFILT1R 1 1213*4882a593Smuzhiyun #define DA7218_DMIX_ST_SRC_SIDETONE 2 1214*4882a593Smuzhiyun 1215*4882a593Smuzhiyun /* DA7218_DROUTING_ST_OUTFILT_1R = 0xE9 */ 1216*4882a593Smuzhiyun #define DA7218_OUTFILT_ST_1R_SRC_SHIFT 0 1217*4882a593Smuzhiyun #define DA7218_OUTFILT_ST_1R_SRC_MASK (0x7 << 0) 1218*4882a593Smuzhiyun 1219*4882a593Smuzhiyun /* DA7218_SIDETONE_BIQ_3STAGE_DATA = 0xEA */ 1220*4882a593Smuzhiyun #define DA7218_SIDETONE_BIQ_3STAGE_DATA_SHIFT 0 1221*4882a593Smuzhiyun #define DA7218_SIDETONE_BIQ_3STAGE_DATA_MASK (0xFF << 0) 1222*4882a593Smuzhiyun 1223*4882a593Smuzhiyun /* DA7218_SIDETONE_BIQ_3STAGE_ADDR = 0xEB */ 1224*4882a593Smuzhiyun #define DA7218_SIDETONE_BIQ_3STAGE_ADDR_SHIFT 0 1225*4882a593Smuzhiyun #define DA7218_SIDETONE_BIQ_3STAGE_ADDR_MASK (0x1F << 0) 1226*4882a593Smuzhiyun #define DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE 30 1227*4882a593Smuzhiyun 1228*4882a593Smuzhiyun /* DA7218_EVENT_STATUS = 0xEC */ 1229*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_STS_SHIFT 7 1230*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_STS_MASK (0x1 << 7) 1231*4882a593Smuzhiyun 1232*4882a593Smuzhiyun /* DA7218_EVENT = 0xED */ 1233*4882a593Smuzhiyun #define DA7218_LVL_DET_EVENT_SHIFT 0 1234*4882a593Smuzhiyun #define DA7218_LVL_DET_EVENT_MASK (0x1 << 0) 1235*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_EVENT_SHIFT 7 1236*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_EVENT_MASK (0x1 << 7) 1237*4882a593Smuzhiyun 1238*4882a593Smuzhiyun /* DA7218_EVENT_MASK = 0xEE */ 1239*4882a593Smuzhiyun #define DA7218_LVL_DET_EVENT_MSK_SHIFT 0 1240*4882a593Smuzhiyun #define DA7218_LVL_DET_EVENT_MSK_MASK (0x1 << 0) 1241*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_EVENT_IRQ_MSK_SHIFT 7 1242*4882a593Smuzhiyun #define DA7218_HPLDET_JACK_EVENT_IRQ_MSK_MASK (0x1 << 7) 1243*4882a593Smuzhiyun 1244*4882a593Smuzhiyun /* DA7218_DMIC_1_CTRL = 0xF0 */ 1245*4882a593Smuzhiyun #define DA7218_DMIC_1_DATA_SEL_SHIFT 0 1246*4882a593Smuzhiyun #define DA7218_DMIC_1_DATA_SEL_MASK (0x1 << 0) 1247*4882a593Smuzhiyun #define DA7218_DMIC_1_SAMPLEPHASE_SHIFT 1 1248*4882a593Smuzhiyun #define DA7218_DMIC_1_SAMPLEPHASE_MASK (0x1 << 1) 1249*4882a593Smuzhiyun #define DA7218_DMIC_1_CLK_RATE_SHIFT 2 1250*4882a593Smuzhiyun #define DA7218_DMIC_1_CLK_RATE_MASK (0x1 << 2) 1251*4882a593Smuzhiyun #define DA7218_DMIC_1L_EN_SHIFT 6 1252*4882a593Smuzhiyun #define DA7218_DMIC_1L_EN_MASK (0x1 << 6) 1253*4882a593Smuzhiyun #define DA7218_DMIC_1R_EN_SHIFT 7 1254*4882a593Smuzhiyun #define DA7218_DMIC_1R_EN_MASK (0x1 << 7) 1255*4882a593Smuzhiyun 1256*4882a593Smuzhiyun /* DA7218_DMIC_2_CTRL = 0xF1 */ 1257*4882a593Smuzhiyun #define DA7218_DMIC_2_DATA_SEL_SHIFT 0 1258*4882a593Smuzhiyun #define DA7218_DMIC_2_DATA_SEL_MASK (0x1 << 0) 1259*4882a593Smuzhiyun #define DA7218_DMIC_2_SAMPLEPHASE_SHIFT 1 1260*4882a593Smuzhiyun #define DA7218_DMIC_2_SAMPLEPHASE_MASK (0x1 << 1) 1261*4882a593Smuzhiyun #define DA7218_DMIC_2_CLK_RATE_SHIFT 2 1262*4882a593Smuzhiyun #define DA7218_DMIC_2_CLK_RATE_MASK (0x1 << 2) 1263*4882a593Smuzhiyun #define DA7218_DMIC_2L_EN_SHIFT 6 1264*4882a593Smuzhiyun #define DA7218_DMIC_2L_EN_MASK (0x1 << 6) 1265*4882a593Smuzhiyun #define DA7218_DMIC_2R_EN_SHIFT 7 1266*4882a593Smuzhiyun #define DA7218_DMIC_2R_EN_MASK (0x1 << 7) 1267*4882a593Smuzhiyun 1268*4882a593Smuzhiyun /* DA7218_IN_1L_GAIN = 0xF4 */ 1269*4882a593Smuzhiyun #define DA7218_IN_1L_DIGITAL_GAIN_SHIFT 0 1270*4882a593Smuzhiyun #define DA7218_IN_1L_DIGITAL_GAIN_MASK (0x7F << 0) 1271*4882a593Smuzhiyun #define DA7218_IN_DIGITAL_GAIN_MAX 0x7F 1272*4882a593Smuzhiyun 1273*4882a593Smuzhiyun /* DA7218_IN_1R_GAIN = 0xF5 */ 1274*4882a593Smuzhiyun #define DA7218_IN_1R_DIGITAL_GAIN_SHIFT 0 1275*4882a593Smuzhiyun #define DA7218_IN_1R_DIGITAL_GAIN_MASK (0x7F << 0) 1276*4882a593Smuzhiyun 1277*4882a593Smuzhiyun /* DA7218_IN_2L_GAIN = 0xF6 */ 1278*4882a593Smuzhiyun #define DA7218_IN_2L_DIGITAL_GAIN_SHIFT 0 1279*4882a593Smuzhiyun #define DA7218_IN_2L_DIGITAL_GAIN_MASK (0x7F << 0) 1280*4882a593Smuzhiyun 1281*4882a593Smuzhiyun /* DA7218_IN_2R_GAIN = 0xF7 */ 1282*4882a593Smuzhiyun #define DA7218_IN_2R_DIGITAL_GAIN_SHIFT 0 1283*4882a593Smuzhiyun #define DA7218_IN_2R_DIGITAL_GAIN_MASK (0x7F << 0) 1284*4882a593Smuzhiyun 1285*4882a593Smuzhiyun /* DA7218_OUT_1L_GAIN = 0xF8 */ 1286*4882a593Smuzhiyun #define DA7218_OUT_1L_DIGITAL_GAIN_SHIFT 0 1287*4882a593Smuzhiyun #define DA7218_OUT_1L_DIGITAL_GAIN_MASK (0xFF << 0) 1288*4882a593Smuzhiyun #define DA7218_OUT_DIGITAL_GAIN_MIN 0x0 1289*4882a593Smuzhiyun #define DA7218_OUT_DIGITAL_GAIN_MAX 0x97 1290*4882a593Smuzhiyun 1291*4882a593Smuzhiyun /* DA7218_OUT_1R_GAIN = 0xF9 */ 1292*4882a593Smuzhiyun #define DA7218_OUT_1R_DIGITAL_GAIN_SHIFT 0 1293*4882a593Smuzhiyun #define DA7218_OUT_1R_DIGITAL_GAIN_MASK (0xFF << 0) 1294*4882a593Smuzhiyun 1295*4882a593Smuzhiyun /* DA7218_MICBIAS_CTRL = 0xFC */ 1296*4882a593Smuzhiyun #define DA7218_MICBIAS_1_LEVEL_SHIFT 0 1297*4882a593Smuzhiyun #define DA7218_MICBIAS_1_LEVEL_MASK (0x7 << 0) 1298*4882a593Smuzhiyun #define DA7218_MICBIAS_1_LP_MODE_SHIFT 3 1299*4882a593Smuzhiyun #define DA7218_MICBIAS_1_LP_MODE_MASK (0x1 << 3) 1300*4882a593Smuzhiyun #define DA7218_MICBIAS_2_LEVEL_SHIFT 4 1301*4882a593Smuzhiyun #define DA7218_MICBIAS_2_LEVEL_MASK (0x7 << 4) 1302*4882a593Smuzhiyun #define DA7218_MICBIAS_2_LP_MODE_SHIFT 7 1303*4882a593Smuzhiyun #define DA7218_MICBIAS_2_LP_MODE_MASK (0x1 << 7) 1304*4882a593Smuzhiyun 1305*4882a593Smuzhiyun /* DA7218_MICBIAS_EN = 0xFD */ 1306*4882a593Smuzhiyun #define DA7218_MICBIAS_1_EN_SHIFT 0 1307*4882a593Smuzhiyun #define DA7218_MICBIAS_1_EN_MASK (0x1 << 0) 1308*4882a593Smuzhiyun #define DA7218_MICBIAS_2_EN_SHIFT 4 1309*4882a593Smuzhiyun #define DA7218_MICBIAS_2_EN_MASK (0x1 << 4) 1310*4882a593Smuzhiyun 1311*4882a593Smuzhiyun 1312*4882a593Smuzhiyun /* 1313*4882a593Smuzhiyun * General defines & data 1314*4882a593Smuzhiyun */ 1315*4882a593Smuzhiyun 1316*4882a593Smuzhiyun /* Register inversion */ 1317*4882a593Smuzhiyun #define DA7218_NO_INVERT 0 1318*4882a593Smuzhiyun #define DA7218_INVERT 1 1319*4882a593Smuzhiyun 1320*4882a593Smuzhiyun /* Byte related defines */ 1321*4882a593Smuzhiyun #define DA7218_BYTE_SHIFT 8 1322*4882a593Smuzhiyun #define DA7218_BYTE_MASK 0xFF 1323*4882a593Smuzhiyun #define DA7218_2BYTE_SHIFT 16 1324*4882a593Smuzhiyun #define DA7218_2BYTE_MASK 0xFFFF 1325*4882a593Smuzhiyun 1326*4882a593Smuzhiyun /* PLL Output Frequencies */ 1327*4882a593Smuzhiyun #define DA7218_PLL_FREQ_OUT_90316 90316800 1328*4882a593Smuzhiyun #define DA7218_PLL_FREQ_OUT_98304 98304000 1329*4882a593Smuzhiyun 1330*4882a593Smuzhiyun /* PLL Frequency Dividers */ 1331*4882a593Smuzhiyun #define DA7218_PLL_INDIV_2_TO_4_5_MHZ_VAL 1 1332*4882a593Smuzhiyun #define DA7218_PLL_INDIV_4_5_TO_9_MHZ_VAL 2 1333*4882a593Smuzhiyun #define DA7218_PLL_INDIV_9_TO_18_MHZ_VAL 4 1334*4882a593Smuzhiyun #define DA7218_PLL_INDIV_18_TO_36_MHZ_VAL 8 1335*4882a593Smuzhiyun #define DA7218_PLL_INDIV_36_TO_54_MHZ_VAL 16 1336*4882a593Smuzhiyun 1337*4882a593Smuzhiyun /* ALC Calibration */ 1338*4882a593Smuzhiyun #define DA7218_ALC_CALIB_DELAY_MIN 2500 1339*4882a593Smuzhiyun #define DA7218_ALC_CALIB_DELAY_MAX 5000 1340*4882a593Smuzhiyun #define DA7218_ALC_CALIB_MAX_TRIES 5 1341*4882a593Smuzhiyun 1342*4882a593Smuzhiyun /* Ref Oscillator */ 1343*4882a593Smuzhiyun #define DA7218_REF_OSC_CHECK_DELAY_MIN 5000 1344*4882a593Smuzhiyun #define DA7218_REF_OSC_CHECK_DELAY_MAX 10000 1345*4882a593Smuzhiyun #define DA7218_REF_OSC_CHECK_TRIES 4 1346*4882a593Smuzhiyun 1347*4882a593Smuzhiyun /* SRM */ 1348*4882a593Smuzhiyun #define DA7218_SRM_CHECK_DELAY 50 1349*4882a593Smuzhiyun #define DA7218_SRM_CHECK_TRIES 8 1350*4882a593Smuzhiyun 1351*4882a593Smuzhiyun /* Mic Level Detect */ 1352*4882a593Smuzhiyun #define DA7218_MIC_LVL_DET_DELAY 50 1353*4882a593Smuzhiyun 1354*4882a593Smuzhiyun enum da7218_biq_cfg { 1355*4882a593Smuzhiyun DA7218_BIQ_CFG_DATA = 0, 1356*4882a593Smuzhiyun DA7218_BIQ_CFG_ADDR, 1357*4882a593Smuzhiyun DA7218_BIQ_CFG_SIZE, 1358*4882a593Smuzhiyun }; 1359*4882a593Smuzhiyun 1360*4882a593Smuzhiyun enum da7218_clk_src { 1361*4882a593Smuzhiyun DA7218_CLKSRC_MCLK = 0, 1362*4882a593Smuzhiyun DA7218_CLKSRC_MCLK_SQR, 1363*4882a593Smuzhiyun }; 1364*4882a593Smuzhiyun 1365*4882a593Smuzhiyun enum da7218_sys_clk { 1366*4882a593Smuzhiyun DA7218_SYSCLK_MCLK = 0, 1367*4882a593Smuzhiyun DA7218_SYSCLK_PLL, 1368*4882a593Smuzhiyun DA7218_SYSCLK_PLL_SRM, 1369*4882a593Smuzhiyun }; 1370*4882a593Smuzhiyun 1371*4882a593Smuzhiyun enum da7218_dev_id { 1372*4882a593Smuzhiyun DA7217_DEV_ID = 0, 1373*4882a593Smuzhiyun DA7218_DEV_ID, 1374*4882a593Smuzhiyun }; 1375*4882a593Smuzhiyun 1376*4882a593Smuzhiyun /* Regulators */ 1377*4882a593Smuzhiyun enum da7218_supplies { 1378*4882a593Smuzhiyun DA7218_SUPPLY_VDD = 0, 1379*4882a593Smuzhiyun DA7218_SUPPLY_VDDMIC, 1380*4882a593Smuzhiyun DA7218_SUPPLY_VDDIO, 1381*4882a593Smuzhiyun DA7218_NUM_SUPPLIES, 1382*4882a593Smuzhiyun }; 1383*4882a593Smuzhiyun 1384*4882a593Smuzhiyun /* Private data */ 1385*4882a593Smuzhiyun struct da7218_priv { 1386*4882a593Smuzhiyun struct da7218_pdata *pdata; 1387*4882a593Smuzhiyun 1388*4882a593Smuzhiyun struct regulator_bulk_data supplies[DA7218_NUM_SUPPLIES]; 1389*4882a593Smuzhiyun struct regmap *regmap; 1390*4882a593Smuzhiyun int dev_id; 1391*4882a593Smuzhiyun 1392*4882a593Smuzhiyun struct snd_soc_jack *jack; 1393*4882a593Smuzhiyun int irq; 1394*4882a593Smuzhiyun 1395*4882a593Smuzhiyun struct clk *mclk; 1396*4882a593Smuzhiyun unsigned int mclk_rate; 1397*4882a593Smuzhiyun 1398*4882a593Smuzhiyun bool hp_single_supply; 1399*4882a593Smuzhiyun bool master; 1400*4882a593Smuzhiyun u8 alc_en; 1401*4882a593Smuzhiyun u8 in_filt_en; 1402*4882a593Smuzhiyun u8 mic_lvl_det_en; 1403*4882a593Smuzhiyun 1404*4882a593Smuzhiyun u8 biq_5stage_coeff[DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE]; 1405*4882a593Smuzhiyun u8 stbiq_3stage_coeff[DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE]; 1406*4882a593Smuzhiyun }; 1407*4882a593Smuzhiyun 1408*4882a593Smuzhiyun /* HP detect control */ 1409*4882a593Smuzhiyun int da7218_hpldet(struct snd_soc_component *component, struct snd_soc_jack *jack); 1410*4882a593Smuzhiyun 1411*4882a593Smuzhiyun #endif /* _DA7218_H */ 1412