xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/cs4349.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * cs4349.c  --  CS4349 ALSA Soc Audio driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2015 Cirrus Logic, Inc.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Authors: Tim Howe <Tim.Howe@cirrus.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/moduleparam.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/gpio.h>
16*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun #include <linux/pm.h>
19*4882a593Smuzhiyun #include <linux/i2c.h>
20*4882a593Smuzhiyun #include <linux/of_device.h>
21*4882a593Smuzhiyun #include <linux/regmap.h>
22*4882a593Smuzhiyun #include <linux/slab.h>
23*4882a593Smuzhiyun #include <sound/core.h>
24*4882a593Smuzhiyun #include <sound/pcm.h>
25*4882a593Smuzhiyun #include <sound/pcm_params.h>
26*4882a593Smuzhiyun #include <sound/soc.h>
27*4882a593Smuzhiyun #include <sound/soc-dapm.h>
28*4882a593Smuzhiyun #include <sound/initval.h>
29*4882a593Smuzhiyun #include <sound/tlv.h>
30*4882a593Smuzhiyun #include "cs4349.h"
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun static const struct reg_default cs4349_reg_defaults[] = {
34*4882a593Smuzhiyun 	{ 2, 0x00 },	/* r02	- Mode Control */
35*4882a593Smuzhiyun 	{ 3, 0x09 },	/* r03	- Volume, Mixing and Inversion Control */
36*4882a593Smuzhiyun 	{ 4, 0x81 },	/* r04	- Mute Control */
37*4882a593Smuzhiyun 	{ 5, 0x00 },	/* r05	- Channel A Volume Control */
38*4882a593Smuzhiyun 	{ 6, 0x00 },	/* r06	- Channel B Volume Control */
39*4882a593Smuzhiyun 	{ 7, 0xB1 },	/* r07	- Ramp and Filter Control */
40*4882a593Smuzhiyun 	{ 8, 0x1C },	/* r08	- Misc. Control */
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun /* Private data for the CS4349 */
44*4882a593Smuzhiyun struct  cs4349_private {
45*4882a593Smuzhiyun 	struct regmap			*regmap;
46*4882a593Smuzhiyun 	struct gpio_desc		*reset_gpio;
47*4882a593Smuzhiyun 	unsigned int			mode;
48*4882a593Smuzhiyun 	int				rate;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun 
cs4349_readable_register(struct device * dev,unsigned int reg)51*4882a593Smuzhiyun static bool cs4349_readable_register(struct device *dev, unsigned int reg)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	switch (reg) {
54*4882a593Smuzhiyun 	case CS4349_CHIPID ... CS4349_MISC:
55*4882a593Smuzhiyun 		return true;
56*4882a593Smuzhiyun 	default:
57*4882a593Smuzhiyun 		return false;
58*4882a593Smuzhiyun 	}
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
cs4349_writeable_register(struct device * dev,unsigned int reg)61*4882a593Smuzhiyun static bool cs4349_writeable_register(struct device *dev, unsigned int reg)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	switch (reg) {
64*4882a593Smuzhiyun 	case CS4349_MODE ...  CS4349_MISC:
65*4882a593Smuzhiyun 		return true;
66*4882a593Smuzhiyun 	default:
67*4882a593Smuzhiyun 		return false;
68*4882a593Smuzhiyun 	}
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun 
cs4349_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int format)71*4882a593Smuzhiyun static int cs4349_set_dai_fmt(struct snd_soc_dai *codec_dai,
72*4882a593Smuzhiyun 			      unsigned int format)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
75*4882a593Smuzhiyun 	struct cs4349_private *cs4349 = snd_soc_component_get_drvdata(component);
76*4882a593Smuzhiyun 	unsigned int fmt;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	fmt = format & SND_SOC_DAIFMT_FORMAT_MASK;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	switch (fmt) {
81*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
82*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
83*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_RIGHT_J:
84*4882a593Smuzhiyun 		cs4349->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
85*4882a593Smuzhiyun 		break;
86*4882a593Smuzhiyun 	default:
87*4882a593Smuzhiyun 		return -EINVAL;
88*4882a593Smuzhiyun 	}
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	return 0;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun 
cs4349_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)93*4882a593Smuzhiyun static int cs4349_pcm_hw_params(struct snd_pcm_substream *substream,
94*4882a593Smuzhiyun 			    struct snd_pcm_hw_params *params,
95*4882a593Smuzhiyun 			    struct snd_soc_dai *dai)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
98*4882a593Smuzhiyun 	struct cs4349_private *cs4349 = snd_soc_component_get_drvdata(component);
99*4882a593Smuzhiyun 	int fmt, ret;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	cs4349->rate = params_rate(params);
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	switch (cs4349->mode) {
104*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
105*4882a593Smuzhiyun 		fmt = DIF_I2S;
106*4882a593Smuzhiyun 		break;
107*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
108*4882a593Smuzhiyun 		fmt = DIF_LEFT_JST;
109*4882a593Smuzhiyun 		break;
110*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_RIGHT_J:
111*4882a593Smuzhiyun 		switch (params_width(params)) {
112*4882a593Smuzhiyun 		case 16:
113*4882a593Smuzhiyun 			fmt = DIF_RGHT_JST16;
114*4882a593Smuzhiyun 			break;
115*4882a593Smuzhiyun 		case 24:
116*4882a593Smuzhiyun 			fmt = DIF_RGHT_JST24;
117*4882a593Smuzhiyun 			break;
118*4882a593Smuzhiyun 		default:
119*4882a593Smuzhiyun 			return -EINVAL;
120*4882a593Smuzhiyun 		}
121*4882a593Smuzhiyun 		break;
122*4882a593Smuzhiyun 	default:
123*4882a593Smuzhiyun 		return -EINVAL;
124*4882a593Smuzhiyun 	}
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(component, CS4349_MODE, DIF_MASK,
127*4882a593Smuzhiyun 				  MODE_FORMAT(fmt));
128*4882a593Smuzhiyun 	if (ret < 0)
129*4882a593Smuzhiyun 		return ret;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	return 0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
cs4349_mute(struct snd_soc_dai * dai,int mute,int direction)134*4882a593Smuzhiyun static int cs4349_mute(struct snd_soc_dai *dai, int mute, int direction)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
137*4882a593Smuzhiyun 	int reg;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	reg = 0;
140*4882a593Smuzhiyun 	if (mute)
141*4882a593Smuzhiyun 		reg = MUTE_AB_MASK;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	return snd_soc_component_update_bits(component, CS4349_MUTE, MUTE_AB_MASK, reg);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(dig_tlv, -12750, 50, 0);
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun static const char * const chan_mix_texts[] = {
149*4882a593Smuzhiyun 	"Mute", "MuteA", "MuteA SwapB", "MuteA MonoB", "SwapA MuteB",
150*4882a593Smuzhiyun 	"BothR", "Swap", "SwapA MonoB", "MuteB", "Normal", "BothL",
151*4882a593Smuzhiyun 	"MonoB", "MonoA MuteB", "MonoA", "MonoA SwapB", "Mono",
152*4882a593Smuzhiyun 	/*Normal == Channel A = Left, Channel B = Right*/
153*4882a593Smuzhiyun };
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun static const char * const fm_texts[] = {
156*4882a593Smuzhiyun 	"Auto", "Single", "Double", "Quad",
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun static const char * const deemph_texts[] = {
160*4882a593Smuzhiyun 	"None", "44.1k", "48k", "32k",
161*4882a593Smuzhiyun };
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun static const char * const softr_zeroc_texts[] = {
164*4882a593Smuzhiyun 	"Immediate", "Zero Cross", "Soft Ramp", "SR on ZC",
165*4882a593Smuzhiyun };
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun static int deemph_values[] = {
168*4882a593Smuzhiyun 	0, 4, 8, 12,
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun static int softr_zeroc_values[] = {
172*4882a593Smuzhiyun 	0, 64, 128, 192,
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun static const struct soc_enum chan_mix_enum =
176*4882a593Smuzhiyun 	SOC_ENUM_SINGLE(CS4349_VMI, 0,
177*4882a593Smuzhiyun 			ARRAY_SIZE(chan_mix_texts),
178*4882a593Smuzhiyun 			chan_mix_texts);
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun static const struct soc_enum fm_mode_enum =
181*4882a593Smuzhiyun 	SOC_ENUM_SINGLE(CS4349_MODE, 0,
182*4882a593Smuzhiyun 			ARRAY_SIZE(fm_texts),
183*4882a593Smuzhiyun 			fm_texts);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun static SOC_VALUE_ENUM_SINGLE_DECL(deemph_enum, CS4349_MODE, 0, DEM_MASK,
186*4882a593Smuzhiyun 				deemph_texts, deemph_values);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun static SOC_VALUE_ENUM_SINGLE_DECL(softr_zeroc_enum, CS4349_RMPFLT, 0,
189*4882a593Smuzhiyun 				SR_ZC_MASK, softr_zeroc_texts,
190*4882a593Smuzhiyun 				softr_zeroc_values);
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun static const struct snd_kcontrol_new cs4349_snd_controls[] = {
193*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("Master Playback Volume",
194*4882a593Smuzhiyun 			 CS4349_VOLA, CS4349_VOLB, 0, 0xFF, 1, dig_tlv),
195*4882a593Smuzhiyun 	SOC_ENUM("Functional Mode", fm_mode_enum),
196*4882a593Smuzhiyun 	SOC_ENUM("De-Emphasis Control", deemph_enum),
197*4882a593Smuzhiyun 	SOC_ENUM("Soft Ramp Zero Cross Control", softr_zeroc_enum),
198*4882a593Smuzhiyun 	SOC_ENUM("Channel Mixer", chan_mix_enum),
199*4882a593Smuzhiyun 	SOC_SINGLE("VolA = VolB Switch", CS4349_VMI, 7, 1, 0),
200*4882a593Smuzhiyun 	SOC_SINGLE("InvertA Switch", CS4349_VMI, 6, 1, 0),
201*4882a593Smuzhiyun 	SOC_SINGLE("InvertB Switch", CS4349_VMI, 5, 1, 0),
202*4882a593Smuzhiyun 	SOC_SINGLE("Auto-Mute Switch", CS4349_MUTE, 7, 1, 0),
203*4882a593Smuzhiyun 	SOC_SINGLE("MUTEC A = B Switch", CS4349_MUTE, 5, 1, 0),
204*4882a593Smuzhiyun 	SOC_SINGLE("Soft Ramp Up Switch", CS4349_RMPFLT, 5, 1, 0),
205*4882a593Smuzhiyun 	SOC_SINGLE("Soft Ramp Down Switch", CS4349_RMPFLT, 4, 1, 0),
206*4882a593Smuzhiyun 	SOC_SINGLE("Slow Roll Off Filter Switch", CS4349_RMPFLT, 2, 1, 0),
207*4882a593Smuzhiyun 	SOC_SINGLE("Freeze Switch", CS4349_MISC, 5, 1, 0),
208*4882a593Smuzhiyun 	SOC_SINGLE("Popguard Switch", CS4349_MISC, 4, 1, 0),
209*4882a593Smuzhiyun };
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun static const struct snd_soc_dapm_widget cs4349_dapm_widgets[] = {
212*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC("HiFi DAC", NULL, SND_SOC_NOPM, 0, 0),
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("OutputA"),
215*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("OutputB"),
216*4882a593Smuzhiyun };
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun static const struct snd_soc_dapm_route cs4349_routes[] = {
219*4882a593Smuzhiyun 	{"DAC Playback", NULL, "OutputA"},
220*4882a593Smuzhiyun 	{"DAC Playback", NULL, "OutputB"},
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	{"OutputA", NULL, "HiFi DAC"},
223*4882a593Smuzhiyun 	{"OutputB", NULL, "HiFi DAC"},
224*4882a593Smuzhiyun };
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun #define CS4349_PCM_FORMATS (SNDRV_PCM_FMTBIT_S8  | \
227*4882a593Smuzhiyun 			SNDRV_PCM_FMTBIT_S16_LE  | SNDRV_PCM_FMTBIT_S16_BE  | \
228*4882a593Smuzhiyun 			SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
229*4882a593Smuzhiyun 			SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
230*4882a593Smuzhiyun 			SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
231*4882a593Smuzhiyun 			SNDRV_PCM_FMTBIT_S24_LE  | SNDRV_PCM_FMTBIT_S24_BE  | \
232*4882a593Smuzhiyun 			SNDRV_PCM_FMTBIT_S32_LE)
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun #define CS4349_PCM_RATES SNDRV_PCM_RATE_8000_192000
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun static const struct snd_soc_dai_ops cs4349_dai_ops = {
237*4882a593Smuzhiyun 	.hw_params	= cs4349_pcm_hw_params,
238*4882a593Smuzhiyun 	.set_fmt	= cs4349_set_dai_fmt,
239*4882a593Smuzhiyun 	.mute_stream	= cs4349_mute,
240*4882a593Smuzhiyun 	.no_capture_mute = 1,
241*4882a593Smuzhiyun };
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun static struct snd_soc_dai_driver cs4349_dai = {
244*4882a593Smuzhiyun 	.name = "cs4349_hifi",
245*4882a593Smuzhiyun 	.playback = {
246*4882a593Smuzhiyun 		.stream_name	= "DAC Playback",
247*4882a593Smuzhiyun 		.channels_min	= 1,
248*4882a593Smuzhiyun 		.channels_max	= 2,
249*4882a593Smuzhiyun 		.rates		= CS4349_PCM_RATES,
250*4882a593Smuzhiyun 		.formats	= CS4349_PCM_FORMATS,
251*4882a593Smuzhiyun 	},
252*4882a593Smuzhiyun 	.ops = &cs4349_dai_ops,
253*4882a593Smuzhiyun 	.symmetric_rates = 1,
254*4882a593Smuzhiyun };
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_cs4349 = {
257*4882a593Smuzhiyun 	.controls		= cs4349_snd_controls,
258*4882a593Smuzhiyun 	.num_controls		= ARRAY_SIZE(cs4349_snd_controls),
259*4882a593Smuzhiyun 	.dapm_widgets		= cs4349_dapm_widgets,
260*4882a593Smuzhiyun 	.num_dapm_widgets	= ARRAY_SIZE(cs4349_dapm_widgets),
261*4882a593Smuzhiyun 	.dapm_routes		= cs4349_routes,
262*4882a593Smuzhiyun 	.num_dapm_routes	= ARRAY_SIZE(cs4349_routes),
263*4882a593Smuzhiyun 	.idle_bias_on		= 1,
264*4882a593Smuzhiyun 	.use_pmdown_time	= 1,
265*4882a593Smuzhiyun 	.endianness		= 1,
266*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun static const struct regmap_config cs4349_regmap = {
270*4882a593Smuzhiyun 	.reg_bits		= 8,
271*4882a593Smuzhiyun 	.val_bits		= 8,
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	.max_register		= CS4349_MISC,
274*4882a593Smuzhiyun 	.reg_defaults		= cs4349_reg_defaults,
275*4882a593Smuzhiyun 	.num_reg_defaults	= ARRAY_SIZE(cs4349_reg_defaults),
276*4882a593Smuzhiyun 	.readable_reg		= cs4349_readable_register,
277*4882a593Smuzhiyun 	.writeable_reg		= cs4349_writeable_register,
278*4882a593Smuzhiyun 	.cache_type		= REGCACHE_RBTREE,
279*4882a593Smuzhiyun };
280*4882a593Smuzhiyun 
cs4349_i2c_probe(struct i2c_client * client,const struct i2c_device_id * id)281*4882a593Smuzhiyun static int cs4349_i2c_probe(struct i2c_client *client,
282*4882a593Smuzhiyun 				      const struct i2c_device_id *id)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun 	struct cs4349_private *cs4349;
285*4882a593Smuzhiyun 	int ret;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	cs4349 = devm_kzalloc(&client->dev, sizeof(*cs4349), GFP_KERNEL);
288*4882a593Smuzhiyun 	if (!cs4349)
289*4882a593Smuzhiyun 		return -ENOMEM;
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	cs4349->regmap = devm_regmap_init_i2c(client, &cs4349_regmap);
292*4882a593Smuzhiyun 	if (IS_ERR(cs4349->regmap)) {
293*4882a593Smuzhiyun 		ret = PTR_ERR(cs4349->regmap);
294*4882a593Smuzhiyun 		dev_err(&client->dev, "regmap_init() failed: %d\n", ret);
295*4882a593Smuzhiyun 		return ret;
296*4882a593Smuzhiyun 	}
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	/* Reset the Device */
299*4882a593Smuzhiyun 	cs4349->reset_gpio = devm_gpiod_get_optional(&client->dev,
300*4882a593Smuzhiyun 		"reset", GPIOD_OUT_LOW);
301*4882a593Smuzhiyun 	if (IS_ERR(cs4349->reset_gpio))
302*4882a593Smuzhiyun 		return PTR_ERR(cs4349->reset_gpio);
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	gpiod_set_value_cansleep(cs4349->reset_gpio, 1);
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	i2c_set_clientdata(client, cs4349);
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	return devm_snd_soc_register_component(&client->dev,
309*4882a593Smuzhiyun 		&soc_component_dev_cs4349,
310*4882a593Smuzhiyun 		&cs4349_dai, 1);
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun 
cs4349_i2c_remove(struct i2c_client * client)313*4882a593Smuzhiyun static int cs4349_i2c_remove(struct i2c_client *client)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun 	struct cs4349_private *cs4349 = i2c_get_clientdata(client);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	/* Hold down reset */
318*4882a593Smuzhiyun 	gpiod_set_value_cansleep(cs4349->reset_gpio, 0);
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	return 0;
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun #ifdef CONFIG_PM
cs4349_runtime_suspend(struct device * dev)324*4882a593Smuzhiyun static int cs4349_runtime_suspend(struct device *dev)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun 	struct cs4349_private *cs4349 = dev_get_drvdata(dev);
327*4882a593Smuzhiyun 	int ret;
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 	ret = regmap_update_bits(cs4349->regmap, CS4349_MISC, PWR_DWN, PWR_DWN);
330*4882a593Smuzhiyun 	if (ret < 0)
331*4882a593Smuzhiyun 		return ret;
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	regcache_cache_only(cs4349->regmap, true);
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	/* Hold down reset */
336*4882a593Smuzhiyun 	gpiod_set_value_cansleep(cs4349->reset_gpio, 0);
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	return 0;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun 
cs4349_runtime_resume(struct device * dev)341*4882a593Smuzhiyun static int cs4349_runtime_resume(struct device *dev)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun 	struct cs4349_private *cs4349 = dev_get_drvdata(dev);
344*4882a593Smuzhiyun 	int ret;
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	ret = regmap_update_bits(cs4349->regmap, CS4349_MISC, PWR_DWN, 0);
347*4882a593Smuzhiyun 	if (ret < 0)
348*4882a593Smuzhiyun 		return ret;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	gpiod_set_value_cansleep(cs4349->reset_gpio, 1);
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	regcache_cache_only(cs4349->regmap, false);
353*4882a593Smuzhiyun 	regcache_sync(cs4349->regmap);
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	return 0;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun #endif
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun static const struct dev_pm_ops cs4349_runtime_pm = {
360*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(cs4349_runtime_suspend, cs4349_runtime_resume,
361*4882a593Smuzhiyun 			   NULL)
362*4882a593Smuzhiyun };
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun static const struct of_device_id cs4349_of_match[] = {
365*4882a593Smuzhiyun 	{ .compatible = "cirrus,cs4349", },
366*4882a593Smuzhiyun 	{},
367*4882a593Smuzhiyun };
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, cs4349_of_match);
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun static const struct i2c_device_id cs4349_i2c_id[] = {
372*4882a593Smuzhiyun 	{"cs4349", 0},
373*4882a593Smuzhiyun 	{}
374*4882a593Smuzhiyun };
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, cs4349_i2c_id);
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun static struct i2c_driver cs4349_i2c_driver = {
379*4882a593Smuzhiyun 	.driver = {
380*4882a593Smuzhiyun 		.name		= "cs4349",
381*4882a593Smuzhiyun 		.of_match_table	= cs4349_of_match,
382*4882a593Smuzhiyun 		.pm = &cs4349_runtime_pm,
383*4882a593Smuzhiyun 	},
384*4882a593Smuzhiyun 	.id_table	= cs4349_i2c_id,
385*4882a593Smuzhiyun 	.probe		= cs4349_i2c_probe,
386*4882a593Smuzhiyun 	.remove		= cs4349_i2c_remove,
387*4882a593Smuzhiyun };
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun module_i2c_driver(cs4349_i2c_driver);
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun MODULE_AUTHOR("Tim Howe <tim.howe@cirrus.com>");
392*4882a593Smuzhiyun MODULE_DESCRIPTION("Cirrus Logic CS4349 ALSA SoC Codec Driver");
393*4882a593Smuzhiyun MODULE_LICENSE("GPL");
394