1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Cirrus Logic CS4341A ALSA SoC Codec Driver
4*4882a593Smuzhiyun * Author: Alexander Shiyan <shc_work@mail.ru>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/i2c.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/regmap.h>
11*4882a593Smuzhiyun #include <linux/spi/spi.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <sound/pcm.h>
14*4882a593Smuzhiyun #include <sound/pcm_params.h>
15*4882a593Smuzhiyun #include <sound/soc.h>
16*4882a593Smuzhiyun #include <sound/tlv.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define CS4341_REG_MODE1 0x00
19*4882a593Smuzhiyun #define CS4341_REG_MODE2 0x01
20*4882a593Smuzhiyun #define CS4341_REG_MIX 0x02
21*4882a593Smuzhiyun #define CS4341_REG_VOLA 0x03
22*4882a593Smuzhiyun #define CS4341_REG_VOLB 0x04
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define CS4341_MODE2_DIF (7 << 4)
25*4882a593Smuzhiyun #define CS4341_MODE2_DIF_I2S_24 (0 << 4)
26*4882a593Smuzhiyun #define CS4341_MODE2_DIF_I2S_16 (1 << 4)
27*4882a593Smuzhiyun #define CS4341_MODE2_DIF_LJ_24 (2 << 4)
28*4882a593Smuzhiyun #define CS4341_MODE2_DIF_RJ_24 (3 << 4)
29*4882a593Smuzhiyun #define CS4341_MODE2_DIF_RJ_16 (5 << 4)
30*4882a593Smuzhiyun #define CS4341_VOLX_MUTE (1 << 7)
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun struct cs4341_priv {
33*4882a593Smuzhiyun unsigned int fmt;
34*4882a593Smuzhiyun struct regmap *regmap;
35*4882a593Smuzhiyun struct regmap_config regcfg;
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static const struct reg_default cs4341_reg_defaults[] = {
39*4882a593Smuzhiyun { CS4341_REG_MODE1, 0x00 },
40*4882a593Smuzhiyun { CS4341_REG_MODE2, 0x82 },
41*4882a593Smuzhiyun { CS4341_REG_MIX, 0x49 },
42*4882a593Smuzhiyun { CS4341_REG_VOLA, 0x80 },
43*4882a593Smuzhiyun { CS4341_REG_VOLB, 0x80 },
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
cs4341_set_fmt(struct snd_soc_dai * dai,unsigned int format)46*4882a593Smuzhiyun static int cs4341_set_fmt(struct snd_soc_dai *dai, unsigned int format)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
49*4882a593Smuzhiyun struct cs4341_priv *cs4341 = snd_soc_component_get_drvdata(component);
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
52*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFS:
53*4882a593Smuzhiyun break;
54*4882a593Smuzhiyun default:
55*4882a593Smuzhiyun return -EINVAL;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun switch (format & SND_SOC_DAIFMT_INV_MASK) {
59*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_NF:
60*4882a593Smuzhiyun break;
61*4882a593Smuzhiyun default:
62*4882a593Smuzhiyun return -EINVAL;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
66*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
67*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
68*4882a593Smuzhiyun case SND_SOC_DAIFMT_RIGHT_J:
69*4882a593Smuzhiyun cs4341->fmt = format & SND_SOC_DAIFMT_FORMAT_MASK;
70*4882a593Smuzhiyun break;
71*4882a593Smuzhiyun default:
72*4882a593Smuzhiyun return -EINVAL;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun return 0;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
cs4341_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)78*4882a593Smuzhiyun static int cs4341_hw_params(struct snd_pcm_substream *substream,
79*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
80*4882a593Smuzhiyun struct snd_soc_dai *dai)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
83*4882a593Smuzhiyun struct cs4341_priv *cs4341 = snd_soc_component_get_drvdata(component);
84*4882a593Smuzhiyun unsigned int mode = 0;
85*4882a593Smuzhiyun int b24 = 0;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun switch (params_format(params)) {
88*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_S24_LE:
89*4882a593Smuzhiyun b24 = 1;
90*4882a593Smuzhiyun break;
91*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_S16_LE:
92*4882a593Smuzhiyun break;
93*4882a593Smuzhiyun default:
94*4882a593Smuzhiyun dev_err(component->dev, "Unsupported PCM format 0x%08x.\n",
95*4882a593Smuzhiyun params_format(params));
96*4882a593Smuzhiyun return -EINVAL;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun switch (cs4341->fmt) {
100*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
101*4882a593Smuzhiyun mode = b24 ? CS4341_MODE2_DIF_I2S_24 : CS4341_MODE2_DIF_I2S_16;
102*4882a593Smuzhiyun break;
103*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
104*4882a593Smuzhiyun mode = CS4341_MODE2_DIF_LJ_24;
105*4882a593Smuzhiyun break;
106*4882a593Smuzhiyun case SND_SOC_DAIFMT_RIGHT_J:
107*4882a593Smuzhiyun mode = b24 ? CS4341_MODE2_DIF_RJ_24 : CS4341_MODE2_DIF_RJ_16;
108*4882a593Smuzhiyun break;
109*4882a593Smuzhiyun default:
110*4882a593Smuzhiyun dev_err(component->dev, "Unsupported DAI format 0x%08x.\n",
111*4882a593Smuzhiyun cs4341->fmt);
112*4882a593Smuzhiyun return -EINVAL;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun return snd_soc_component_update_bits(component, CS4341_REG_MODE2,
116*4882a593Smuzhiyun CS4341_MODE2_DIF, mode);
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
cs4341_mute(struct snd_soc_dai * dai,int mute,int direction)119*4882a593Smuzhiyun static int cs4341_mute(struct snd_soc_dai *dai, int mute, int direction)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
122*4882a593Smuzhiyun int ret;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, CS4341_REG_VOLA,
125*4882a593Smuzhiyun CS4341_VOLX_MUTE,
126*4882a593Smuzhiyun mute ? CS4341_VOLX_MUTE : 0);
127*4882a593Smuzhiyun if (ret < 0)
128*4882a593Smuzhiyun return ret;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun return snd_soc_component_update_bits(component, CS4341_REG_VOLB,
131*4882a593Smuzhiyun CS4341_VOLX_MUTE,
132*4882a593Smuzhiyun mute ? CS4341_VOLX_MUTE : 0);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(out_tlv, -9000, 100, 0);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun static const char * const deemph[] = {
138*4882a593Smuzhiyun "None", "44.1k", "48k", "32k",
139*4882a593Smuzhiyun };
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun static const struct soc_enum deemph_enum =
142*4882a593Smuzhiyun SOC_ENUM_SINGLE(CS4341_REG_MODE2, 2, 4, deemph);
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun static const char * const srzc[] = {
145*4882a593Smuzhiyun "Immediate", "Zero Cross", "Soft Ramp", "SR on ZC",
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun static const struct soc_enum srzc_enum =
149*4882a593Smuzhiyun SOC_ENUM_SINGLE(CS4341_REG_MIX, 5, 4, srzc);
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun static const struct snd_soc_dapm_widget cs4341_dapm_widgets[] = {
153*4882a593Smuzhiyun SND_SOC_DAPM_DAC("HiFi DAC", NULL, SND_SOC_NOPM, 0, 0),
154*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("OutA"),
155*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("OutB"),
156*4882a593Smuzhiyun };
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun static const struct snd_soc_dapm_route cs4341_routes[] = {
159*4882a593Smuzhiyun { "OutA", NULL, "HiFi DAC" },
160*4882a593Smuzhiyun { "OutB", NULL, "HiFi DAC" },
161*4882a593Smuzhiyun { "DAC Playback", NULL, "OutA" },
162*4882a593Smuzhiyun { "DAC Playback", NULL, "OutB" },
163*4882a593Smuzhiyun };
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun static const struct snd_kcontrol_new cs4341_controls[] = {
166*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Master Playback Volume",
167*4882a593Smuzhiyun CS4341_REG_VOLA, CS4341_REG_VOLB, 0, 90, 1, out_tlv),
168*4882a593Smuzhiyun SOC_ENUM("De-Emphasis Control", deemph_enum),
169*4882a593Smuzhiyun SOC_ENUM("Soft Ramp Zero Cross Control", srzc_enum),
170*4882a593Smuzhiyun SOC_SINGLE("Auto-Mute Switch", CS4341_REG_MODE2, 7, 1, 0),
171*4882a593Smuzhiyun SOC_SINGLE("Popguard Transient Switch", CS4341_REG_MODE2, 1, 1, 0),
172*4882a593Smuzhiyun };
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun static const struct snd_soc_dai_ops cs4341_dai_ops = {
175*4882a593Smuzhiyun .set_fmt = cs4341_set_fmt,
176*4882a593Smuzhiyun .hw_params = cs4341_hw_params,
177*4882a593Smuzhiyun .mute_stream = cs4341_mute,
178*4882a593Smuzhiyun .no_capture_mute = 1,
179*4882a593Smuzhiyun };
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun static struct snd_soc_dai_driver cs4341_dai = {
182*4882a593Smuzhiyun .name = "cs4341a-hifi",
183*4882a593Smuzhiyun .playback = {
184*4882a593Smuzhiyun .stream_name = "DAC Playback",
185*4882a593Smuzhiyun .channels_min = 1,
186*4882a593Smuzhiyun .channels_max = 2,
187*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_8000_96000,
188*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S16_LE |
189*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE,
190*4882a593Smuzhiyun },
191*4882a593Smuzhiyun .ops = &cs4341_dai_ops,
192*4882a593Smuzhiyun .symmetric_rates = 1,
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_cs4341 = {
196*4882a593Smuzhiyun .controls = cs4341_controls,
197*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(cs4341_controls),
198*4882a593Smuzhiyun .dapm_widgets = cs4341_dapm_widgets,
199*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(cs4341_dapm_widgets),
200*4882a593Smuzhiyun .dapm_routes = cs4341_routes,
201*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(cs4341_routes),
202*4882a593Smuzhiyun .idle_bias_on = 1,
203*4882a593Smuzhiyun .use_pmdown_time = 1,
204*4882a593Smuzhiyun .endianness = 1,
205*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun static const struct of_device_id __maybe_unused cs4341_dt_ids[] = {
209*4882a593Smuzhiyun { .compatible = "cirrus,cs4341a", },
210*4882a593Smuzhiyun { }
211*4882a593Smuzhiyun };
212*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, cs4341_dt_ids);
213*4882a593Smuzhiyun
cs4341_probe(struct device * dev)214*4882a593Smuzhiyun static int cs4341_probe(struct device *dev)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun struct cs4341_priv *cs4341 = dev_get_drvdata(dev);
217*4882a593Smuzhiyun int i;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(cs4341_reg_defaults); i++)
220*4882a593Smuzhiyun regmap_write(cs4341->regmap, cs4341_reg_defaults[i].reg,
221*4882a593Smuzhiyun cs4341_reg_defaults[i].def);
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun return devm_snd_soc_register_component(dev, &soc_component_cs4341,
224*4882a593Smuzhiyun &cs4341_dai, 1);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_I2C)
cs4341_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)228*4882a593Smuzhiyun static int cs4341_i2c_probe(struct i2c_client *i2c,
229*4882a593Smuzhiyun const struct i2c_device_id *id)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun struct cs4341_priv *cs4341;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun cs4341 = devm_kzalloc(&i2c->dev, sizeof(*cs4341), GFP_KERNEL);
234*4882a593Smuzhiyun if (!cs4341)
235*4882a593Smuzhiyun return -ENOMEM;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun i2c_set_clientdata(i2c, cs4341);
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun cs4341->regcfg.reg_bits = 8;
240*4882a593Smuzhiyun cs4341->regcfg.val_bits = 8;
241*4882a593Smuzhiyun cs4341->regcfg.max_register = CS4341_REG_VOLB;
242*4882a593Smuzhiyun cs4341->regcfg.cache_type = REGCACHE_FLAT;
243*4882a593Smuzhiyun cs4341->regcfg.reg_defaults = cs4341_reg_defaults;
244*4882a593Smuzhiyun cs4341->regcfg.num_reg_defaults = ARRAY_SIZE(cs4341_reg_defaults);
245*4882a593Smuzhiyun cs4341->regmap = devm_regmap_init_i2c(i2c, &cs4341->regcfg);
246*4882a593Smuzhiyun if (IS_ERR(cs4341->regmap))
247*4882a593Smuzhiyun return PTR_ERR(cs4341->regmap);
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun return cs4341_probe(&i2c->dev);
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun static const struct i2c_device_id cs4341_i2c_id[] = {
253*4882a593Smuzhiyun { "cs4341", 0 },
254*4882a593Smuzhiyun { }
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, cs4341_i2c_id);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun static struct i2c_driver cs4341_i2c_driver = {
259*4882a593Smuzhiyun .driver = {
260*4882a593Smuzhiyun .name = "cs4341-i2c",
261*4882a593Smuzhiyun .of_match_table = of_match_ptr(cs4341_dt_ids),
262*4882a593Smuzhiyun },
263*4882a593Smuzhiyun .probe = cs4341_i2c_probe,
264*4882a593Smuzhiyun .id_table = cs4341_i2c_id,
265*4882a593Smuzhiyun };
266*4882a593Smuzhiyun #endif
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun #if defined(CONFIG_SPI_MASTER)
cs4341_reg_readable(struct device * dev,unsigned int reg)269*4882a593Smuzhiyun static bool cs4341_reg_readable(struct device *dev, unsigned int reg)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun return false;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
cs4341_spi_probe(struct spi_device * spi)274*4882a593Smuzhiyun static int cs4341_spi_probe(struct spi_device *spi)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun struct cs4341_priv *cs4341;
277*4882a593Smuzhiyun int ret;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun cs4341 = devm_kzalloc(&spi->dev, sizeof(*cs4341), GFP_KERNEL);
280*4882a593Smuzhiyun if (!cs4341)
281*4882a593Smuzhiyun return -ENOMEM;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun if (!spi->bits_per_word)
284*4882a593Smuzhiyun spi->bits_per_word = 8;
285*4882a593Smuzhiyun if (!spi->max_speed_hz)
286*4882a593Smuzhiyun spi->max_speed_hz = 6000000;
287*4882a593Smuzhiyun ret = spi_setup(spi);
288*4882a593Smuzhiyun if (ret)
289*4882a593Smuzhiyun return ret;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun spi_set_drvdata(spi, cs4341);
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun cs4341->regcfg.reg_bits = 16;
294*4882a593Smuzhiyun cs4341->regcfg.val_bits = 8;
295*4882a593Smuzhiyun cs4341->regcfg.write_flag_mask = 0x20;
296*4882a593Smuzhiyun cs4341->regcfg.max_register = CS4341_REG_VOLB;
297*4882a593Smuzhiyun cs4341->regcfg.cache_type = REGCACHE_FLAT;
298*4882a593Smuzhiyun cs4341->regcfg.readable_reg = cs4341_reg_readable;
299*4882a593Smuzhiyun cs4341->regcfg.reg_defaults = cs4341_reg_defaults;
300*4882a593Smuzhiyun cs4341->regcfg.num_reg_defaults = ARRAY_SIZE(cs4341_reg_defaults);
301*4882a593Smuzhiyun cs4341->regmap = devm_regmap_init_spi(spi, &cs4341->regcfg);
302*4882a593Smuzhiyun if (IS_ERR(cs4341->regmap))
303*4882a593Smuzhiyun return PTR_ERR(cs4341->regmap);
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun return cs4341_probe(&spi->dev);
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun static struct spi_driver cs4341_spi_driver = {
309*4882a593Smuzhiyun .driver = {
310*4882a593Smuzhiyun .name = "cs4341-spi",
311*4882a593Smuzhiyun .of_match_table = of_match_ptr(cs4341_dt_ids),
312*4882a593Smuzhiyun },
313*4882a593Smuzhiyun .probe = cs4341_spi_probe,
314*4882a593Smuzhiyun };
315*4882a593Smuzhiyun #endif
316*4882a593Smuzhiyun
cs4341_init(void)317*4882a593Smuzhiyun static int __init cs4341_init(void)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun int ret = 0;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_I2C)
322*4882a593Smuzhiyun ret = i2c_add_driver(&cs4341_i2c_driver);
323*4882a593Smuzhiyun if (ret)
324*4882a593Smuzhiyun return ret;
325*4882a593Smuzhiyun #endif
326*4882a593Smuzhiyun #if defined(CONFIG_SPI_MASTER)
327*4882a593Smuzhiyun ret = spi_register_driver(&cs4341_spi_driver);
328*4882a593Smuzhiyun #endif
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun return ret;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun module_init(cs4341_init);
333*4882a593Smuzhiyun
cs4341_exit(void)334*4882a593Smuzhiyun static void __exit cs4341_exit(void)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_I2C)
337*4882a593Smuzhiyun i2c_del_driver(&cs4341_i2c_driver);
338*4882a593Smuzhiyun #endif
339*4882a593Smuzhiyun #if defined(CONFIG_SPI_MASTER)
340*4882a593Smuzhiyun spi_unregister_driver(&cs4341_spi_driver);
341*4882a593Smuzhiyun #endif
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun module_exit(cs4341_exit);
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
346*4882a593Smuzhiyun MODULE_DESCRIPTION("Cirrus Logic CS4341 ALSA SoC Codec Driver");
347*4882a593Smuzhiyun MODULE_LICENSE("GPL");
348