xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/aw883xx/aw_bin_parse.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * aw_bin_parse.c
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2020 AWINIC Technology CO., LTD
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify it
8*4882a593Smuzhiyun  * under the terms of the GNU General Public License as published by the
9*4882a593Smuzhiyun  * Free Software Foundation; either version 2 of the License, or (at your
10*4882a593Smuzhiyun  * option) any later version.
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/of_gpio.h>
17*4882a593Smuzhiyun #include <linux/delay.h>
18*4882a593Smuzhiyun #include <linux/device.h>
19*4882a593Smuzhiyun #include <linux/firmware.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/version.h>
22*4882a593Smuzhiyun #include <linux/input.h>
23*4882a593Smuzhiyun #include <linux/interrupt.h>
24*4882a593Smuzhiyun #include <linux/debugfs.h>
25*4882a593Smuzhiyun #include <linux/miscdevice.h>
26*4882a593Smuzhiyun #include <linux/uaccess.h>
27*4882a593Smuzhiyun #include <linux/regmap.h>
28*4882a593Smuzhiyun #include <linux/timer.h>
29*4882a593Smuzhiyun #include <linux/workqueue.h>
30*4882a593Smuzhiyun #include <linux/hrtimer.h>
31*4882a593Smuzhiyun #include <linux/mutex.h>
32*4882a593Smuzhiyun #include <linux/cdev.h>
33*4882a593Smuzhiyun #include <linux/list.h>
34*4882a593Smuzhiyun #include <linux/string.h>
35*4882a593Smuzhiyun #include "aw_bin_parse.h"
36*4882a593Smuzhiyun #include "aw_log.h"
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* "code version"-"excel version" */
39*4882a593Smuzhiyun #define AWINIC_CODE_VERSION "V0.0.8-V1.0.4"
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define DEBUG_LOG_LEVEL
42*4882a593Smuzhiyun #ifdef DEBUG_LOG_LEVEL
43*4882a593Smuzhiyun #define DBG(fmt, arg...)   do {\
44*4882a593Smuzhiyun pr_debug("AWINIC_BIN %s,line= %d,"fmt, __func__, __LINE__, ##arg);\
45*4882a593Smuzhiyun } while (0)
46*4882a593Smuzhiyun #define DBG_ERR(fmt, arg...)   do {\
47*4882a593Smuzhiyun pr_err("AWINIC_BIN_ERR %s,line= %d,"fmt, __func__, __LINE__, ##arg);\
48*4882a593Smuzhiyun } while (0)
49*4882a593Smuzhiyun #else
50*4882a593Smuzhiyun #define DBG(fmt, arg...) do {} while (0)
51*4882a593Smuzhiyun #define DBG_ERR(fmt, arg...) do {} while (0)
52*4882a593Smuzhiyun #endif
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #define printing_data_code
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun typedef unsigned short int aw_uint16;
57*4882a593Smuzhiyun typedef unsigned long int aw_uint32;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun #define BigLittleSwap16(A)	((((aw_uint16)(A) & 0xff00) >> 8) | \
60*4882a593Smuzhiyun 				 (((aw_uint16)(A) & 0x00ff) << 8))
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun #define BigLittleSwap32(A)	((((aw_uint32)(A) & 0xff000000) >> 24) | \
63*4882a593Smuzhiyun 				(((aw_uint32)(A) & 0x00ff0000) >> 8) | \
64*4882a593Smuzhiyun 				(((aw_uint32)(A) & 0x0000ff00) << 8) | \
65*4882a593Smuzhiyun 				(((aw_uint32)(A) & 0x000000ff) << 24))
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun static char *profile_name[AW_PROFILE_MAX] = {"Music", "Voice", "Voip", "Ringtone", "Ringtone_hs", "Lowpower",
68*4882a593Smuzhiyun 						"Bypass", "Mmi", "Fm", "Notification", "Receiver"};
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun /**
71*4882a593Smuzhiyun  *
72*4882a593Smuzhiyun  * Interface function
73*4882a593Smuzhiyun  *
74*4882a593Smuzhiyun  * return value:
75*4882a593Smuzhiyun  *       value = 0 :success;
76*4882a593Smuzhiyun  *       value = -1 :check bin header version
77*4882a593Smuzhiyun  *       value = -2 :check bin data type
78*4882a593Smuzhiyun  *       value = -3 :check sum or check bin data len error
79*4882a593Smuzhiyun  *       value = -4 :check data version
80*4882a593Smuzhiyun  *       value = -5 :check register num
81*4882a593Smuzhiyun  *       value = -6 :check dsp reg num
82*4882a593Smuzhiyun  *       value = -7 :check soc app num
83*4882a593Smuzhiyun  *       value = -8 :bin is NULL point
84*4882a593Smuzhiyun  *
85*4882a593Smuzhiyun  */
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /********************************************************
88*4882a593Smuzhiyun  *
89*4882a593Smuzhiyun  * check sum data
90*4882a593Smuzhiyun  *
91*4882a593Smuzhiyun  ********************************************************/
aw_check_sum(struct aw_bin * bin,int bin_num)92*4882a593Smuzhiyun static int aw_check_sum(struct aw_bin *bin, int bin_num)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	unsigned int i = 0;
95*4882a593Smuzhiyun 	unsigned int sum_data = 0;
96*4882a593Smuzhiyun 	unsigned int check_sum = 0;
97*4882a593Smuzhiyun 	char *p_check_sum = NULL;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	DBG("enter\n");
100*4882a593Smuzhiyun 	p_check_sum = &(bin->info.data[(bin->header_info[bin_num].
101*4882a593Smuzhiyun 		valid_data_addr - bin->header_info[bin_num].header_len)]);
102*4882a593Smuzhiyun 	DBG("aw_bin_parse p_check_sum = %p\n", p_check_sum);
103*4882a593Smuzhiyun 	check_sum = GET_32_DATA(*(p_check_sum + 3), *(p_check_sum + 2),
104*4882a593Smuzhiyun 				*(p_check_sum + 1), *(p_check_sum));
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	for (i = 4; i < bin->header_info[bin_num].bin_data_len + bin->
107*4882a593Smuzhiyun 					header_info[bin_num].header_len; i++) {
108*4882a593Smuzhiyun 		sum_data += *(p_check_sum + i);
109*4882a593Smuzhiyun 	}
110*4882a593Smuzhiyun 	DBG("aw_bin_parse bin_num = %d, check_sum = 0x%x, sum_data = 0x%x\n",
111*4882a593Smuzhiyun 						bin_num, check_sum, sum_data);
112*4882a593Smuzhiyun 	if (sum_data != check_sum) {
113*4882a593Smuzhiyun 		p_check_sum = NULL;
114*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse check sum or check bin data len error\n");
115*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse bin_num = %d\n", bin_num);
116*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse check_sum = 0x%x\n", check_sum);
117*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse sum_data = 0x%x\n", sum_data);
118*4882a593Smuzhiyun 		return -BIN_DATA_LEN_ERR;
119*4882a593Smuzhiyun 	}
120*4882a593Smuzhiyun 	p_check_sum = NULL;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	return 0;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun 
aw_check_data_version(struct aw_bin * bin,int bin_num)125*4882a593Smuzhiyun static int aw_check_data_version(struct aw_bin *bin, int bin_num)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun 	int i = 0;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	DBG("enter\n");
130*4882a593Smuzhiyun 	for (i = DATA_VERSION_V1; i < DATA_VERSION_MAX; i++) {
131*4882a593Smuzhiyun 		if (bin->header_info[bin_num].bin_data_ver == i)
132*4882a593Smuzhiyun 			return 0;
133*4882a593Smuzhiyun 	}
134*4882a593Smuzhiyun 	DBG_ERR("aw_bin_parse Unrecognized this bin data version\n");
135*4882a593Smuzhiyun 	return -DATA_VER_ERR;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
aw_check_register_num_v1(struct aw_bin * bin,int bin_num)138*4882a593Smuzhiyun static int aw_check_register_num_v1(struct aw_bin *bin, int bin_num)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	unsigned int check_register_num = 0;
141*4882a593Smuzhiyun 	unsigned int parse_register_num = 0;
142*4882a593Smuzhiyun 	char *p_check_sum = NULL;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	DBG("enter\n");
145*4882a593Smuzhiyun 	p_check_sum = &(bin->info.data[(bin->header_info[bin_num].
146*4882a593Smuzhiyun 							valid_data_addr)]);
147*4882a593Smuzhiyun 	DBG("aw_bin_parse p_check_sum = %p\n", p_check_sum);
148*4882a593Smuzhiyun 	parse_register_num = GET_32_DATA(*(p_check_sum + 3), *(p_check_sum + 2),
149*4882a593Smuzhiyun 					*(p_check_sum + 1), *(p_check_sum));
150*4882a593Smuzhiyun 	check_register_num = (bin->header_info[bin_num].bin_data_len - 4) /
151*4882a593Smuzhiyun 				(bin->header_info[bin_num].reg_byte_len +
152*4882a593Smuzhiyun 				bin->header_info[bin_num].data_byte_len);
153*4882a593Smuzhiyun 	DBG("aw_bin_parse bin_num = %d\n", bin_num);
154*4882a593Smuzhiyun 	DBG("aw_bin_parse parse_register_num = 0x%x\n", parse_register_num);
155*4882a593Smuzhiyun 	DBG("aw_bin_parse check_register_num = 0x%x\n", check_register_num);
156*4882a593Smuzhiyun 	if (parse_register_num != check_register_num) {
157*4882a593Smuzhiyun 		p_check_sum = NULL;
158*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse check register num error\n");
159*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse bin_num = %d\n", bin_num);
160*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse parse_register_num = 0x%x\n",
161*4882a593Smuzhiyun 							parse_register_num);
162*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse check_register_num = 0x%x\n",
163*4882a593Smuzhiyun 							check_register_num);
164*4882a593Smuzhiyun 		return -REG_NUM_ERR;
165*4882a593Smuzhiyun 	}
166*4882a593Smuzhiyun 	bin->header_info[bin_num].reg_num = parse_register_num;
167*4882a593Smuzhiyun 	bin->header_info[bin_num].valid_data_len = bin->header_info[bin_num].
168*4882a593Smuzhiyun 							bin_data_len - 4;
169*4882a593Smuzhiyun 	p_check_sum = NULL;
170*4882a593Smuzhiyun 	bin->header_info[bin_num].valid_data_addr = bin->header_info[bin_num].
171*4882a593Smuzhiyun 							valid_data_addr + 4;
172*4882a593Smuzhiyun 	return 0;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun 
aw_check_dsp_reg_num_v1(struct aw_bin * bin,int bin_num)175*4882a593Smuzhiyun static int aw_check_dsp_reg_num_v1(struct aw_bin *bin, int bin_num)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	unsigned int check_dsp_reg_num = 0;
178*4882a593Smuzhiyun 	unsigned int parse_dsp_reg_num = 0;
179*4882a593Smuzhiyun 	char *p_check_sum = NULL;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	DBG("enter\n");
182*4882a593Smuzhiyun 	p_check_sum = &(bin->info.data[(bin->header_info[bin_num].
183*4882a593Smuzhiyun 							valid_data_addr)]);
184*4882a593Smuzhiyun 	DBG("aw_bin_parse p_check_sum = %p\n", p_check_sum);
185*4882a593Smuzhiyun 	parse_dsp_reg_num = GET_32_DATA(*(p_check_sum + 7), *(p_check_sum + 6),
186*4882a593Smuzhiyun 					*(p_check_sum + 5), *(p_check_sum + 4));
187*4882a593Smuzhiyun 	bin->header_info[bin_num].reg_data_byte_len =
188*4882a593Smuzhiyun 			GET_32_DATA(*(p_check_sum + 11), *(p_check_sum + 10),
189*4882a593Smuzhiyun 					*(p_check_sum + 9), *(p_check_sum + 8));
190*4882a593Smuzhiyun 	check_dsp_reg_num = (bin->header_info[bin_num].bin_data_len - 12) /
191*4882a593Smuzhiyun 				bin->header_info[bin_num].reg_data_byte_len;
192*4882a593Smuzhiyun 	DBG("aw_bin_parse bin_num = %d\n", bin_num);
193*4882a593Smuzhiyun 	DBG("aw_bin_parse parse_dsp_reg_num = 0x%x\n", parse_dsp_reg_num);
194*4882a593Smuzhiyun 	DBG("aw_bin_parse check_dsp_reg_num = 0x%x\n", check_dsp_reg_num);
195*4882a593Smuzhiyun 	if (parse_dsp_reg_num != check_dsp_reg_num) {
196*4882a593Smuzhiyun 		p_check_sum = NULL;
197*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse check dsp reg num error\n");
198*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse bin_num = %d\n", bin_num);
199*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse parse_dsp_reg_num = 0x%x\n",
200*4882a593Smuzhiyun 							parse_dsp_reg_num);
201*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse check_dsp_reg_num = 0x%x\n",
202*4882a593Smuzhiyun 							check_dsp_reg_num);
203*4882a593Smuzhiyun 		return -DSP_REG_NUM_ERR;
204*4882a593Smuzhiyun 	}
205*4882a593Smuzhiyun 	bin->header_info[bin_num].download_addr =
206*4882a593Smuzhiyun 			GET_32_DATA(*(p_check_sum + 3), *(p_check_sum + 2),
207*4882a593Smuzhiyun 					*(p_check_sum + 1), *(p_check_sum));
208*4882a593Smuzhiyun 	bin->header_info[bin_num].reg_num = parse_dsp_reg_num;
209*4882a593Smuzhiyun 	bin->header_info[bin_num].valid_data_len = bin->header_info[bin_num].
210*4882a593Smuzhiyun 							bin_data_len - 12;
211*4882a593Smuzhiyun 	p_check_sum = NULL;
212*4882a593Smuzhiyun 	bin->header_info[bin_num].valid_data_addr = bin->header_info[bin_num].
213*4882a593Smuzhiyun 							valid_data_addr + 12;
214*4882a593Smuzhiyun 	return 0;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun 
aw_check_soc_app_num_v1(struct aw_bin * bin,int bin_num)217*4882a593Smuzhiyun static int aw_check_soc_app_num_v1(struct aw_bin *bin, int bin_num)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun 	unsigned int check_soc_app_num = 0;
220*4882a593Smuzhiyun 	unsigned int parse_soc_app_num = 0;
221*4882a593Smuzhiyun 	char *p_check_sum = NULL;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	DBG("enter\n");
224*4882a593Smuzhiyun 	p_check_sum = &(bin->info.data[(bin->header_info[bin_num].
225*4882a593Smuzhiyun 							valid_data_addr)]);
226*4882a593Smuzhiyun 	DBG("aw_bin_parse p_check_sum = %p\n", p_check_sum);
227*4882a593Smuzhiyun 	bin->header_info[bin_num].app_version = GET_32_DATA(*(p_check_sum + 3),
228*4882a593Smuzhiyun 			*(p_check_sum + 2), *(p_check_sum + 1), *(p_check_sum));
229*4882a593Smuzhiyun 	parse_soc_app_num = GET_32_DATA(*(p_check_sum + 11),
230*4882a593Smuzhiyun 		*(p_check_sum + 10), *(p_check_sum + 9), *(p_check_sum + 8));
231*4882a593Smuzhiyun 	check_soc_app_num = bin->header_info[bin_num].bin_data_len - 12;
232*4882a593Smuzhiyun 	DBG("aw_bin_parse bin_num = %d\n", bin_num);
233*4882a593Smuzhiyun 	DBG("aw_bin_parse parse_soc_app_num = 0x%x\n", parse_soc_app_num);
234*4882a593Smuzhiyun 	DBG("aw_bin_parse check_soc_app_num = 0x%x\n", check_soc_app_num);
235*4882a593Smuzhiyun 	if (parse_soc_app_num != check_soc_app_num) {
236*4882a593Smuzhiyun 		p_check_sum = NULL;
237*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse check soc app num error\n");
238*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse bin_num = %d\n", bin_num);
239*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse parse_soc_app_num = 0x%x\n",
240*4882a593Smuzhiyun 							parse_soc_app_num);
241*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse check_soc_app_num = 0x%x\n",
242*4882a593Smuzhiyun 							check_soc_app_num);
243*4882a593Smuzhiyun 		return -SOC_APP_NUM_ERR;
244*4882a593Smuzhiyun 	}
245*4882a593Smuzhiyun 	bin->header_info[bin_num].reg_num = parse_soc_app_num;
246*4882a593Smuzhiyun 	bin->header_info[bin_num].download_addr =
247*4882a593Smuzhiyun 			GET_32_DATA(*(p_check_sum + 7), *(p_check_sum + 6),
248*4882a593Smuzhiyun 					*(p_check_sum + 5), *(p_check_sum + 4));
249*4882a593Smuzhiyun 	bin->header_info[bin_num].valid_data_len = bin->header_info[bin_num].
250*4882a593Smuzhiyun 							bin_data_len - 12;
251*4882a593Smuzhiyun 	p_check_sum = NULL;
252*4882a593Smuzhiyun 	bin->header_info[bin_num].valid_data_addr = bin->header_info[bin_num].
253*4882a593Smuzhiyun 							valid_data_addr + 12;
254*4882a593Smuzhiyun 	return 0;
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun /********************************************************
257*4882a593Smuzhiyun  *
258*4882a593Smuzhiyun  * bin header 1_0_0
259*4882a593Smuzhiyun  *
260*4882a593Smuzhiyun  ********************************************************/
aw_get_single_bin_header_1_0_0(struct aw_bin * bin)261*4882a593Smuzhiyun static void aw_get_single_bin_header_1_0_0(struct aw_bin *bin)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun 	int i;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	DBG("enter %s\n", __func__);
266*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].header_len = 60;
267*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].check_sum =
268*4882a593Smuzhiyun 		GET_32_DATA(*(bin->p_addr + 3), *(bin->p_addr + 2),
269*4882a593Smuzhiyun 				*(bin->p_addr + 1), *(bin->p_addr));
270*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].header_ver =
271*4882a593Smuzhiyun 		GET_32_DATA(*(bin->p_addr + 7), *(bin->p_addr + 6),
272*4882a593Smuzhiyun 				*(bin->p_addr + 5), *(bin->p_addr + 4));
273*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].bin_data_type =
274*4882a593Smuzhiyun 		GET_32_DATA(*(bin->p_addr + 11), *(bin->p_addr + 10),
275*4882a593Smuzhiyun 				*(bin->p_addr + 9), *(bin->p_addr + 8));
276*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].bin_data_ver =
277*4882a593Smuzhiyun 		GET_32_DATA(*(bin->p_addr + 15), *(bin->p_addr + 14),
278*4882a593Smuzhiyun 				*(bin->p_addr + 13), *(bin->p_addr + 12));
279*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].bin_data_len =
280*4882a593Smuzhiyun 		GET_32_DATA(*(bin->p_addr + 19), *(bin->p_addr + 18),
281*4882a593Smuzhiyun 				*(bin->p_addr + 17), *(bin->p_addr + 16));
282*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].ui_ver =
283*4882a593Smuzhiyun 		GET_32_DATA(*(bin->p_addr + 23), *(bin->p_addr + 22),
284*4882a593Smuzhiyun 				*(bin->p_addr + 21), *(bin->p_addr + 20));
285*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].reg_byte_len =
286*4882a593Smuzhiyun 		GET_32_DATA(*(bin->p_addr + 35), *(bin->p_addr + 34),
287*4882a593Smuzhiyun 				*(bin->p_addr + 33), *(bin->p_addr + 32));
288*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].data_byte_len =
289*4882a593Smuzhiyun 		GET_32_DATA(*(bin->p_addr + 39), *(bin->p_addr + 38),
290*4882a593Smuzhiyun 				*(bin->p_addr + 37), *(bin->p_addr + 36));
291*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].device_addr =
292*4882a593Smuzhiyun 		GET_32_DATA(*(bin->p_addr + 43), *(bin->p_addr + 42),
293*4882a593Smuzhiyun 			*(bin->p_addr + 41), *(bin->p_addr + 40));
294*4882a593Smuzhiyun 	for (i = 0; i < 8; i++) {
295*4882a593Smuzhiyun 		bin->header_info[bin->all_bin_parse_num].chip_type[i] =
296*4882a593Smuzhiyun 						*(bin->p_addr + 24 + i);
297*4882a593Smuzhiyun 	}
298*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].reg_num = 0x00000000;
299*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].reg_data_byte_len = 0x00000000;
300*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].download_addr = 0x00000000;
301*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].app_version = 0x00000000;
302*4882a593Smuzhiyun 	bin->header_info[bin->all_bin_parse_num].valid_data_len = 0x00000000;
303*4882a593Smuzhiyun 	bin->all_bin_parse_num += 1;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun 
aw_parse_each_of_multi_bins_1_0_0(unsigned int bin_num,int bin_serial_num,struct aw_bin * bin)306*4882a593Smuzhiyun static int aw_parse_each_of_multi_bins_1_0_0(unsigned int bin_num, int bin_serial_num,
307*4882a593Smuzhiyun 				      struct aw_bin *bin)
308*4882a593Smuzhiyun {
309*4882a593Smuzhiyun 	int ret = 0;
310*4882a593Smuzhiyun 	unsigned int bin_start_addr = 0;
311*4882a593Smuzhiyun 	unsigned int valid_data_len = 0;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	DBG("aw_bin_parse enter multi bin branch -- %s\n", __func__);
314*4882a593Smuzhiyun 	if (!bin_serial_num) {
315*4882a593Smuzhiyun 		bin_start_addr = GET_32_DATA(*(bin->p_addr + 67), *(bin->p_addr
316*4882a593Smuzhiyun 			+ 66), *(bin->p_addr + 65), *(bin->p_addr + 64));
317*4882a593Smuzhiyun 		bin->p_addr += (60 + bin_start_addr);
318*4882a593Smuzhiyun 		bin->header_info[bin->all_bin_parse_num].valid_data_addr =
319*4882a593Smuzhiyun 				bin->header_info[bin->all_bin_parse_num - 1].
320*4882a593Smuzhiyun 				valid_data_addr + 4 + 8 * bin_num + 60;
321*4882a593Smuzhiyun 	} else {
322*4882a593Smuzhiyun 		valid_data_len = bin->header_info[bin->all_bin_parse_num - 1].
323*4882a593Smuzhiyun 								bin_data_len;
324*4882a593Smuzhiyun 		bin->p_addr += (60 + valid_data_len);
325*4882a593Smuzhiyun 		bin->header_info[bin->all_bin_parse_num].valid_data_addr =
326*4882a593Smuzhiyun 		    bin->header_info[bin->all_bin_parse_num - 1].valid_data_addr
327*4882a593Smuzhiyun 		    + bin->header_info[bin->all_bin_parse_num - 1].bin_data_len
328*4882a593Smuzhiyun 		    + 60;
329*4882a593Smuzhiyun 	}
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	ret = aw_parse_bin_header_1_0_0(bin);
332*4882a593Smuzhiyun 	return ret;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun /* Get the number of bins in multi bins, and set a for loop,
336*4882a593Smuzhiyun  * loop processing each bin data
337*4882a593Smuzhiyun  */
aw_get_multi_bin_header_1_0_0(struct aw_bin * bin)338*4882a593Smuzhiyun static int aw_get_multi_bin_header_1_0_0(struct aw_bin *bin)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun 	int i = 0;
341*4882a593Smuzhiyun 	int ret = 0;
342*4882a593Smuzhiyun 	unsigned int bin_num = 0;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	DBG("aw_bin_parse enter multi bin branch -- %s\n", __func__);
345*4882a593Smuzhiyun 	bin_num = GET_32_DATA(*(bin->p_addr + 63), *(bin->p_addr + 62),
346*4882a593Smuzhiyun 				*(bin->p_addr + 61), *(bin->p_addr + 60));
347*4882a593Smuzhiyun 	if (bin->multi_bin_parse_num == 1)
348*4882a593Smuzhiyun 		bin->header_info[bin->all_bin_parse_num].valid_data_addr = 60;
349*4882a593Smuzhiyun 	aw_get_single_bin_header_1_0_0(bin);
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	for (i = 0; i < bin_num; i++) {
352*4882a593Smuzhiyun 		DBG("aw_bin_parse enter multi bin for is %d\n", i);
353*4882a593Smuzhiyun 		ret = aw_parse_each_of_multi_bins_1_0_0(bin_num, i, bin);
354*4882a593Smuzhiyun 		if (ret < 0)
355*4882a593Smuzhiyun 			return ret;
356*4882a593Smuzhiyun 	}
357*4882a593Smuzhiyun 	return 0;
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun /********************************************************
361*4882a593Smuzhiyun  *
362*4882a593Smuzhiyun  * If the bin framework header version is 1.0.0,
363*4882a593Smuzhiyun  * determine the data type of bin, and then perform different processing
364*4882a593Smuzhiyun  * according to the data type
365*4882a593Smuzhiyun  * If it is a single bin data type, write the data directly
366*4882a593Smuzhiyun  * into the structure array
367*4882a593Smuzhiyun  * If it is a multi-bin data type, first obtain the number of bins,
368*4882a593Smuzhiyun  * and then recursively call the bin frame header processing function
369*4882a593Smuzhiyun  * according to the bin number to process the frame header information
370*4882a593Smuzhiyun  * of each bin separately
371*4882a593Smuzhiyun  *
372*4882a593Smuzhiyun  ********************************************************/
aw_parse_bin_header_1_0_0(struct aw_bin * bin)373*4882a593Smuzhiyun int aw_parse_bin_header_1_0_0(struct aw_bin *bin)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun 	int ret = 0;
376*4882a593Smuzhiyun 	unsigned int bin_data_type;
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	DBG("enter %s\n", __func__);
379*4882a593Smuzhiyun 	bin_data_type = GET_32_DATA(*(bin->p_addr + 11), *(bin->p_addr + 10),
380*4882a593Smuzhiyun 					*(bin->p_addr + 9), *(bin->p_addr + 8));
381*4882a593Smuzhiyun 	DBG("aw_bin_parse bin_data_type 0x%x\n", bin_data_type);
382*4882a593Smuzhiyun 	switch (bin_data_type) {
383*4882a593Smuzhiyun 	case DATA_TYPE_REGISTER:
384*4882a593Smuzhiyun 	case DATA_TYPE_DSP_REG:
385*4882a593Smuzhiyun 	case DATA_TYPE_SOC_APP:
386*4882a593Smuzhiyun 		/* Divided into two processing methods,
387*4882a593Smuzhiyun 		 * one is single bin processing,
388*4882a593Smuzhiyun 		 * and the other is single bin processing in multi bin
389*4882a593Smuzhiyun 		 */
390*4882a593Smuzhiyun 		DBG("aw_bin_parse enter single bin branch\n");
391*4882a593Smuzhiyun 		bin->single_bin_parse_num += 1;
392*4882a593Smuzhiyun 		DBG("%s bin->single_bin_parse_num is %d\n", __func__,
393*4882a593Smuzhiyun 						bin->single_bin_parse_num);
394*4882a593Smuzhiyun 		if (!bin->multi_bin_parse_num) {
395*4882a593Smuzhiyun 			bin->header_info[bin->all_bin_parse_num].
396*4882a593Smuzhiyun 							valid_data_addr = 60;
397*4882a593Smuzhiyun 		}
398*4882a593Smuzhiyun 		aw_get_single_bin_header_1_0_0(bin);
399*4882a593Smuzhiyun 		break;
400*4882a593Smuzhiyun 	case DATA_TYPE_MULTI_BINS:
401*4882a593Smuzhiyun 		/* Get the number of times to enter multi bins */
402*4882a593Smuzhiyun 		DBG("aw_bin_parse enter multi bin branch\n");
403*4882a593Smuzhiyun 		bin->multi_bin_parse_num += 1;
404*4882a593Smuzhiyun 		DBG("%s bin->multi_bin_parse_num is %d\n", __func__,
405*4882a593Smuzhiyun 						bin->multi_bin_parse_num);
406*4882a593Smuzhiyun 		ret = aw_get_multi_bin_header_1_0_0(bin);
407*4882a593Smuzhiyun 		if (ret < 0)
408*4882a593Smuzhiyun 			return ret;
409*4882a593Smuzhiyun 		break;
410*4882a593Smuzhiyun 	}
411*4882a593Smuzhiyun 	return 0;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun /* get the bin's header version */
aw_check_bin_header_version(struct aw_bin * bin)415*4882a593Smuzhiyun static int aw_check_bin_header_version(struct aw_bin *bin)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun 	int ret = 0;
418*4882a593Smuzhiyun 	unsigned int header_version = 0;
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	header_version = GET_32_DATA(*(bin->p_addr + 7), *(bin->p_addr + 6),
421*4882a593Smuzhiyun 					*(bin->p_addr + 5), *(bin->p_addr + 4));
422*4882a593Smuzhiyun 	DBG("aw_bin_parse header_version 0x%x\n", header_version);
423*4882a593Smuzhiyun 	/* Write data to the corresponding structure array
424*4882a593Smuzhiyun 	 * according to different formats of the bin frame header version
425*4882a593Smuzhiyun 	 */
426*4882a593Smuzhiyun 	switch (header_version) {
427*4882a593Smuzhiyun 	case HEADER_VERSION_1_0_0:
428*4882a593Smuzhiyun 		ret = aw_parse_bin_header_1_0_0(bin);
429*4882a593Smuzhiyun 		return ret;
430*4882a593Smuzhiyun 	default:
431*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse Unrecognized this bin header version\n");
432*4882a593Smuzhiyun 		return -BIN_HEADER_VER_ERR;
433*4882a593Smuzhiyun 	}
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun 
aw_parsing_bin_file(struct aw_bin * bin)436*4882a593Smuzhiyun int aw_parsing_bin_file(struct aw_bin *bin)
437*4882a593Smuzhiyun {
438*4882a593Smuzhiyun 	int i = 0;
439*4882a593Smuzhiyun 	int ret = 0;
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 	DBG("aw_bin_parse code version:%s\n", AWINIC_CODE_VERSION);
442*4882a593Smuzhiyun 	if (!bin) {
443*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse bin is NULL\n");
444*4882a593Smuzhiyun 		return -BIN_IS_NULL;
445*4882a593Smuzhiyun 	}
446*4882a593Smuzhiyun 	bin->p_addr = bin->info.data;
447*4882a593Smuzhiyun 	bin->all_bin_parse_num = 0;
448*4882a593Smuzhiyun 	bin->multi_bin_parse_num = 0;
449*4882a593Smuzhiyun 	bin->single_bin_parse_num = 0;
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	/* filling bins header info */
452*4882a593Smuzhiyun 	ret = aw_check_bin_header_version(bin);
453*4882a593Smuzhiyun 	if (ret < 0) {
454*4882a593Smuzhiyun 		DBG_ERR("aw_bin_parse check bin header version error\n");
455*4882a593Smuzhiyun 		return ret;
456*4882a593Smuzhiyun 	}
457*4882a593Smuzhiyun 	bin->p_addr = NULL;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	/* check bin header info */
460*4882a593Smuzhiyun 	for (i = 0; i < bin->all_bin_parse_num; i++) {
461*4882a593Smuzhiyun 		/* check sum */
462*4882a593Smuzhiyun 		ret = aw_check_sum(bin, i);
463*4882a593Smuzhiyun 		if (ret < 0) {
464*4882a593Smuzhiyun 			DBG_ERR("aw_bin_parse check sum data error\n");
465*4882a593Smuzhiyun 			return ret;
466*4882a593Smuzhiyun 		}
467*4882a593Smuzhiyun 		/* check bin data version */
468*4882a593Smuzhiyun 		ret = aw_check_data_version(bin, i);
469*4882a593Smuzhiyun 		if (ret < 0) {
470*4882a593Smuzhiyun 			DBG_ERR("aw_bin_parse check data version error\n");
471*4882a593Smuzhiyun 			return ret;
472*4882a593Smuzhiyun 		}
473*4882a593Smuzhiyun 		/* check valid data */
474*4882a593Smuzhiyun 		if (bin->header_info[i].bin_data_ver == DATA_VERSION_V1) {
475*4882a593Smuzhiyun 			/* check register num */
476*4882a593Smuzhiyun 			if (bin->header_info[i].bin_data_type ==
477*4882a593Smuzhiyun 							DATA_TYPE_REGISTER) {
478*4882a593Smuzhiyun 				ret = aw_check_register_num_v1(bin, i);
479*4882a593Smuzhiyun 				if (ret < 0)
480*4882a593Smuzhiyun 					return ret;
481*4882a593Smuzhiyun 				/* check dsp reg num */
482*4882a593Smuzhiyun 			} else if (bin->header_info[i].bin_data_type ==
483*4882a593Smuzhiyun 							DATA_TYPE_DSP_REG) {
484*4882a593Smuzhiyun 				ret = aw_check_dsp_reg_num_v1(bin, i);
485*4882a593Smuzhiyun 				if (ret < 0)
486*4882a593Smuzhiyun 					return ret;
487*4882a593Smuzhiyun 				/* check soc app num */
488*4882a593Smuzhiyun 			} else if (bin->header_info[i].bin_data_type ==
489*4882a593Smuzhiyun 							DATA_TYPE_SOC_APP) {
490*4882a593Smuzhiyun 				ret = aw_check_soc_app_num_v1(bin, i);
491*4882a593Smuzhiyun 				if (ret < 0)
492*4882a593Smuzhiyun 					return ret;
493*4882a593Smuzhiyun 			} else {
494*4882a593Smuzhiyun 				bin->header_info[i].valid_data_len = bin->
495*4882a593Smuzhiyun 						header_info[i].bin_data_len;
496*4882a593Smuzhiyun 			}
497*4882a593Smuzhiyun 		}
498*4882a593Smuzhiyun 	}
499*4882a593Smuzhiyun 	DBG("aw_bin_parse parsing success\n");
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	return 0;
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun 
aw_dev_dsp_data_order(struct aw_device * aw_dev,uint8_t * data,uint32_t data_len)504*4882a593Smuzhiyun int aw_dev_dsp_data_order(struct aw_device *aw_dev,
505*4882a593Smuzhiyun 				uint8_t *data, uint32_t data_len)
506*4882a593Smuzhiyun {
507*4882a593Smuzhiyun 	int i = 0;
508*4882a593Smuzhiyun 	uint8_t tmp_val = 0;
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	aw_dev_dbg(aw_dev->dev, "enter");
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 	if (data_len % 2 != 0) {
513*4882a593Smuzhiyun 		aw_dev_dbg(aw_dev->dev, "data_len:%d unsupported", data_len);
514*4882a593Smuzhiyun 		return -EINVAL;
515*4882a593Smuzhiyun 	}
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	for (i = 0; i < data_len; i += 2) {
518*4882a593Smuzhiyun 		tmp_val = data[i];
519*4882a593Smuzhiyun 		data[i] = data[i + 1];
520*4882a593Smuzhiyun 		data[i + 1] = tmp_val;
521*4882a593Smuzhiyun 	}
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun 	return 0;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun 
aw_dev_parse_raw_reg(struct aw_device * aw_dev,uint8_t * data,uint32_t data_len,struct aw_prof_desc * prof_desc)526*4882a593Smuzhiyun static int aw_dev_parse_raw_reg(struct aw_device *aw_dev,
527*4882a593Smuzhiyun 		uint8_t *data, uint32_t data_len, struct aw_prof_desc *prof_desc)
528*4882a593Smuzhiyun {
529*4882a593Smuzhiyun 	aw_dev_info(aw_dev->dev, "data_size:%d enter", data_len);
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	prof_desc->sec_desc[AW_DATA_TYPE_REG].data = data;
532*4882a593Smuzhiyun 	prof_desc->sec_desc[AW_DATA_TYPE_REG].len = data_len;
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun 	prof_desc->prof_st = AW_PROFILE_OK;
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	return 0;
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun 
aw_dev_parse_raw_dsp_cfg(struct aw_device * aw_dev,uint8_t * data,uint32_t data_len,struct aw_prof_desc * prof_desc)539*4882a593Smuzhiyun static int aw_dev_parse_raw_dsp_cfg(struct aw_device *aw_dev,
540*4882a593Smuzhiyun 		uint8_t *data, uint32_t data_len, struct aw_prof_desc *prof_desc)
541*4882a593Smuzhiyun {
542*4882a593Smuzhiyun 	int ret;
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	aw_dev_info(aw_dev->dev, "data_size:%d enter", data_len);
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	ret = aw_dev_dsp_data_order(aw_dev, data, data_len);
547*4882a593Smuzhiyun 	if (ret < 0)
548*4882a593Smuzhiyun 		return ret;
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	prof_desc->sec_desc[AW_DATA_TYPE_DSP_CFG].data = data;
551*4882a593Smuzhiyun 	prof_desc->sec_desc[AW_DATA_TYPE_DSP_CFG].len = data_len;
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	prof_desc->prof_st = AW_PROFILE_OK;
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	return 0;
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun 
aw_dev_parse_raw_dsp_fw(struct aw_device * aw_dev,uint8_t * data,uint32_t data_len,struct aw_prof_desc * prof_desc)558*4882a593Smuzhiyun static int aw_dev_parse_raw_dsp_fw(struct aw_device *aw_dev,
559*4882a593Smuzhiyun 		uint8_t *data, uint32_t data_len, struct aw_prof_desc *prof_desc)
560*4882a593Smuzhiyun {
561*4882a593Smuzhiyun 	int ret;
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 	aw_dev_info(aw_dev->dev, "data_size:%d enter", data_len);
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	ret = aw_dev_dsp_data_order(aw_dev, data, data_len);
566*4882a593Smuzhiyun 	if (ret < 0)
567*4882a593Smuzhiyun 		return ret;
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 	prof_desc->sec_desc[AW_DATA_TYPE_DSP_FW].data = data;
570*4882a593Smuzhiyun 	prof_desc->sec_desc[AW_DATA_TYPE_DSP_FW].len = data_len;
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 	prof_desc->prof_st = AW_PROFILE_OK;
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	return 0;
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun 
aw_dev_prof_parse_multi_bin(struct aw_device * aw_dev,uint8_t * data,uint32_t data_len,struct aw_prof_desc * prof_desc)577*4882a593Smuzhiyun static int aw_dev_prof_parse_multi_bin(struct aw_device *aw_dev,
578*4882a593Smuzhiyun 		uint8_t *data, uint32_t data_len, struct aw_prof_desc *prof_desc)
579*4882a593Smuzhiyun {
580*4882a593Smuzhiyun 	struct aw_bin *aw_bin = NULL;
581*4882a593Smuzhiyun 	int i;
582*4882a593Smuzhiyun 	int ret;
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	aw_bin = devm_kzalloc(aw_dev->dev, data_len + sizeof(struct aw_bin), GFP_KERNEL);
585*4882a593Smuzhiyun 	if (aw_bin == NULL) {
586*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "kzalloc aw_bin failed");
587*4882a593Smuzhiyun 		return -ENOMEM;
588*4882a593Smuzhiyun 	}
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	aw_bin->info.len = data_len;
591*4882a593Smuzhiyun 	memcpy(aw_bin->info.data, data, data_len);
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	ret = aw_parsing_bin_file(aw_bin);
594*4882a593Smuzhiyun 	if (ret < 0) {
595*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "parse bin failed");
596*4882a593Smuzhiyun 		goto parse_bin_failed;
597*4882a593Smuzhiyun 	}
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 	for (i = 0; i < aw_bin->all_bin_parse_num; i++) {
600*4882a593Smuzhiyun 		if (aw_bin->header_info[i].bin_data_type == DATA_TYPE_REGISTER) {
601*4882a593Smuzhiyun 			prof_desc->sec_desc[AW_DATA_TYPE_REG].len = aw_bin->header_info[i].valid_data_len;
602*4882a593Smuzhiyun 			prof_desc->sec_desc[AW_DATA_TYPE_REG].data = data + aw_bin->header_info[i].valid_data_addr;
603*4882a593Smuzhiyun 		} else if (aw_bin->header_info[i].bin_data_type == DATA_TYPE_DSP_REG) {
604*4882a593Smuzhiyun 			ret = aw_dev_dsp_data_order(aw_dev, data + aw_bin->header_info[i].valid_data_addr,
605*4882a593Smuzhiyun 						    aw_bin->header_info[i].valid_data_len);
606*4882a593Smuzhiyun 			if (ret < 0)
607*4882a593Smuzhiyun 				return ret;
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 			prof_desc->sec_desc[AW_DATA_TYPE_DSP_CFG].len = aw_bin->header_info[i].valid_data_len;
610*4882a593Smuzhiyun 			prof_desc->sec_desc[AW_DATA_TYPE_DSP_CFG].data = data + aw_bin->header_info[i].valid_data_addr;
611*4882a593Smuzhiyun 		} else if (aw_bin->header_info[i].bin_data_type == DATA_TYPE_DSP_FW) {
612*4882a593Smuzhiyun 			ret = aw_dev_dsp_data_order(aw_dev, data + aw_bin->header_info[i].valid_data_addr,
613*4882a593Smuzhiyun 						    aw_bin->header_info[i].valid_data_len);
614*4882a593Smuzhiyun 			if (ret < 0)
615*4882a593Smuzhiyun 				return ret;
616*4882a593Smuzhiyun 
617*4882a593Smuzhiyun 			prof_desc->fw_ver = aw_bin->header_info[i].app_version;
618*4882a593Smuzhiyun 			prof_desc->sec_desc[AW_DATA_TYPE_DSP_FW].len = aw_bin->header_info[i].valid_data_len;
619*4882a593Smuzhiyun 			prof_desc->sec_desc[AW_DATA_TYPE_DSP_FW].data = data + aw_bin->header_info[i].valid_data_addr;
620*4882a593Smuzhiyun 		}
621*4882a593Smuzhiyun 	}
622*4882a593Smuzhiyun 	devm_kfree(aw_dev->dev, aw_bin);
623*4882a593Smuzhiyun 	aw_bin = NULL;
624*4882a593Smuzhiyun 	prof_desc->prof_st = AW_PROFILE_OK;
625*4882a593Smuzhiyun 	return 0;
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun parse_bin_failed:
628*4882a593Smuzhiyun 	devm_kfree(aw_dev->dev, aw_bin);
629*4882a593Smuzhiyun 	aw_bin = NULL;
630*4882a593Smuzhiyun 	return ret;
631*4882a593Smuzhiyun }
632*4882a593Smuzhiyun 
aw_dev_parse_data_by_sec_type(struct aw_device * aw_dev,struct aw_cfg_hdr * cfg_hdr,struct aw_cfg_dde * cfg_dde,struct aw_prof_desc * scene_prof_desc)633*4882a593Smuzhiyun static int aw_dev_parse_data_by_sec_type(struct aw_device *aw_dev, struct aw_cfg_hdr *cfg_hdr,
634*4882a593Smuzhiyun 			struct aw_cfg_dde *cfg_dde, struct aw_prof_desc *scene_prof_desc)
635*4882a593Smuzhiyun {
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 	switch (cfg_dde->data_type) {
638*4882a593Smuzhiyun 	case ACF_SEC_TYPE_REG:
639*4882a593Smuzhiyun 		return aw_dev_parse_raw_reg(aw_dev,
640*4882a593Smuzhiyun 				(uint8_t *)cfg_hdr + cfg_dde->data_offset,
641*4882a593Smuzhiyun 				cfg_dde->data_size, scene_prof_desc);
642*4882a593Smuzhiyun 	case ACF_SEC_TYPE_DSP_CFG:
643*4882a593Smuzhiyun 		return aw_dev_parse_raw_dsp_cfg(aw_dev,
644*4882a593Smuzhiyun 				(uint8_t *)cfg_hdr + cfg_dde->data_offset,
645*4882a593Smuzhiyun 				cfg_dde->data_size, scene_prof_desc);
646*4882a593Smuzhiyun 	case ACF_SEC_TYPE_DSP_FW:
647*4882a593Smuzhiyun 		return aw_dev_parse_raw_dsp_fw(aw_dev,
648*4882a593Smuzhiyun 				(uint8_t *)cfg_hdr + cfg_dde->data_offset,
649*4882a593Smuzhiyun 				cfg_dde->data_size, scene_prof_desc);
650*4882a593Smuzhiyun 	case ACF_SEC_TYPE_MUTLBIN:
651*4882a593Smuzhiyun 		return aw_dev_prof_parse_multi_bin(aw_dev,
652*4882a593Smuzhiyun 				(uint8_t *)cfg_hdr + cfg_dde->data_offset,
653*4882a593Smuzhiyun 				cfg_dde->data_size, scene_prof_desc);
654*4882a593Smuzhiyun 	}
655*4882a593Smuzhiyun 	return 0;
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun 
aw_dev_parse_dev_type(struct aw_device * aw_dev,struct aw_cfg_hdr * prof_hdr,struct aw_all_prof_info * all_prof_info)658*4882a593Smuzhiyun static int aw_dev_parse_dev_type(struct aw_device *aw_dev,
659*4882a593Smuzhiyun 		struct aw_cfg_hdr *prof_hdr, struct aw_all_prof_info *all_prof_info)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun 	int i = 0;
662*4882a593Smuzhiyun 	int ret;
663*4882a593Smuzhiyun 	int sec_num = 0;
664*4882a593Smuzhiyun 	struct aw_cfg_dde *cfg_dde =
665*4882a593Smuzhiyun 		(struct aw_cfg_dde *)((char *)prof_hdr + prof_hdr->a_hdr_offset);
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun 	aw_dev_info(aw_dev->dev, "enter");
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun 	for (i = 0; i < prof_hdr->a_ddt_num; i++) {
670*4882a593Smuzhiyun 		if ((aw_dev->i2c->adapter->nr == cfg_dde[i].dev_bus) &&
671*4882a593Smuzhiyun 			(aw_dev->i2c->addr == cfg_dde[i].dev_addr) &&
672*4882a593Smuzhiyun 			(cfg_dde[i].type == AW_DEV_TYPE_ID)) {
673*4882a593Smuzhiyun 			if (cfg_dde[i].data_type == ACF_SEC_TYPE_MONITOR) {
674*4882a593Smuzhiyun 				ret = aw_monitor_parse_fw(&aw_dev->monitor_desc,
675*4882a593Smuzhiyun 						(uint8_t *)prof_hdr + cfg_dde[i].data_offset,
676*4882a593Smuzhiyun 						cfg_dde[i].data_size);
677*4882a593Smuzhiyun 				if (ret < 0) {
678*4882a593Smuzhiyun 					aw_dev_err(aw_dev->dev, "parse monitor failed");
679*4882a593Smuzhiyun 					return ret;
680*4882a593Smuzhiyun 					}
681*4882a593Smuzhiyun 			} else {
682*4882a593Smuzhiyun 				if (cfg_dde[i].dev_profile >= AW_PROFILE_MAX) {
683*4882a593Smuzhiyun 					aw_dev_err(aw_dev->dev, "dev_profile [%d] overflow",
684*4882a593Smuzhiyun 						cfg_dde[i].dev_profile);
685*4882a593Smuzhiyun 					return -EINVAL;
686*4882a593Smuzhiyun 				}
687*4882a593Smuzhiyun 				ret = aw_dev_parse_data_by_sec_type(aw_dev, prof_hdr, &cfg_dde[i],
688*4882a593Smuzhiyun 					&all_prof_info->prof_desc[cfg_dde[i].dev_profile]);
689*4882a593Smuzhiyun 				if (ret < 0) {
690*4882a593Smuzhiyun 					aw_dev_err(aw_dev->dev, "parse failed");
691*4882a593Smuzhiyun 					return ret;
692*4882a593Smuzhiyun 				}
693*4882a593Smuzhiyun 				sec_num++;
694*4882a593Smuzhiyun 			}
695*4882a593Smuzhiyun 		}
696*4882a593Smuzhiyun 	}
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	if (sec_num == 0) {
699*4882a593Smuzhiyun 		aw_dev_info(aw_dev->dev, "get dev type num is %d, please use default",
700*4882a593Smuzhiyun 					sec_num);
701*4882a593Smuzhiyun 		return AW_DEV_TYPE_NONE;
702*4882a593Smuzhiyun 	}
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	return AW_DEV_TYPE_OK;
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun 
aw_dev_parse_dev_default_type(struct aw_device * aw_dev,struct aw_cfg_hdr * prof_hdr,struct aw_all_prof_info * all_prof_info)707*4882a593Smuzhiyun static int aw_dev_parse_dev_default_type(struct aw_device *aw_dev,
708*4882a593Smuzhiyun 		struct aw_cfg_hdr *prof_hdr, struct aw_all_prof_info *all_prof_info)
709*4882a593Smuzhiyun {
710*4882a593Smuzhiyun 	int i = 0;
711*4882a593Smuzhiyun 	int ret;
712*4882a593Smuzhiyun 	int sec_num = 0;
713*4882a593Smuzhiyun 	struct aw_cfg_dde *cfg_dde =
714*4882a593Smuzhiyun 		(struct aw_cfg_dde *)((char *)prof_hdr + prof_hdr->a_hdr_offset);
715*4882a593Smuzhiyun 
716*4882a593Smuzhiyun 	aw_dev_info(aw_dev->dev, "enter");
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 	for (i = 0; i < prof_hdr->a_ddt_num; i++) {
719*4882a593Smuzhiyun 		if ((aw_dev->channel == cfg_dde[i].dev_index) &&
720*4882a593Smuzhiyun 			(cfg_dde[i].type == AW_DEV_DEFAULT_TYPE_ID)) {
721*4882a593Smuzhiyun 			if (cfg_dde[i].data_type == ACF_SEC_TYPE_MONITOR) {
722*4882a593Smuzhiyun 				ret = aw_monitor_parse_fw(&aw_dev->monitor_desc,
723*4882a593Smuzhiyun 						(uint8_t *)prof_hdr + cfg_dde[i].data_offset,
724*4882a593Smuzhiyun 						cfg_dde[i].data_size);
725*4882a593Smuzhiyun 				if (ret < 0) {
726*4882a593Smuzhiyun 						aw_dev_err(aw_dev->dev, "parse monitor failed");
727*4882a593Smuzhiyun 						return ret;
728*4882a593Smuzhiyun 					}
729*4882a593Smuzhiyun 			} else {
730*4882a593Smuzhiyun 				if (cfg_dde[i].dev_profile >= AW_PROFILE_MAX) {
731*4882a593Smuzhiyun 					aw_dev_err(aw_dev->dev, "dev_profile [%d] overflow",
732*4882a593Smuzhiyun 						cfg_dde[i].dev_profile);
733*4882a593Smuzhiyun 					return -EINVAL;
734*4882a593Smuzhiyun 				}
735*4882a593Smuzhiyun 				ret = aw_dev_parse_data_by_sec_type(aw_dev, prof_hdr, &cfg_dde[i],
736*4882a593Smuzhiyun 					&all_prof_info->prof_desc[cfg_dde[i].dev_profile]);
737*4882a593Smuzhiyun 				if (ret < 0) {
738*4882a593Smuzhiyun 					aw_dev_err(aw_dev->dev, "parse failed");
739*4882a593Smuzhiyun 					return ret;
740*4882a593Smuzhiyun 				}
741*4882a593Smuzhiyun 				sec_num++;
742*4882a593Smuzhiyun 			}
743*4882a593Smuzhiyun 		}
744*4882a593Smuzhiyun 	}
745*4882a593Smuzhiyun 
746*4882a593Smuzhiyun 	if (sec_num == 0) {
747*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "get dev default type failed, get num[%d]", sec_num);
748*4882a593Smuzhiyun 		return -EINVAL;
749*4882a593Smuzhiyun 	}
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 	return 0;
752*4882a593Smuzhiyun }
753*4882a593Smuzhiyun 
aw_dev_cfg_get_vaild_prof(struct aw_device * aw_dev,struct aw_all_prof_info all_prof_info)754*4882a593Smuzhiyun static int aw_dev_cfg_get_vaild_prof(struct aw_device *aw_dev,
755*4882a593Smuzhiyun 				struct aw_all_prof_info all_prof_info)
756*4882a593Smuzhiyun {
757*4882a593Smuzhiyun 	int i;
758*4882a593Smuzhiyun 	int num = 0;
759*4882a593Smuzhiyun 	struct aw_sec_data_desc *sec_desc = NULL;
760*4882a593Smuzhiyun 	struct aw_prof_desc *prof_desc = all_prof_info.prof_desc;
761*4882a593Smuzhiyun 	struct aw_prof_info *prof_info = &aw_dev->prof_info;
762*4882a593Smuzhiyun 
763*4882a593Smuzhiyun 	for (i = 0; i < AW_PROFILE_MAX; i++) {
764*4882a593Smuzhiyun 		if (prof_desc[i].prof_st == AW_PROFILE_OK) {
765*4882a593Smuzhiyun 			sec_desc = prof_desc[i].sec_desc;
766*4882a593Smuzhiyun 			if ((sec_desc[AW_DATA_TYPE_REG].data != NULL) &&
767*4882a593Smuzhiyun 				(sec_desc[AW_DATA_TYPE_REG].len != 0) &&
768*4882a593Smuzhiyun 				(sec_desc[AW_DATA_TYPE_DSP_CFG].data != NULL) &&
769*4882a593Smuzhiyun 				(sec_desc[AW_DATA_TYPE_DSP_CFG].len != 0) &&
770*4882a593Smuzhiyun 				(sec_desc[AW_DATA_TYPE_DSP_FW].data != NULL) &&
771*4882a593Smuzhiyun 				(sec_desc[AW_DATA_TYPE_DSP_FW].len != 0)) {
772*4882a593Smuzhiyun 				prof_info->count++;
773*4882a593Smuzhiyun 			}
774*4882a593Smuzhiyun 		}
775*4882a593Smuzhiyun 	}
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 	aw_dev_info(aw_dev->dev, "get vaild profile:%d", aw_dev->prof_info.count);
778*4882a593Smuzhiyun 
779*4882a593Smuzhiyun 	if (!prof_info->count) {
780*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "no profile data");
781*4882a593Smuzhiyun 		return -EPERM;
782*4882a593Smuzhiyun 	}
783*4882a593Smuzhiyun 
784*4882a593Smuzhiyun 	prof_info->prof_desc = devm_kzalloc(aw_dev->dev,
785*4882a593Smuzhiyun 					prof_info->count * sizeof(struct aw_prof_desc),
786*4882a593Smuzhiyun 					GFP_KERNEL);
787*4882a593Smuzhiyun 	if (prof_info->prof_desc == NULL) {
788*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "prof_desc kzalloc failed");
789*4882a593Smuzhiyun 		return -ENOMEM;
790*4882a593Smuzhiyun 	}
791*4882a593Smuzhiyun 
792*4882a593Smuzhiyun 	for (i = 0; i < AW_PROFILE_MAX; i++) {
793*4882a593Smuzhiyun 		if (prof_desc[i].prof_st == AW_PROFILE_OK) {
794*4882a593Smuzhiyun 			sec_desc = prof_desc[i].sec_desc;
795*4882a593Smuzhiyun 			if ((sec_desc[AW_DATA_TYPE_REG].data != NULL) &&
796*4882a593Smuzhiyun 				(sec_desc[AW_DATA_TYPE_REG].len != 0) &&
797*4882a593Smuzhiyun 				(sec_desc[AW_DATA_TYPE_DSP_CFG].data != NULL) &&
798*4882a593Smuzhiyun 				(sec_desc[AW_DATA_TYPE_DSP_CFG].len != 0) &&
799*4882a593Smuzhiyun 				(sec_desc[AW_DATA_TYPE_DSP_FW].data != NULL) &&
800*4882a593Smuzhiyun 				(sec_desc[AW_DATA_TYPE_DSP_FW].len != 0)) {
801*4882a593Smuzhiyun 				if (num >= prof_info->count) {
802*4882a593Smuzhiyun 					aw_dev_err(aw_dev->dev, "get scene num[%d] overflow count[%d]",
803*4882a593Smuzhiyun 						num, prof_info->count);
804*4882a593Smuzhiyun 					return -ENOMEM;
805*4882a593Smuzhiyun 				}
806*4882a593Smuzhiyun 				prof_info->prof_desc[num] = prof_desc[i];
807*4882a593Smuzhiyun 				prof_info->prof_desc[num].id = i;
808*4882a593Smuzhiyun 				num++;
809*4882a593Smuzhiyun 			}
810*4882a593Smuzhiyun 		}
811*4882a593Smuzhiyun 	}
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun 	return 0;
814*4882a593Smuzhiyun }
815*4882a593Smuzhiyun 
aw_dev_load_cfg_by_hdr(struct aw_device * aw_dev,struct aw_cfg_hdr * prof_hdr)816*4882a593Smuzhiyun static int aw_dev_load_cfg_by_hdr(struct aw_device *aw_dev,
817*4882a593Smuzhiyun 		struct aw_cfg_hdr *prof_hdr)
818*4882a593Smuzhiyun {
819*4882a593Smuzhiyun 	int ret;
820*4882a593Smuzhiyun 	struct aw_all_prof_info all_prof_info;
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun 	memset(&all_prof_info, 0, sizeof(struct aw_all_prof_info));
823*4882a593Smuzhiyun 
824*4882a593Smuzhiyun 	ret = aw_dev_parse_dev_type(aw_dev, prof_hdr, &all_prof_info);
825*4882a593Smuzhiyun 	if (ret < 0) {
826*4882a593Smuzhiyun 		return ret;
827*4882a593Smuzhiyun 	} else if (ret == AW_DEV_TYPE_NONE) {
828*4882a593Smuzhiyun 		aw_dev_info(aw_dev->dev, "get dev type num is 0, parse default dev");
829*4882a593Smuzhiyun 		ret = aw_dev_parse_dev_default_type(aw_dev, prof_hdr, &all_prof_info);
830*4882a593Smuzhiyun 		if (ret < 0)
831*4882a593Smuzhiyun 			return ret;
832*4882a593Smuzhiyun 	}
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun 	ret = aw_dev_cfg_get_vaild_prof(aw_dev, all_prof_info);
835*4882a593Smuzhiyun 	if (ret < 0)
836*4882a593Smuzhiyun 			return ret;
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun 	aw_dev->prof_info.prof_name_list = profile_name;
839*4882a593Smuzhiyun 
840*4882a593Smuzhiyun 	return 0;
841*4882a593Smuzhiyun }
842*4882a593Smuzhiyun 
aw_dev_create_prof_name_list_v_1_0_0_0(struct aw_device * aw_dev)843*4882a593Smuzhiyun static int aw_dev_create_prof_name_list_v_1_0_0_0(struct aw_device *aw_dev)
844*4882a593Smuzhiyun {
845*4882a593Smuzhiyun 	struct aw_prof_info *prof_info = &aw_dev->prof_info;
846*4882a593Smuzhiyun 	struct aw_prof_desc *prof_desc = prof_info->prof_desc;
847*4882a593Smuzhiyun 	int i;
848*4882a593Smuzhiyun 
849*4882a593Smuzhiyun 	if (prof_desc == NULL) {
850*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "prof_desc is NULL");
851*4882a593Smuzhiyun 		return -EINVAL;
852*4882a593Smuzhiyun 	}
853*4882a593Smuzhiyun 
854*4882a593Smuzhiyun 	prof_info->prof_name_list = devm_kzalloc(aw_dev->dev,
855*4882a593Smuzhiyun 					prof_info->count * PROFILE_STR_MAX,
856*4882a593Smuzhiyun 					GFP_KERNEL);
857*4882a593Smuzhiyun 	if (prof_info->prof_name_list == NULL) {
858*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "prof_name_list devm_kzalloc failed");
859*4882a593Smuzhiyun 		return -ENOMEM;
860*4882a593Smuzhiyun 	}
861*4882a593Smuzhiyun 
862*4882a593Smuzhiyun 	for (i = 0; i < prof_info->count; i++) {
863*4882a593Smuzhiyun 		prof_desc[i].id = i;
864*4882a593Smuzhiyun 		prof_info->prof_name_list[i] = prof_desc[i].prf_str;
865*4882a593Smuzhiyun 		aw_dev_info(aw_dev->dev, "prof name is %s", prof_info->prof_name_list[i]);
866*4882a593Smuzhiyun 	}
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	return 0;
869*4882a593Smuzhiyun }
870*4882a593Smuzhiyun 
aw_get_dde_type_info(struct aw_device * aw_dev,struct aw_container * aw_cfg)871*4882a593Smuzhiyun static int aw_get_dde_type_info(struct aw_device *aw_dev, struct aw_container *aw_cfg)
872*4882a593Smuzhiyun {
873*4882a593Smuzhiyun 	int i;
874*4882a593Smuzhiyun 	int dev_num = 0;
875*4882a593Smuzhiyun 	int default_num = 0;
876*4882a593Smuzhiyun 	struct aw_cfg_hdr *cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data;
877*4882a593Smuzhiyun 	struct aw_cfg_dde_v_1_0_0_0 *cfg_dde =
878*4882a593Smuzhiyun 		(struct aw_cfg_dde_v_1_0_0_0 *)(aw_cfg->data + cfg_hdr->a_hdr_offset);
879*4882a593Smuzhiyun 
880*4882a593Smuzhiyun 	for (i = 0; i < cfg_hdr->a_ddt_num; i++) {
881*4882a593Smuzhiyun 		if (cfg_dde[i].type == AW_DEV_TYPE_ID)
882*4882a593Smuzhiyun 			dev_num++;
883*4882a593Smuzhiyun 
884*4882a593Smuzhiyun 		if (cfg_dde[i].type == AW_DEV_DEFAULT_TYPE_ID)
885*4882a593Smuzhiyun 			default_num++;
886*4882a593Smuzhiyun 	}
887*4882a593Smuzhiyun 
888*4882a593Smuzhiyun 	if (!(dev_num || default_num)) {
889*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "can't find scene");
890*4882a593Smuzhiyun 		return -EINVAL;
891*4882a593Smuzhiyun 	}
892*4882a593Smuzhiyun 
893*4882a593Smuzhiyun 	if (dev_num != 0) {
894*4882a593Smuzhiyun 		aw_dev->prof_info.prof_type = AW_DEV_TYPE_ID;
895*4882a593Smuzhiyun 	} else {
896*4882a593Smuzhiyun 		aw_dev->prof_info.prof_type = AW_DEV_DEFAULT_TYPE_ID;
897*4882a593Smuzhiyun 	}
898*4882a593Smuzhiyun 
899*4882a593Smuzhiyun 	return 0;
900*4882a593Smuzhiyun }
901*4882a593Smuzhiyun 
aw_get_dev_scene_count_v_1_0_0_0(struct aw_device * aw_dev,struct aw_container * aw_cfg,uint32_t * scene_num)902*4882a593Smuzhiyun static int aw_get_dev_scene_count_v_1_0_0_0(struct aw_device *aw_dev,
903*4882a593Smuzhiyun 					    struct aw_container *aw_cfg,
904*4882a593Smuzhiyun 					    uint32_t *scene_num)
905*4882a593Smuzhiyun {
906*4882a593Smuzhiyun 	int i;
907*4882a593Smuzhiyun 	struct aw_cfg_hdr *cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data;
908*4882a593Smuzhiyun 	struct aw_cfg_dde_v_1_0_0_0 *cfg_dde =
909*4882a593Smuzhiyun 		(struct aw_cfg_dde_v_1_0_0_0 *)(aw_cfg->data + cfg_hdr->a_hdr_offset);
910*4882a593Smuzhiyun 
911*4882a593Smuzhiyun 	for (i = 0; i < cfg_hdr->a_ddt_num; ++i) {
912*4882a593Smuzhiyun 		if ((cfg_dde[i].data_type == ACF_SEC_TYPE_MUTLBIN) &&
913*4882a593Smuzhiyun 			(aw_dev->chip_id == cfg_dde[i].chip_id) &&
914*4882a593Smuzhiyun 			((aw_dev->i2c->adapter->nr == cfg_dde[i].dev_bus) &&
915*4882a593Smuzhiyun 			(aw_dev->i2c->addr == cfg_dde[i].dev_addr)))
916*4882a593Smuzhiyun 				(*scene_num)++;
917*4882a593Smuzhiyun 	}
918*4882a593Smuzhiyun 
919*4882a593Smuzhiyun 	return 0;
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun 
aw_get_default_scene_count_v_1_0_0_0(struct aw_device * aw_dev,struct aw_container * aw_cfg,uint32_t * scene_num)922*4882a593Smuzhiyun static int aw_get_default_scene_count_v_1_0_0_0(struct aw_device *aw_dev,
923*4882a593Smuzhiyun 						struct aw_container *aw_cfg,
924*4882a593Smuzhiyun 						uint32_t *scene_num)
925*4882a593Smuzhiyun {
926*4882a593Smuzhiyun 	int i;
927*4882a593Smuzhiyun 	struct aw_cfg_hdr *cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data;
928*4882a593Smuzhiyun 	struct aw_cfg_dde_v_1_0_0_0 *cfg_dde =
929*4882a593Smuzhiyun 		(struct aw_cfg_dde_v_1_0_0_0 *)(aw_cfg->data + cfg_hdr->a_hdr_offset);
930*4882a593Smuzhiyun 
931*4882a593Smuzhiyun 	for (i = 0; i < cfg_hdr->a_ddt_num; ++i) {
932*4882a593Smuzhiyun 		if ((cfg_dde[i].data_type == ACF_SEC_TYPE_MUTLBIN) &&
933*4882a593Smuzhiyun 			(aw_dev->chip_id == cfg_dde[i].chip_id) &&
934*4882a593Smuzhiyun 			(aw_dev->channel == cfg_dde[i].dev_index))
935*4882a593Smuzhiyun 				(*scene_num)++;
936*4882a593Smuzhiyun 	}
937*4882a593Smuzhiyun 
938*4882a593Smuzhiyun 	return 0;
939*4882a593Smuzhiyun }
940*4882a593Smuzhiyun 
aw_dev_parse_scene_count_v_1_0_0_0(struct aw_device * aw_dev,struct aw_container * aw_cfg,uint32_t * count)941*4882a593Smuzhiyun static int aw_dev_parse_scene_count_v_1_0_0_0(struct aw_device *aw_dev,
942*4882a593Smuzhiyun 					      struct aw_container *aw_cfg,
943*4882a593Smuzhiyun 					      uint32_t *count)
944*4882a593Smuzhiyun {
945*4882a593Smuzhiyun 	int ret;
946*4882a593Smuzhiyun 
947*4882a593Smuzhiyun 	ret = aw_get_dde_type_info(aw_dev, aw_cfg);
948*4882a593Smuzhiyun 	if (ret < 0)
949*4882a593Smuzhiyun 		return ret;
950*4882a593Smuzhiyun 
951*4882a593Smuzhiyun 	if (aw_dev->prof_info.prof_type == AW_DEV_TYPE_ID) {
952*4882a593Smuzhiyun 		aw_get_dev_scene_count_v_1_0_0_0(aw_dev, aw_cfg, count);
953*4882a593Smuzhiyun 	} else if (aw_dev->prof_info.prof_type == AW_DEV_DEFAULT_TYPE_ID) {
954*4882a593Smuzhiyun 		aw_get_default_scene_count_v_1_0_0_0(aw_dev, aw_cfg, count);
955*4882a593Smuzhiyun 	} else {
956*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "unsupported prof_type[%x]",
957*4882a593Smuzhiyun 			aw_dev->prof_info.prof_type);
958*4882a593Smuzhiyun 		return -EINVAL;
959*4882a593Smuzhiyun 	}
960*4882a593Smuzhiyun 
961*4882a593Smuzhiyun 	aw_dev_info(aw_dev->dev, "scene count is %d", (*count));
962*4882a593Smuzhiyun 	return 0;
963*4882a593Smuzhiyun }
964*4882a593Smuzhiyun 
aw_dev_parse_data_by_sec_type_v_1_0_0_0(struct aw_device * aw_dev,struct aw_cfg_hdr * prof_hdr,struct aw_cfg_dde_v_1_0_0_0 * cfg_dde,int * cur_scene_id)965*4882a593Smuzhiyun static int aw_dev_parse_data_by_sec_type_v_1_0_0_0(struct aw_device *aw_dev,
966*4882a593Smuzhiyun 						   struct aw_cfg_hdr *prof_hdr,
967*4882a593Smuzhiyun 						   struct aw_cfg_dde_v_1_0_0_0 *cfg_dde,
968*4882a593Smuzhiyun 						   int *cur_scene_id)
969*4882a593Smuzhiyun {
970*4882a593Smuzhiyun 	int ret;
971*4882a593Smuzhiyun 	struct aw_prof_info *prof_info = &aw_dev->prof_info;
972*4882a593Smuzhiyun 
973*4882a593Smuzhiyun 	switch (cfg_dde->data_type) {
974*4882a593Smuzhiyun 	case ACF_SEC_TYPE_MUTLBIN:
975*4882a593Smuzhiyun 		ret = aw_dev_prof_parse_multi_bin(aw_dev,
976*4882a593Smuzhiyun 					(uint8_t *)prof_hdr + cfg_dde->data_offset,
977*4882a593Smuzhiyun 					cfg_dde->data_size, &prof_info->prof_desc[*cur_scene_id]);
978*4882a593Smuzhiyun 		if (ret < 0) {
979*4882a593Smuzhiyun 			aw_dev_err(aw_dev->dev, "parse multi bin failed");
980*4882a593Smuzhiyun 			return ret;
981*4882a593Smuzhiyun 		}
982*4882a593Smuzhiyun 		prof_info->prof_desc[*cur_scene_id].prf_str = cfg_dde->dev_profile_str;
983*4882a593Smuzhiyun 		prof_info->prof_desc[*cur_scene_id].id = cfg_dde->dev_profile;
984*4882a593Smuzhiyun 		(*cur_scene_id)++;
985*4882a593Smuzhiyun 		break;
986*4882a593Smuzhiyun 	case ACF_SEC_TYPE_MONITOR:
987*4882a593Smuzhiyun 		return aw_monitor_parse_fw(&aw_dev->monitor_desc,
988*4882a593Smuzhiyun 						(uint8_t *)prof_hdr + cfg_dde->data_offset,
989*4882a593Smuzhiyun 						cfg_dde->data_size);
990*4882a593Smuzhiyun 	default:
991*4882a593Smuzhiyun 		aw_pr_err("unsupported SEC_TYPE [%d]", cfg_dde->data_type);
992*4882a593Smuzhiyun 		return -EINVAL;
993*4882a593Smuzhiyun 	}
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun 	return 0;
996*4882a593Smuzhiyun }
997*4882a593Smuzhiyun 
aw_dev_parse_dev_type_v_1_0_0_0(struct aw_device * aw_dev,struct aw_cfg_hdr * prof_hdr)998*4882a593Smuzhiyun static int aw_dev_parse_dev_type_v_1_0_0_0(struct aw_device *aw_dev,
999*4882a593Smuzhiyun 		struct aw_cfg_hdr *prof_hdr)
1000*4882a593Smuzhiyun {
1001*4882a593Smuzhiyun 	int i = 0;
1002*4882a593Smuzhiyun 	int ret;
1003*4882a593Smuzhiyun 	int cur_scene_id = 0;
1004*4882a593Smuzhiyun 	struct aw_cfg_dde_v_1_0_0_0 *cfg_dde =
1005*4882a593Smuzhiyun 		(struct aw_cfg_dde_v_1_0_0_0 *)((char *)prof_hdr + prof_hdr->a_hdr_offset);
1006*4882a593Smuzhiyun 
1007*4882a593Smuzhiyun 	aw_dev_info(aw_dev->dev, "enter");
1008*4882a593Smuzhiyun 
1009*4882a593Smuzhiyun 	for (i = 0; i < prof_hdr->a_ddt_num; i++) {
1010*4882a593Smuzhiyun 		if ((aw_dev->i2c->adapter->nr == cfg_dde[i].dev_bus) &&
1011*4882a593Smuzhiyun 			(aw_dev->i2c->addr == cfg_dde[i].dev_addr) &&
1012*4882a593Smuzhiyun 			(aw_dev->chip_id == cfg_dde[i].chip_id)) {
1013*4882a593Smuzhiyun 			ret = aw_dev_parse_data_by_sec_type_v_1_0_0_0(aw_dev, prof_hdr,
1014*4882a593Smuzhiyun 							&cfg_dde[i], &cur_scene_id);
1015*4882a593Smuzhiyun 			if (ret < 0) {
1016*4882a593Smuzhiyun 				aw_dev_err(aw_dev->dev, "parse failed");
1017*4882a593Smuzhiyun 				return ret;
1018*4882a593Smuzhiyun 			}
1019*4882a593Smuzhiyun 		}
1020*4882a593Smuzhiyun 	}
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun 	if (cur_scene_id == 0) {
1023*4882a593Smuzhiyun 		aw_dev_info(aw_dev->dev, "get dev type failed, get num [%d]", cur_scene_id);
1024*4882a593Smuzhiyun 		return -EINVAL;
1025*4882a593Smuzhiyun 	}
1026*4882a593Smuzhiyun 
1027*4882a593Smuzhiyun 	return 0;
1028*4882a593Smuzhiyun }
1029*4882a593Smuzhiyun 
aw_dev_parse_default_type_v_1_0_0_0(struct aw_device * aw_dev,struct aw_cfg_hdr * prof_hdr)1030*4882a593Smuzhiyun static int aw_dev_parse_default_type_v_1_0_0_0(struct aw_device *aw_dev,
1031*4882a593Smuzhiyun 		struct aw_cfg_hdr *prof_hdr)
1032*4882a593Smuzhiyun {
1033*4882a593Smuzhiyun 	int i = 0;
1034*4882a593Smuzhiyun 	int ret;
1035*4882a593Smuzhiyun 	int cur_scene_id = 0;
1036*4882a593Smuzhiyun 	struct aw_cfg_dde_v_1_0_0_0 *cfg_dde =
1037*4882a593Smuzhiyun 		(struct aw_cfg_dde_v_1_0_0_0 *)((char *)prof_hdr + prof_hdr->a_hdr_offset);
1038*4882a593Smuzhiyun 
1039*4882a593Smuzhiyun 	aw_dev_info(aw_dev->dev, "enter");
1040*4882a593Smuzhiyun 
1041*4882a593Smuzhiyun 	for (i = 0; i < prof_hdr->a_ddt_num; i++) {
1042*4882a593Smuzhiyun 		if ((aw_dev->channel == cfg_dde[i].dev_index) &&
1043*4882a593Smuzhiyun 			(aw_dev->chip_id == cfg_dde[i].chip_id)) {
1044*4882a593Smuzhiyun 			ret = aw_dev_parse_data_by_sec_type_v_1_0_0_0(aw_dev, prof_hdr,
1045*4882a593Smuzhiyun 							&cfg_dde[i], &cur_scene_id);
1046*4882a593Smuzhiyun 			if (ret < 0) {
1047*4882a593Smuzhiyun 				aw_dev_err(aw_dev->dev, "parse failed");
1048*4882a593Smuzhiyun 				return ret;
1049*4882a593Smuzhiyun 			}
1050*4882a593Smuzhiyun 		}
1051*4882a593Smuzhiyun 	}
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun 	if (cur_scene_id == 0) {
1054*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "get dev default type failed, get num[%d]", cur_scene_id);
1055*4882a593Smuzhiyun 		return -EINVAL;
1056*4882a593Smuzhiyun 	}
1057*4882a593Smuzhiyun 
1058*4882a593Smuzhiyun 	return 0;
1059*4882a593Smuzhiyun }
1060*4882a593Smuzhiyun 
aw_dev_parse_by_hdr_v_1_0_0_0(struct aw_device * aw_dev,struct aw_cfg_hdr * cfg_hdr)1061*4882a593Smuzhiyun static int aw_dev_parse_by_hdr_v_1_0_0_0(struct aw_device *aw_dev,
1062*4882a593Smuzhiyun 		struct aw_cfg_hdr *cfg_hdr)
1063*4882a593Smuzhiyun {
1064*4882a593Smuzhiyun 	int ret;
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun 	if (aw_dev->prof_info.prof_type == AW_DEV_TYPE_ID) {
1067*4882a593Smuzhiyun 		ret = aw_dev_parse_dev_type_v_1_0_0_0(aw_dev, cfg_hdr);
1068*4882a593Smuzhiyun 		if (ret < 0)
1069*4882a593Smuzhiyun 			return ret;
1070*4882a593Smuzhiyun 	} else if (aw_dev->prof_info.prof_type == AW_DEV_DEFAULT_TYPE_ID) {
1071*4882a593Smuzhiyun 		ret = aw_dev_parse_default_type_v_1_0_0_0(aw_dev, cfg_hdr);
1072*4882a593Smuzhiyun 		if (ret < 0)
1073*4882a593Smuzhiyun 			return ret;
1074*4882a593Smuzhiyun 	} else {
1075*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "prof type matched failed, get num[%d]",
1076*4882a593Smuzhiyun 			aw_dev->prof_info.prof_type);
1077*4882a593Smuzhiyun 		return -EINVAL;
1078*4882a593Smuzhiyun 	}
1079*4882a593Smuzhiyun 
1080*4882a593Smuzhiyun 	return 0;
1081*4882a593Smuzhiyun }
1082*4882a593Smuzhiyun 
aw_dev_load_cfg_by_hdr_v_1_0_0_0(struct aw_device * aw_dev,struct aw_container * aw_cfg)1083*4882a593Smuzhiyun static int aw_dev_load_cfg_by_hdr_v_1_0_0_0(struct aw_device *aw_dev, struct aw_container *aw_cfg)
1084*4882a593Smuzhiyun {
1085*4882a593Smuzhiyun 	struct aw_prof_info *prof_info = &aw_dev->prof_info;
1086*4882a593Smuzhiyun 	struct aw_cfg_hdr *cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data;
1087*4882a593Smuzhiyun 	int ret;
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun 	ret = aw_dev_parse_scene_count_v_1_0_0_0(aw_dev, aw_cfg, &prof_info->count);
1090*4882a593Smuzhiyun 	if (ret < 0) {
1091*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "get scene count failed");
1092*4882a593Smuzhiyun 		return ret;
1093*4882a593Smuzhiyun 	}
1094*4882a593Smuzhiyun 
1095*4882a593Smuzhiyun 	prof_info->prof_desc = devm_kzalloc(aw_dev->dev,
1096*4882a593Smuzhiyun 					prof_info->count * sizeof(struct aw_prof_desc),
1097*4882a593Smuzhiyun 					GFP_KERNEL);
1098*4882a593Smuzhiyun 	if (prof_info->prof_desc == NULL) {
1099*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "prof_desc devm_kzalloc failed");
1100*4882a593Smuzhiyun 		return -ENOMEM;
1101*4882a593Smuzhiyun 	}
1102*4882a593Smuzhiyun 
1103*4882a593Smuzhiyun 	ret = aw_dev_parse_by_hdr_v_1_0_0_0(aw_dev, cfg_hdr);
1104*4882a593Smuzhiyun 	if (ret < 0) {
1105*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, " failed");
1106*4882a593Smuzhiyun 		return ret;
1107*4882a593Smuzhiyun 	}
1108*4882a593Smuzhiyun 
1109*4882a593Smuzhiyun 	ret = aw_dev_create_prof_name_list_v_1_0_0_0(aw_dev);
1110*4882a593Smuzhiyun 	if (ret < 0) {
1111*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "create prof name list failed");
1112*4882a593Smuzhiyun 		return ret;
1113*4882a593Smuzhiyun 	}
1114*4882a593Smuzhiyun 
1115*4882a593Smuzhiyun 	return 0;
1116*4882a593Smuzhiyun }
1117*4882a593Smuzhiyun 
aw_dev_cfg_load(struct aw_device * aw_dev,struct aw_container * aw_cfg)1118*4882a593Smuzhiyun int aw_dev_cfg_load(struct aw_device *aw_dev, struct aw_container *aw_cfg)
1119*4882a593Smuzhiyun {
1120*4882a593Smuzhiyun 	struct aw_cfg_hdr *cfg_hdr = NULL;
1121*4882a593Smuzhiyun 	int ret;
1122*4882a593Smuzhiyun 
1123*4882a593Smuzhiyun 	aw_dev_info(aw_dev->dev, "enter");
1124*4882a593Smuzhiyun 
1125*4882a593Smuzhiyun 	cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data;
1126*4882a593Smuzhiyun 	switch (cfg_hdr->a_hdr_version) {
1127*4882a593Smuzhiyun 	case AW_CFG_HDR_VER_0_0_0_1:
1128*4882a593Smuzhiyun 		ret = aw_dev_load_cfg_by_hdr(aw_dev, cfg_hdr);
1129*4882a593Smuzhiyun 		if (ret < 0) {
1130*4882a593Smuzhiyun 			aw_dev_err(aw_dev->dev, "hdr_cersion[0x%x] parse failed",
1131*4882a593Smuzhiyun 						cfg_hdr->a_hdr_version);
1132*4882a593Smuzhiyun 			return ret;
1133*4882a593Smuzhiyun 		}
1134*4882a593Smuzhiyun 		break;
1135*4882a593Smuzhiyun 	case AW_CFG_HDR_VER_1_0_0_0:
1136*4882a593Smuzhiyun 		ret = aw_dev_load_cfg_by_hdr_v_1_0_0_0(aw_dev, aw_cfg);
1137*4882a593Smuzhiyun 		if (ret < 0) {
1138*4882a593Smuzhiyun 			aw_dev_err(aw_dev->dev, "hdr_cersion[0x%x] parse failed",
1139*4882a593Smuzhiyun 						cfg_hdr->a_hdr_version);
1140*4882a593Smuzhiyun 			return ret;
1141*4882a593Smuzhiyun 		}
1142*4882a593Smuzhiyun 		break;
1143*4882a593Smuzhiyun 	default:
1144*4882a593Smuzhiyun 		aw_pr_err("unsupported hdr_version [0x%x]", cfg_hdr->a_hdr_version);
1145*4882a593Smuzhiyun 		return -EINVAL;
1146*4882a593Smuzhiyun 	}
1147*4882a593Smuzhiyun 
1148*4882a593Smuzhiyun 	aw_dev->fw_status = AW_DEV_FW_OK;
1149*4882a593Smuzhiyun 	aw_dev_info(aw_dev->dev, "parse cfg success");
1150*4882a593Smuzhiyun 	return 0;
1151*4882a593Smuzhiyun }
1152*4882a593Smuzhiyun 
aw_dev_crc8_check(unsigned char * data,uint32_t data_size)1153*4882a593Smuzhiyun static uint8_t aw_dev_crc8_check(unsigned char *data, uint32_t data_size)
1154*4882a593Smuzhiyun {
1155*4882a593Smuzhiyun 	uint8_t crc_value = 0x00;
1156*4882a593Smuzhiyun 	uint8_t pdatabuf = 0;
1157*4882a593Smuzhiyun 	int i;
1158*4882a593Smuzhiyun 
1159*4882a593Smuzhiyun 	while (data_size--) {
1160*4882a593Smuzhiyun 		pdatabuf = *data++;
1161*4882a593Smuzhiyun 		for (i = 0; i < 8; i++) {
1162*4882a593Smuzhiyun 			/*if the lowest bit is 1*/
1163*4882a593Smuzhiyun 			if ((crc_value ^ (pdatabuf)) & 0x01) {
1164*4882a593Smuzhiyun 				/*Xor multinomial*/
1165*4882a593Smuzhiyun 				crc_value ^= 0x18;
1166*4882a593Smuzhiyun 				crc_value >>= 1;
1167*4882a593Smuzhiyun 				crc_value |= 0x80;
1168*4882a593Smuzhiyun 			} else {
1169*4882a593Smuzhiyun 				crc_value >>= 1;
1170*4882a593Smuzhiyun 			}
1171*4882a593Smuzhiyun 			pdatabuf >>= 1;
1172*4882a593Smuzhiyun 		}
1173*4882a593Smuzhiyun 	}
1174*4882a593Smuzhiyun 	return crc_value;
1175*4882a593Smuzhiyun }
1176*4882a593Smuzhiyun 
aw_dev_check_cfg_by_hdr(struct aw_container * aw_cfg)1177*4882a593Smuzhiyun static int aw_dev_check_cfg_by_hdr(struct aw_container *aw_cfg)
1178*4882a593Smuzhiyun {
1179*4882a593Smuzhiyun 	struct aw_cfg_hdr *cfg_hdr = NULL;
1180*4882a593Smuzhiyun 	struct aw_cfg_dde *cfg_dde = NULL;
1181*4882a593Smuzhiyun 	unsigned int end_data_offset = 0;
1182*4882a593Smuzhiyun 	unsigned int act_data = 0;
1183*4882a593Smuzhiyun 	unsigned int hdr_ddt_len = 0;
1184*4882a593Smuzhiyun 	uint8_t act_crc8 = 0;
1185*4882a593Smuzhiyun 	int i;
1186*4882a593Smuzhiyun 
1187*4882a593Smuzhiyun 	cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data;
1188*4882a593Smuzhiyun 
1189*4882a593Smuzhiyun 	/*check file type id is awinic acf file*/
1190*4882a593Smuzhiyun 	if (cfg_hdr->a_id != ACF_FILE_ID) {
1191*4882a593Smuzhiyun 		aw_pr_err("not acf type file");
1192*4882a593Smuzhiyun 		return -EINVAL;
1193*4882a593Smuzhiyun 	}
1194*4882a593Smuzhiyun 
1195*4882a593Smuzhiyun 	hdr_ddt_len = cfg_hdr->a_hdr_offset + cfg_hdr->a_ddt_size;
1196*4882a593Smuzhiyun 	if (hdr_ddt_len > aw_cfg->len) {
1197*4882a593Smuzhiyun 		aw_pr_err("hdrlen with ddt_len [%d] overflow file size[%d]",
1198*4882a593Smuzhiyun 		cfg_hdr->a_hdr_offset, aw_cfg->len);
1199*4882a593Smuzhiyun 		return -EINVAL;
1200*4882a593Smuzhiyun 	}
1201*4882a593Smuzhiyun 
1202*4882a593Smuzhiyun 	/*check data size*/
1203*4882a593Smuzhiyun 	cfg_dde = (struct aw_cfg_dde *)((char *)aw_cfg->data + cfg_hdr->a_hdr_offset);
1204*4882a593Smuzhiyun 	act_data += hdr_ddt_len;
1205*4882a593Smuzhiyun 	for (i = 0; i < cfg_hdr->a_ddt_num; i++)
1206*4882a593Smuzhiyun 		act_data += cfg_dde[i].data_size;
1207*4882a593Smuzhiyun 
1208*4882a593Smuzhiyun 	if (act_data != aw_cfg->len) {
1209*4882a593Smuzhiyun 		aw_pr_err("act_data[%d] not equal to file size[%d]!",
1210*4882a593Smuzhiyun 			act_data, aw_cfg->len);
1211*4882a593Smuzhiyun 		return -EINVAL;
1212*4882a593Smuzhiyun 	}
1213*4882a593Smuzhiyun 
1214*4882a593Smuzhiyun 	for (i = 0; i < cfg_hdr->a_ddt_num; i++) {
1215*4882a593Smuzhiyun 		/* data check */
1216*4882a593Smuzhiyun 		end_data_offset = cfg_dde[i].data_offset + cfg_dde[i].data_size;
1217*4882a593Smuzhiyun 		if (end_data_offset > aw_cfg->len) {
1218*4882a593Smuzhiyun 			aw_pr_err("a_ddt_num[%d] end_data_offset[%d] overflow file size[%d]",
1219*4882a593Smuzhiyun 				i, end_data_offset, aw_cfg->len);
1220*4882a593Smuzhiyun 			return -EINVAL;
1221*4882a593Smuzhiyun 		}
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun 		/* crc check */
1224*4882a593Smuzhiyun 		act_crc8 = aw_dev_crc8_check(aw_cfg->data + cfg_dde[i].data_offset, cfg_dde[i].data_size);
1225*4882a593Smuzhiyun 		if (act_crc8 != cfg_dde[i].data_crc) {
1226*4882a593Smuzhiyun 			aw_pr_err("a_ddt_num[%d] crc8 check failed, act_crc8:0x%x != data_crc 0x%x",
1227*4882a593Smuzhiyun 				i, (uint32_t)act_crc8, cfg_dde[i].data_crc);
1228*4882a593Smuzhiyun 			return -EINVAL;
1229*4882a593Smuzhiyun 		}
1230*4882a593Smuzhiyun 	}
1231*4882a593Smuzhiyun 
1232*4882a593Smuzhiyun 	aw_pr_info("project name [%s]", cfg_hdr->a_project);
1233*4882a593Smuzhiyun 	aw_pr_info("custom name [%s]", cfg_hdr->a_custom);
1234*4882a593Smuzhiyun 	aw_pr_info("version name [%d.%d.%d.%d]", cfg_hdr->a_version[3], cfg_hdr->a_version[2],
1235*4882a593Smuzhiyun 						cfg_hdr->a_version[1], cfg_hdr->a_version[0]);
1236*4882a593Smuzhiyun 	aw_pr_info("author id %d", cfg_hdr->a_author_id);
1237*4882a593Smuzhiyun 
1238*4882a593Smuzhiyun 	return 0;
1239*4882a593Smuzhiyun }
1240*4882a593Smuzhiyun 
aw_dev_check_acf_by_hdr_v_1_0_0_0(struct aw_container * aw_cfg)1241*4882a593Smuzhiyun static int aw_dev_check_acf_by_hdr_v_1_0_0_0(struct aw_container *aw_cfg)
1242*4882a593Smuzhiyun {
1243*4882a593Smuzhiyun 	struct aw_cfg_hdr *cfg_hdr = NULL;
1244*4882a593Smuzhiyun 	struct aw_cfg_dde_v_1_0_0_0 *cfg_dde = NULL;
1245*4882a593Smuzhiyun 	unsigned int end_data_offset = 0;
1246*4882a593Smuzhiyun 	unsigned int act_data = 0;
1247*4882a593Smuzhiyun 	unsigned int hdr_ddt_len = 0;
1248*4882a593Smuzhiyun 	uint8_t act_crc8 = 0;
1249*4882a593Smuzhiyun 	int i;
1250*4882a593Smuzhiyun 
1251*4882a593Smuzhiyun 	cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data;
1252*4882a593Smuzhiyun 
1253*4882a593Smuzhiyun 	/*check file type id is awinic acf file*/
1254*4882a593Smuzhiyun 	if (cfg_hdr->a_id != ACF_FILE_ID) {
1255*4882a593Smuzhiyun 		aw_pr_err("not acf type file");
1256*4882a593Smuzhiyun 		return -EINVAL;
1257*4882a593Smuzhiyun 	}
1258*4882a593Smuzhiyun 
1259*4882a593Smuzhiyun 	hdr_ddt_len = cfg_hdr->a_hdr_offset + cfg_hdr->a_ddt_size;
1260*4882a593Smuzhiyun 	if (hdr_ddt_len > aw_cfg->len) {
1261*4882a593Smuzhiyun 		aw_pr_err("hdrlen with ddt_len [%d] overflow file size[%d]",
1262*4882a593Smuzhiyun 		cfg_hdr->a_hdr_offset, aw_cfg->len);
1263*4882a593Smuzhiyun 		return -EINVAL;
1264*4882a593Smuzhiyun 	}
1265*4882a593Smuzhiyun 
1266*4882a593Smuzhiyun 	/*check data size*/
1267*4882a593Smuzhiyun 	cfg_dde = (struct aw_cfg_dde_v_1_0_0_0 *)((char *)aw_cfg->data + cfg_hdr->a_hdr_offset);
1268*4882a593Smuzhiyun 	act_data += hdr_ddt_len;
1269*4882a593Smuzhiyun 	for (i = 0; i < cfg_hdr->a_ddt_num; i++)
1270*4882a593Smuzhiyun 		act_data += cfg_dde[i].data_size;
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun 	if (act_data != aw_cfg->len) {
1273*4882a593Smuzhiyun 		aw_pr_err("act_data[%d] not equal to file size[%d]!",
1274*4882a593Smuzhiyun 			act_data, aw_cfg->len);
1275*4882a593Smuzhiyun 		return -EINVAL;
1276*4882a593Smuzhiyun 	}
1277*4882a593Smuzhiyun 
1278*4882a593Smuzhiyun 	for (i = 0; i < cfg_hdr->a_ddt_num; i++) {
1279*4882a593Smuzhiyun 		/* data check */
1280*4882a593Smuzhiyun 		end_data_offset = cfg_dde[i].data_offset + cfg_dde[i].data_size;
1281*4882a593Smuzhiyun 		if (end_data_offset > aw_cfg->len) {
1282*4882a593Smuzhiyun 			aw_pr_err("a_ddt_num[%d] end_data_offset[%d] overflow file size[%d]",
1283*4882a593Smuzhiyun 				i, end_data_offset, aw_cfg->len);
1284*4882a593Smuzhiyun 			return -EINVAL;
1285*4882a593Smuzhiyun 		}
1286*4882a593Smuzhiyun 
1287*4882a593Smuzhiyun 		/* crc check */
1288*4882a593Smuzhiyun 		act_crc8 = aw_dev_crc8_check(aw_cfg->data + cfg_dde[i].data_offset, cfg_dde[i].data_size);
1289*4882a593Smuzhiyun 		if (act_crc8 != cfg_dde[i].data_crc) {
1290*4882a593Smuzhiyun 			aw_pr_err("a_ddt_num[%d] crc8 check failed, act_crc8:0x%x != data_crc 0x%x",
1291*4882a593Smuzhiyun 				i, (uint32_t)act_crc8, cfg_dde[i].data_crc);
1292*4882a593Smuzhiyun 			return -EINVAL;
1293*4882a593Smuzhiyun 		}
1294*4882a593Smuzhiyun 	}
1295*4882a593Smuzhiyun 
1296*4882a593Smuzhiyun 	aw_pr_info("project name [%s]", cfg_hdr->a_project);
1297*4882a593Smuzhiyun 	aw_pr_info("custom name [%s]", cfg_hdr->a_custom);
1298*4882a593Smuzhiyun 	aw_pr_info("version name [%d.%d.%d.%d]", cfg_hdr->a_version[3], cfg_hdr->a_version[2],
1299*4882a593Smuzhiyun 						cfg_hdr->a_version[1], cfg_hdr->a_version[0]);
1300*4882a593Smuzhiyun 	aw_pr_info("author id %d", cfg_hdr->a_author_id);
1301*4882a593Smuzhiyun 
1302*4882a593Smuzhiyun 	return 0;
1303*4882a593Smuzhiyun 
1304*4882a593Smuzhiyun }
1305*4882a593Smuzhiyun 
aw_dev_load_acf_check(struct aw_container * aw_cfg)1306*4882a593Smuzhiyun int aw_dev_load_acf_check(struct aw_container *aw_cfg)
1307*4882a593Smuzhiyun {
1308*4882a593Smuzhiyun 	struct aw_cfg_hdr *cfg_hdr = NULL;
1309*4882a593Smuzhiyun 
1310*4882a593Smuzhiyun 	if (aw_cfg == NULL) {
1311*4882a593Smuzhiyun 		aw_pr_err("aw_prof is NULL");
1312*4882a593Smuzhiyun 		return -ENOMEM;
1313*4882a593Smuzhiyun 	}
1314*4882a593Smuzhiyun 
1315*4882a593Smuzhiyun 	if (aw_cfg->len < sizeof(struct aw_cfg_hdr)) {
1316*4882a593Smuzhiyun 		aw_pr_err("cfg hdr size[%d] overflow file size[%d]",
1317*4882a593Smuzhiyun 			aw_cfg->len, (int)sizeof(struct aw_cfg_hdr));
1318*4882a593Smuzhiyun 		return -EINVAL;
1319*4882a593Smuzhiyun 	}
1320*4882a593Smuzhiyun 
1321*4882a593Smuzhiyun 	cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data;
1322*4882a593Smuzhiyun 	switch (cfg_hdr->a_hdr_version) {
1323*4882a593Smuzhiyun 	case AW_CFG_HDR_VER_0_0_0_1:
1324*4882a593Smuzhiyun 		return aw_dev_check_cfg_by_hdr(aw_cfg);
1325*4882a593Smuzhiyun 	case AW_CFG_HDR_VER_1_0_0_0:
1326*4882a593Smuzhiyun 		return aw_dev_check_acf_by_hdr_v_1_0_0_0(aw_cfg);
1327*4882a593Smuzhiyun 	default:
1328*4882a593Smuzhiyun 		aw_pr_err("unsupported hdr_version [0x%x]", cfg_hdr->a_hdr_version);
1329*4882a593Smuzhiyun 		return -EINVAL;
1330*4882a593Smuzhiyun 	}
1331*4882a593Smuzhiyun 
1332*4882a593Smuzhiyun 	return 0;
1333*4882a593Smuzhiyun }
1334*4882a593Smuzhiyun 
aw_dev_get_profile_count(struct aw_device * aw_dev)1335*4882a593Smuzhiyun int aw_dev_get_profile_count(struct aw_device *aw_dev)
1336*4882a593Smuzhiyun {
1337*4882a593Smuzhiyun 	if (aw_dev == NULL) {
1338*4882a593Smuzhiyun 		aw_pr_err("aw_dev is NULL");
1339*4882a593Smuzhiyun 		return -ENOMEM;
1340*4882a593Smuzhiyun 	}
1341*4882a593Smuzhiyun 
1342*4882a593Smuzhiyun 	return aw_dev->prof_info.count;
1343*4882a593Smuzhiyun }
1344*4882a593Smuzhiyun 
aw_dev_check_profile_index(struct aw_device * aw_dev,int index)1345*4882a593Smuzhiyun int aw_dev_check_profile_index(struct aw_device *aw_dev, int index)
1346*4882a593Smuzhiyun {
1347*4882a593Smuzhiyun 	if ((index >= aw_dev->prof_info.count) || (index < 0))
1348*4882a593Smuzhiyun 		return -EINVAL;
1349*4882a593Smuzhiyun 	else
1350*4882a593Smuzhiyun 		return 0;
1351*4882a593Smuzhiyun }
1352*4882a593Smuzhiyun 
aw_dev_get_profile_index(struct aw_device * aw_dev)1353*4882a593Smuzhiyun int aw_dev_get_profile_index(struct aw_device *aw_dev)
1354*4882a593Smuzhiyun {
1355*4882a593Smuzhiyun 	return aw_dev->set_prof;
1356*4882a593Smuzhiyun }
1357*4882a593Smuzhiyun 
aw_dev_set_profile_index(struct aw_device * aw_dev,int index)1358*4882a593Smuzhiyun int aw_dev_set_profile_index(struct aw_device *aw_dev, int index)
1359*4882a593Smuzhiyun {
1360*4882a593Smuzhiyun 	struct aw_prof_desc *prof_desc = NULL;
1361*4882a593Smuzhiyun 
1362*4882a593Smuzhiyun 	if ((index >= aw_dev->prof_info.count) || (index < 0)) {
1363*4882a593Smuzhiyun 		return -EINVAL;
1364*4882a593Smuzhiyun 	} else {
1365*4882a593Smuzhiyun 		aw_dev->set_prof = index;
1366*4882a593Smuzhiyun 		prof_desc = &aw_dev->prof_info.prof_desc[index];
1367*4882a593Smuzhiyun 
1368*4882a593Smuzhiyun 		aw_dev_info(aw_dev->dev, "set prof[%s]",
1369*4882a593Smuzhiyun 			aw_dev->prof_info.prof_name_list[prof_desc->id]);
1370*4882a593Smuzhiyun 	}
1371*4882a593Smuzhiyun 
1372*4882a593Smuzhiyun 	return 0;
1373*4882a593Smuzhiyun }
1374*4882a593Smuzhiyun 
aw_dev_get_prof_name(struct aw_device * aw_dev,int index)1375*4882a593Smuzhiyun char *aw_dev_get_prof_name(struct aw_device *aw_dev, int index)
1376*4882a593Smuzhiyun {
1377*4882a593Smuzhiyun 	struct aw_prof_desc *prof_desc = NULL;
1378*4882a593Smuzhiyun 	struct aw_prof_info *prof_info = &aw_dev->prof_info;
1379*4882a593Smuzhiyun 
1380*4882a593Smuzhiyun 	if ((index >= aw_dev->prof_info.count) || (index < 0)) {
1381*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "index[%d] overflow count[%d]",
1382*4882a593Smuzhiyun 			index, aw_dev->prof_info.count);
1383*4882a593Smuzhiyun 		return NULL;
1384*4882a593Smuzhiyun 	}
1385*4882a593Smuzhiyun 
1386*4882a593Smuzhiyun 	prof_desc = &aw_dev->prof_info.prof_desc[index];
1387*4882a593Smuzhiyun 
1388*4882a593Smuzhiyun 	return prof_info->prof_name_list[prof_desc->id];
1389*4882a593Smuzhiyun }
1390*4882a593Smuzhiyun 
aw_dev_get_prof_data(struct aw_device * aw_dev,int index,struct aw_prof_desc ** prof_desc)1391*4882a593Smuzhiyun int aw_dev_get_prof_data(struct aw_device *aw_dev, int index,
1392*4882a593Smuzhiyun 			struct aw_prof_desc **prof_desc)
1393*4882a593Smuzhiyun {
1394*4882a593Smuzhiyun 	if ((index >= aw_dev->prof_info.count) || (index < 0)) {
1395*4882a593Smuzhiyun 		aw_dev_err(aw_dev->dev, "%s: index[%d] overflow count[%d]\n",
1396*4882a593Smuzhiyun 			__func__, index, aw_dev->prof_info.count);
1397*4882a593Smuzhiyun 		return -EINVAL;
1398*4882a593Smuzhiyun 	}
1399*4882a593Smuzhiyun 
1400*4882a593Smuzhiyun 	*prof_desc = &aw_dev->prof_info.prof_desc[index];
1401*4882a593Smuzhiyun 
1402*4882a593Smuzhiyun 	return 0;
1403*4882a593Smuzhiyun }
1404*4882a593Smuzhiyun 
1405