1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 3 #ifndef __AW_DEVICE_H__ 4 #define __AW_DEVICE_H__ 5 #include <linux/version.h> 6 #include <linux/kernel.h> 7 #include <sound/control.h> 8 #include <sound/soc.h> 9 #include "aw_acf_bin.h" 10 11 #define AW87XXX_PID_9B_PRODUCT_MAX (1) 12 #define AW87XXX_PID_39_PRODUCT_MAX (3) 13 #define AW87XXX_PID_59_3X9_PRODUCT_MAX (2) 14 #define AW87XXX_PID_59_5X9_PRODUCT_MAX (4) 15 #define AW87XXX_PID_5A_PRODUCT_MAX (5) 16 #define AW87XXX_PID_76_PROFUCT_MAX (3) 17 #define AW_PRODUCT_NAME_LEN (8) 18 19 #define AW_GPIO_HIGHT_LEVEL (1) 20 #define AW_GPIO_LOW_LEVEL (0) 21 22 #define AW_I2C_RETRIES (5) 23 #define AW_I2C_RETRY_DELAY (2) 24 #define AW_I2C_READ_MSG_NUM (2) 25 26 #define AW_READ_CHIPID_RETRIES (5) 27 #define AW_READ_CHIPID_RETRY_DELAY (2) 28 #define AW_DEV_REG_CHIPID (0x00) 29 30 #define AW_DEV_REG_INVALID_MASK (0xff) 31 32 #define AW_NO_RESET_GPIO (-1) 33 34 #define AW_PID_9B_BIN_REG_CFG_COUNT (10) 35 36 /******************************************** 37 * 38 * aw87xxx devices attributes 39 * 40 *******************************************/ 41 struct aw_device; 42 43 struct aw_device_ops { 44 int (*pwr_on_func)(struct aw_device *aw_dev, struct aw_data_container *data); 45 int (*pwr_off_func)(struct aw_device *aw_dev, struct aw_data_container *data); 46 }; 47 48 enum aw_dev_chipid { 49 AW_DEV_CHIPID_18 = 0x18, 50 AW_DEV_CHIPID_39 = 0x39, 51 AW_DEV_CHIPID_59 = 0x59, 52 AW_DEV_CHIPID_69 = 0x69, 53 AW_DEV_CHIPID_5A = 0x5A, 54 AW_DEV_CHIPID_9A = 0x9A, 55 AW_DEV_CHIPID_9B = 0x9B, 56 AW_DEV_CHIPID_76 = 0x76, 57 }; 58 59 enum aw_dev_hw_status { 60 AW_DEV_HWEN_OFF = 0, 61 AW_DEV_HWEN_ON, 62 AW_DEV_HWEN_INVALID, 63 AW_DEV_HWEN_STATUS_MAX, 64 }; 65 66 enum aw_dev_soft_off_enable { 67 AW_DEV_SOFT_OFF_DISENABLE = 0, 68 AW_DEV_SOFT_OFF_ENABLE = 1, 69 }; 70 71 enum aw_dev_soft_rst_enable { 72 AW_DEV_SOFT_RST_DISENABLE = 0, 73 AW_DEV_SOFT_RST_ENABLE = 1, 74 }; 75 76 enum aw_reg_receiver_mode { 77 AW_NOT_REC_MODE = 0, 78 AW_IS_REC_MODE = 1, 79 }; 80 81 struct aw_mute_desc { 82 uint8_t addr; 83 uint8_t enable; 84 uint8_t disable; 85 uint16_t mask; 86 }; 87 88 struct aw_soft_rst_desc { 89 int len; 90 unsigned char *access; 91 }; 92 93 struct aw_esd_check_desc { 94 uint8_t first_update_reg_addr; 95 uint8_t first_update_reg_val; 96 }; 97 98 struct aw_rec_mode_desc { 99 uint8_t addr; 100 uint8_t enable; 101 uint8_t disable; 102 uint8_t mask; 103 }; 104 105 struct aw_device { 106 uint8_t i2c_addr; 107 uint8_t chipid; 108 uint8_t soft_rst_enable; 109 uint8_t soft_off_enable; 110 uint8_t is_rec_mode; 111 int hwen_status; 112 int i2c_bus; 113 int rst_gpio; 114 int rst_shared_gpio; 115 int reg_max_addr; 116 int product_cnt; 117 const char **product_tab; 118 const unsigned char *reg_access; 119 120 struct device *dev; 121 struct i2c_client *i2c; 122 struct aw_mute_desc mute_desc; 123 struct aw_soft_rst_desc soft_rst_desc; 124 struct aw_esd_check_desc esd_desc; 125 struct aw_rec_mode_desc rec_desc; 126 127 struct aw_device_ops ops; 128 }; 129 130 131 int aw_dev_i2c_write_byte(struct aw_device *aw_dev, 132 uint8_t reg_addr, uint8_t reg_data); 133 int aw_dev_i2c_read_byte(struct aw_device *aw_dev, 134 uint8_t reg_addr, uint8_t *reg_data); 135 int aw_dev_i2c_read_msg(struct aw_device *aw_dev, 136 uint8_t reg_addr, uint8_t *data_buf, uint32_t data_len); 137 int aw_dev_i2c_write_bits(struct aw_device *aw_dev, 138 uint8_t reg_addr, uint8_t mask, uint8_t reg_data); 139 void aw_dev_soft_reset(struct aw_device *aw_dev); 140 void aw_dev_hw_pwr_ctrl(struct aw_device *aw_dev, bool enable); 141 int aw_dev_default_profile_check(struct aw_device *aw_dev, 142 int profile, struct aw_data_container *profile_data); 143 int aw_dev_default_pwr_on(struct aw_device *aw_dev, 144 struct aw_data_container *profile_data); 145 int aw_dev_default_pwr_off(struct aw_device *aw_dev, 146 struct aw_data_container *profile_data); 147 int aw_dev_esd_reg_status_check(struct aw_device *aw_dev); 148 int aw_dev_check_reg_is_rec_mode(struct aw_device *aw_dev); 149 int aw_dev_init(struct aw_device *aw_dev); 150 151 #endif 152