xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/alc5632.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * alc5632.c  --  ALC5632 ALSA SoC Audio Codec
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Authors:  Leon Romanovsky <leon@leon.nu>
8*4882a593Smuzhiyun *           Andrey Danin <danindrey@mail.ru>
9*4882a593Smuzhiyun *           Ilya Petrov <ilya.muromec@gmail.com>
10*4882a593Smuzhiyun *           Marc Dietrich <marvin24@gmx.de>
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Based on alc5623.c by Arnaud Patard
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <linux/init.h>
18*4882a593Smuzhiyun #include <linux/delay.h>
19*4882a593Smuzhiyun #include <linux/pm.h>
20*4882a593Smuzhiyun #include <linux/i2c.h>
21*4882a593Smuzhiyun #include <linux/slab.h>
22*4882a593Smuzhiyun #include <linux/regmap.h>
23*4882a593Smuzhiyun #include <sound/core.h>
24*4882a593Smuzhiyun #include <sound/pcm.h>
25*4882a593Smuzhiyun #include <sound/pcm_params.h>
26*4882a593Smuzhiyun #include <sound/tlv.h>
27*4882a593Smuzhiyun #include <sound/soc.h>
28*4882a593Smuzhiyun #include <sound/initval.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include "alc5632.h"
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /*
33*4882a593Smuzhiyun  * ALC5632 register cache
34*4882a593Smuzhiyun  */
35*4882a593Smuzhiyun static const struct reg_default alc5632_reg_defaults[] = {
36*4882a593Smuzhiyun 	{   2, 0x8080 },	/* R2   - Speaker Output Volume */
37*4882a593Smuzhiyun 	{   4, 0x8080 },	/* R4   - Headphone Output Volume */
38*4882a593Smuzhiyun 	{   6, 0x8080 },	/* R6   - AUXOUT Volume */
39*4882a593Smuzhiyun 	{   8, 0xC800 },	/* R8   - Phone Input */
40*4882a593Smuzhiyun 	{  10, 0xE808 },	/* R10  - LINE_IN Volume */
41*4882a593Smuzhiyun 	{  12, 0x1010 },	/* R12  - STEREO DAC Input Volume */
42*4882a593Smuzhiyun 	{  14, 0x0808 },	/* R14  - MIC Input Volume */
43*4882a593Smuzhiyun 	{  16, 0xEE0F },	/* R16  - Stereo DAC and MIC Routing Control */
44*4882a593Smuzhiyun 	{  18, 0xCBCB },	/* R18  - ADC Record Gain */
45*4882a593Smuzhiyun 	{  20, 0x7F7F },	/* R20  - ADC Record Mixer Control */
46*4882a593Smuzhiyun 	{  24, 0xE010 },	/* R24  - Voice DAC Volume */
47*4882a593Smuzhiyun 	{  28, 0x8008 },	/* R28  - Output Mixer Control */
48*4882a593Smuzhiyun 	{  34, 0x0000 },	/* R34  - Microphone Control */
49*4882a593Smuzhiyun 	{  36, 0x00C0 },    /* R36  - Codec Digital MIC/Digital Boost
50*4882a593Smuzhiyun 						   Control */
51*4882a593Smuzhiyun 	{  46, 0x0000 },	/* R46  - Stereo DAC/Voice DAC/Stereo ADC
52*4882a593Smuzhiyun 						   Function Select */
53*4882a593Smuzhiyun 	{  52, 0x8000 },	/* R52  - Main Serial Data Port Control
54*4882a593Smuzhiyun 						   (Stereo I2S) */
55*4882a593Smuzhiyun 	{  54, 0x0000 },	/* R54  - Extend Serial Data Port Control
56*4882a593Smuzhiyun 						   (VoDAC_I2S/PCM) */
57*4882a593Smuzhiyun 	{  58, 0x0000 },	/* R58  - Power Management Addition 1 */
58*4882a593Smuzhiyun 	{  60, 0x0000 },	/* R60  - Power Management Addition 2 */
59*4882a593Smuzhiyun 	{  62, 0x8000 },	/* R62  - Power Management Addition 3 */
60*4882a593Smuzhiyun 	{  64, 0x0C0A },	/* R64  - General Purpose Control Register 1 */
61*4882a593Smuzhiyun 	{  66, 0x0000 },	/* R66  - General Purpose Control Register 2 */
62*4882a593Smuzhiyun 	{  68, 0x0000 },	/* R68  - PLL1 Control */
63*4882a593Smuzhiyun 	{  70, 0x0000 },	/* R70  - PLL2 Control */
64*4882a593Smuzhiyun 	{  76, 0xBE3E },	/* R76  - GPIO Pin Configuration */
65*4882a593Smuzhiyun 	{  78, 0xBE3E },	/* R78  - GPIO Pin Polarity */
66*4882a593Smuzhiyun 	{  80, 0x0000 },	/* R80  - GPIO Pin Sticky */
67*4882a593Smuzhiyun 	{  82, 0x0000 },	/* R82  - GPIO Pin Wake Up */
68*4882a593Smuzhiyun 	{  86, 0x0000 },	/* R86  - Pin Sharing */
69*4882a593Smuzhiyun 	{  90, 0x0009 },	/* R90  - Soft Volume Control Setting */
70*4882a593Smuzhiyun 	{  92, 0x0000 },	/* R92  - GPIO_Output Pin Control */
71*4882a593Smuzhiyun 	{  94, 0x3000 },	/* R94  - MISC Control */
72*4882a593Smuzhiyun 	{  96, 0x3075 },	/* R96  - Stereo DAC Clock Control_1 */
73*4882a593Smuzhiyun 	{  98, 0x1010 },	/* R98  - Stereo DAC Clock Control_2 */
74*4882a593Smuzhiyun 	{ 100, 0x3110 },	/* R100 - VoDAC_PCM Clock Control_1 */
75*4882a593Smuzhiyun 	{ 104, 0x0553 },	/* R104 - Pseudo Stereo and Spatial Effect
76*4882a593Smuzhiyun 						   Block Control */
77*4882a593Smuzhiyun 	{ 106, 0x0000 },	/* R106 - Private Register Address */
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun /* codec private data */
81*4882a593Smuzhiyun struct alc5632_priv {
82*4882a593Smuzhiyun 	struct regmap *regmap;
83*4882a593Smuzhiyun 	u8 id;
84*4882a593Smuzhiyun 	unsigned int sysclk;
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun 
alc5632_volatile_register(struct device * dev,unsigned int reg)87*4882a593Smuzhiyun static bool alc5632_volatile_register(struct device *dev,
88*4882a593Smuzhiyun 							unsigned int reg)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	switch (reg) {
91*4882a593Smuzhiyun 	case ALC5632_RESET:
92*4882a593Smuzhiyun 	case ALC5632_PWR_DOWN_CTRL_STATUS:
93*4882a593Smuzhiyun 	case ALC5632_GPIO_PIN_STATUS:
94*4882a593Smuzhiyun 	case ALC5632_OVER_CURR_STATUS:
95*4882a593Smuzhiyun 	case ALC5632_HID_CTRL_DATA:
96*4882a593Smuzhiyun 	case ALC5632_EQ_CTRL:
97*4882a593Smuzhiyun 	case ALC5632_VENDOR_ID1:
98*4882a593Smuzhiyun 	case ALC5632_VENDOR_ID2:
99*4882a593Smuzhiyun 		return true;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	default:
102*4882a593Smuzhiyun 		break;
103*4882a593Smuzhiyun 	}
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	return false;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun 
alc5632_reset(struct regmap * map)108*4882a593Smuzhiyun static inline int alc5632_reset(struct regmap *map)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun 	return regmap_write(map, ALC5632_RESET, 0x59B4);
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun 
amp_mixer_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)113*4882a593Smuzhiyun static int amp_mixer_event(struct snd_soc_dapm_widget *w,
114*4882a593Smuzhiyun 	struct snd_kcontrol *kcontrol, int event)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	/* to power-on/off class-d amp generators/speaker */
119*4882a593Smuzhiyun 	/* need to write to 'index-46h' register :        */
120*4882a593Smuzhiyun 	/* so write index num (here 0x46) to reg 0x6a     */
121*4882a593Smuzhiyun 	/* and then 0xffff/0 to reg 0x6c                  */
122*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5632_HID_CTRL_INDEX, 0x46);
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	switch (event) {
125*4882a593Smuzhiyun 	case SND_SOC_DAPM_PRE_PMU:
126*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5632_HID_CTRL_DATA, 0xFFFF);
127*4882a593Smuzhiyun 		break;
128*4882a593Smuzhiyun 	case SND_SOC_DAPM_POST_PMD:
129*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5632_HID_CTRL_DATA, 0);
130*4882a593Smuzhiyun 		break;
131*4882a593Smuzhiyun 	}
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	return 0;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun /*
137*4882a593Smuzhiyun  * ALC5632 Controls
138*4882a593Smuzhiyun  */
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun /* -34.5db min scale, 1.5db steps, no mute */
141*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(vol_tlv, -3450, 150, 0);
142*4882a593Smuzhiyun /* -46.5db min scale, 1.5db steps, no mute */
143*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(hp_tlv, -4650, 150, 0);
144*4882a593Smuzhiyun /* -16.5db min scale, 1.5db steps, no mute */
145*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adc_rec_tlv, -1650, 150, 0);
146*4882a593Smuzhiyun static const DECLARE_TLV_DB_RANGE(boost_tlv,
147*4882a593Smuzhiyun 	0, 1, TLV_DB_SCALE_ITEM(0, 2000, 0),
148*4882a593Smuzhiyun 	1, 3, TLV_DB_SCALE_ITEM(2000, 1000, 0)
149*4882a593Smuzhiyun );
150*4882a593Smuzhiyun /* 0db min scale, 6 db steps, no mute */
151*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(dig_tlv, 0, 600, 0);
152*4882a593Smuzhiyun /* 0db min scalem 0.75db steps, no mute */
153*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(vdac_tlv, -3525, 75, 0);
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_vol_snd_controls[] = {
156*4882a593Smuzhiyun 	/* left starts at bit 8, right at bit 0 */
157*4882a593Smuzhiyun 	/* 31 steps (5 bit), -46.5db scale */
158*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Speaker Playback Volume",
159*4882a593Smuzhiyun 			ALC5632_SPK_OUT_VOL, 8, 0, 31, 1, hp_tlv),
160*4882a593Smuzhiyun 	/* bit 15 mutes left, bit 7 right */
161*4882a593Smuzhiyun 	SOC_DOUBLE("Speaker Playback Switch",
162*4882a593Smuzhiyun 			ALC5632_SPK_OUT_VOL, 15, 7, 1, 1),
163*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Headphone Playback Volume",
164*4882a593Smuzhiyun 			ALC5632_HP_OUT_VOL, 8, 0, 31, 1, hp_tlv),
165*4882a593Smuzhiyun 	SOC_DOUBLE("Headphone Playback Switch",
166*4882a593Smuzhiyun 			ALC5632_HP_OUT_VOL, 15, 7, 1, 1),
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_snd_controls[] = {
170*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Auxout Playback Volume",
171*4882a593Smuzhiyun 			ALC5632_AUX_OUT_VOL, 8, 0, 31, 1, hp_tlv),
172*4882a593Smuzhiyun 	SOC_DOUBLE("Auxout Playback Switch",
173*4882a593Smuzhiyun 			ALC5632_AUX_OUT_VOL, 15, 7, 1, 1),
174*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Voice DAC Playback Volume",
175*4882a593Smuzhiyun 			ALC5632_VOICE_DAC_VOL, 0, 63, 0, vdac_tlv),
176*4882a593Smuzhiyun 	SOC_SINGLE("Voice DAC Playback Switch",
177*4882a593Smuzhiyun 			ALC5632_VOICE_DAC_VOL, 12, 1, 1),
178*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Phone Playback Volume",
179*4882a593Smuzhiyun 			ALC5632_PHONE_IN_VOL, 8, 31, 1, vol_tlv),
180*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("LineIn Playback Volume",
181*4882a593Smuzhiyun 			ALC5632_LINE_IN_VOL, 8, 0, 31, 1, vol_tlv),
182*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Master Playback Volume",
183*4882a593Smuzhiyun 			ALC5632_STEREO_DAC_IN_VOL, 8, 0, 63, 1, vdac_tlv),
184*4882a593Smuzhiyun 	SOC_DOUBLE("Master Playback Switch",
185*4882a593Smuzhiyun 			ALC5632_STEREO_DAC_IN_VOL, 15, 7, 1, 1),
186*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Mic1 Playback Volume",
187*4882a593Smuzhiyun 			ALC5632_MIC_VOL, 8, 31, 1, vol_tlv),
188*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Mic2 Playback Volume",
189*4882a593Smuzhiyun 			ALC5632_MIC_VOL, 0, 31, 1, vol_tlv),
190*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Rec Capture Volume",
191*4882a593Smuzhiyun 			ALC5632_ADC_REC_GAIN, 8, 0, 31, 0, adc_rec_tlv),
192*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Mic 1 Boost Volume",
193*4882a593Smuzhiyun 			ALC5632_MIC_CTRL, 10, 3, 0, boost_tlv),
194*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Mic 2 Boost Volume",
195*4882a593Smuzhiyun 			ALC5632_MIC_CTRL, 8, 3, 0, boost_tlv),
196*4882a593Smuzhiyun 	SOC_SINGLE_TLV("DMIC Boost Capture Volume",
197*4882a593Smuzhiyun 			ALC5632_DIGI_BOOST_CTRL, 0, 7, 0, dig_tlv),
198*4882a593Smuzhiyun 	SOC_SINGLE("DMIC En Capture Switch",
199*4882a593Smuzhiyun 			ALC5632_DIGI_BOOST_CTRL, 15, 1, 0),
200*4882a593Smuzhiyun 	SOC_SINGLE("DMIC PreFilter Capture Switch",
201*4882a593Smuzhiyun 			ALC5632_DIGI_BOOST_CTRL, 12, 1, 0),
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun /*
205*4882a593Smuzhiyun  * DAPM Controls
206*4882a593Smuzhiyun  */
207*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_hp_mixer_controls[] = {
208*4882a593Smuzhiyun SOC_DAPM_SINGLE("LI2HP Playback Switch", ALC5632_LINE_IN_VOL, 15, 1, 1),
209*4882a593Smuzhiyun SOC_DAPM_SINGLE("PHONE2HP Playback Switch", ALC5632_PHONE_IN_VOL, 15, 1, 1),
210*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC12HP Playback Switch", ALC5632_MIC_ROUTING_CTRL, 15, 1, 1),
211*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC22HP Playback Switch", ALC5632_MIC_ROUTING_CTRL, 11, 1, 1),
212*4882a593Smuzhiyun SOC_DAPM_SINGLE("VOICE2HP Playback Switch", ALC5632_VOICE_DAC_VOL, 15, 1, 1),
213*4882a593Smuzhiyun };
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_hpl_mixer_controls[] = {
216*4882a593Smuzhiyun SOC_DAPM_SINGLE("ADC2HP_L Playback Switch", ALC5632_ADC_REC_GAIN, 15, 1, 1),
217*4882a593Smuzhiyun SOC_DAPM_SINGLE("DACL2HP Playback Switch", ALC5632_MIC_ROUTING_CTRL, 3, 1, 1),
218*4882a593Smuzhiyun };
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_hpr_mixer_controls[] = {
221*4882a593Smuzhiyun SOC_DAPM_SINGLE("ADC2HP_R Playback Switch", ALC5632_ADC_REC_GAIN, 7, 1, 1),
222*4882a593Smuzhiyun SOC_DAPM_SINGLE("DACR2HP Playback Switch", ALC5632_MIC_ROUTING_CTRL, 2, 1, 1),
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_mono_mixer_controls[] = {
226*4882a593Smuzhiyun SOC_DAPM_SINGLE("ADC2MONO_L Playback Switch", ALC5632_ADC_REC_GAIN, 14, 1, 1),
227*4882a593Smuzhiyun SOC_DAPM_SINGLE("ADC2MONO_R Playback Switch", ALC5632_ADC_REC_GAIN, 6, 1, 1),
228*4882a593Smuzhiyun SOC_DAPM_SINGLE("LI2MONO Playback Switch", ALC5632_LINE_IN_VOL, 13, 1, 1),
229*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC12MONO Playback Switch",
230*4882a593Smuzhiyun 					ALC5632_MIC_ROUTING_CTRL, 13, 1, 1),
231*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC22MONO Playback Switch",
232*4882a593Smuzhiyun 					ALC5632_MIC_ROUTING_CTRL, 9, 1, 1),
233*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC2MONO Playback Switch", ALC5632_MIC_ROUTING_CTRL, 0, 1, 1),
234*4882a593Smuzhiyun SOC_DAPM_SINGLE("VOICE2MONO Playback Switch", ALC5632_VOICE_DAC_VOL, 13, 1, 1),
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_speaker_mixer_controls[] = {
238*4882a593Smuzhiyun SOC_DAPM_SINGLE("LI2SPK Playback Switch", ALC5632_LINE_IN_VOL, 14, 1, 1),
239*4882a593Smuzhiyun SOC_DAPM_SINGLE("PHONE2SPK Playback Switch", ALC5632_PHONE_IN_VOL, 14, 1, 1),
240*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC12SPK Playback Switch",
241*4882a593Smuzhiyun 					ALC5632_MIC_ROUTING_CTRL, 14, 1, 1),
242*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC22SPK Playback Switch",
243*4882a593Smuzhiyun 					ALC5632_MIC_ROUTING_CTRL, 10, 1, 1),
244*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC2SPK Playback Switch", ALC5632_MIC_ROUTING_CTRL, 1, 1, 1),
245*4882a593Smuzhiyun SOC_DAPM_SINGLE("VOICE2SPK Playback Switch", ALC5632_VOICE_DAC_VOL, 14, 1, 1),
246*4882a593Smuzhiyun };
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun /* Left Record Mixer */
249*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_captureL_mixer_controls[] = {
250*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC12REC_L Capture Switch", ALC5632_ADC_REC_MIXER, 14, 1, 1),
251*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC22REC_L Capture Switch", ALC5632_ADC_REC_MIXER, 13, 1, 1),
252*4882a593Smuzhiyun SOC_DAPM_SINGLE("LIL2REC Capture Switch", ALC5632_ADC_REC_MIXER, 12, 1, 1),
253*4882a593Smuzhiyun SOC_DAPM_SINGLE("PH2REC_L Capture Switch", ALC5632_ADC_REC_MIXER, 11, 1, 1),
254*4882a593Smuzhiyun SOC_DAPM_SINGLE("HPL2REC Capture Switch", ALC5632_ADC_REC_MIXER, 10, 1, 1),
255*4882a593Smuzhiyun SOC_DAPM_SINGLE("SPK2REC_L Capture Switch", ALC5632_ADC_REC_MIXER, 9, 1, 1),
256*4882a593Smuzhiyun SOC_DAPM_SINGLE("MONO2REC_L Capture Switch", ALC5632_ADC_REC_MIXER, 8, 1, 1),
257*4882a593Smuzhiyun };
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun /* Right Record Mixer */
260*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_captureR_mixer_controls[] = {
261*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC12REC_R Capture Switch", ALC5632_ADC_REC_MIXER, 6, 1, 1),
262*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC22REC_R Capture Switch", ALC5632_ADC_REC_MIXER, 5, 1, 1),
263*4882a593Smuzhiyun SOC_DAPM_SINGLE("LIR2REC Capture Switch", ALC5632_ADC_REC_MIXER, 4, 1, 1),
264*4882a593Smuzhiyun SOC_DAPM_SINGLE("PH2REC_R Capture Switch", ALC5632_ADC_REC_MIXER, 3, 1, 1),
265*4882a593Smuzhiyun SOC_DAPM_SINGLE("HPR2REC Capture Switch", ALC5632_ADC_REC_MIXER, 2, 1, 1),
266*4882a593Smuzhiyun SOC_DAPM_SINGLE("SPK2REC_R Capture Switch", ALC5632_ADC_REC_MIXER, 1, 1, 1),
267*4882a593Smuzhiyun SOC_DAPM_SINGLE("MONO2REC_R Capture Switch", ALC5632_ADC_REC_MIXER, 0, 1, 1),
268*4882a593Smuzhiyun };
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun /* Dmic Mixer */
271*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_dmicl_mixer_controls[] = {
272*4882a593Smuzhiyun SOC_DAPM_SINGLE("DMICL2ADC Capture Switch", ALC5632_DIGI_BOOST_CTRL, 7, 1, 1),
273*4882a593Smuzhiyun };
274*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_dmicr_mixer_controls[] = {
275*4882a593Smuzhiyun SOC_DAPM_SINGLE("DMICR2ADC Capture Switch", ALC5632_DIGI_BOOST_CTRL, 6, 1, 1),
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun static const char * const alc5632_spk_n_sour_sel[] = {
279*4882a593Smuzhiyun 		"RN/-R", "RP/+R", "LN/-R", "Mute"};
280*4882a593Smuzhiyun static const char * const alc5632_hpl_out_input_sel[] = {
281*4882a593Smuzhiyun 		"Vmid", "HP Left Mix"};
282*4882a593Smuzhiyun static const char * const alc5632_hpr_out_input_sel[] = {
283*4882a593Smuzhiyun 		"Vmid", "HP Right Mix"};
284*4882a593Smuzhiyun static const char * const alc5632_spkout_input_sel[] = {
285*4882a593Smuzhiyun 		"Vmid", "HPOut Mix", "Speaker Mix", "Mono Mix"};
286*4882a593Smuzhiyun static const char * const alc5632_aux_out_input_sel[] = {
287*4882a593Smuzhiyun 		"Vmid", "HPOut Mix", "Speaker Mix", "Mono Mix"};
288*4882a593Smuzhiyun static const char * const alc5632_adcr_func_sel[] = {
289*4882a593Smuzhiyun 		"Stereo ADC", "Voice ADC"};
290*4882a593Smuzhiyun static const char * const alc5632_i2s_out_sel[] = {
291*4882a593Smuzhiyun 		"ADC LR", "Voice Stereo Digital"};
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun /* auxout output mux */
294*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5632_aux_out_input_enum,
295*4882a593Smuzhiyun 			    ALC5632_OUTPUT_MIXER_CTRL, 6,
296*4882a593Smuzhiyun 			    alc5632_aux_out_input_sel);
297*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_auxout_mux_controls =
298*4882a593Smuzhiyun SOC_DAPM_ENUM("AuxOut Mux", alc5632_aux_out_input_enum);
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun /* speaker output mux */
301*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5632_spkout_input_enum,
302*4882a593Smuzhiyun 			    ALC5632_OUTPUT_MIXER_CTRL, 10,
303*4882a593Smuzhiyun 			    alc5632_spkout_input_sel);
304*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_spkout_mux_controls =
305*4882a593Smuzhiyun SOC_DAPM_ENUM("SpeakerOut Mux", alc5632_spkout_input_enum);
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun /* headphone left output mux */
308*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5632_hpl_out_input_enum,
309*4882a593Smuzhiyun 			    ALC5632_OUTPUT_MIXER_CTRL, 9,
310*4882a593Smuzhiyun 			    alc5632_hpl_out_input_sel);
311*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_hpl_out_mux_controls =
312*4882a593Smuzhiyun SOC_DAPM_ENUM("Left Headphone Mux", alc5632_hpl_out_input_enum);
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun /* headphone right output mux */
315*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5632_hpr_out_input_enum,
316*4882a593Smuzhiyun 			    ALC5632_OUTPUT_MIXER_CTRL, 8,
317*4882a593Smuzhiyun 			    alc5632_hpr_out_input_sel);
318*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_hpr_out_mux_controls =
319*4882a593Smuzhiyun SOC_DAPM_ENUM("Right Headphone Mux", alc5632_hpr_out_input_enum);
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun /* speaker output N select */
322*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5632_spk_n_sour_enum,
323*4882a593Smuzhiyun 			    ALC5632_OUTPUT_MIXER_CTRL, 14,
324*4882a593Smuzhiyun 			    alc5632_spk_n_sour_sel);
325*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_spkoutn_mux_controls =
326*4882a593Smuzhiyun SOC_DAPM_ENUM("SpeakerOut N Mux", alc5632_spk_n_sour_enum);
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun /* speaker amplifier */
329*4882a593Smuzhiyun static const char *alc5632_amp_names[] = {"AB Amp", "D Amp"};
330*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5632_amp_enum,
331*4882a593Smuzhiyun 			    ALC5632_OUTPUT_MIXER_CTRL, 13,
332*4882a593Smuzhiyun 			    alc5632_amp_names);
333*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_amp_mux_controls =
334*4882a593Smuzhiyun 	SOC_DAPM_ENUM("AB-D Amp Mux", alc5632_amp_enum);
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun /* ADC output select */
337*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5632_adcr_func_enum,
338*4882a593Smuzhiyun 			    ALC5632_DAC_FUNC_SELECT, 5,
339*4882a593Smuzhiyun 			    alc5632_adcr_func_sel);
340*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_adcr_func_controls =
341*4882a593Smuzhiyun 	SOC_DAPM_ENUM("ADCR Mux", alc5632_adcr_func_enum);
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun /* I2S out select */
344*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5632_i2s_out_enum,
345*4882a593Smuzhiyun 			    ALC5632_I2S_OUT_CTL, 5,
346*4882a593Smuzhiyun 			    alc5632_i2s_out_sel);
347*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5632_i2s_out_controls =
348*4882a593Smuzhiyun 	SOC_DAPM_ENUM("I2SOut Mux", alc5632_i2s_out_enum);
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun static const struct snd_soc_dapm_widget alc5632_dapm_widgets[] = {
351*4882a593Smuzhiyun /* Muxes */
352*4882a593Smuzhiyun SND_SOC_DAPM_MUX("AuxOut Mux", SND_SOC_NOPM, 0, 0,
353*4882a593Smuzhiyun 	&alc5632_auxout_mux_controls),
354*4882a593Smuzhiyun SND_SOC_DAPM_MUX("SpeakerOut Mux", SND_SOC_NOPM, 0, 0,
355*4882a593Smuzhiyun 	&alc5632_spkout_mux_controls),
356*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0,
357*4882a593Smuzhiyun 	&alc5632_hpl_out_mux_controls),
358*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0,
359*4882a593Smuzhiyun 	&alc5632_hpr_out_mux_controls),
360*4882a593Smuzhiyun SND_SOC_DAPM_MUX("SpeakerOut N Mux", SND_SOC_NOPM, 0, 0,
361*4882a593Smuzhiyun 	&alc5632_spkoutn_mux_controls),
362*4882a593Smuzhiyun SND_SOC_DAPM_MUX("ADCR Mux", SND_SOC_NOPM, 0, 0,
363*4882a593Smuzhiyun 	&alc5632_adcr_func_controls),
364*4882a593Smuzhiyun SND_SOC_DAPM_MUX("I2SOut Mux", ALC5632_PWR_MANAG_ADD1, 11, 0,
365*4882a593Smuzhiyun 	&alc5632_i2s_out_controls),
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun /* output mixers */
368*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("HP Mix", SND_SOC_NOPM, 0, 0,
369*4882a593Smuzhiyun 	&alc5632_hp_mixer_controls[0],
370*4882a593Smuzhiyun 	ARRAY_SIZE(alc5632_hp_mixer_controls)),
371*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("HPR Mix", ALC5632_PWR_MANAG_ADD2, 4, 0,
372*4882a593Smuzhiyun 	&alc5632_hpr_mixer_controls[0],
373*4882a593Smuzhiyun 	ARRAY_SIZE(alc5632_hpr_mixer_controls)),
374*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("HPL Mix", ALC5632_PWR_MANAG_ADD2, 5, 0,
375*4882a593Smuzhiyun 	&alc5632_hpl_mixer_controls[0],
376*4882a593Smuzhiyun 	ARRAY_SIZE(alc5632_hpl_mixer_controls)),
377*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("HPOut Mix", SND_SOC_NOPM, 0, 0, NULL, 0),
378*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Mono Mix", ALC5632_PWR_MANAG_ADD2, 2, 0,
379*4882a593Smuzhiyun 	&alc5632_mono_mixer_controls[0],
380*4882a593Smuzhiyun 	ARRAY_SIZE(alc5632_mono_mixer_controls)),
381*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Speaker Mix", ALC5632_PWR_MANAG_ADD2, 3, 0,
382*4882a593Smuzhiyun 	&alc5632_speaker_mixer_controls[0],
383*4882a593Smuzhiyun 	ARRAY_SIZE(alc5632_speaker_mixer_controls)),
384*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("DMICL Mix", SND_SOC_NOPM, 0, 0,
385*4882a593Smuzhiyun 	&alc5632_dmicl_mixer_controls[0],
386*4882a593Smuzhiyun 	ARRAY_SIZE(alc5632_dmicl_mixer_controls)),
387*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("DMICR Mix", SND_SOC_NOPM, 0, 0,
388*4882a593Smuzhiyun 	&alc5632_dmicr_mixer_controls[0],
389*4882a593Smuzhiyun 	ARRAY_SIZE(alc5632_dmicr_mixer_controls)),
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun /* input mixers */
392*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Left Capture Mix", ALC5632_PWR_MANAG_ADD2, 1, 0,
393*4882a593Smuzhiyun 	&alc5632_captureL_mixer_controls[0],
394*4882a593Smuzhiyun 	ARRAY_SIZE(alc5632_captureL_mixer_controls)),
395*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Right Capture Mix", ALC5632_PWR_MANAG_ADD2, 0, 0,
396*4882a593Smuzhiyun 	&alc5632_captureR_mixer_controls[0],
397*4882a593Smuzhiyun 	ARRAY_SIZE(alc5632_captureR_mixer_controls)),
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun SND_SOC_DAPM_AIF_IN("AIFRXL", "Left HiFi Playback", 0, SND_SOC_NOPM, 0, 0),
400*4882a593Smuzhiyun SND_SOC_DAPM_AIF_IN("AIFRXR", "Right HiFi Playback", 0, SND_SOC_NOPM, 0, 0),
401*4882a593Smuzhiyun SND_SOC_DAPM_AIF_OUT("AIFTXL", "Left HiFi Capture", 0, SND_SOC_NOPM, 0, 0),
402*4882a593Smuzhiyun SND_SOC_DAPM_AIF_OUT("AIFTXR", "Right HiFi Capture", 0, SND_SOC_NOPM, 0, 0),
403*4882a593Smuzhiyun SND_SOC_DAPM_AIF_IN("VAIFRX", "Voice Playback", 0, SND_SOC_NOPM, 0, 0),
404*4882a593Smuzhiyun SND_SOC_DAPM_AIF_OUT("VAIFTX", "Voice Capture", 0, SND_SOC_NOPM, 0, 0),
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun SND_SOC_DAPM_DAC("Voice DAC", NULL, ALC5632_PWR_MANAG_ADD2, 10, 0),
407*4882a593Smuzhiyun SND_SOC_DAPM_DAC("Left DAC", NULL, ALC5632_PWR_MANAG_ADD2, 9, 0),
408*4882a593Smuzhiyun SND_SOC_DAPM_DAC("Right DAC", NULL, ALC5632_PWR_MANAG_ADD2, 8, 0),
409*4882a593Smuzhiyun SND_SOC_DAPM_ADC("Left ADC", NULL, ALC5632_PWR_MANAG_ADD2, 7, 0),
410*4882a593Smuzhiyun SND_SOC_DAPM_ADC("Right ADC", NULL, ALC5632_PWR_MANAG_ADD2, 6, 0),
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("DAC Left Channel", ALC5632_PWR_MANAG_ADD1, 15, 0, NULL, 0),
413*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("DAC Right Channel",
414*4882a593Smuzhiyun 	ALC5632_PWR_MANAG_ADD1, 14, 0, NULL, 0),
415*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("I2S Mix", ALC5632_PWR_MANAG_ADD1, 11, 0, NULL, 0),
416*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Phone Mix", SND_SOC_NOPM, 0, 0, NULL, 0),
417*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Line Mix", SND_SOC_NOPM, 0, 0, NULL, 0),
418*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Voice Mix", SND_SOC_NOPM, 0, 0, NULL, 0),
419*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("ADCLR", SND_SOC_NOPM, 0, 0, NULL, 0),
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Left Headphone", ALC5632_PWR_MANAG_ADD3, 11, 0, NULL, 0),
422*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Right Headphone", ALC5632_PWR_MANAG_ADD3, 10, 0, NULL, 0),
423*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Left Speaker", ALC5632_PWR_MANAG_ADD3, 13, 0, NULL, 0),
424*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Right Speaker", ALC5632_PWR_MANAG_ADD3, 12, 0, NULL, 0),
425*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Aux Out", ALC5632_PWR_MANAG_ADD3, 14, 0, NULL, 0),
426*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Left LineIn", ALC5632_PWR_MANAG_ADD3, 7, 0, NULL, 0),
427*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Right LineIn", ALC5632_PWR_MANAG_ADD3, 6, 0, NULL, 0),
428*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Phone", ALC5632_PWR_MANAG_ADD3, 5, 0, NULL, 0),
429*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Phone ADMix", ALC5632_PWR_MANAG_ADD3, 4, 0, NULL, 0),
430*4882a593Smuzhiyun SND_SOC_DAPM_PGA("MIC1 PGA", ALC5632_PWR_MANAG_ADD3, 3, 0, NULL, 0),
431*4882a593Smuzhiyun SND_SOC_DAPM_PGA("MIC2 PGA", ALC5632_PWR_MANAG_ADD3, 2, 0, NULL, 0),
432*4882a593Smuzhiyun SND_SOC_DAPM_PGA("MIC1 Pre Amp", ALC5632_PWR_MANAG_ADD3, 1, 0, NULL, 0),
433*4882a593Smuzhiyun SND_SOC_DAPM_PGA("MIC2 Pre Amp", ALC5632_PWR_MANAG_ADD3, 0, 0, NULL, 0),
434*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("MICBIAS1", ALC5632_PWR_MANAG_ADD1, 3, 0, NULL, 0),
435*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("MICBIAS2", ALC5632_PWR_MANAG_ADD1, 2, 0, NULL, 0),
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun SND_SOC_DAPM_PGA_E("D Amp", ALC5632_PWR_MANAG_ADD2, 14, 0, NULL, 0,
438*4882a593Smuzhiyun 	amp_mixer_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
439*4882a593Smuzhiyun SND_SOC_DAPM_PGA("AB Amp", ALC5632_PWR_MANAG_ADD2, 15, 0, NULL, 0),
440*4882a593Smuzhiyun SND_SOC_DAPM_MUX("AB-D Amp Mux", ALC5632_PWR_MANAG_ADD1, 10, 0,
441*4882a593Smuzhiyun 	&alc5632_amp_mux_controls),
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("AUXOUT"),
444*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("HPL"),
445*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("HPR"),
446*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("SPKOUT"),
447*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("SPKOUTN"),
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LINEINL"),
450*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LINEINR"),
451*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("PHONEP"),
452*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("PHONEN"),
453*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("DMICDAT"),
454*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("MIC1"),
455*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("MIC2"),
456*4882a593Smuzhiyun SND_SOC_DAPM_VMID("Vmid"),
457*4882a593Smuzhiyun };
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun static const struct snd_soc_dapm_route alc5632_dapm_routes[] = {
461*4882a593Smuzhiyun 	/* Playback streams */
462*4882a593Smuzhiyun 	{"Left DAC", NULL, "AIFRXL"},
463*4882a593Smuzhiyun 	{"Right DAC", NULL, "AIFRXR"},
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	/* virtual mixer - mixes left & right channels */
466*4882a593Smuzhiyun 	{"I2S Mix",	NULL,	"Left DAC"},
467*4882a593Smuzhiyun 	{"I2S Mix",	NULL,	"Right DAC"},
468*4882a593Smuzhiyun 	{"Line Mix",	NULL,	"Right LineIn"},
469*4882a593Smuzhiyun 	{"Line Mix",	NULL,	"Left LineIn"},
470*4882a593Smuzhiyun 	{"Phone Mix",	NULL,	"Phone"},
471*4882a593Smuzhiyun 	{"Phone Mix",	NULL,	"Phone ADMix"},
472*4882a593Smuzhiyun 	{"AUXOUT",		NULL,	"Aux Out"},
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	/* DAC */
475*4882a593Smuzhiyun 	{"DAC Right Channel",	NULL,	"I2S Mix"},
476*4882a593Smuzhiyun 	{"DAC Left Channel",	NULL,   "I2S Mix"},
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun 	/* HP mixer */
479*4882a593Smuzhiyun 	{"HPL Mix",	"ADC2HP_L Playback Switch",	"Left Capture Mix"},
480*4882a593Smuzhiyun 	{"HPL Mix", NULL,					"HP Mix"},
481*4882a593Smuzhiyun 	{"HPR Mix", "ADC2HP_R Playback Switch",	"Right Capture Mix"},
482*4882a593Smuzhiyun 	{"HPR Mix", NULL,					"HP Mix"},
483*4882a593Smuzhiyun 	{"HP Mix",	"LI2HP Playback Switch",	"Line Mix"},
484*4882a593Smuzhiyun 	{"HP Mix",	"PHONE2HP Playback Switch",	"Phone Mix"},
485*4882a593Smuzhiyun 	{"HP Mix",	"MIC12HP Playback Switch",	"MIC1 PGA"},
486*4882a593Smuzhiyun 	{"HP Mix",	"MIC22HP Playback Switch",	"MIC2 PGA"},
487*4882a593Smuzhiyun 	{"HP Mix", "VOICE2HP Playback Switch",	"Voice Mix"},
488*4882a593Smuzhiyun 	{"HPR Mix", "DACR2HP Playback Switch",	"DAC Right Channel"},
489*4882a593Smuzhiyun 	{"HPL Mix", "DACL2HP Playback Switch",	"DAC Left Channel"},
490*4882a593Smuzhiyun 	{"HPOut Mix", NULL, "HP Mix"},
491*4882a593Smuzhiyun 	{"HPOut Mix", NULL, "HPR Mix"},
492*4882a593Smuzhiyun 	{"HPOut Mix", NULL, "HPL Mix"},
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 	/* speaker mixer */
495*4882a593Smuzhiyun 	{"Speaker Mix", "LI2SPK Playback Switch",	"Line Mix"},
496*4882a593Smuzhiyun 	{"Speaker Mix", "PHONE2SPK Playback Switch", "Phone Mix"},
497*4882a593Smuzhiyun 	{"Speaker Mix", "MIC12SPK Playback Switch",	"MIC1 PGA"},
498*4882a593Smuzhiyun 	{"Speaker Mix", "MIC22SPK Playback Switch",	"MIC2 PGA"},
499*4882a593Smuzhiyun 	{"Speaker Mix", "DAC2SPK Playback Switch",	"DAC Left Channel"},
500*4882a593Smuzhiyun 	{"Speaker Mix", "VOICE2SPK Playback Switch",	"Voice Mix"},
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 	/* mono mixer */
503*4882a593Smuzhiyun 	{"Mono Mix", "ADC2MONO_L Playback Switch",	"Left Capture Mix"},
504*4882a593Smuzhiyun 	{"Mono Mix", "ADC2MONO_R Playback Switch",	"Right Capture Mix"},
505*4882a593Smuzhiyun 	{"Mono Mix", "LI2MONO Playback Switch",		"Line Mix"},
506*4882a593Smuzhiyun 	{"Mono Mix", "MIC12MONO Playback Switch",	"MIC1 PGA"},
507*4882a593Smuzhiyun 	{"Mono Mix", "MIC22MONO Playback Switch",	"MIC2 PGA"},
508*4882a593Smuzhiyun 	{"Mono Mix", "DAC2MONO Playback Switch",	"DAC Left Channel"},
509*4882a593Smuzhiyun 	{"Mono Mix", "VOICE2MONO Playback Switch",	"Voice Mix"},
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun 	/* Left record mixer */
512*4882a593Smuzhiyun 	{"Left Capture Mix", "LIL2REC Capture Switch", "LINEINL"},
513*4882a593Smuzhiyun 	{"Left Capture Mix", "PH2REC_L Capture Switch", "PHONEN"},
514*4882a593Smuzhiyun 	{"Left Capture Mix", "MIC12REC_L Capture Switch", "MIC1 Pre Amp"},
515*4882a593Smuzhiyun 	{"Left Capture Mix", "MIC22REC_L Capture Switch", "MIC2 Pre Amp"},
516*4882a593Smuzhiyun 	{"Left Capture Mix", "HPL2REC Capture Switch", "HPL Mix"},
517*4882a593Smuzhiyun 	{"Left Capture Mix", "SPK2REC_L Capture Switch", "Speaker Mix"},
518*4882a593Smuzhiyun 	{"Left Capture Mix", "MONO2REC_L Capture Switch", "Mono Mix"},
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun 	/*Right record mixer */
521*4882a593Smuzhiyun 	{"Right Capture Mix", "LIR2REC Capture Switch", "LINEINR"},
522*4882a593Smuzhiyun 	{"Right Capture Mix", "PH2REC_R Capture Switch", "PHONEP"},
523*4882a593Smuzhiyun 	{"Right Capture Mix", "MIC12REC_R Capture Switch", "MIC1 Pre Amp"},
524*4882a593Smuzhiyun 	{"Right Capture Mix", "MIC22REC_R Capture Switch", "MIC2 Pre Amp"},
525*4882a593Smuzhiyun 	{"Right Capture Mix", "HPR2REC Capture Switch", "HPR Mix"},
526*4882a593Smuzhiyun 	{"Right Capture Mix", "SPK2REC_R Capture Switch", "Speaker Mix"},
527*4882a593Smuzhiyun 	{"Right Capture Mix", "MONO2REC_R Capture Switch", "Mono Mix"},
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	/* headphone left mux */
530*4882a593Smuzhiyun 	{"Left Headphone Mux", "HP Left Mix",		"HPL Mix"},
531*4882a593Smuzhiyun 	{"Left Headphone Mux", "Vmid",			"Vmid"},
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	/* headphone right mux */
534*4882a593Smuzhiyun 	{"Right Headphone Mux", "HP Right Mix",		"HPR Mix"},
535*4882a593Smuzhiyun 	{"Right Headphone Mux", "Vmid",			"Vmid"},
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun 	/* speaker out mux */
538*4882a593Smuzhiyun 	{"SpeakerOut Mux", "Vmid",			"Vmid"},
539*4882a593Smuzhiyun 	{"SpeakerOut Mux", "HPOut Mix",			"HPOut Mix"},
540*4882a593Smuzhiyun 	{"SpeakerOut Mux", "Speaker Mix",		"Speaker Mix"},
541*4882a593Smuzhiyun 	{"SpeakerOut Mux", "Mono Mix",			"Mono Mix"},
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun 	/* Mono/Aux Out mux */
544*4882a593Smuzhiyun 	{"AuxOut Mux", "Vmid",				"Vmid"},
545*4882a593Smuzhiyun 	{"AuxOut Mux", "HPOut Mix",			"HPOut Mix"},
546*4882a593Smuzhiyun 	{"AuxOut Mux", "Speaker Mix",			"Speaker Mix"},
547*4882a593Smuzhiyun 	{"AuxOut Mux", "Mono Mix",			"Mono Mix"},
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	/* output pga */
550*4882a593Smuzhiyun 	{"HPL", NULL,					"Left Headphone"},
551*4882a593Smuzhiyun 	{"Left Headphone", NULL,			"Left Headphone Mux"},
552*4882a593Smuzhiyun 	{"HPR", NULL,					"Right Headphone"},
553*4882a593Smuzhiyun 	{"Right Headphone", NULL,			"Right Headphone Mux"},
554*4882a593Smuzhiyun 	{"Aux Out", NULL,				"AuxOut Mux"},
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	/* input pga */
557*4882a593Smuzhiyun 	{"Left LineIn", NULL,				"LINEINL"},
558*4882a593Smuzhiyun 	{"Right LineIn", NULL,				"LINEINR"},
559*4882a593Smuzhiyun 	{"Phone", NULL,				"PHONEP"},
560*4882a593Smuzhiyun 	{"MIC1 Pre Amp", NULL,				"MIC1"},
561*4882a593Smuzhiyun 	{"MIC2 Pre Amp", NULL,				"MIC2"},
562*4882a593Smuzhiyun 	{"MIC1 PGA", NULL,				"MIC1 Pre Amp"},
563*4882a593Smuzhiyun 	{"MIC2 PGA", NULL,				"MIC2 Pre Amp"},
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	/* left ADC */
566*4882a593Smuzhiyun 	{"Left ADC", NULL,				"Left Capture Mix"},
567*4882a593Smuzhiyun 	{"DMICL Mix", "DMICL2ADC Capture Switch", "DMICDAT"},
568*4882a593Smuzhiyun 	{"Left ADC", NULL,				"DMICL Mix"},
569*4882a593Smuzhiyun 	{"ADCLR", NULL,					"Left ADC"},
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	/* right ADC */
572*4882a593Smuzhiyun 	{"Right ADC", NULL, "Right Capture Mix"},
573*4882a593Smuzhiyun 	{"DMICR Mix", "DMICR2ADC Capture Switch", "DMICDAT"},
574*4882a593Smuzhiyun 	{"Right ADC", NULL, "DMICR Mix"},
575*4882a593Smuzhiyun 	{"ADCR Mux", "Stereo ADC", "Right ADC"},
576*4882a593Smuzhiyun 	{"ADCR Mux", "Voice ADC", "Right ADC"},
577*4882a593Smuzhiyun 	{"ADCLR", NULL, "ADCR Mux"},
578*4882a593Smuzhiyun 	{"VAIFTX", NULL, "ADCR Mux"},
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun 	/* Digital I2S out */
581*4882a593Smuzhiyun 	{"I2SOut Mux", "ADC LR", "ADCLR"},
582*4882a593Smuzhiyun 	{"I2SOut Mux", "Voice Stereo Digital", "VAIFRX"},
583*4882a593Smuzhiyun 	{"AIFTXL", NULL, "I2SOut Mux"},
584*4882a593Smuzhiyun 	{"AIFTXR", NULL, "I2SOut Mux"},
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	/* Voice Mix */
587*4882a593Smuzhiyun 	{"Voice DAC", NULL, "VAIFRX"},
588*4882a593Smuzhiyun 	{"Voice Mix", NULL, "Voice DAC"},
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	/* Speaker Output */
591*4882a593Smuzhiyun 	{"SpeakerOut N Mux", "RN/-R",			"Left Speaker"},
592*4882a593Smuzhiyun 	{"SpeakerOut N Mux", "RP/+R",			"Left Speaker"},
593*4882a593Smuzhiyun 	{"SpeakerOut N Mux", "LN/-R",			"Left Speaker"},
594*4882a593Smuzhiyun 	{"SpeakerOut N Mux", "Mute",			"Vmid"},
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 	{"SpeakerOut N Mux", "RN/-R",			"Right Speaker"},
597*4882a593Smuzhiyun 	{"SpeakerOut N Mux", "RP/+R",			"Right Speaker"},
598*4882a593Smuzhiyun 	{"SpeakerOut N Mux", "LN/-R",			"Right Speaker"},
599*4882a593Smuzhiyun 	{"SpeakerOut N Mux", "Mute",			"Vmid"},
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun 	{"AB Amp", NULL,				"SpeakerOut Mux"},
602*4882a593Smuzhiyun 	{"D Amp", NULL,					"SpeakerOut Mux"},
603*4882a593Smuzhiyun 	{"AB-D Amp Mux", "AB Amp",			"AB Amp"},
604*4882a593Smuzhiyun 	{"AB-D Amp Mux", "D Amp",			"D Amp"},
605*4882a593Smuzhiyun 	{"Left Speaker", NULL,				"AB-D Amp Mux"},
606*4882a593Smuzhiyun 	{"Right Speaker", NULL,				"AB-D Amp Mux"},
607*4882a593Smuzhiyun 
608*4882a593Smuzhiyun 	{"SPKOUT", NULL,				"Left Speaker"},
609*4882a593Smuzhiyun 	{"SPKOUT", NULL,				"Right Speaker"},
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	{"SPKOUTN", NULL,				"SpeakerOut N Mux"},
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun };
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun /* PLL divisors */
616*4882a593Smuzhiyun struct _pll_div {
617*4882a593Smuzhiyun 	u32 pll_in;
618*4882a593Smuzhiyun 	u32 pll_out;
619*4882a593Smuzhiyun 	u16 regvalue;
620*4882a593Smuzhiyun };
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun /* Note : pll code from original alc5632 driver. Not sure of how good it is */
623*4882a593Smuzhiyun /* useful only for master mode */
624*4882a593Smuzhiyun static const struct _pll_div codec_master_pll_div[] = {
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	{  2048000,  8192000,	0x0ea0},
627*4882a593Smuzhiyun 	{  3686400,  8192000,	0x4e27},
628*4882a593Smuzhiyun 	{ 12000000,  8192000,	0x456b},
629*4882a593Smuzhiyun 	{ 13000000,  8192000,	0x495f},
630*4882a593Smuzhiyun 	{ 13100000,  8192000,	0x0320},
631*4882a593Smuzhiyun 	{  2048000,  11289600,	0xf637},
632*4882a593Smuzhiyun 	{  3686400,  11289600,	0x2f22},
633*4882a593Smuzhiyun 	{ 12000000,  11289600,	0x3e2f},
634*4882a593Smuzhiyun 	{ 13000000,  11289600,	0x4d5b},
635*4882a593Smuzhiyun 	{ 13100000,  11289600,	0x363b},
636*4882a593Smuzhiyun 	{  2048000,  16384000,	0x1ea0},
637*4882a593Smuzhiyun 	{  3686400,  16384000,	0x9e27},
638*4882a593Smuzhiyun 	{ 12000000,  16384000,	0x452b},
639*4882a593Smuzhiyun 	{ 13000000,  16384000,	0x542f},
640*4882a593Smuzhiyun 	{ 13100000,  16384000,	0x03a0},
641*4882a593Smuzhiyun 	{  2048000,  16934400,	0xe625},
642*4882a593Smuzhiyun 	{  3686400,  16934400,	0x9126},
643*4882a593Smuzhiyun 	{ 12000000,  16934400,	0x4d2c},
644*4882a593Smuzhiyun 	{ 13000000,  16934400,	0x742f},
645*4882a593Smuzhiyun 	{ 13100000,  16934400,	0x3c27},
646*4882a593Smuzhiyun 	{  2048000,  22579200,	0x2aa0},
647*4882a593Smuzhiyun 	{  3686400,  22579200,	0x2f20},
648*4882a593Smuzhiyun 	{ 12000000,  22579200,	0x7e2f},
649*4882a593Smuzhiyun 	{ 13000000,  22579200,	0x742f},
650*4882a593Smuzhiyun 	{ 13100000,  22579200,	0x3c27},
651*4882a593Smuzhiyun 	{  2048000,  24576000,	0x2ea0},
652*4882a593Smuzhiyun 	{  3686400,  24576000,	0xee27},
653*4882a593Smuzhiyun 	{ 12000000,  24576000,	0x2915},
654*4882a593Smuzhiyun 	{ 13000000,  24576000,	0x772e},
655*4882a593Smuzhiyun 	{ 13100000,  24576000,	0x0d20},
656*4882a593Smuzhiyun };
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun /* FOUT = MCLK*(N+2)/((M+2)*(K+2))
659*4882a593Smuzhiyun    N: bit 15:8 (div 2 .. div 257)
660*4882a593Smuzhiyun    K: bit  6:4 typical 2
661*4882a593Smuzhiyun    M: bit  3:0 (div 2 .. div 17)
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun    same as for 5623 - thanks!
664*4882a593Smuzhiyun */
665*4882a593Smuzhiyun 
666*4882a593Smuzhiyun static const struct _pll_div codec_slave_pll_div[] = {
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 	{  1024000,  16384000,  0x3ea0},
669*4882a593Smuzhiyun 	{  1411200,  22579200,	0x3ea0},
670*4882a593Smuzhiyun 	{  1536000,  24576000,	0x3ea0},
671*4882a593Smuzhiyun 	{  2048000,  16384000,  0x1ea0},
672*4882a593Smuzhiyun 	{  2822400,  22579200,	0x1ea0},
673*4882a593Smuzhiyun 	{  3072000,  24576000,	0x1ea0},
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun };
676*4882a593Smuzhiyun 
alc5632_set_dai_pll(struct snd_soc_dai * codec_dai,int pll_id,int source,unsigned int freq_in,unsigned int freq_out)677*4882a593Smuzhiyun static int alc5632_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
678*4882a593Smuzhiyun 		int source, unsigned int freq_in, unsigned int freq_out)
679*4882a593Smuzhiyun {
680*4882a593Smuzhiyun 	int i;
681*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
682*4882a593Smuzhiyun 	int gbl_clk = 0, pll_div = 0;
683*4882a593Smuzhiyun 	u16 reg;
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun 	if (pll_id < ALC5632_PLL_FR_MCLK || pll_id > ALC5632_PLL_FR_VBCLK)
686*4882a593Smuzhiyun 		return -EINVAL;
687*4882a593Smuzhiyun 
688*4882a593Smuzhiyun 	/* Disable PLL power */
689*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD2,
690*4882a593Smuzhiyun 				ALC5632_PWR_ADD2_PLL1,
691*4882a593Smuzhiyun 				0);
692*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD2,
693*4882a593Smuzhiyun 				ALC5632_PWR_ADD2_PLL2,
694*4882a593Smuzhiyun 				0);
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun 	/* pll is not used in slave mode */
697*4882a593Smuzhiyun 	reg = snd_soc_component_read(component, ALC5632_DAI_CONTROL);
698*4882a593Smuzhiyun 	if (reg & ALC5632_DAI_SDP_SLAVE_MODE)
699*4882a593Smuzhiyun 		return 0;
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun 	if (!freq_in || !freq_out)
702*4882a593Smuzhiyun 		return 0;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	switch (pll_id) {
705*4882a593Smuzhiyun 	case ALC5632_PLL_FR_MCLK:
706*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++) {
707*4882a593Smuzhiyun 			if (codec_master_pll_div[i].pll_in == freq_in
708*4882a593Smuzhiyun 			   && codec_master_pll_div[i].pll_out == freq_out) {
709*4882a593Smuzhiyun 				/* PLL source from MCLK */
710*4882a593Smuzhiyun 				pll_div  = codec_master_pll_div[i].regvalue;
711*4882a593Smuzhiyun 				break;
712*4882a593Smuzhiyun 			}
713*4882a593Smuzhiyun 		}
714*4882a593Smuzhiyun 		break;
715*4882a593Smuzhiyun 	case ALC5632_PLL_FR_BCLK:
716*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++) {
717*4882a593Smuzhiyun 			if (codec_slave_pll_div[i].pll_in == freq_in
718*4882a593Smuzhiyun 			   && codec_slave_pll_div[i].pll_out == freq_out) {
719*4882a593Smuzhiyun 				/* PLL source from Bitclk */
720*4882a593Smuzhiyun 				gbl_clk = ALC5632_PLL_FR_BCLK;
721*4882a593Smuzhiyun 				pll_div = codec_slave_pll_div[i].regvalue;
722*4882a593Smuzhiyun 				break;
723*4882a593Smuzhiyun 			}
724*4882a593Smuzhiyun 		}
725*4882a593Smuzhiyun 		break;
726*4882a593Smuzhiyun 	case ALC5632_PLL_FR_VBCLK:
727*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++) {
728*4882a593Smuzhiyun 			if (codec_slave_pll_div[i].pll_in == freq_in
729*4882a593Smuzhiyun 			   && codec_slave_pll_div[i].pll_out == freq_out) {
730*4882a593Smuzhiyun 				/* PLL source from voice clock */
731*4882a593Smuzhiyun 				gbl_clk = ALC5632_PLL_FR_VBCLK;
732*4882a593Smuzhiyun 				pll_div = codec_slave_pll_div[i].regvalue;
733*4882a593Smuzhiyun 				break;
734*4882a593Smuzhiyun 			}
735*4882a593Smuzhiyun 		}
736*4882a593Smuzhiyun 		break;
737*4882a593Smuzhiyun 	default:
738*4882a593Smuzhiyun 		return -EINVAL;
739*4882a593Smuzhiyun 	}
740*4882a593Smuzhiyun 
741*4882a593Smuzhiyun 	if (!pll_div)
742*4882a593Smuzhiyun 		return -EINVAL;
743*4882a593Smuzhiyun 
744*4882a593Smuzhiyun 	/* choose MCLK/BCLK/VBCLK */
745*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5632_GPCR2, gbl_clk);
746*4882a593Smuzhiyun 	/* choose PLL1 clock rate */
747*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5632_PLL1_CTRL, pll_div);
748*4882a593Smuzhiyun 	/* enable PLL1 */
749*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD2,
750*4882a593Smuzhiyun 				ALC5632_PWR_ADD2_PLL1,
751*4882a593Smuzhiyun 				ALC5632_PWR_ADD2_PLL1);
752*4882a593Smuzhiyun 	/* enable PLL2 */
753*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD2,
754*4882a593Smuzhiyun 				ALC5632_PWR_ADD2_PLL2,
755*4882a593Smuzhiyun 				ALC5632_PWR_ADD2_PLL2);
756*4882a593Smuzhiyun 	/* use PLL1 as main SYSCLK */
757*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5632_GPCR1,
758*4882a593Smuzhiyun 			ALC5632_GPCR1_CLK_SYS_SRC_SEL_PLL1,
759*4882a593Smuzhiyun 			ALC5632_GPCR1_CLK_SYS_SRC_SEL_PLL1);
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 	return 0;
762*4882a593Smuzhiyun }
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun struct _coeff_div {
765*4882a593Smuzhiyun 	u16 fs;
766*4882a593Smuzhiyun 	u16 regvalue;
767*4882a593Smuzhiyun };
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun /* codec hifi mclk (after PLL) clock divider coefficients */
770*4882a593Smuzhiyun /* values inspired from column BCLK=32Fs of Appendix A table */
771*4882a593Smuzhiyun static const struct _coeff_div coeff_div[] = {
772*4882a593Smuzhiyun 	{512*1, 0x3075},
773*4882a593Smuzhiyun };
774*4882a593Smuzhiyun 
get_coeff(struct snd_soc_component * component,int rate)775*4882a593Smuzhiyun static int get_coeff(struct snd_soc_component *component, int rate)
776*4882a593Smuzhiyun {
777*4882a593Smuzhiyun 	struct alc5632_priv *alc5632 = snd_soc_component_get_drvdata(component);
778*4882a593Smuzhiyun 	int i;
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
781*4882a593Smuzhiyun 		if (coeff_div[i].fs * rate == alc5632->sysclk)
782*4882a593Smuzhiyun 			return i;
783*4882a593Smuzhiyun 	}
784*4882a593Smuzhiyun 	return -EINVAL;
785*4882a593Smuzhiyun }
786*4882a593Smuzhiyun 
787*4882a593Smuzhiyun /*
788*4882a593Smuzhiyun  * Clock after PLL and dividers
789*4882a593Smuzhiyun  */
alc5632_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)790*4882a593Smuzhiyun static int alc5632_set_dai_sysclk(struct snd_soc_dai *codec_dai,
791*4882a593Smuzhiyun 		int clk_id, unsigned int freq, int dir)
792*4882a593Smuzhiyun {
793*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
794*4882a593Smuzhiyun 	struct alc5632_priv *alc5632 = snd_soc_component_get_drvdata(component);
795*4882a593Smuzhiyun 
796*4882a593Smuzhiyun 	switch (freq) {
797*4882a593Smuzhiyun 	case  4096000:
798*4882a593Smuzhiyun 	case  8192000:
799*4882a593Smuzhiyun 	case 11289600:
800*4882a593Smuzhiyun 	case 12288000:
801*4882a593Smuzhiyun 	case 16384000:
802*4882a593Smuzhiyun 	case 16934400:
803*4882a593Smuzhiyun 	case 18432000:
804*4882a593Smuzhiyun 	case 22579200:
805*4882a593Smuzhiyun 	case 24576000:
806*4882a593Smuzhiyun 		alc5632->sysclk = freq;
807*4882a593Smuzhiyun 		return 0;
808*4882a593Smuzhiyun 	}
809*4882a593Smuzhiyun 	return -EINVAL;
810*4882a593Smuzhiyun }
811*4882a593Smuzhiyun 
alc5632_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)812*4882a593Smuzhiyun static int alc5632_set_dai_fmt(struct snd_soc_dai *codec_dai,
813*4882a593Smuzhiyun 		unsigned int fmt)
814*4882a593Smuzhiyun {
815*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
816*4882a593Smuzhiyun 	u16 iface = 0;
817*4882a593Smuzhiyun 
818*4882a593Smuzhiyun 	/* set master/slave audio interface */
819*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
820*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBM_CFM:
821*4882a593Smuzhiyun 		iface = ALC5632_DAI_SDP_MASTER_MODE;
822*4882a593Smuzhiyun 		break;
823*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBS_CFS:
824*4882a593Smuzhiyun 		iface = ALC5632_DAI_SDP_SLAVE_MODE;
825*4882a593Smuzhiyun 		break;
826*4882a593Smuzhiyun 	default:
827*4882a593Smuzhiyun 		return -EINVAL;
828*4882a593Smuzhiyun 	}
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun 	/* interface format */
831*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
832*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
833*4882a593Smuzhiyun 		iface |= ALC5632_DAI_I2S_DF_I2S;
834*4882a593Smuzhiyun 		break;
835*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
836*4882a593Smuzhiyun 		iface |= ALC5632_DAI_I2S_DF_LEFT;
837*4882a593Smuzhiyun 		break;
838*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_A:
839*4882a593Smuzhiyun 		iface |= ALC5632_DAI_I2S_DF_PCM_A;
840*4882a593Smuzhiyun 		break;
841*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_B:
842*4882a593Smuzhiyun 		iface |= ALC5632_DAI_I2S_DF_PCM_B;
843*4882a593Smuzhiyun 		break;
844*4882a593Smuzhiyun 	default:
845*4882a593Smuzhiyun 		return -EINVAL;
846*4882a593Smuzhiyun 	}
847*4882a593Smuzhiyun 
848*4882a593Smuzhiyun 	/* clock inversion */
849*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
850*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_NF:
851*4882a593Smuzhiyun 		break;
852*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_IF:
853*4882a593Smuzhiyun 		iface |= ALC5632_DAI_MAIN_I2S_BCLK_POL_CTRL;
854*4882a593Smuzhiyun 		break;
855*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_NF:
856*4882a593Smuzhiyun 		iface |= ALC5632_DAI_MAIN_I2S_BCLK_POL_CTRL;
857*4882a593Smuzhiyun 		break;
858*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_IF:
859*4882a593Smuzhiyun 		break;
860*4882a593Smuzhiyun 	default:
861*4882a593Smuzhiyun 		return -EINVAL;
862*4882a593Smuzhiyun 	}
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 	return snd_soc_component_write(component, ALC5632_DAI_CONTROL, iface);
865*4882a593Smuzhiyun }
866*4882a593Smuzhiyun 
alc5632_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)867*4882a593Smuzhiyun static int alc5632_pcm_hw_params(struct snd_pcm_substream *substream,
868*4882a593Smuzhiyun 		struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
869*4882a593Smuzhiyun {
870*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
871*4882a593Smuzhiyun 	int coeff, rate;
872*4882a593Smuzhiyun 	u16 iface;
873*4882a593Smuzhiyun 
874*4882a593Smuzhiyun 	iface = snd_soc_component_read(component, ALC5632_DAI_CONTROL);
875*4882a593Smuzhiyun 	iface &= ~ALC5632_DAI_I2S_DL_MASK;
876*4882a593Smuzhiyun 
877*4882a593Smuzhiyun 	/* bit size */
878*4882a593Smuzhiyun 	switch (params_width(params)) {
879*4882a593Smuzhiyun 	case 16:
880*4882a593Smuzhiyun 		iface |= ALC5632_DAI_I2S_DL_16;
881*4882a593Smuzhiyun 		break;
882*4882a593Smuzhiyun 	case 20:
883*4882a593Smuzhiyun 		iface |= ALC5632_DAI_I2S_DL_20;
884*4882a593Smuzhiyun 		break;
885*4882a593Smuzhiyun 	case 24:
886*4882a593Smuzhiyun 		iface |= ALC5632_DAI_I2S_DL_24;
887*4882a593Smuzhiyun 		break;
888*4882a593Smuzhiyun 	default:
889*4882a593Smuzhiyun 		return -EINVAL;
890*4882a593Smuzhiyun 	}
891*4882a593Smuzhiyun 
892*4882a593Smuzhiyun 	/* set iface & srate */
893*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5632_DAI_CONTROL, iface);
894*4882a593Smuzhiyun 	rate = params_rate(params);
895*4882a593Smuzhiyun 	coeff = get_coeff(component, rate);
896*4882a593Smuzhiyun 	if (coeff < 0)
897*4882a593Smuzhiyun 		return -EINVAL;
898*4882a593Smuzhiyun 
899*4882a593Smuzhiyun 	coeff = coeff_div[coeff].regvalue;
900*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5632_DAC_CLK_CTRL1, coeff);
901*4882a593Smuzhiyun 
902*4882a593Smuzhiyun 	return 0;
903*4882a593Smuzhiyun }
904*4882a593Smuzhiyun 
alc5632_mute(struct snd_soc_dai * dai,int mute,int direction)905*4882a593Smuzhiyun static int alc5632_mute(struct snd_soc_dai *dai, int mute, int direction)
906*4882a593Smuzhiyun {
907*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
908*4882a593Smuzhiyun 	u16 hp_mute = ALC5632_MISC_HP_DEPOP_MUTE_L
909*4882a593Smuzhiyun 						|ALC5632_MISC_HP_DEPOP_MUTE_R;
910*4882a593Smuzhiyun 	u16 mute_reg = snd_soc_component_read(component, ALC5632_MISC_CTRL) & ~hp_mute;
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun 	if (mute)
913*4882a593Smuzhiyun 		mute_reg |= hp_mute;
914*4882a593Smuzhiyun 
915*4882a593Smuzhiyun 	return snd_soc_component_write(component, ALC5632_MISC_CTRL, mute_reg);
916*4882a593Smuzhiyun }
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun #define ALC5632_ADD2_POWER_EN (ALC5632_PWR_ADD2_VREF)
919*4882a593Smuzhiyun 
920*4882a593Smuzhiyun #define ALC5632_ADD3_POWER_EN (ALC5632_PWR_ADD3_MIC1_BOOST_AD)
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun #define ALC5632_ADD1_POWER_EN \
923*4882a593Smuzhiyun 		(ALC5632_PWR_ADD1_DAC_REF \
924*4882a593Smuzhiyun 		| ALC5632_PWR_ADD1_SOFTGEN_EN \
925*4882a593Smuzhiyun 		| ALC5632_PWR_ADD1_HP_OUT_AMP \
926*4882a593Smuzhiyun 		| ALC5632_PWR_ADD1_HP_OUT_ENH_AMP \
927*4882a593Smuzhiyun 		| ALC5632_PWR_ADD1_MAIN_BIAS)
928*4882a593Smuzhiyun 
enable_power_depop(struct snd_soc_component * component)929*4882a593Smuzhiyun static void enable_power_depop(struct snd_soc_component *component)
930*4882a593Smuzhiyun {
931*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD1,
932*4882a593Smuzhiyun 				ALC5632_PWR_ADD1_SOFTGEN_EN,
933*4882a593Smuzhiyun 				ALC5632_PWR_ADD1_SOFTGEN_EN);
934*4882a593Smuzhiyun 
935*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD3,
936*4882a593Smuzhiyun 				ALC5632_ADD3_POWER_EN,
937*4882a593Smuzhiyun 				ALC5632_ADD3_POWER_EN);
938*4882a593Smuzhiyun 
939*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5632_MISC_CTRL,
940*4882a593Smuzhiyun 				ALC5632_MISC_HP_DEPOP_MODE2_EN,
941*4882a593Smuzhiyun 				ALC5632_MISC_HP_DEPOP_MODE2_EN);
942*4882a593Smuzhiyun 
943*4882a593Smuzhiyun 	/* "normal" mode: 0 @ 26 */
944*4882a593Smuzhiyun 	/* set all PR0-7 mixers to 0 */
945*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5632_PWR_DOWN_CTRL_STATUS,
946*4882a593Smuzhiyun 				ALC5632_PWR_DOWN_CTRL_STATUS_MASK,
947*4882a593Smuzhiyun 				0);
948*4882a593Smuzhiyun 
949*4882a593Smuzhiyun 	msleep(500);
950*4882a593Smuzhiyun 
951*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD2,
952*4882a593Smuzhiyun 				ALC5632_ADD2_POWER_EN,
953*4882a593Smuzhiyun 				ALC5632_ADD2_POWER_EN);
954*4882a593Smuzhiyun 
955*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD1,
956*4882a593Smuzhiyun 				ALC5632_ADD1_POWER_EN,
957*4882a593Smuzhiyun 				ALC5632_ADD1_POWER_EN);
958*4882a593Smuzhiyun 
959*4882a593Smuzhiyun 	/* disable HP Depop2 */
960*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5632_MISC_CTRL,
961*4882a593Smuzhiyun 				ALC5632_MISC_HP_DEPOP_MODE2_EN,
962*4882a593Smuzhiyun 				0);
963*4882a593Smuzhiyun 
964*4882a593Smuzhiyun }
965*4882a593Smuzhiyun 
alc5632_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)966*4882a593Smuzhiyun static int alc5632_set_bias_level(struct snd_soc_component *component,
967*4882a593Smuzhiyun 				      enum snd_soc_bias_level level)
968*4882a593Smuzhiyun {
969*4882a593Smuzhiyun 	switch (level) {
970*4882a593Smuzhiyun 	case SND_SOC_BIAS_ON:
971*4882a593Smuzhiyun 		enable_power_depop(component);
972*4882a593Smuzhiyun 		break;
973*4882a593Smuzhiyun 	case SND_SOC_BIAS_PREPARE:
974*4882a593Smuzhiyun 		break;
975*4882a593Smuzhiyun 	case SND_SOC_BIAS_STANDBY:
976*4882a593Smuzhiyun 		/* everything off except vref/vmid, */
977*4882a593Smuzhiyun 		snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD1,
978*4882a593Smuzhiyun 				ALC5632_PWR_MANAG_ADD1_MASK,
979*4882a593Smuzhiyun 				ALC5632_PWR_ADD1_MAIN_BIAS);
980*4882a593Smuzhiyun 		snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD2,
981*4882a593Smuzhiyun 				ALC5632_PWR_MANAG_ADD2_MASK,
982*4882a593Smuzhiyun 				ALC5632_PWR_ADD2_VREF);
983*4882a593Smuzhiyun 		/* "normal" mode: 0 @ 26 */
984*4882a593Smuzhiyun 		snd_soc_component_update_bits(component, ALC5632_PWR_DOWN_CTRL_STATUS,
985*4882a593Smuzhiyun 				ALC5632_PWR_DOWN_CTRL_STATUS_MASK,
986*4882a593Smuzhiyun 				0xffff ^ (ALC5632_PWR_VREF_PR3
987*4882a593Smuzhiyun 				| ALC5632_PWR_VREF_PR2));
988*4882a593Smuzhiyun 		break;
989*4882a593Smuzhiyun 	case SND_SOC_BIAS_OFF:
990*4882a593Smuzhiyun 		/* everything off, dac mute, inactive */
991*4882a593Smuzhiyun 		snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD2,
992*4882a593Smuzhiyun 				ALC5632_PWR_MANAG_ADD2_MASK, 0);
993*4882a593Smuzhiyun 		snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD3,
994*4882a593Smuzhiyun 				ALC5632_PWR_MANAG_ADD3_MASK, 0);
995*4882a593Smuzhiyun 		snd_soc_component_update_bits(component, ALC5632_PWR_MANAG_ADD1,
996*4882a593Smuzhiyun 				ALC5632_PWR_MANAG_ADD1_MASK, 0);
997*4882a593Smuzhiyun 		break;
998*4882a593Smuzhiyun 	}
999*4882a593Smuzhiyun 	return 0;
1000*4882a593Smuzhiyun }
1001*4882a593Smuzhiyun 
1002*4882a593Smuzhiyun #define ALC5632_FORMATS	(SNDRV_PCM_FMTBIT_S16_LE \
1003*4882a593Smuzhiyun 			| SNDRV_PCM_FMTBIT_S24_LE \
1004*4882a593Smuzhiyun 			| SNDRV_PCM_FMTBIT_S32_LE)
1005*4882a593Smuzhiyun 
1006*4882a593Smuzhiyun static const struct snd_soc_dai_ops alc5632_dai_ops = {
1007*4882a593Smuzhiyun 		.hw_params = alc5632_pcm_hw_params,
1008*4882a593Smuzhiyun 		.mute_stream = alc5632_mute,
1009*4882a593Smuzhiyun 		.set_fmt = alc5632_set_dai_fmt,
1010*4882a593Smuzhiyun 		.set_sysclk = alc5632_set_dai_sysclk,
1011*4882a593Smuzhiyun 		.set_pll = alc5632_set_dai_pll,
1012*4882a593Smuzhiyun 		.no_capture_mute = 1,
1013*4882a593Smuzhiyun };
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun static struct snd_soc_dai_driver alc5632_dai = {
1016*4882a593Smuzhiyun 	.name = "alc5632-hifi",
1017*4882a593Smuzhiyun 	.playback = {
1018*4882a593Smuzhiyun 		.stream_name = "HiFi Playback",
1019*4882a593Smuzhiyun 		.channels_min = 1,
1020*4882a593Smuzhiyun 		.channels_max = 2,
1021*4882a593Smuzhiyun 		.rate_min =	8000,
1022*4882a593Smuzhiyun 		.rate_max =	48000,
1023*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_8000_48000,
1024*4882a593Smuzhiyun 		.formats = ALC5632_FORMATS,},
1025*4882a593Smuzhiyun 	.capture = {
1026*4882a593Smuzhiyun 		.stream_name = "HiFi Capture",
1027*4882a593Smuzhiyun 		.channels_min = 1,
1028*4882a593Smuzhiyun 		.channels_max = 2,
1029*4882a593Smuzhiyun 		.rate_min =	8000,
1030*4882a593Smuzhiyun 		.rate_max =	48000,
1031*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_8000_48000,
1032*4882a593Smuzhiyun 		.formats = ALC5632_FORMATS,},
1033*4882a593Smuzhiyun 
1034*4882a593Smuzhiyun 	.ops = &alc5632_dai_ops,
1035*4882a593Smuzhiyun 	.symmetric_rates = 1,
1036*4882a593Smuzhiyun };
1037*4882a593Smuzhiyun 
1038*4882a593Smuzhiyun #ifdef CONFIG_PM
alc5632_resume(struct snd_soc_component * component)1039*4882a593Smuzhiyun static int alc5632_resume(struct snd_soc_component *component)
1040*4882a593Smuzhiyun {
1041*4882a593Smuzhiyun 	struct alc5632_priv *alc5632 = snd_soc_component_get_drvdata(component);
1042*4882a593Smuzhiyun 
1043*4882a593Smuzhiyun 	regcache_sync(alc5632->regmap);
1044*4882a593Smuzhiyun 
1045*4882a593Smuzhiyun 	return 0;
1046*4882a593Smuzhiyun }
1047*4882a593Smuzhiyun #else
1048*4882a593Smuzhiyun #define	alc5632_resume	NULL
1049*4882a593Smuzhiyun #endif
1050*4882a593Smuzhiyun 
alc5632_probe(struct snd_soc_component * component)1051*4882a593Smuzhiyun static int alc5632_probe(struct snd_soc_component *component)
1052*4882a593Smuzhiyun {
1053*4882a593Smuzhiyun 	struct alc5632_priv *alc5632 = snd_soc_component_get_drvdata(component);
1054*4882a593Smuzhiyun 
1055*4882a593Smuzhiyun 	switch (alc5632->id) {
1056*4882a593Smuzhiyun 	case 0x5c:
1057*4882a593Smuzhiyun 		snd_soc_add_component_controls(component, alc5632_vol_snd_controls,
1058*4882a593Smuzhiyun 			ARRAY_SIZE(alc5632_vol_snd_controls));
1059*4882a593Smuzhiyun 		break;
1060*4882a593Smuzhiyun 	default:
1061*4882a593Smuzhiyun 		return -EINVAL;
1062*4882a593Smuzhiyun 	}
1063*4882a593Smuzhiyun 
1064*4882a593Smuzhiyun 	return 0;
1065*4882a593Smuzhiyun }
1066*4882a593Smuzhiyun 
1067*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_device_alc5632 = {
1068*4882a593Smuzhiyun 	.probe			= alc5632_probe,
1069*4882a593Smuzhiyun 	.resume			= alc5632_resume,
1070*4882a593Smuzhiyun 	.set_bias_level		= alc5632_set_bias_level,
1071*4882a593Smuzhiyun 	.controls		= alc5632_snd_controls,
1072*4882a593Smuzhiyun 	.num_controls		= ARRAY_SIZE(alc5632_snd_controls),
1073*4882a593Smuzhiyun 	.dapm_widgets		= alc5632_dapm_widgets,
1074*4882a593Smuzhiyun 	.num_dapm_widgets	= ARRAY_SIZE(alc5632_dapm_widgets),
1075*4882a593Smuzhiyun 	.dapm_routes		= alc5632_dapm_routes,
1076*4882a593Smuzhiyun 	.num_dapm_routes	= ARRAY_SIZE(alc5632_dapm_routes),
1077*4882a593Smuzhiyun 	.suspend_bias_off	= 1,
1078*4882a593Smuzhiyun 	.idle_bias_on		= 1,
1079*4882a593Smuzhiyun 	.use_pmdown_time	= 1,
1080*4882a593Smuzhiyun 	.endianness		= 1,
1081*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
1082*4882a593Smuzhiyun };
1083*4882a593Smuzhiyun 
1084*4882a593Smuzhiyun static const struct regmap_config alc5632_regmap = {
1085*4882a593Smuzhiyun 	.reg_bits = 8,
1086*4882a593Smuzhiyun 	.val_bits = 16,
1087*4882a593Smuzhiyun 
1088*4882a593Smuzhiyun 	.max_register = ALC5632_MAX_REGISTER,
1089*4882a593Smuzhiyun 	.reg_defaults = alc5632_reg_defaults,
1090*4882a593Smuzhiyun 	.num_reg_defaults = ARRAY_SIZE(alc5632_reg_defaults),
1091*4882a593Smuzhiyun 	.volatile_reg = alc5632_volatile_register,
1092*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
1093*4882a593Smuzhiyun };
1094*4882a593Smuzhiyun 
1095*4882a593Smuzhiyun /*
1096*4882a593Smuzhiyun  * alc5632 2 wire address is determined by A1 pin
1097*4882a593Smuzhiyun  * state during powerup.
1098*4882a593Smuzhiyun  *    low  = 0x1a
1099*4882a593Smuzhiyun  *    high = 0x1b
1100*4882a593Smuzhiyun  */
alc5632_i2c_probe(struct i2c_client * client,const struct i2c_device_id * id)1101*4882a593Smuzhiyun static int alc5632_i2c_probe(struct i2c_client *client,
1102*4882a593Smuzhiyun 			     const struct i2c_device_id *id)
1103*4882a593Smuzhiyun {
1104*4882a593Smuzhiyun 	struct alc5632_priv *alc5632;
1105*4882a593Smuzhiyun 	int ret, ret1, ret2;
1106*4882a593Smuzhiyun 	unsigned int vid1, vid2;
1107*4882a593Smuzhiyun 
1108*4882a593Smuzhiyun 	alc5632 = devm_kzalloc(&client->dev,
1109*4882a593Smuzhiyun 			 sizeof(struct alc5632_priv), GFP_KERNEL);
1110*4882a593Smuzhiyun 	if (alc5632 == NULL)
1111*4882a593Smuzhiyun 		return -ENOMEM;
1112*4882a593Smuzhiyun 
1113*4882a593Smuzhiyun 	i2c_set_clientdata(client, alc5632);
1114*4882a593Smuzhiyun 
1115*4882a593Smuzhiyun 	alc5632->regmap = devm_regmap_init_i2c(client, &alc5632_regmap);
1116*4882a593Smuzhiyun 	if (IS_ERR(alc5632->regmap)) {
1117*4882a593Smuzhiyun 		ret = PTR_ERR(alc5632->regmap);
1118*4882a593Smuzhiyun 		dev_err(&client->dev, "regmap_init() failed: %d\n", ret);
1119*4882a593Smuzhiyun 		return ret;
1120*4882a593Smuzhiyun 	}
1121*4882a593Smuzhiyun 
1122*4882a593Smuzhiyun 	ret1 = regmap_read(alc5632->regmap, ALC5632_VENDOR_ID1, &vid1);
1123*4882a593Smuzhiyun 	ret2 = regmap_read(alc5632->regmap, ALC5632_VENDOR_ID2, &vid2);
1124*4882a593Smuzhiyun 	if (ret1 != 0 || ret2 != 0) {
1125*4882a593Smuzhiyun 		dev_err(&client->dev,
1126*4882a593Smuzhiyun 		"Failed to read chip ID: ret1=%d, ret2=%d\n", ret1, ret2);
1127*4882a593Smuzhiyun 		return -EIO;
1128*4882a593Smuzhiyun 	}
1129*4882a593Smuzhiyun 
1130*4882a593Smuzhiyun 	vid2 >>= 8;
1131*4882a593Smuzhiyun 
1132*4882a593Smuzhiyun 	if ((vid1 != 0x10EC) || (vid2 != id->driver_data)) {
1133*4882a593Smuzhiyun 		dev_err(&client->dev,
1134*4882a593Smuzhiyun 		"Device is not a ALC5632: VID1=0x%x, VID2=0x%x\n", vid1, vid2);
1135*4882a593Smuzhiyun 		return -EINVAL;
1136*4882a593Smuzhiyun 	}
1137*4882a593Smuzhiyun 
1138*4882a593Smuzhiyun 	ret = alc5632_reset(alc5632->regmap);
1139*4882a593Smuzhiyun 	if (ret < 0) {
1140*4882a593Smuzhiyun 		dev_err(&client->dev, "Failed to issue reset\n");
1141*4882a593Smuzhiyun 		return ret;
1142*4882a593Smuzhiyun 	}
1143*4882a593Smuzhiyun 
1144*4882a593Smuzhiyun 	alc5632->id = vid2;
1145*4882a593Smuzhiyun 	switch (alc5632->id) {
1146*4882a593Smuzhiyun 	case 0x5c:
1147*4882a593Smuzhiyun 		alc5632_dai.name = "alc5632-hifi";
1148*4882a593Smuzhiyun 		break;
1149*4882a593Smuzhiyun 	default:
1150*4882a593Smuzhiyun 		return -EINVAL;
1151*4882a593Smuzhiyun 	}
1152*4882a593Smuzhiyun 
1153*4882a593Smuzhiyun 	ret = devm_snd_soc_register_component(&client->dev,
1154*4882a593Smuzhiyun 		&soc_component_device_alc5632, &alc5632_dai, 1);
1155*4882a593Smuzhiyun 
1156*4882a593Smuzhiyun 	if (ret < 0) {
1157*4882a593Smuzhiyun 		dev_err(&client->dev, "Failed to register component: %d\n", ret);
1158*4882a593Smuzhiyun 		return ret;
1159*4882a593Smuzhiyun 	}
1160*4882a593Smuzhiyun 
1161*4882a593Smuzhiyun 	return ret;
1162*4882a593Smuzhiyun }
1163*4882a593Smuzhiyun 
1164*4882a593Smuzhiyun static const struct i2c_device_id alc5632_i2c_table[] = {
1165*4882a593Smuzhiyun 	{"alc5632", 0x5c},
1166*4882a593Smuzhiyun 	{}
1167*4882a593Smuzhiyun };
1168*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, alc5632_i2c_table);
1169*4882a593Smuzhiyun 
1170*4882a593Smuzhiyun static const struct of_device_id alc5632_of_match[] = {
1171*4882a593Smuzhiyun 	{ .compatible = "realtek,alc5632", },
1172*4882a593Smuzhiyun 	{ }
1173*4882a593Smuzhiyun };
1174*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, alc5632_of_match);
1175*4882a593Smuzhiyun 
1176*4882a593Smuzhiyun /* i2c codec control layer */
1177*4882a593Smuzhiyun static struct i2c_driver alc5632_i2c_driver = {
1178*4882a593Smuzhiyun 	.driver = {
1179*4882a593Smuzhiyun 		.name = "alc5632",
1180*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(alc5632_of_match),
1181*4882a593Smuzhiyun 	},
1182*4882a593Smuzhiyun 	.probe = alc5632_i2c_probe,
1183*4882a593Smuzhiyun 	.id_table = alc5632_i2c_table,
1184*4882a593Smuzhiyun };
1185*4882a593Smuzhiyun 
1186*4882a593Smuzhiyun module_i2c_driver(alc5632_i2c_driver);
1187*4882a593Smuzhiyun 
1188*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC ALC5632 driver");
1189*4882a593Smuzhiyun MODULE_AUTHOR("Leon Romanovsky <leon@leon.nu>");
1190*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1191