xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/alc5623.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * alc5623.c  --  alc562[123] ALSA Soc Audio driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2008 Realtek Microelectronics
6*4882a593Smuzhiyun  * Author: flove <flove@realtek.com> Ethan <eku@marvell.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Copyright 2010 Arnaud Patard <arnaud.patard@rtp-net.org>
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Based on WM8753.c
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/delay.h>
17*4882a593Smuzhiyun #include <linux/pm.h>
18*4882a593Smuzhiyun #include <linux/i2c.h>
19*4882a593Smuzhiyun #include <linux/regmap.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/of.h>
22*4882a593Smuzhiyun #include <sound/core.h>
23*4882a593Smuzhiyun #include <sound/pcm.h>
24*4882a593Smuzhiyun #include <sound/pcm_params.h>
25*4882a593Smuzhiyun #include <sound/tlv.h>
26*4882a593Smuzhiyun #include <sound/soc.h>
27*4882a593Smuzhiyun #include <sound/initval.h>
28*4882a593Smuzhiyun #include <sound/alc5623.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include "alc5623.h"
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun static int caps_charge = 2000;
33*4882a593Smuzhiyun module_param(caps_charge, int, 0);
34*4882a593Smuzhiyun MODULE_PARM_DESC(caps_charge, "ALC5623 cap charge time (msecs)");
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /* codec private data */
37*4882a593Smuzhiyun struct alc5623_priv {
38*4882a593Smuzhiyun 	struct regmap *regmap;
39*4882a593Smuzhiyun 	u8 id;
40*4882a593Smuzhiyun 	unsigned int sysclk;
41*4882a593Smuzhiyun 	unsigned int add_ctrl;
42*4882a593Smuzhiyun 	unsigned int jack_det_ctrl;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun 
alc5623_reset(struct snd_soc_component * component)45*4882a593Smuzhiyun static inline int alc5623_reset(struct snd_soc_component *component)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	return snd_soc_component_write(component, ALC5623_RESET, 0);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
amp_mixer_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)50*4882a593Smuzhiyun static int amp_mixer_event(struct snd_soc_dapm_widget *w,
51*4882a593Smuzhiyun 	struct snd_kcontrol *kcontrol, int event)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	/* to power-on/off class-d amp generators/speaker */
56*4882a593Smuzhiyun 	/* need to write to 'index-46h' register :        */
57*4882a593Smuzhiyun 	/* so write index num (here 0x46) to reg 0x6a     */
58*4882a593Smuzhiyun 	/* and then 0xffff/0 to reg 0x6c                  */
59*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5623_HID_CTRL_INDEX, 0x46);
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	switch (event) {
62*4882a593Smuzhiyun 	case SND_SOC_DAPM_PRE_PMU:
63*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5623_HID_CTRL_DATA, 0xFFFF);
64*4882a593Smuzhiyun 		break;
65*4882a593Smuzhiyun 	case SND_SOC_DAPM_POST_PMD:
66*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5623_HID_CTRL_DATA, 0);
67*4882a593Smuzhiyun 		break;
68*4882a593Smuzhiyun 	}
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	return 0;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun /*
74*4882a593Smuzhiyun  * ALC5623 Controls
75*4882a593Smuzhiyun  */
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(vol_tlv, -3450, 150, 0);
78*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(hp_tlv, -4650, 150, 0);
79*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adc_rec_tlv, -1650, 150, 0);
80*4882a593Smuzhiyun static const DECLARE_TLV_DB_RANGE(boost_tlv,
81*4882a593Smuzhiyun 	0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
82*4882a593Smuzhiyun 	1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
83*4882a593Smuzhiyun 	2, 2, TLV_DB_SCALE_ITEM(3000, 0, 0)
84*4882a593Smuzhiyun );
85*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(dig_tlv, 0, 600, 0);
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5621_vol_snd_controls[] = {
88*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Speaker Playback Volume",
89*4882a593Smuzhiyun 			ALC5623_SPK_OUT_VOL, 8, 0, 31, 1, hp_tlv),
90*4882a593Smuzhiyun 	SOC_DOUBLE("Speaker Playback Switch",
91*4882a593Smuzhiyun 			ALC5623_SPK_OUT_VOL, 15, 7, 1, 1),
92*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Headphone Playback Volume",
93*4882a593Smuzhiyun 			ALC5623_HP_OUT_VOL, 8, 0, 31, 1, hp_tlv),
94*4882a593Smuzhiyun 	SOC_DOUBLE("Headphone Playback Switch",
95*4882a593Smuzhiyun 			ALC5623_HP_OUT_VOL, 15, 7, 1, 1),
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5622_vol_snd_controls[] = {
99*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Speaker Playback Volume",
100*4882a593Smuzhiyun 			ALC5623_SPK_OUT_VOL, 8, 0, 31, 1, hp_tlv),
101*4882a593Smuzhiyun 	SOC_DOUBLE("Speaker Playback Switch",
102*4882a593Smuzhiyun 			ALC5623_SPK_OUT_VOL, 15, 7, 1, 1),
103*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Line Playback Volume",
104*4882a593Smuzhiyun 			ALC5623_HP_OUT_VOL, 8, 0, 31, 1, hp_tlv),
105*4882a593Smuzhiyun 	SOC_DOUBLE("Line Playback Switch",
106*4882a593Smuzhiyun 			ALC5623_HP_OUT_VOL, 15, 7, 1, 1),
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_vol_snd_controls[] = {
110*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Line Playback Volume",
111*4882a593Smuzhiyun 			ALC5623_SPK_OUT_VOL, 8, 0, 31, 1, hp_tlv),
112*4882a593Smuzhiyun 	SOC_DOUBLE("Line Playback Switch",
113*4882a593Smuzhiyun 			ALC5623_SPK_OUT_VOL, 15, 7, 1, 1),
114*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Headphone Playback Volume",
115*4882a593Smuzhiyun 			ALC5623_HP_OUT_VOL, 8, 0, 31, 1, hp_tlv),
116*4882a593Smuzhiyun 	SOC_DOUBLE("Headphone Playback Switch",
117*4882a593Smuzhiyun 			ALC5623_HP_OUT_VOL, 15, 7, 1, 1),
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_snd_controls[] = {
121*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Auxout Playback Volume",
122*4882a593Smuzhiyun 			ALC5623_MONO_AUX_OUT_VOL, 8, 0, 31, 1, hp_tlv),
123*4882a593Smuzhiyun 	SOC_DOUBLE("Auxout Playback Switch",
124*4882a593Smuzhiyun 			ALC5623_MONO_AUX_OUT_VOL, 15, 7, 1, 1),
125*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("PCM Playback Volume",
126*4882a593Smuzhiyun 			ALC5623_STEREO_DAC_VOL, 8, 0, 31, 1, vol_tlv),
127*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("AuxI Capture Volume",
128*4882a593Smuzhiyun 			ALC5623_AUXIN_VOL, 8, 0, 31, 1, vol_tlv),
129*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("LineIn Capture Volume",
130*4882a593Smuzhiyun 			ALC5623_LINE_IN_VOL, 8, 0, 31, 1, vol_tlv),
131*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Mic1 Capture Volume",
132*4882a593Smuzhiyun 			ALC5623_MIC_VOL, 8, 31, 1, vol_tlv),
133*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Mic2 Capture Volume",
134*4882a593Smuzhiyun 			ALC5623_MIC_VOL, 0, 31, 1, vol_tlv),
135*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Rec Capture Volume",
136*4882a593Smuzhiyun 			ALC5623_ADC_REC_GAIN, 7, 0, 31, 0, adc_rec_tlv),
137*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Mic 1 Boost Volume",
138*4882a593Smuzhiyun 			ALC5623_MIC_CTRL, 10, 2, 0, boost_tlv),
139*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Mic 2 Boost Volume",
140*4882a593Smuzhiyun 			ALC5623_MIC_CTRL, 8, 2, 0, boost_tlv),
141*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Digital Boost Volume",
142*4882a593Smuzhiyun 			ALC5623_ADD_CTRL_REG, 4, 3, 0, dig_tlv),
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun /*
146*4882a593Smuzhiyun  * DAPM Controls
147*4882a593Smuzhiyun  */
148*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_hp_mixer_controls[] = {
149*4882a593Smuzhiyun SOC_DAPM_SINGLE("LI2HP Playback Switch", ALC5623_LINE_IN_VOL, 15, 1, 1),
150*4882a593Smuzhiyun SOC_DAPM_SINGLE("AUXI2HP Playback Switch", ALC5623_AUXIN_VOL, 15, 1, 1),
151*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC12HP Playback Switch", ALC5623_MIC_ROUTING_CTRL, 15, 1, 1),
152*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC22HP Playback Switch", ALC5623_MIC_ROUTING_CTRL, 7, 1, 1),
153*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC2HP Playback Switch", ALC5623_STEREO_DAC_VOL, 15, 1, 1),
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_hpl_mixer_controls[] = {
157*4882a593Smuzhiyun SOC_DAPM_SINGLE("ADC2HP_L Playback Switch", ALC5623_ADC_REC_GAIN, 15, 1, 1),
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_hpr_mixer_controls[] = {
161*4882a593Smuzhiyun SOC_DAPM_SINGLE("ADC2HP_R Playback Switch", ALC5623_ADC_REC_GAIN, 14, 1, 1),
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_mono_mixer_controls[] = {
165*4882a593Smuzhiyun SOC_DAPM_SINGLE("ADC2MONO_L Playback Switch", ALC5623_ADC_REC_GAIN, 13, 1, 1),
166*4882a593Smuzhiyun SOC_DAPM_SINGLE("ADC2MONO_R Playback Switch", ALC5623_ADC_REC_GAIN, 12, 1, 1),
167*4882a593Smuzhiyun SOC_DAPM_SINGLE("LI2MONO Playback Switch", ALC5623_LINE_IN_VOL, 13, 1, 1),
168*4882a593Smuzhiyun SOC_DAPM_SINGLE("AUXI2MONO Playback Switch", ALC5623_AUXIN_VOL, 13, 1, 1),
169*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC12MONO Playback Switch", ALC5623_MIC_ROUTING_CTRL, 13, 1, 1),
170*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC22MONO Playback Switch", ALC5623_MIC_ROUTING_CTRL, 5, 1, 1),
171*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC2MONO Playback Switch", ALC5623_STEREO_DAC_VOL, 13, 1, 1),
172*4882a593Smuzhiyun };
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_speaker_mixer_controls[] = {
175*4882a593Smuzhiyun SOC_DAPM_SINGLE("LI2SPK Playback Switch", ALC5623_LINE_IN_VOL, 14, 1, 1),
176*4882a593Smuzhiyun SOC_DAPM_SINGLE("AUXI2SPK Playback Switch", ALC5623_AUXIN_VOL, 14, 1, 1),
177*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC12SPK Playback Switch", ALC5623_MIC_ROUTING_CTRL, 14, 1, 1),
178*4882a593Smuzhiyun SOC_DAPM_SINGLE("MIC22SPK Playback Switch", ALC5623_MIC_ROUTING_CTRL, 6, 1, 1),
179*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC2SPK Playback Switch", ALC5623_STEREO_DAC_VOL, 14, 1, 1),
180*4882a593Smuzhiyun };
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun /* Left Record Mixer */
183*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_captureL_mixer_controls[] = {
184*4882a593Smuzhiyun SOC_DAPM_SINGLE("Mic1 Capture Switch", ALC5623_ADC_REC_MIXER, 14, 1, 1),
185*4882a593Smuzhiyun SOC_DAPM_SINGLE("Mic2 Capture Switch", ALC5623_ADC_REC_MIXER, 13, 1, 1),
186*4882a593Smuzhiyun SOC_DAPM_SINGLE("LineInL Capture Switch", ALC5623_ADC_REC_MIXER, 12, 1, 1),
187*4882a593Smuzhiyun SOC_DAPM_SINGLE("Left AuxI Capture Switch", ALC5623_ADC_REC_MIXER, 11, 1, 1),
188*4882a593Smuzhiyun SOC_DAPM_SINGLE("HPMixerL Capture Switch", ALC5623_ADC_REC_MIXER, 10, 1, 1),
189*4882a593Smuzhiyun SOC_DAPM_SINGLE("SPKMixer Capture Switch", ALC5623_ADC_REC_MIXER, 9, 1, 1),
190*4882a593Smuzhiyun SOC_DAPM_SINGLE("MonoMixer Capture Switch", ALC5623_ADC_REC_MIXER, 8, 1, 1),
191*4882a593Smuzhiyun };
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun /* Right Record Mixer */
194*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_captureR_mixer_controls[] = {
195*4882a593Smuzhiyun SOC_DAPM_SINGLE("Mic1 Capture Switch", ALC5623_ADC_REC_MIXER, 6, 1, 1),
196*4882a593Smuzhiyun SOC_DAPM_SINGLE("Mic2 Capture Switch", ALC5623_ADC_REC_MIXER, 5, 1, 1),
197*4882a593Smuzhiyun SOC_DAPM_SINGLE("LineInR Capture Switch", ALC5623_ADC_REC_MIXER, 4, 1, 1),
198*4882a593Smuzhiyun SOC_DAPM_SINGLE("Right AuxI Capture Switch", ALC5623_ADC_REC_MIXER, 3, 1, 1),
199*4882a593Smuzhiyun SOC_DAPM_SINGLE("HPMixerR Capture Switch", ALC5623_ADC_REC_MIXER, 2, 1, 1),
200*4882a593Smuzhiyun SOC_DAPM_SINGLE("SPKMixer Capture Switch", ALC5623_ADC_REC_MIXER, 1, 1, 1),
201*4882a593Smuzhiyun SOC_DAPM_SINGLE("MonoMixer Capture Switch", ALC5623_ADC_REC_MIXER, 0, 1, 1),
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun static const char *alc5623_spk_n_sour_sel[] = {
205*4882a593Smuzhiyun 		"RN/-R", "RP/+R", "LN/-R", "Vmid" };
206*4882a593Smuzhiyun static const char *alc5623_hpl_out_input_sel[] = {
207*4882a593Smuzhiyun 		"Vmid", "HP Left Mix"};
208*4882a593Smuzhiyun static const char *alc5623_hpr_out_input_sel[] = {
209*4882a593Smuzhiyun 		"Vmid", "HP Right Mix"};
210*4882a593Smuzhiyun static const char *alc5623_spkout_input_sel[] = {
211*4882a593Smuzhiyun 		"Vmid", "HPOut Mix", "Speaker Mix", "Mono Mix"};
212*4882a593Smuzhiyun static const char *alc5623_aux_out_input_sel[] = {
213*4882a593Smuzhiyun 		"Vmid", "HPOut Mix", "Speaker Mix", "Mono Mix"};
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun /* auxout output mux */
216*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5623_aux_out_input_enum,
217*4882a593Smuzhiyun 			    ALC5623_OUTPUT_MIXER_CTRL, 6,
218*4882a593Smuzhiyun 			    alc5623_aux_out_input_sel);
219*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_auxout_mux_controls =
220*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", alc5623_aux_out_input_enum);
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun /* speaker output mux */
223*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5623_spkout_input_enum,
224*4882a593Smuzhiyun 			    ALC5623_OUTPUT_MIXER_CTRL, 10,
225*4882a593Smuzhiyun 			    alc5623_spkout_input_sel);
226*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_spkout_mux_controls =
227*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", alc5623_spkout_input_enum);
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun /* headphone left output mux */
230*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5623_hpl_out_input_enum,
231*4882a593Smuzhiyun 			    ALC5623_OUTPUT_MIXER_CTRL, 9,
232*4882a593Smuzhiyun 			    alc5623_hpl_out_input_sel);
233*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_hpl_out_mux_controls =
234*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", alc5623_hpl_out_input_enum);
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun /* headphone right output mux */
237*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5623_hpr_out_input_enum,
238*4882a593Smuzhiyun 			    ALC5623_OUTPUT_MIXER_CTRL, 8,
239*4882a593Smuzhiyun 			    alc5623_hpr_out_input_sel);
240*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_hpr_out_mux_controls =
241*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", alc5623_hpr_out_input_enum);
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun /* speaker output N select */
244*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5623_spk_n_sour_enum,
245*4882a593Smuzhiyun 			    ALC5623_OUTPUT_MIXER_CTRL, 14,
246*4882a593Smuzhiyun 			    alc5623_spk_n_sour_sel);
247*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_spkoutn_mux_controls =
248*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", alc5623_spk_n_sour_enum);
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun static const struct snd_soc_dapm_widget alc5623_dapm_widgets[] = {
251*4882a593Smuzhiyun /* Muxes */
252*4882a593Smuzhiyun SND_SOC_DAPM_MUX("AuxOut Mux", SND_SOC_NOPM, 0, 0,
253*4882a593Smuzhiyun 	&alc5623_auxout_mux_controls),
254*4882a593Smuzhiyun SND_SOC_DAPM_MUX("SpeakerOut Mux", SND_SOC_NOPM, 0, 0,
255*4882a593Smuzhiyun 	&alc5623_spkout_mux_controls),
256*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0,
257*4882a593Smuzhiyun 	&alc5623_hpl_out_mux_controls),
258*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0,
259*4882a593Smuzhiyun 	&alc5623_hpr_out_mux_controls),
260*4882a593Smuzhiyun SND_SOC_DAPM_MUX("SpeakerOut N Mux", SND_SOC_NOPM, 0, 0,
261*4882a593Smuzhiyun 	&alc5623_spkoutn_mux_controls),
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun /* output mixers */
264*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("HP Mix", SND_SOC_NOPM, 0, 0,
265*4882a593Smuzhiyun 	&alc5623_hp_mixer_controls[0],
266*4882a593Smuzhiyun 	ARRAY_SIZE(alc5623_hp_mixer_controls)),
267*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("HPR Mix", ALC5623_PWR_MANAG_ADD2, 4, 0,
268*4882a593Smuzhiyun 	&alc5623_hpr_mixer_controls[0],
269*4882a593Smuzhiyun 	ARRAY_SIZE(alc5623_hpr_mixer_controls)),
270*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("HPL Mix", ALC5623_PWR_MANAG_ADD2, 5, 0,
271*4882a593Smuzhiyun 	&alc5623_hpl_mixer_controls[0],
272*4882a593Smuzhiyun 	ARRAY_SIZE(alc5623_hpl_mixer_controls)),
273*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("HPOut Mix", SND_SOC_NOPM, 0, 0, NULL, 0),
274*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Mono Mix", ALC5623_PWR_MANAG_ADD2, 2, 0,
275*4882a593Smuzhiyun 	&alc5623_mono_mixer_controls[0],
276*4882a593Smuzhiyun 	ARRAY_SIZE(alc5623_mono_mixer_controls)),
277*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Speaker Mix", ALC5623_PWR_MANAG_ADD2, 3, 0,
278*4882a593Smuzhiyun 	&alc5623_speaker_mixer_controls[0],
279*4882a593Smuzhiyun 	ARRAY_SIZE(alc5623_speaker_mixer_controls)),
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun /* input mixers */
282*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Left Capture Mix", ALC5623_PWR_MANAG_ADD2, 1, 0,
283*4882a593Smuzhiyun 	&alc5623_captureL_mixer_controls[0],
284*4882a593Smuzhiyun 	ARRAY_SIZE(alc5623_captureL_mixer_controls)),
285*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Right Capture Mix", ALC5623_PWR_MANAG_ADD2, 0, 0,
286*4882a593Smuzhiyun 	&alc5623_captureR_mixer_controls[0],
287*4882a593Smuzhiyun 	ARRAY_SIZE(alc5623_captureR_mixer_controls)),
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback",
290*4882a593Smuzhiyun 	ALC5623_PWR_MANAG_ADD2, 9, 0),
291*4882a593Smuzhiyun SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback",
292*4882a593Smuzhiyun 	ALC5623_PWR_MANAG_ADD2, 8, 0),
293*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("I2S Mix", ALC5623_PWR_MANAG_ADD1, 15, 0, NULL, 0),
294*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("AuxI Mix", SND_SOC_NOPM, 0, 0, NULL, 0),
295*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Line Mix", SND_SOC_NOPM, 0, 0, NULL, 0),
296*4882a593Smuzhiyun SND_SOC_DAPM_ADC("Left ADC", "Left HiFi Capture",
297*4882a593Smuzhiyun 	ALC5623_PWR_MANAG_ADD2, 7, 0),
298*4882a593Smuzhiyun SND_SOC_DAPM_ADC("Right ADC", "Right HiFi Capture",
299*4882a593Smuzhiyun 	ALC5623_PWR_MANAG_ADD2, 6, 0),
300*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Left Headphone", ALC5623_PWR_MANAG_ADD3, 10, 0, NULL, 0),
301*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Right Headphone", ALC5623_PWR_MANAG_ADD3, 9, 0, NULL, 0),
302*4882a593Smuzhiyun SND_SOC_DAPM_PGA("SpeakerOut", ALC5623_PWR_MANAG_ADD3, 12, 0, NULL, 0),
303*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Left AuxOut", ALC5623_PWR_MANAG_ADD3, 14, 0, NULL, 0),
304*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Right AuxOut", ALC5623_PWR_MANAG_ADD3, 13, 0, NULL, 0),
305*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Left LineIn", ALC5623_PWR_MANAG_ADD3, 7, 0, NULL, 0),
306*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Right LineIn", ALC5623_PWR_MANAG_ADD3, 6, 0, NULL, 0),
307*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Left AuxI", ALC5623_PWR_MANAG_ADD3, 5, 0, NULL, 0),
308*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Right AuxI", ALC5623_PWR_MANAG_ADD3, 4, 0, NULL, 0),
309*4882a593Smuzhiyun SND_SOC_DAPM_PGA("MIC1 PGA", ALC5623_PWR_MANAG_ADD3, 3, 0, NULL, 0),
310*4882a593Smuzhiyun SND_SOC_DAPM_PGA("MIC2 PGA", ALC5623_PWR_MANAG_ADD3, 2, 0, NULL, 0),
311*4882a593Smuzhiyun SND_SOC_DAPM_PGA("MIC1 Pre Amp", ALC5623_PWR_MANAG_ADD3, 1, 0, NULL, 0),
312*4882a593Smuzhiyun SND_SOC_DAPM_PGA("MIC2 Pre Amp", ALC5623_PWR_MANAG_ADD3, 0, 0, NULL, 0),
313*4882a593Smuzhiyun SND_SOC_DAPM_MICBIAS("Mic Bias1", ALC5623_PWR_MANAG_ADD1, 11, 0),
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("AUXOUTL"),
316*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("AUXOUTR"),
317*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("HPL"),
318*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("HPR"),
319*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("SPKOUT"),
320*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("SPKOUTN"),
321*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LINEINL"),
322*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LINEINR"),
323*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AUXINL"),
324*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AUXINR"),
325*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("MIC1"),
326*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("MIC2"),
327*4882a593Smuzhiyun SND_SOC_DAPM_VMID("Vmid"),
328*4882a593Smuzhiyun };
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun static const char *alc5623_amp_names[] = {"AB Amp", "D Amp"};
331*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(alc5623_amp_enum,
332*4882a593Smuzhiyun 			    ALC5623_OUTPUT_MIXER_CTRL, 13,
333*4882a593Smuzhiyun 			    alc5623_amp_names);
334*4882a593Smuzhiyun static const struct snd_kcontrol_new alc5623_amp_mux_controls =
335*4882a593Smuzhiyun 	SOC_DAPM_ENUM("Route", alc5623_amp_enum);
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun static const struct snd_soc_dapm_widget alc5623_dapm_amp_widgets[] = {
338*4882a593Smuzhiyun SND_SOC_DAPM_PGA_E("D Amp", ALC5623_PWR_MANAG_ADD2, 14, 0, NULL, 0,
339*4882a593Smuzhiyun 	amp_mixer_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
340*4882a593Smuzhiyun SND_SOC_DAPM_PGA("AB Amp", ALC5623_PWR_MANAG_ADD2, 15, 0, NULL, 0),
341*4882a593Smuzhiyun SND_SOC_DAPM_MUX("AB-D Amp Mux", SND_SOC_NOPM, 0, 0,
342*4882a593Smuzhiyun 	&alc5623_amp_mux_controls),
343*4882a593Smuzhiyun };
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun static const struct snd_soc_dapm_route intercon[] = {
346*4882a593Smuzhiyun 	/* virtual mixer - mixes left & right channels */
347*4882a593Smuzhiyun 	{"I2S Mix", NULL,				"Left DAC"},
348*4882a593Smuzhiyun 	{"I2S Mix", NULL,				"Right DAC"},
349*4882a593Smuzhiyun 	{"Line Mix", NULL,				"Right LineIn"},
350*4882a593Smuzhiyun 	{"Line Mix", NULL,				"Left LineIn"},
351*4882a593Smuzhiyun 	{"AuxI Mix", NULL,				"Left AuxI"},
352*4882a593Smuzhiyun 	{"AuxI Mix", NULL,				"Right AuxI"},
353*4882a593Smuzhiyun 	{"AUXOUTL", NULL,				"Left AuxOut"},
354*4882a593Smuzhiyun 	{"AUXOUTR", NULL,				"Right AuxOut"},
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	/* HP mixer */
357*4882a593Smuzhiyun 	{"HPL Mix", "ADC2HP_L Playback Switch",		"Left Capture Mix"},
358*4882a593Smuzhiyun 	{"HPL Mix", NULL,				"HP Mix"},
359*4882a593Smuzhiyun 	{"HPR Mix", "ADC2HP_R Playback Switch",		"Right Capture Mix"},
360*4882a593Smuzhiyun 	{"HPR Mix", NULL,				"HP Mix"},
361*4882a593Smuzhiyun 	{"HP Mix", "LI2HP Playback Switch",		"Line Mix"},
362*4882a593Smuzhiyun 	{"HP Mix", "AUXI2HP Playback Switch",		"AuxI Mix"},
363*4882a593Smuzhiyun 	{"HP Mix", "MIC12HP Playback Switch",		"MIC1 PGA"},
364*4882a593Smuzhiyun 	{"HP Mix", "MIC22HP Playback Switch",		"MIC2 PGA"},
365*4882a593Smuzhiyun 	{"HP Mix", "DAC2HP Playback Switch",		"I2S Mix"},
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	/* speaker mixer */
368*4882a593Smuzhiyun 	{"Speaker Mix", "LI2SPK Playback Switch",	"Line Mix"},
369*4882a593Smuzhiyun 	{"Speaker Mix", "AUXI2SPK Playback Switch",	"AuxI Mix"},
370*4882a593Smuzhiyun 	{"Speaker Mix", "MIC12SPK Playback Switch",	"MIC1 PGA"},
371*4882a593Smuzhiyun 	{"Speaker Mix", "MIC22SPK Playback Switch",	"MIC2 PGA"},
372*4882a593Smuzhiyun 	{"Speaker Mix", "DAC2SPK Playback Switch",	"I2S Mix"},
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	/* mono mixer */
375*4882a593Smuzhiyun 	{"Mono Mix", "ADC2MONO_L Playback Switch",	"Left Capture Mix"},
376*4882a593Smuzhiyun 	{"Mono Mix", "ADC2MONO_R Playback Switch",	"Right Capture Mix"},
377*4882a593Smuzhiyun 	{"Mono Mix", "LI2MONO Playback Switch",		"Line Mix"},
378*4882a593Smuzhiyun 	{"Mono Mix", "AUXI2MONO Playback Switch",	"AuxI Mix"},
379*4882a593Smuzhiyun 	{"Mono Mix", "MIC12MONO Playback Switch",	"MIC1 PGA"},
380*4882a593Smuzhiyun 	{"Mono Mix", "MIC22MONO Playback Switch",	"MIC2 PGA"},
381*4882a593Smuzhiyun 	{"Mono Mix", "DAC2MONO Playback Switch",	"I2S Mix"},
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	/* Left record mixer */
384*4882a593Smuzhiyun 	{"Left Capture Mix", "LineInL Capture Switch",	"LINEINL"},
385*4882a593Smuzhiyun 	{"Left Capture Mix", "Left AuxI Capture Switch", "AUXINL"},
386*4882a593Smuzhiyun 	{"Left Capture Mix", "Mic1 Capture Switch",	"MIC1 Pre Amp"},
387*4882a593Smuzhiyun 	{"Left Capture Mix", "Mic2 Capture Switch",	"MIC2 Pre Amp"},
388*4882a593Smuzhiyun 	{"Left Capture Mix", "HPMixerL Capture Switch", "HPL Mix"},
389*4882a593Smuzhiyun 	{"Left Capture Mix", "SPKMixer Capture Switch", "Speaker Mix"},
390*4882a593Smuzhiyun 	{"Left Capture Mix", "MonoMixer Capture Switch", "Mono Mix"},
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	/*Right record mixer */
393*4882a593Smuzhiyun 	{"Right Capture Mix", "LineInR Capture Switch",	"LINEINR"},
394*4882a593Smuzhiyun 	{"Right Capture Mix", "Right AuxI Capture Switch",	"AUXINR"},
395*4882a593Smuzhiyun 	{"Right Capture Mix", "Mic1 Capture Switch",	"MIC1 Pre Amp"},
396*4882a593Smuzhiyun 	{"Right Capture Mix", "Mic2 Capture Switch",	"MIC2 Pre Amp"},
397*4882a593Smuzhiyun 	{"Right Capture Mix", "HPMixerR Capture Switch", "HPR Mix"},
398*4882a593Smuzhiyun 	{"Right Capture Mix", "SPKMixer Capture Switch", "Speaker Mix"},
399*4882a593Smuzhiyun 	{"Right Capture Mix", "MonoMixer Capture Switch", "Mono Mix"},
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	/* headphone left mux */
402*4882a593Smuzhiyun 	{"Left Headphone Mux", "HP Left Mix",		"HPL Mix"},
403*4882a593Smuzhiyun 	{"Left Headphone Mux", "Vmid",			"Vmid"},
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	/* headphone right mux */
406*4882a593Smuzhiyun 	{"Right Headphone Mux", "HP Right Mix",		"HPR Mix"},
407*4882a593Smuzhiyun 	{"Right Headphone Mux", "Vmid",			"Vmid"},
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	/* speaker out mux */
410*4882a593Smuzhiyun 	{"SpeakerOut Mux", "Vmid",			"Vmid"},
411*4882a593Smuzhiyun 	{"SpeakerOut Mux", "HPOut Mix",			"HPOut Mix"},
412*4882a593Smuzhiyun 	{"SpeakerOut Mux", "Speaker Mix",		"Speaker Mix"},
413*4882a593Smuzhiyun 	{"SpeakerOut Mux", "Mono Mix",			"Mono Mix"},
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	/* Mono/Aux Out mux */
416*4882a593Smuzhiyun 	{"AuxOut Mux", "Vmid",				"Vmid"},
417*4882a593Smuzhiyun 	{"AuxOut Mux", "HPOut Mix",			"HPOut Mix"},
418*4882a593Smuzhiyun 	{"AuxOut Mux", "Speaker Mix",			"Speaker Mix"},
419*4882a593Smuzhiyun 	{"AuxOut Mux", "Mono Mix",			"Mono Mix"},
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	/* output pga */
422*4882a593Smuzhiyun 	{"HPL", NULL,					"Left Headphone"},
423*4882a593Smuzhiyun 	{"Left Headphone", NULL,			"Left Headphone Mux"},
424*4882a593Smuzhiyun 	{"HPR", NULL,					"Right Headphone"},
425*4882a593Smuzhiyun 	{"Right Headphone", NULL,			"Right Headphone Mux"},
426*4882a593Smuzhiyun 	{"Left AuxOut", NULL,				"AuxOut Mux"},
427*4882a593Smuzhiyun 	{"Right AuxOut", NULL,				"AuxOut Mux"},
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	/* input pga */
430*4882a593Smuzhiyun 	{"Left LineIn", NULL,				"LINEINL"},
431*4882a593Smuzhiyun 	{"Right LineIn", NULL,				"LINEINR"},
432*4882a593Smuzhiyun 	{"Left AuxI", NULL,				"AUXINL"},
433*4882a593Smuzhiyun 	{"Right AuxI", NULL,				"AUXINR"},
434*4882a593Smuzhiyun 	{"MIC1 Pre Amp", NULL,				"MIC1"},
435*4882a593Smuzhiyun 	{"MIC2 Pre Amp", NULL,				"MIC2"},
436*4882a593Smuzhiyun 	{"MIC1 PGA", NULL,				"MIC1 Pre Amp"},
437*4882a593Smuzhiyun 	{"MIC2 PGA", NULL,				"MIC2 Pre Amp"},
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	/* left ADC */
440*4882a593Smuzhiyun 	{"Left ADC", NULL,				"Left Capture Mix"},
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	/* right ADC */
443*4882a593Smuzhiyun 	{"Right ADC", NULL,				"Right Capture Mix"},
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	{"SpeakerOut N Mux", "RN/-R",			"SpeakerOut"},
446*4882a593Smuzhiyun 	{"SpeakerOut N Mux", "RP/+R",			"SpeakerOut"},
447*4882a593Smuzhiyun 	{"SpeakerOut N Mux", "LN/-R",			"SpeakerOut"},
448*4882a593Smuzhiyun 	{"SpeakerOut N Mux", "Vmid",			"Vmid"},
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	{"SPKOUT", NULL,				"SpeakerOut"},
451*4882a593Smuzhiyun 	{"SPKOUTN", NULL,				"SpeakerOut N Mux"},
452*4882a593Smuzhiyun };
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun static const struct snd_soc_dapm_route intercon_spk[] = {
455*4882a593Smuzhiyun 	{"SpeakerOut", NULL,				"SpeakerOut Mux"},
456*4882a593Smuzhiyun };
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun static const struct snd_soc_dapm_route intercon_amp_spk[] = {
459*4882a593Smuzhiyun 	{"AB Amp", NULL,				"SpeakerOut Mux"},
460*4882a593Smuzhiyun 	{"D Amp", NULL,					"SpeakerOut Mux"},
461*4882a593Smuzhiyun 	{"AB-D Amp Mux", "AB Amp",			"AB Amp"},
462*4882a593Smuzhiyun 	{"AB-D Amp Mux", "D Amp",			"D Amp"},
463*4882a593Smuzhiyun 	{"SpeakerOut", NULL,				"AB-D Amp Mux"},
464*4882a593Smuzhiyun };
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun /* PLL divisors */
467*4882a593Smuzhiyun struct _pll_div {
468*4882a593Smuzhiyun 	u32 pll_in;
469*4882a593Smuzhiyun 	u32 pll_out;
470*4882a593Smuzhiyun 	u16 regvalue;
471*4882a593Smuzhiyun };
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun /* Note : pll code from original alc5623 driver. Not sure of how good it is */
474*4882a593Smuzhiyun /* useful only for master mode */
475*4882a593Smuzhiyun static const struct _pll_div codec_master_pll_div[] = {
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	{  2048000,  8192000,	0x0ea0},
478*4882a593Smuzhiyun 	{  3686400,  8192000,	0x4e27},
479*4882a593Smuzhiyun 	{ 12000000,  8192000,	0x456b},
480*4882a593Smuzhiyun 	{ 13000000,  8192000,	0x495f},
481*4882a593Smuzhiyun 	{ 13100000,  8192000,	0x0320},
482*4882a593Smuzhiyun 	{  2048000,  11289600,	0xf637},
483*4882a593Smuzhiyun 	{  3686400,  11289600,	0x2f22},
484*4882a593Smuzhiyun 	{ 12000000,  11289600,	0x3e2f},
485*4882a593Smuzhiyun 	{ 13000000,  11289600,	0x4d5b},
486*4882a593Smuzhiyun 	{ 13100000,  11289600,	0x363b},
487*4882a593Smuzhiyun 	{  2048000,  16384000,	0x1ea0},
488*4882a593Smuzhiyun 	{  3686400,  16384000,	0x9e27},
489*4882a593Smuzhiyun 	{ 12000000,  16384000,	0x452b},
490*4882a593Smuzhiyun 	{ 13000000,  16384000,	0x542f},
491*4882a593Smuzhiyun 	{ 13100000,  16384000,	0x03a0},
492*4882a593Smuzhiyun 	{  2048000,  16934400,	0xe625},
493*4882a593Smuzhiyun 	{  3686400,  16934400,	0x9126},
494*4882a593Smuzhiyun 	{ 12000000,  16934400,	0x4d2c},
495*4882a593Smuzhiyun 	{ 13000000,  16934400,	0x742f},
496*4882a593Smuzhiyun 	{ 13100000,  16934400,	0x3c27},
497*4882a593Smuzhiyun 	{  2048000,  22579200,	0x2aa0},
498*4882a593Smuzhiyun 	{  3686400,  22579200,	0x2f20},
499*4882a593Smuzhiyun 	{ 12000000,  22579200,	0x7e2f},
500*4882a593Smuzhiyun 	{ 13000000,  22579200,	0x742f},
501*4882a593Smuzhiyun 	{ 13100000,  22579200,	0x3c27},
502*4882a593Smuzhiyun 	{  2048000,  24576000,	0x2ea0},
503*4882a593Smuzhiyun 	{  3686400,  24576000,	0xee27},
504*4882a593Smuzhiyun 	{ 12000000,  24576000,	0x2915},
505*4882a593Smuzhiyun 	{ 13000000,  24576000,	0x772e},
506*4882a593Smuzhiyun 	{ 13100000,  24576000,	0x0d20},
507*4882a593Smuzhiyun };
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun static const struct _pll_div codec_slave_pll_div[] = {
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun 	{  1024000,  16384000,  0x3ea0},
512*4882a593Smuzhiyun 	{  1411200,  22579200,	0x3ea0},
513*4882a593Smuzhiyun 	{  1536000,  24576000,	0x3ea0},
514*4882a593Smuzhiyun 	{  2048000,  16384000,  0x1ea0},
515*4882a593Smuzhiyun 	{  2822400,  22579200,	0x1ea0},
516*4882a593Smuzhiyun 	{  3072000,  24576000,	0x1ea0},
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun };
519*4882a593Smuzhiyun 
alc5623_set_dai_pll(struct snd_soc_dai * codec_dai,int pll_id,int source,unsigned int freq_in,unsigned int freq_out)520*4882a593Smuzhiyun static int alc5623_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
521*4882a593Smuzhiyun 		int source, unsigned int freq_in, unsigned int freq_out)
522*4882a593Smuzhiyun {
523*4882a593Smuzhiyun 	int i;
524*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
525*4882a593Smuzhiyun 	int gbl_clk = 0, pll_div = 0;
526*4882a593Smuzhiyun 	u16 reg;
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	if (pll_id < ALC5623_PLL_FR_MCLK || pll_id > ALC5623_PLL_FR_BCK)
529*4882a593Smuzhiyun 		return -ENODEV;
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	/* Disable PLL power */
532*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5623_PWR_MANAG_ADD2,
533*4882a593Smuzhiyun 				ALC5623_PWR_ADD2_PLL,
534*4882a593Smuzhiyun 				0);
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	/* pll is not used in slave mode */
537*4882a593Smuzhiyun 	reg = snd_soc_component_read(component, ALC5623_DAI_CONTROL);
538*4882a593Smuzhiyun 	if (reg & ALC5623_DAI_SDP_SLAVE_MODE)
539*4882a593Smuzhiyun 		return 0;
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	if (!freq_in || !freq_out)
542*4882a593Smuzhiyun 		return 0;
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	switch (pll_id) {
545*4882a593Smuzhiyun 	case ALC5623_PLL_FR_MCLK:
546*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++) {
547*4882a593Smuzhiyun 			if (codec_master_pll_div[i].pll_in == freq_in
548*4882a593Smuzhiyun 			   && codec_master_pll_div[i].pll_out == freq_out) {
549*4882a593Smuzhiyun 				/* PLL source from MCLK */
550*4882a593Smuzhiyun 				pll_div  = codec_master_pll_div[i].regvalue;
551*4882a593Smuzhiyun 				break;
552*4882a593Smuzhiyun 			}
553*4882a593Smuzhiyun 		}
554*4882a593Smuzhiyun 		break;
555*4882a593Smuzhiyun 	case ALC5623_PLL_FR_BCK:
556*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++) {
557*4882a593Smuzhiyun 			if (codec_slave_pll_div[i].pll_in == freq_in
558*4882a593Smuzhiyun 			   && codec_slave_pll_div[i].pll_out == freq_out) {
559*4882a593Smuzhiyun 				/* PLL source from Bitclk */
560*4882a593Smuzhiyun 				gbl_clk = ALC5623_GBL_CLK_PLL_SOUR_SEL_BITCLK;
561*4882a593Smuzhiyun 				pll_div = codec_slave_pll_div[i].regvalue;
562*4882a593Smuzhiyun 				break;
563*4882a593Smuzhiyun 			}
564*4882a593Smuzhiyun 		}
565*4882a593Smuzhiyun 		break;
566*4882a593Smuzhiyun 	default:
567*4882a593Smuzhiyun 		return -EINVAL;
568*4882a593Smuzhiyun 	}
569*4882a593Smuzhiyun 
570*4882a593Smuzhiyun 	if (!pll_div)
571*4882a593Smuzhiyun 		return -EINVAL;
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5623_GLOBAL_CLK_CTRL_REG, gbl_clk);
574*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5623_PLL_CTRL, pll_div);
575*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5623_PWR_MANAG_ADD2,
576*4882a593Smuzhiyun 				ALC5623_PWR_ADD2_PLL,
577*4882a593Smuzhiyun 				ALC5623_PWR_ADD2_PLL);
578*4882a593Smuzhiyun 	gbl_clk |= ALC5623_GBL_CLK_SYS_SOUR_SEL_PLL;
579*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5623_GLOBAL_CLK_CTRL_REG, gbl_clk);
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 	return 0;
582*4882a593Smuzhiyun }
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun struct _coeff_div {
585*4882a593Smuzhiyun 	u16 fs;
586*4882a593Smuzhiyun 	u16 regvalue;
587*4882a593Smuzhiyun };
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun /* codec hifi mclk (after PLL) clock divider coefficients */
590*4882a593Smuzhiyun /* values inspired from column BCLK=32Fs of Appendix A table */
591*4882a593Smuzhiyun static const struct _coeff_div coeff_div[] = {
592*4882a593Smuzhiyun 	{256*8, 0x3a69},
593*4882a593Smuzhiyun 	{384*8, 0x3c6b},
594*4882a593Smuzhiyun 	{256*4, 0x2a69},
595*4882a593Smuzhiyun 	{384*4, 0x2c6b},
596*4882a593Smuzhiyun 	{256*2, 0x1a69},
597*4882a593Smuzhiyun 	{384*2, 0x1c6b},
598*4882a593Smuzhiyun 	{256*1, 0x0a69},
599*4882a593Smuzhiyun 	{384*1, 0x0c6b},
600*4882a593Smuzhiyun };
601*4882a593Smuzhiyun 
get_coeff(struct snd_soc_component * component,int rate)602*4882a593Smuzhiyun static int get_coeff(struct snd_soc_component *component, int rate)
603*4882a593Smuzhiyun {
604*4882a593Smuzhiyun 	struct alc5623_priv *alc5623 = snd_soc_component_get_drvdata(component);
605*4882a593Smuzhiyun 	int i;
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
608*4882a593Smuzhiyun 		if (coeff_div[i].fs * rate == alc5623->sysclk)
609*4882a593Smuzhiyun 			return i;
610*4882a593Smuzhiyun 	}
611*4882a593Smuzhiyun 	return -EINVAL;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun /*
615*4882a593Smuzhiyun  * Clock after PLL and dividers
616*4882a593Smuzhiyun  */
alc5623_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)617*4882a593Smuzhiyun static int alc5623_set_dai_sysclk(struct snd_soc_dai *codec_dai,
618*4882a593Smuzhiyun 		int clk_id, unsigned int freq, int dir)
619*4882a593Smuzhiyun {
620*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
621*4882a593Smuzhiyun 	struct alc5623_priv *alc5623 = snd_soc_component_get_drvdata(component);
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 	switch (freq) {
624*4882a593Smuzhiyun 	case  8192000:
625*4882a593Smuzhiyun 	case 11289600:
626*4882a593Smuzhiyun 	case 12288000:
627*4882a593Smuzhiyun 	case 16384000:
628*4882a593Smuzhiyun 	case 16934400:
629*4882a593Smuzhiyun 	case 18432000:
630*4882a593Smuzhiyun 	case 22579200:
631*4882a593Smuzhiyun 	case 24576000:
632*4882a593Smuzhiyun 		alc5623->sysclk = freq;
633*4882a593Smuzhiyun 		return 0;
634*4882a593Smuzhiyun 	}
635*4882a593Smuzhiyun 	return -EINVAL;
636*4882a593Smuzhiyun }
637*4882a593Smuzhiyun 
alc5623_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)638*4882a593Smuzhiyun static int alc5623_set_dai_fmt(struct snd_soc_dai *codec_dai,
639*4882a593Smuzhiyun 		unsigned int fmt)
640*4882a593Smuzhiyun {
641*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
642*4882a593Smuzhiyun 	u16 iface = 0;
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 	/* set master/slave audio interface */
645*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
646*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBM_CFM:
647*4882a593Smuzhiyun 		iface = ALC5623_DAI_SDP_MASTER_MODE;
648*4882a593Smuzhiyun 		break;
649*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBS_CFS:
650*4882a593Smuzhiyun 		iface = ALC5623_DAI_SDP_SLAVE_MODE;
651*4882a593Smuzhiyun 		break;
652*4882a593Smuzhiyun 	default:
653*4882a593Smuzhiyun 		return -EINVAL;
654*4882a593Smuzhiyun 	}
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	/* interface format */
657*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
658*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
659*4882a593Smuzhiyun 		iface |= ALC5623_DAI_I2S_DF_I2S;
660*4882a593Smuzhiyun 		break;
661*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_RIGHT_J:
662*4882a593Smuzhiyun 		iface |= ALC5623_DAI_I2S_DF_RIGHT;
663*4882a593Smuzhiyun 		break;
664*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
665*4882a593Smuzhiyun 		iface |= ALC5623_DAI_I2S_DF_LEFT;
666*4882a593Smuzhiyun 		break;
667*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_A:
668*4882a593Smuzhiyun 		iface |= ALC5623_DAI_I2S_DF_PCM;
669*4882a593Smuzhiyun 		break;
670*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_B:
671*4882a593Smuzhiyun 		iface |= ALC5623_DAI_I2S_DF_PCM | ALC5623_DAI_I2S_PCM_MODE;
672*4882a593Smuzhiyun 		break;
673*4882a593Smuzhiyun 	default:
674*4882a593Smuzhiyun 		return -EINVAL;
675*4882a593Smuzhiyun 	}
676*4882a593Smuzhiyun 
677*4882a593Smuzhiyun 	/* clock inversion */
678*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
679*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_NF:
680*4882a593Smuzhiyun 		break;
681*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_IF:
682*4882a593Smuzhiyun 		iface |= ALC5623_DAI_MAIN_I2S_BCLK_POL_CTRL;
683*4882a593Smuzhiyun 		break;
684*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_NF:
685*4882a593Smuzhiyun 		iface |= ALC5623_DAI_MAIN_I2S_BCLK_POL_CTRL;
686*4882a593Smuzhiyun 		break;
687*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_IF:
688*4882a593Smuzhiyun 		break;
689*4882a593Smuzhiyun 	default:
690*4882a593Smuzhiyun 		return -EINVAL;
691*4882a593Smuzhiyun 	}
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	return snd_soc_component_write(component, ALC5623_DAI_CONTROL, iface);
694*4882a593Smuzhiyun }
695*4882a593Smuzhiyun 
alc5623_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)696*4882a593Smuzhiyun static int alc5623_pcm_hw_params(struct snd_pcm_substream *substream,
697*4882a593Smuzhiyun 		struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
698*4882a593Smuzhiyun {
699*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
700*4882a593Smuzhiyun 	struct alc5623_priv *alc5623 = snd_soc_component_get_drvdata(component);
701*4882a593Smuzhiyun 	int coeff, rate;
702*4882a593Smuzhiyun 	u16 iface;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	iface = snd_soc_component_read(component, ALC5623_DAI_CONTROL);
705*4882a593Smuzhiyun 	iface &= ~ALC5623_DAI_I2S_DL_MASK;
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun 	/* bit size */
708*4882a593Smuzhiyun 	switch (params_width(params)) {
709*4882a593Smuzhiyun 	case 16:
710*4882a593Smuzhiyun 		iface |= ALC5623_DAI_I2S_DL_16;
711*4882a593Smuzhiyun 		break;
712*4882a593Smuzhiyun 	case 20:
713*4882a593Smuzhiyun 		iface |= ALC5623_DAI_I2S_DL_20;
714*4882a593Smuzhiyun 		break;
715*4882a593Smuzhiyun 	case 24:
716*4882a593Smuzhiyun 		iface |= ALC5623_DAI_I2S_DL_24;
717*4882a593Smuzhiyun 		break;
718*4882a593Smuzhiyun 	case 32:
719*4882a593Smuzhiyun 		iface |= ALC5623_DAI_I2S_DL_32;
720*4882a593Smuzhiyun 		break;
721*4882a593Smuzhiyun 	default:
722*4882a593Smuzhiyun 		return -EINVAL;
723*4882a593Smuzhiyun 	}
724*4882a593Smuzhiyun 
725*4882a593Smuzhiyun 	/* set iface & srate */
726*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5623_DAI_CONTROL, iface);
727*4882a593Smuzhiyun 	rate = params_rate(params);
728*4882a593Smuzhiyun 	coeff = get_coeff(component, rate);
729*4882a593Smuzhiyun 	if (coeff < 0)
730*4882a593Smuzhiyun 		return -EINVAL;
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun 	coeff = coeff_div[coeff].regvalue;
733*4882a593Smuzhiyun 	dev_dbg(component->dev, "%s: sysclk=%d,rate=%d,coeff=0x%04x\n",
734*4882a593Smuzhiyun 		__func__, alc5623->sysclk, rate, coeff);
735*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5623_STEREO_AD_DA_CLK_CTRL, coeff);
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun 	return 0;
738*4882a593Smuzhiyun }
739*4882a593Smuzhiyun 
alc5623_mute(struct snd_soc_dai * dai,int mute,int direction)740*4882a593Smuzhiyun static int alc5623_mute(struct snd_soc_dai *dai, int mute, int direction)
741*4882a593Smuzhiyun {
742*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
743*4882a593Smuzhiyun 	u16 hp_mute = ALC5623_MISC_M_DAC_L_INPUT | ALC5623_MISC_M_DAC_R_INPUT;
744*4882a593Smuzhiyun 	u16 mute_reg = snd_soc_component_read(component, ALC5623_MISC_CTRL) & ~hp_mute;
745*4882a593Smuzhiyun 
746*4882a593Smuzhiyun 	if (mute)
747*4882a593Smuzhiyun 		mute_reg |= hp_mute;
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun 	return snd_soc_component_write(component, ALC5623_MISC_CTRL, mute_reg);
750*4882a593Smuzhiyun }
751*4882a593Smuzhiyun 
752*4882a593Smuzhiyun #define ALC5623_ADD2_POWER_EN (ALC5623_PWR_ADD2_VREF \
753*4882a593Smuzhiyun 	| ALC5623_PWR_ADD2_DAC_REF_CIR)
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun #define ALC5623_ADD3_POWER_EN (ALC5623_PWR_ADD3_MAIN_BIAS \
756*4882a593Smuzhiyun 	| ALC5623_PWR_ADD3_MIC1_BOOST_AD)
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun #define ALC5623_ADD1_POWER_EN \
759*4882a593Smuzhiyun 	(ALC5623_PWR_ADD1_SHORT_CURR_DET_EN | ALC5623_PWR_ADD1_SOFTGEN_EN \
760*4882a593Smuzhiyun 	| ALC5623_PWR_ADD1_DEPOP_BUF_HP | ALC5623_PWR_ADD1_HP_OUT_AMP \
761*4882a593Smuzhiyun 	| ALC5623_PWR_ADD1_HP_OUT_ENH_AMP)
762*4882a593Smuzhiyun 
763*4882a593Smuzhiyun #define ALC5623_ADD1_POWER_EN_5622 \
764*4882a593Smuzhiyun 	(ALC5623_PWR_ADD1_SHORT_CURR_DET_EN \
765*4882a593Smuzhiyun 	| ALC5623_PWR_ADD1_HP_OUT_AMP)
766*4882a593Smuzhiyun 
enable_power_depop(struct snd_soc_component * component)767*4882a593Smuzhiyun static void enable_power_depop(struct snd_soc_component *component)
768*4882a593Smuzhiyun {
769*4882a593Smuzhiyun 	struct alc5623_priv *alc5623 = snd_soc_component_get_drvdata(component);
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5623_PWR_MANAG_ADD1,
772*4882a593Smuzhiyun 				ALC5623_PWR_ADD1_SOFTGEN_EN,
773*4882a593Smuzhiyun 				ALC5623_PWR_ADD1_SOFTGEN_EN);
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5623_PWR_MANAG_ADD3, ALC5623_ADD3_POWER_EN);
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5623_MISC_CTRL,
778*4882a593Smuzhiyun 				ALC5623_MISC_HP_DEPOP_MODE2_EN,
779*4882a593Smuzhiyun 				ALC5623_MISC_HP_DEPOP_MODE2_EN);
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	msleep(500);
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun 	snd_soc_component_write(component, ALC5623_PWR_MANAG_ADD2, ALC5623_ADD2_POWER_EN);
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun 	/* avoid writing '1' into 5622 reserved bits */
786*4882a593Smuzhiyun 	if (alc5623->id == 0x22)
787*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5623_PWR_MANAG_ADD1,
788*4882a593Smuzhiyun 			ALC5623_ADD1_POWER_EN_5622);
789*4882a593Smuzhiyun 	else
790*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5623_PWR_MANAG_ADD1,
791*4882a593Smuzhiyun 			ALC5623_ADD1_POWER_EN);
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun 	/* disable HP Depop2 */
794*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ALC5623_MISC_CTRL,
795*4882a593Smuzhiyun 				ALC5623_MISC_HP_DEPOP_MODE2_EN,
796*4882a593Smuzhiyun 				0);
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun }
799*4882a593Smuzhiyun 
alc5623_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)800*4882a593Smuzhiyun static int alc5623_set_bias_level(struct snd_soc_component *component,
801*4882a593Smuzhiyun 				      enum snd_soc_bias_level level)
802*4882a593Smuzhiyun {
803*4882a593Smuzhiyun 	switch (level) {
804*4882a593Smuzhiyun 	case SND_SOC_BIAS_ON:
805*4882a593Smuzhiyun 		enable_power_depop(component);
806*4882a593Smuzhiyun 		break;
807*4882a593Smuzhiyun 	case SND_SOC_BIAS_PREPARE:
808*4882a593Smuzhiyun 		break;
809*4882a593Smuzhiyun 	case SND_SOC_BIAS_STANDBY:
810*4882a593Smuzhiyun 		/* everything off except vref/vmid, */
811*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5623_PWR_MANAG_ADD2,
812*4882a593Smuzhiyun 				ALC5623_PWR_ADD2_VREF);
813*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5623_PWR_MANAG_ADD3,
814*4882a593Smuzhiyun 				ALC5623_PWR_ADD3_MAIN_BIAS);
815*4882a593Smuzhiyun 		break;
816*4882a593Smuzhiyun 	case SND_SOC_BIAS_OFF:
817*4882a593Smuzhiyun 		/* everything off, dac mute, inactive */
818*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5623_PWR_MANAG_ADD2, 0);
819*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5623_PWR_MANAG_ADD3, 0);
820*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5623_PWR_MANAG_ADD1, 0);
821*4882a593Smuzhiyun 		break;
822*4882a593Smuzhiyun 	}
823*4882a593Smuzhiyun 	return 0;
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun #define ALC5623_FORMATS	(SNDRV_PCM_FMTBIT_S16_LE \
827*4882a593Smuzhiyun 			| SNDRV_PCM_FMTBIT_S24_LE \
828*4882a593Smuzhiyun 			| SNDRV_PCM_FMTBIT_S32_LE)
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun static const struct snd_soc_dai_ops alc5623_dai_ops = {
831*4882a593Smuzhiyun 		.hw_params = alc5623_pcm_hw_params,
832*4882a593Smuzhiyun 		.mute_stream = alc5623_mute,
833*4882a593Smuzhiyun 		.set_fmt = alc5623_set_dai_fmt,
834*4882a593Smuzhiyun 		.set_sysclk = alc5623_set_dai_sysclk,
835*4882a593Smuzhiyun 		.set_pll = alc5623_set_dai_pll,
836*4882a593Smuzhiyun 		.no_capture_mute = 1,
837*4882a593Smuzhiyun };
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun static struct snd_soc_dai_driver alc5623_dai = {
840*4882a593Smuzhiyun 	.name = "alc5623-hifi",
841*4882a593Smuzhiyun 	.playback = {
842*4882a593Smuzhiyun 		.stream_name = "Playback",
843*4882a593Smuzhiyun 		.channels_min = 1,
844*4882a593Smuzhiyun 		.channels_max = 2,
845*4882a593Smuzhiyun 		.rate_min =	8000,
846*4882a593Smuzhiyun 		.rate_max =	48000,
847*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_8000_48000,
848*4882a593Smuzhiyun 		.formats = ALC5623_FORMATS,},
849*4882a593Smuzhiyun 	.capture = {
850*4882a593Smuzhiyun 		.stream_name = "Capture",
851*4882a593Smuzhiyun 		.channels_min = 1,
852*4882a593Smuzhiyun 		.channels_max = 2,
853*4882a593Smuzhiyun 		.rate_min =	8000,
854*4882a593Smuzhiyun 		.rate_max =	48000,
855*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_8000_48000,
856*4882a593Smuzhiyun 		.formats = ALC5623_FORMATS,},
857*4882a593Smuzhiyun 
858*4882a593Smuzhiyun 	.ops = &alc5623_dai_ops,
859*4882a593Smuzhiyun };
860*4882a593Smuzhiyun 
alc5623_suspend(struct snd_soc_component * component)861*4882a593Smuzhiyun static int alc5623_suspend(struct snd_soc_component *component)
862*4882a593Smuzhiyun {
863*4882a593Smuzhiyun 	struct alc5623_priv *alc5623 = snd_soc_component_get_drvdata(component);
864*4882a593Smuzhiyun 
865*4882a593Smuzhiyun 	regcache_cache_only(alc5623->regmap, true);
866*4882a593Smuzhiyun 
867*4882a593Smuzhiyun 	return 0;
868*4882a593Smuzhiyun }
869*4882a593Smuzhiyun 
alc5623_resume(struct snd_soc_component * component)870*4882a593Smuzhiyun static int alc5623_resume(struct snd_soc_component *component)
871*4882a593Smuzhiyun {
872*4882a593Smuzhiyun 	struct alc5623_priv *alc5623 = snd_soc_component_get_drvdata(component);
873*4882a593Smuzhiyun 	int ret;
874*4882a593Smuzhiyun 
875*4882a593Smuzhiyun 	/* Sync reg_cache with the hardware */
876*4882a593Smuzhiyun 	regcache_cache_only(alc5623->regmap, false);
877*4882a593Smuzhiyun 	ret = regcache_sync(alc5623->regmap);
878*4882a593Smuzhiyun 	if (ret != 0) {
879*4882a593Smuzhiyun 		dev_err(component->dev, "Failed to sync register cache: %d\n",
880*4882a593Smuzhiyun 			ret);
881*4882a593Smuzhiyun 		regcache_cache_only(alc5623->regmap, true);
882*4882a593Smuzhiyun 		return ret;
883*4882a593Smuzhiyun 	}
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun 	return 0;
886*4882a593Smuzhiyun }
887*4882a593Smuzhiyun 
alc5623_probe(struct snd_soc_component * component)888*4882a593Smuzhiyun static int alc5623_probe(struct snd_soc_component *component)
889*4882a593Smuzhiyun {
890*4882a593Smuzhiyun 	struct alc5623_priv *alc5623 = snd_soc_component_get_drvdata(component);
891*4882a593Smuzhiyun 	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
892*4882a593Smuzhiyun 
893*4882a593Smuzhiyun 	alc5623_reset(component);
894*4882a593Smuzhiyun 
895*4882a593Smuzhiyun 	if (alc5623->add_ctrl) {
896*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5623_ADD_CTRL_REG,
897*4882a593Smuzhiyun 				alc5623->add_ctrl);
898*4882a593Smuzhiyun 	}
899*4882a593Smuzhiyun 
900*4882a593Smuzhiyun 	if (alc5623->jack_det_ctrl) {
901*4882a593Smuzhiyun 		snd_soc_component_write(component, ALC5623_JACK_DET_CTRL,
902*4882a593Smuzhiyun 				alc5623->jack_det_ctrl);
903*4882a593Smuzhiyun 	}
904*4882a593Smuzhiyun 
905*4882a593Smuzhiyun 	switch (alc5623->id) {
906*4882a593Smuzhiyun 	case 0x21:
907*4882a593Smuzhiyun 		snd_soc_add_component_controls(component, alc5621_vol_snd_controls,
908*4882a593Smuzhiyun 			ARRAY_SIZE(alc5621_vol_snd_controls));
909*4882a593Smuzhiyun 		break;
910*4882a593Smuzhiyun 	case 0x22:
911*4882a593Smuzhiyun 		snd_soc_add_component_controls(component, alc5622_vol_snd_controls,
912*4882a593Smuzhiyun 			ARRAY_SIZE(alc5622_vol_snd_controls));
913*4882a593Smuzhiyun 		break;
914*4882a593Smuzhiyun 	case 0x23:
915*4882a593Smuzhiyun 		snd_soc_add_component_controls(component, alc5623_vol_snd_controls,
916*4882a593Smuzhiyun 			ARRAY_SIZE(alc5623_vol_snd_controls));
917*4882a593Smuzhiyun 		break;
918*4882a593Smuzhiyun 	default:
919*4882a593Smuzhiyun 		return -EINVAL;
920*4882a593Smuzhiyun 	}
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun 	snd_soc_add_component_controls(component, alc5623_snd_controls,
923*4882a593Smuzhiyun 			ARRAY_SIZE(alc5623_snd_controls));
924*4882a593Smuzhiyun 
925*4882a593Smuzhiyun 	snd_soc_dapm_new_controls(dapm, alc5623_dapm_widgets,
926*4882a593Smuzhiyun 					ARRAY_SIZE(alc5623_dapm_widgets));
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun 	/* set up audio path interconnects */
929*4882a593Smuzhiyun 	snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
930*4882a593Smuzhiyun 
931*4882a593Smuzhiyun 	switch (alc5623->id) {
932*4882a593Smuzhiyun 	case 0x21:
933*4882a593Smuzhiyun 	case 0x22:
934*4882a593Smuzhiyun 		snd_soc_dapm_new_controls(dapm, alc5623_dapm_amp_widgets,
935*4882a593Smuzhiyun 					ARRAY_SIZE(alc5623_dapm_amp_widgets));
936*4882a593Smuzhiyun 		snd_soc_dapm_add_routes(dapm, intercon_amp_spk,
937*4882a593Smuzhiyun 					ARRAY_SIZE(intercon_amp_spk));
938*4882a593Smuzhiyun 		break;
939*4882a593Smuzhiyun 	case 0x23:
940*4882a593Smuzhiyun 		snd_soc_dapm_add_routes(dapm, intercon_spk,
941*4882a593Smuzhiyun 					ARRAY_SIZE(intercon_spk));
942*4882a593Smuzhiyun 		break;
943*4882a593Smuzhiyun 	default:
944*4882a593Smuzhiyun 		return -EINVAL;
945*4882a593Smuzhiyun 	}
946*4882a593Smuzhiyun 
947*4882a593Smuzhiyun 	return 0;
948*4882a593Smuzhiyun }
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_device_alc5623 = {
951*4882a593Smuzhiyun 	.probe			= alc5623_probe,
952*4882a593Smuzhiyun 	.suspend		= alc5623_suspend,
953*4882a593Smuzhiyun 	.resume			= alc5623_resume,
954*4882a593Smuzhiyun 	.set_bias_level		= alc5623_set_bias_level,
955*4882a593Smuzhiyun 	.suspend_bias_off	= 1,
956*4882a593Smuzhiyun 	.idle_bias_on		= 1,
957*4882a593Smuzhiyun 	.use_pmdown_time	= 1,
958*4882a593Smuzhiyun 	.endianness		= 1,
959*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
960*4882a593Smuzhiyun };
961*4882a593Smuzhiyun 
962*4882a593Smuzhiyun static const struct regmap_config alc5623_regmap = {
963*4882a593Smuzhiyun 	.reg_bits = 8,
964*4882a593Smuzhiyun 	.val_bits = 16,
965*4882a593Smuzhiyun 	.reg_stride = 2,
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 	.max_register = ALC5623_VENDOR_ID2,
968*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
969*4882a593Smuzhiyun };
970*4882a593Smuzhiyun 
971*4882a593Smuzhiyun /*
972*4882a593Smuzhiyun  * ALC5623 2 wire address is determined by A1 pin
973*4882a593Smuzhiyun  * state during powerup.
974*4882a593Smuzhiyun  *    low  = 0x1a
975*4882a593Smuzhiyun  *    high = 0x1b
976*4882a593Smuzhiyun  */
alc5623_i2c_probe(struct i2c_client * client,const struct i2c_device_id * id)977*4882a593Smuzhiyun static int alc5623_i2c_probe(struct i2c_client *client,
978*4882a593Smuzhiyun 			     const struct i2c_device_id *id)
979*4882a593Smuzhiyun {
980*4882a593Smuzhiyun 	struct alc5623_platform_data *pdata;
981*4882a593Smuzhiyun 	struct alc5623_priv *alc5623;
982*4882a593Smuzhiyun 	struct device_node *np;
983*4882a593Smuzhiyun 	unsigned int vid1, vid2;
984*4882a593Smuzhiyun 	int ret;
985*4882a593Smuzhiyun 	u32 val32;
986*4882a593Smuzhiyun 
987*4882a593Smuzhiyun 	alc5623 = devm_kzalloc(&client->dev, sizeof(struct alc5623_priv),
988*4882a593Smuzhiyun 			       GFP_KERNEL);
989*4882a593Smuzhiyun 	if (alc5623 == NULL)
990*4882a593Smuzhiyun 		return -ENOMEM;
991*4882a593Smuzhiyun 
992*4882a593Smuzhiyun 	alc5623->regmap = devm_regmap_init_i2c(client, &alc5623_regmap);
993*4882a593Smuzhiyun 	if (IS_ERR(alc5623->regmap)) {
994*4882a593Smuzhiyun 		ret = PTR_ERR(alc5623->regmap);
995*4882a593Smuzhiyun 		dev_err(&client->dev, "Failed to initialise I/O: %d\n", ret);
996*4882a593Smuzhiyun 		return ret;
997*4882a593Smuzhiyun 	}
998*4882a593Smuzhiyun 
999*4882a593Smuzhiyun 	ret = regmap_read(alc5623->regmap, ALC5623_VENDOR_ID1, &vid1);
1000*4882a593Smuzhiyun 	if (ret < 0) {
1001*4882a593Smuzhiyun 		dev_err(&client->dev, "failed to read vendor ID1: %d\n", ret);
1002*4882a593Smuzhiyun 		return ret;
1003*4882a593Smuzhiyun 	}
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun 	ret = regmap_read(alc5623->regmap, ALC5623_VENDOR_ID2, &vid2);
1006*4882a593Smuzhiyun 	if (ret < 0) {
1007*4882a593Smuzhiyun 		dev_err(&client->dev, "failed to read vendor ID2: %d\n", ret);
1008*4882a593Smuzhiyun 		return ret;
1009*4882a593Smuzhiyun 	}
1010*4882a593Smuzhiyun 	vid2 >>= 8;
1011*4882a593Smuzhiyun 
1012*4882a593Smuzhiyun 	if ((vid1 != 0x10ec) || (vid2 != id->driver_data)) {
1013*4882a593Smuzhiyun 		dev_err(&client->dev, "unknown or wrong codec\n");
1014*4882a593Smuzhiyun 		dev_err(&client->dev, "Expected %x:%lx, got %x:%x\n",
1015*4882a593Smuzhiyun 				0x10ec, id->driver_data,
1016*4882a593Smuzhiyun 				vid1, vid2);
1017*4882a593Smuzhiyun 		return -ENODEV;
1018*4882a593Smuzhiyun 	}
1019*4882a593Smuzhiyun 
1020*4882a593Smuzhiyun 	dev_dbg(&client->dev, "Found codec id : alc56%02x\n", vid2);
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun 	pdata = client->dev.platform_data;
1023*4882a593Smuzhiyun 	if (pdata) {
1024*4882a593Smuzhiyun 		alc5623->add_ctrl = pdata->add_ctrl;
1025*4882a593Smuzhiyun 		alc5623->jack_det_ctrl = pdata->jack_det_ctrl;
1026*4882a593Smuzhiyun 	} else {
1027*4882a593Smuzhiyun 		if (client->dev.of_node) {
1028*4882a593Smuzhiyun 			np = client->dev.of_node;
1029*4882a593Smuzhiyun 			ret = of_property_read_u32(np, "add-ctrl", &val32);
1030*4882a593Smuzhiyun 			if (!ret)
1031*4882a593Smuzhiyun 				alc5623->add_ctrl = val32;
1032*4882a593Smuzhiyun 			ret = of_property_read_u32(np, "jack-det-ctrl", &val32);
1033*4882a593Smuzhiyun 			if (!ret)
1034*4882a593Smuzhiyun 				alc5623->jack_det_ctrl = val32;
1035*4882a593Smuzhiyun 		}
1036*4882a593Smuzhiyun 	}
1037*4882a593Smuzhiyun 
1038*4882a593Smuzhiyun 	alc5623->id = vid2;
1039*4882a593Smuzhiyun 	switch (alc5623->id) {
1040*4882a593Smuzhiyun 	case 0x21:
1041*4882a593Smuzhiyun 		alc5623_dai.name = "alc5621-hifi";
1042*4882a593Smuzhiyun 		break;
1043*4882a593Smuzhiyun 	case 0x22:
1044*4882a593Smuzhiyun 		alc5623_dai.name = "alc5622-hifi";
1045*4882a593Smuzhiyun 		break;
1046*4882a593Smuzhiyun 	case 0x23:
1047*4882a593Smuzhiyun 		alc5623_dai.name = "alc5623-hifi";
1048*4882a593Smuzhiyun 		break;
1049*4882a593Smuzhiyun 	default:
1050*4882a593Smuzhiyun 		return -EINVAL;
1051*4882a593Smuzhiyun 	}
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun 	i2c_set_clientdata(client, alc5623);
1054*4882a593Smuzhiyun 
1055*4882a593Smuzhiyun 	ret =  devm_snd_soc_register_component(&client->dev,
1056*4882a593Smuzhiyun 		&soc_component_device_alc5623, &alc5623_dai, 1);
1057*4882a593Smuzhiyun 	if (ret != 0)
1058*4882a593Smuzhiyun 		dev_err(&client->dev, "Failed to register codec: %d\n", ret);
1059*4882a593Smuzhiyun 
1060*4882a593Smuzhiyun 	return ret;
1061*4882a593Smuzhiyun }
1062*4882a593Smuzhiyun 
1063*4882a593Smuzhiyun static const struct i2c_device_id alc5623_i2c_table[] = {
1064*4882a593Smuzhiyun 	{"alc5621", 0x21},
1065*4882a593Smuzhiyun 	{"alc5622", 0x22},
1066*4882a593Smuzhiyun 	{"alc5623", 0x23},
1067*4882a593Smuzhiyun 	{}
1068*4882a593Smuzhiyun };
1069*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, alc5623_i2c_table);
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun static const struct of_device_id alc5623_of_match[] = {
1072*4882a593Smuzhiyun 	{ .compatible = "realtek,alc5623", },
1073*4882a593Smuzhiyun 	{ }
1074*4882a593Smuzhiyun };
1075*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, alc5623_of_match);
1076*4882a593Smuzhiyun 
1077*4882a593Smuzhiyun /*  i2c codec control layer */
1078*4882a593Smuzhiyun static struct i2c_driver alc5623_i2c_driver = {
1079*4882a593Smuzhiyun 	.driver = {
1080*4882a593Smuzhiyun 		.name = "alc562x-codec",
1081*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(alc5623_of_match),
1082*4882a593Smuzhiyun 	},
1083*4882a593Smuzhiyun 	.probe = alc5623_i2c_probe,
1084*4882a593Smuzhiyun 	.id_table = alc5623_i2c_table,
1085*4882a593Smuzhiyun };
1086*4882a593Smuzhiyun 
1087*4882a593Smuzhiyun module_i2c_driver(alc5623_i2c_driver);
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC alc5621/2/3 driver");
1090*4882a593Smuzhiyun MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
1091*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1092