1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ak4671.c -- audio driver for AK4671
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2009 Samsung Electronics Co.Ltd
6*4882a593Smuzhiyun * Author: Joonyoung Shim <jy0922.shim@samsung.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/regmap.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <sound/soc.h>
16*4882a593Smuzhiyun #include <sound/initval.h>
17*4882a593Smuzhiyun #include <sound/tlv.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "ak4671.h"
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* ak4671 register cache & default register settings */
23*4882a593Smuzhiyun static const struct reg_default ak4671_reg_defaults[] = {
24*4882a593Smuzhiyun { 0x00, 0x00 }, /* AK4671_AD_DA_POWER_MANAGEMENT (0x00) */
25*4882a593Smuzhiyun { 0x01, 0xf6 }, /* AK4671_PLL_MODE_SELECT0 (0x01) */
26*4882a593Smuzhiyun { 0x02, 0x00 }, /* AK4671_PLL_MODE_SELECT1 (0x02) */
27*4882a593Smuzhiyun { 0x03, 0x02 }, /* AK4671_FORMAT_SELECT (0x03) */
28*4882a593Smuzhiyun { 0x04, 0x00 }, /* AK4671_MIC_SIGNAL_SELECT (0x04) */
29*4882a593Smuzhiyun { 0x05, 0x55 }, /* AK4671_MIC_AMP_GAIN (0x05) */
30*4882a593Smuzhiyun { 0x06, 0x00 }, /* AK4671_MIXING_POWER_MANAGEMENT0 (0x06) */
31*4882a593Smuzhiyun { 0x07, 0x00 }, /* AK4671_MIXING_POWER_MANAGEMENT1 (0x07) */
32*4882a593Smuzhiyun { 0x08, 0xb5 }, /* AK4671_OUTPUT_VOLUME_CONTROL (0x08) */
33*4882a593Smuzhiyun { 0x09, 0x00 }, /* AK4671_LOUT1_SIGNAL_SELECT (0x09) */
34*4882a593Smuzhiyun { 0x0a, 0x00 }, /* AK4671_ROUT1_SIGNAL_SELECT (0x0a) */
35*4882a593Smuzhiyun { 0x0b, 0x00 }, /* AK4671_LOUT2_SIGNAL_SELECT (0x0b) */
36*4882a593Smuzhiyun { 0x0c, 0x00 }, /* AK4671_ROUT2_SIGNAL_SELECT (0x0c) */
37*4882a593Smuzhiyun { 0x0d, 0x00 }, /* AK4671_LOUT3_SIGNAL_SELECT (0x0d) */
38*4882a593Smuzhiyun { 0x0e, 0x00 }, /* AK4671_ROUT3_SIGNAL_SELECT (0x0e) */
39*4882a593Smuzhiyun { 0x0f, 0x00 }, /* AK4671_LOUT1_POWER_MANAGERMENT (0x0f) */
40*4882a593Smuzhiyun { 0x10, 0x00 }, /* AK4671_LOUT2_POWER_MANAGERMENT (0x10) */
41*4882a593Smuzhiyun { 0x11, 0x80 }, /* AK4671_LOUT3_POWER_MANAGERMENT (0x11) */
42*4882a593Smuzhiyun { 0x12, 0x91 }, /* AK4671_LCH_INPUT_VOLUME_CONTROL (0x12) */
43*4882a593Smuzhiyun { 0x13, 0x91 }, /* AK4671_RCH_INPUT_VOLUME_CONTROL (0x13) */
44*4882a593Smuzhiyun { 0x14, 0xe1 }, /* AK4671_ALC_REFERENCE_SELECT (0x14) */
45*4882a593Smuzhiyun { 0x15, 0x00 }, /* AK4671_DIGITAL_MIXING_CONTROL (0x15) */
46*4882a593Smuzhiyun { 0x16, 0x00 }, /* AK4671_ALC_TIMER_SELECT (0x16) */
47*4882a593Smuzhiyun { 0x17, 0x00 }, /* AK4671_ALC_MODE_CONTROL (0x17) */
48*4882a593Smuzhiyun { 0x18, 0x02 }, /* AK4671_MODE_CONTROL1 (0x18) */
49*4882a593Smuzhiyun { 0x19, 0x01 }, /* AK4671_MODE_CONTROL2 (0x19) */
50*4882a593Smuzhiyun { 0x1a, 0x18 }, /* AK4671_LCH_OUTPUT_VOLUME_CONTROL (0x1a) */
51*4882a593Smuzhiyun { 0x1b, 0x18 }, /* AK4671_RCH_OUTPUT_VOLUME_CONTROL (0x1b) */
52*4882a593Smuzhiyun { 0x1c, 0x00 }, /* AK4671_SIDETONE_A_CONTROL (0x1c) */
53*4882a593Smuzhiyun { 0x1d, 0x02 }, /* AK4671_DIGITAL_FILTER_SELECT (0x1d) */
54*4882a593Smuzhiyun { 0x1e, 0x00 }, /* AK4671_FIL3_COEFFICIENT0 (0x1e) */
55*4882a593Smuzhiyun { 0x1f, 0x00 }, /* AK4671_FIL3_COEFFICIENT1 (0x1f) */
56*4882a593Smuzhiyun { 0x20, 0x00 }, /* AK4671_FIL3_COEFFICIENT2 (0x20) */
57*4882a593Smuzhiyun { 0x21, 0x00 }, /* AK4671_FIL3_COEFFICIENT3 (0x21) */
58*4882a593Smuzhiyun { 0x22, 0x00 }, /* AK4671_EQ_COEFFICIENT0 (0x22) */
59*4882a593Smuzhiyun { 0x23, 0x00 }, /* AK4671_EQ_COEFFICIENT1 (0x23) */
60*4882a593Smuzhiyun { 0x24, 0x00 }, /* AK4671_EQ_COEFFICIENT2 (0x24) */
61*4882a593Smuzhiyun { 0x25, 0x00 }, /* AK4671_EQ_COEFFICIENT3 (0x25) */
62*4882a593Smuzhiyun { 0x26, 0x00 }, /* AK4671_EQ_COEFFICIENT4 (0x26) */
63*4882a593Smuzhiyun { 0x27, 0x00 }, /* AK4671_EQ_COEFFICIENT5 (0x27) */
64*4882a593Smuzhiyun { 0x28, 0xa9 }, /* AK4671_FIL1_COEFFICIENT0 (0x28) */
65*4882a593Smuzhiyun { 0x29, 0x1f }, /* AK4671_FIL1_COEFFICIENT1 (0x29) */
66*4882a593Smuzhiyun { 0x2a, 0xad }, /* AK4671_FIL1_COEFFICIENT2 (0x2a) */
67*4882a593Smuzhiyun { 0x2b, 0x20 }, /* AK4671_FIL1_COEFFICIENT3 (0x2b) */
68*4882a593Smuzhiyun { 0x2c, 0x00 }, /* AK4671_FIL2_COEFFICIENT0 (0x2c) */
69*4882a593Smuzhiyun { 0x2d, 0x00 }, /* AK4671_FIL2_COEFFICIENT1 (0x2d) */
70*4882a593Smuzhiyun { 0x2e, 0x00 }, /* AK4671_FIL2_COEFFICIENT2 (0x2e) */
71*4882a593Smuzhiyun { 0x2f, 0x00 }, /* AK4671_FIL2_COEFFICIENT3 (0x2f) */
72*4882a593Smuzhiyun { 0x30, 0x00 }, /* AK4671_DIGITAL_FILTER_SELECT2 (0x30) */
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun { 0x32, 0x00 }, /* AK4671_E1_COEFFICIENT0 (0x32) */
75*4882a593Smuzhiyun { 0x33, 0x00 }, /* AK4671_E1_COEFFICIENT1 (0x33) */
76*4882a593Smuzhiyun { 0x34, 0x00 }, /* AK4671_E1_COEFFICIENT2 (0x34) */
77*4882a593Smuzhiyun { 0x35, 0x00 }, /* AK4671_E1_COEFFICIENT3 (0x35) */
78*4882a593Smuzhiyun { 0x36, 0x00 }, /* AK4671_E1_COEFFICIENT4 (0x36) */
79*4882a593Smuzhiyun { 0x37, 0x00 }, /* AK4671_E1_COEFFICIENT5 (0x37) */
80*4882a593Smuzhiyun { 0x38, 0x00 }, /* AK4671_E2_COEFFICIENT0 (0x38) */
81*4882a593Smuzhiyun { 0x39, 0x00 }, /* AK4671_E2_COEFFICIENT1 (0x39) */
82*4882a593Smuzhiyun { 0x3a, 0x00 }, /* AK4671_E2_COEFFICIENT2 (0x3a) */
83*4882a593Smuzhiyun { 0x3b, 0x00 }, /* AK4671_E2_COEFFICIENT3 (0x3b) */
84*4882a593Smuzhiyun { 0x3c, 0x00 }, /* AK4671_E2_COEFFICIENT4 (0x3c) */
85*4882a593Smuzhiyun { 0x3d, 0x00 }, /* AK4671_E2_COEFFICIENT5 (0x3d) */
86*4882a593Smuzhiyun { 0x3e, 0x00 }, /* AK4671_E3_COEFFICIENT0 (0x3e) */
87*4882a593Smuzhiyun { 0x3f, 0x00 }, /* AK4671_E3_COEFFICIENT1 (0x3f) */
88*4882a593Smuzhiyun { 0x40, 0x00 }, /* AK4671_E3_COEFFICIENT2 (0x40) */
89*4882a593Smuzhiyun { 0x41, 0x00 }, /* AK4671_E3_COEFFICIENT3 (0x41) */
90*4882a593Smuzhiyun { 0x42, 0x00 }, /* AK4671_E3_COEFFICIENT4 (0x42) */
91*4882a593Smuzhiyun { 0x43, 0x00 }, /* AK4671_E3_COEFFICIENT5 (0x43) */
92*4882a593Smuzhiyun { 0x44, 0x00 }, /* AK4671_E4_COEFFICIENT0 (0x44) */
93*4882a593Smuzhiyun { 0x45, 0x00 }, /* AK4671_E4_COEFFICIENT1 (0x45) */
94*4882a593Smuzhiyun { 0x46, 0x00 }, /* AK4671_E4_COEFFICIENT2 (0x46) */
95*4882a593Smuzhiyun { 0x47, 0x00 }, /* AK4671_E4_COEFFICIENT3 (0x47) */
96*4882a593Smuzhiyun { 0x48, 0x00 }, /* AK4671_E4_COEFFICIENT4 (0x48) */
97*4882a593Smuzhiyun { 0x49, 0x00 }, /* AK4671_E4_COEFFICIENT5 (0x49) */
98*4882a593Smuzhiyun { 0x4a, 0x00 }, /* AK4671_E5_COEFFICIENT0 (0x4a) */
99*4882a593Smuzhiyun { 0x4b, 0x00 }, /* AK4671_E5_COEFFICIENT1 (0x4b) */
100*4882a593Smuzhiyun { 0x4c, 0x00 }, /* AK4671_E5_COEFFICIENT2 (0x4c) */
101*4882a593Smuzhiyun { 0x4d, 0x00 }, /* AK4671_E5_COEFFICIENT3 (0x4d) */
102*4882a593Smuzhiyun { 0x4e, 0x00 }, /* AK4671_E5_COEFFICIENT4 (0x4e) */
103*4882a593Smuzhiyun { 0x4f, 0x00 }, /* AK4671_E5_COEFFICIENT5 (0x4f) */
104*4882a593Smuzhiyun { 0x50, 0x88 }, /* AK4671_EQ_CONTROL_250HZ_100HZ (0x50) */
105*4882a593Smuzhiyun { 0x51, 0x88 }, /* AK4671_EQ_CONTROL_3500HZ_1KHZ (0x51) */
106*4882a593Smuzhiyun { 0x52, 0x08 }, /* AK4671_EQ_CONTRO_10KHZ (0x52) */
107*4882a593Smuzhiyun { 0x53, 0x00 }, /* AK4671_PCM_IF_CONTROL0 (0x53) */
108*4882a593Smuzhiyun { 0x54, 0x00 }, /* AK4671_PCM_IF_CONTROL1 (0x54) */
109*4882a593Smuzhiyun { 0x55, 0x00 }, /* AK4671_PCM_IF_CONTROL2 (0x55) */
110*4882a593Smuzhiyun { 0x56, 0x18 }, /* AK4671_DIGITAL_VOLUME_B_CONTROL (0x56) */
111*4882a593Smuzhiyun { 0x57, 0x18 }, /* AK4671_DIGITAL_VOLUME_C_CONTROL (0x57) */
112*4882a593Smuzhiyun { 0x58, 0x00 }, /* AK4671_SIDETONE_VOLUME_CONTROL (0x58) */
113*4882a593Smuzhiyun { 0x59, 0x00 }, /* AK4671_DIGITAL_MIXING_CONTROL2 (0x59) */
114*4882a593Smuzhiyun { 0x5a, 0x00 }, /* AK4671_SAR_ADC_CONTROL (0x5a) */
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /*
118*4882a593Smuzhiyun * LOUT1/ROUT1 output volume control:
119*4882a593Smuzhiyun * from -24 to 6 dB in 6 dB steps (mute instead of -30 dB)
120*4882a593Smuzhiyun */
121*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(out1_tlv, -3000, 600, 1);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun /*
124*4882a593Smuzhiyun * LOUT2/ROUT2 output volume control:
125*4882a593Smuzhiyun * from -33 to 6 dB in 3 dB steps (mute instead of -33 dB)
126*4882a593Smuzhiyun */
127*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(out2_tlv, -3300, 300, 1);
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /*
130*4882a593Smuzhiyun * LOUT3/ROUT3 output volume control:
131*4882a593Smuzhiyun * from -6 to 3 dB in 3 dB steps
132*4882a593Smuzhiyun */
133*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(out3_tlv, -600, 300, 0);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun /*
136*4882a593Smuzhiyun * Mic amp gain control:
137*4882a593Smuzhiyun * from -15 to 30 dB in 3 dB steps
138*4882a593Smuzhiyun * REVISIT: The actual min value(0x01) is -12 dB and the reg value 0x00 is not
139*4882a593Smuzhiyun * available
140*4882a593Smuzhiyun */
141*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(mic_amp_tlv, -1500, 300, 0);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4671_snd_controls[] = {
144*4882a593Smuzhiyun /* Common playback gain controls */
145*4882a593Smuzhiyun SOC_SINGLE_TLV("Line Output1 Playback Volume",
146*4882a593Smuzhiyun AK4671_OUTPUT_VOLUME_CONTROL, 0, 0x6, 0, out1_tlv),
147*4882a593Smuzhiyun SOC_SINGLE_TLV("Headphone Output2 Playback Volume",
148*4882a593Smuzhiyun AK4671_OUTPUT_VOLUME_CONTROL, 4, 0xd, 0, out2_tlv),
149*4882a593Smuzhiyun SOC_SINGLE_TLV("Line Output3 Playback Volume",
150*4882a593Smuzhiyun AK4671_LOUT3_POWER_MANAGERMENT, 6, 0x3, 0, out3_tlv),
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* Common capture gain controls */
153*4882a593Smuzhiyun SOC_DOUBLE_TLV("Mic Amp Capture Volume",
154*4882a593Smuzhiyun AK4671_MIC_AMP_GAIN, 0, 4, 0xf, 0, mic_amp_tlv),
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /* event handlers */
ak4671_out2_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)158*4882a593Smuzhiyun static int ak4671_out2_event(struct snd_soc_dapm_widget *w,
159*4882a593Smuzhiyun struct snd_kcontrol *kcontrol, int event)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun switch (event) {
164*4882a593Smuzhiyun case SND_SOC_DAPM_POST_PMU:
165*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4671_LOUT2_POWER_MANAGERMENT,
166*4882a593Smuzhiyun AK4671_MUTEN, AK4671_MUTEN);
167*4882a593Smuzhiyun break;
168*4882a593Smuzhiyun case SND_SOC_DAPM_PRE_PMD:
169*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4671_LOUT2_POWER_MANAGERMENT,
170*4882a593Smuzhiyun AK4671_MUTEN, 0);
171*4882a593Smuzhiyun break;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun return 0;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun /* Output Mixers */
178*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4671_lout1_mixer_controls[] = {
179*4882a593Smuzhiyun SOC_DAPM_SINGLE("DACL", AK4671_LOUT1_SIGNAL_SELECT, 0, 1, 0),
180*4882a593Smuzhiyun SOC_DAPM_SINGLE("LINL1", AK4671_LOUT1_SIGNAL_SELECT, 1, 1, 0),
181*4882a593Smuzhiyun SOC_DAPM_SINGLE("LINL2", AK4671_LOUT1_SIGNAL_SELECT, 2, 1, 0),
182*4882a593Smuzhiyun SOC_DAPM_SINGLE("LINL3", AK4671_LOUT1_SIGNAL_SELECT, 3, 1, 0),
183*4882a593Smuzhiyun SOC_DAPM_SINGLE("LINL4", AK4671_LOUT1_SIGNAL_SELECT, 4, 1, 0),
184*4882a593Smuzhiyun SOC_DAPM_SINGLE("LOOPL", AK4671_LOUT1_SIGNAL_SELECT, 5, 1, 0),
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4671_rout1_mixer_controls[] = {
188*4882a593Smuzhiyun SOC_DAPM_SINGLE("DACR", AK4671_ROUT1_SIGNAL_SELECT, 0, 1, 0),
189*4882a593Smuzhiyun SOC_DAPM_SINGLE("RINR1", AK4671_ROUT1_SIGNAL_SELECT, 1, 1, 0),
190*4882a593Smuzhiyun SOC_DAPM_SINGLE("RINR2", AK4671_ROUT1_SIGNAL_SELECT, 2, 1, 0),
191*4882a593Smuzhiyun SOC_DAPM_SINGLE("RINR3", AK4671_ROUT1_SIGNAL_SELECT, 3, 1, 0),
192*4882a593Smuzhiyun SOC_DAPM_SINGLE("RINR4", AK4671_ROUT1_SIGNAL_SELECT, 4, 1, 0),
193*4882a593Smuzhiyun SOC_DAPM_SINGLE("LOOPR", AK4671_ROUT1_SIGNAL_SELECT, 5, 1, 0),
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4671_lout2_mixer_controls[] = {
197*4882a593Smuzhiyun SOC_DAPM_SINGLE("DACHL", AK4671_LOUT2_SIGNAL_SELECT, 0, 1, 0),
198*4882a593Smuzhiyun SOC_DAPM_SINGLE("LINH1", AK4671_LOUT2_SIGNAL_SELECT, 1, 1, 0),
199*4882a593Smuzhiyun SOC_DAPM_SINGLE("LINH2", AK4671_LOUT2_SIGNAL_SELECT, 2, 1, 0),
200*4882a593Smuzhiyun SOC_DAPM_SINGLE("LINH3", AK4671_LOUT2_SIGNAL_SELECT, 3, 1, 0),
201*4882a593Smuzhiyun SOC_DAPM_SINGLE("LINH4", AK4671_LOUT2_SIGNAL_SELECT, 4, 1, 0),
202*4882a593Smuzhiyun SOC_DAPM_SINGLE("LOOPHL", AK4671_LOUT2_SIGNAL_SELECT, 5, 1, 0),
203*4882a593Smuzhiyun };
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4671_rout2_mixer_controls[] = {
206*4882a593Smuzhiyun SOC_DAPM_SINGLE("DACHR", AK4671_ROUT2_SIGNAL_SELECT, 0, 1, 0),
207*4882a593Smuzhiyun SOC_DAPM_SINGLE("RINH1", AK4671_ROUT2_SIGNAL_SELECT, 1, 1, 0),
208*4882a593Smuzhiyun SOC_DAPM_SINGLE("RINH2", AK4671_ROUT2_SIGNAL_SELECT, 2, 1, 0),
209*4882a593Smuzhiyun SOC_DAPM_SINGLE("RINH3", AK4671_ROUT2_SIGNAL_SELECT, 3, 1, 0),
210*4882a593Smuzhiyun SOC_DAPM_SINGLE("RINH4", AK4671_ROUT2_SIGNAL_SELECT, 4, 1, 0),
211*4882a593Smuzhiyun SOC_DAPM_SINGLE("LOOPHR", AK4671_ROUT2_SIGNAL_SELECT, 5, 1, 0),
212*4882a593Smuzhiyun };
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4671_lout3_mixer_controls[] = {
215*4882a593Smuzhiyun SOC_DAPM_SINGLE("DACSL", AK4671_LOUT3_SIGNAL_SELECT, 0, 1, 0),
216*4882a593Smuzhiyun SOC_DAPM_SINGLE("LINS1", AK4671_LOUT3_SIGNAL_SELECT, 1, 1, 0),
217*4882a593Smuzhiyun SOC_DAPM_SINGLE("LINS2", AK4671_LOUT3_SIGNAL_SELECT, 2, 1, 0),
218*4882a593Smuzhiyun SOC_DAPM_SINGLE("LINS3", AK4671_LOUT3_SIGNAL_SELECT, 3, 1, 0),
219*4882a593Smuzhiyun SOC_DAPM_SINGLE("LINS4", AK4671_LOUT3_SIGNAL_SELECT, 4, 1, 0),
220*4882a593Smuzhiyun SOC_DAPM_SINGLE("LOOPSL", AK4671_LOUT3_SIGNAL_SELECT, 5, 1, 0),
221*4882a593Smuzhiyun };
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4671_rout3_mixer_controls[] = {
224*4882a593Smuzhiyun SOC_DAPM_SINGLE("DACSR", AK4671_ROUT3_SIGNAL_SELECT, 0, 1, 0),
225*4882a593Smuzhiyun SOC_DAPM_SINGLE("RINS1", AK4671_ROUT3_SIGNAL_SELECT, 1, 1, 0),
226*4882a593Smuzhiyun SOC_DAPM_SINGLE("RINS2", AK4671_ROUT3_SIGNAL_SELECT, 2, 1, 0),
227*4882a593Smuzhiyun SOC_DAPM_SINGLE("RINS3", AK4671_ROUT3_SIGNAL_SELECT, 3, 1, 0),
228*4882a593Smuzhiyun SOC_DAPM_SINGLE("RINS4", AK4671_ROUT3_SIGNAL_SELECT, 4, 1, 0),
229*4882a593Smuzhiyun SOC_DAPM_SINGLE("LOOPSR", AK4671_ROUT3_SIGNAL_SELECT, 5, 1, 0),
230*4882a593Smuzhiyun };
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun /* Input MUXs */
233*4882a593Smuzhiyun static const char *ak4671_lin_mux_texts[] =
234*4882a593Smuzhiyun {"LIN1", "LIN2", "LIN3", "LIN4"};
235*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(ak4671_lin_mux_enum,
236*4882a593Smuzhiyun AK4671_MIC_SIGNAL_SELECT, 0,
237*4882a593Smuzhiyun ak4671_lin_mux_texts);
238*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4671_lin_mux_control =
239*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", ak4671_lin_mux_enum);
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun static const char *ak4671_rin_mux_texts[] =
242*4882a593Smuzhiyun {"RIN1", "RIN2", "RIN3", "RIN4"};
243*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(ak4671_rin_mux_enum,
244*4882a593Smuzhiyun AK4671_MIC_SIGNAL_SELECT, 2,
245*4882a593Smuzhiyun ak4671_rin_mux_texts);
246*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4671_rin_mux_control =
247*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", ak4671_rin_mux_enum);
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun static const struct snd_soc_dapm_widget ak4671_dapm_widgets[] = {
250*4882a593Smuzhiyun /* Inputs */
251*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LIN1"),
252*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("RIN1"),
253*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LIN2"),
254*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("RIN2"),
255*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LIN3"),
256*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("RIN3"),
257*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LIN4"),
258*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("RIN4"),
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun /* Outputs */
261*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LOUT1"),
262*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("ROUT1"),
263*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LOUT2"),
264*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("ROUT2"),
265*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LOUT3"),
266*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("ROUT3"),
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun /* DAC */
269*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC Left", "Left HiFi Playback",
270*4882a593Smuzhiyun AK4671_AD_DA_POWER_MANAGEMENT, 6, 0),
271*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC Right", "Right HiFi Playback",
272*4882a593Smuzhiyun AK4671_AD_DA_POWER_MANAGEMENT, 7, 0),
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun /* ADC */
275*4882a593Smuzhiyun SND_SOC_DAPM_ADC("ADC Left", "Left HiFi Capture",
276*4882a593Smuzhiyun AK4671_AD_DA_POWER_MANAGEMENT, 4, 0),
277*4882a593Smuzhiyun SND_SOC_DAPM_ADC("ADC Right", "Right HiFi Capture",
278*4882a593Smuzhiyun AK4671_AD_DA_POWER_MANAGEMENT, 5, 0),
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun /* PGA */
281*4882a593Smuzhiyun SND_SOC_DAPM_PGA("LOUT2 Mix Amp",
282*4882a593Smuzhiyun AK4671_LOUT2_POWER_MANAGERMENT, 5, 0, NULL, 0),
283*4882a593Smuzhiyun SND_SOC_DAPM_PGA("ROUT2 Mix Amp",
284*4882a593Smuzhiyun AK4671_LOUT2_POWER_MANAGERMENT, 6, 0, NULL, 0),
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun SND_SOC_DAPM_PGA("LIN1 Mixing Circuit",
287*4882a593Smuzhiyun AK4671_MIXING_POWER_MANAGEMENT1, 0, 0, NULL, 0),
288*4882a593Smuzhiyun SND_SOC_DAPM_PGA("RIN1 Mixing Circuit",
289*4882a593Smuzhiyun AK4671_MIXING_POWER_MANAGEMENT1, 1, 0, NULL, 0),
290*4882a593Smuzhiyun SND_SOC_DAPM_PGA("LIN2 Mixing Circuit",
291*4882a593Smuzhiyun AK4671_MIXING_POWER_MANAGEMENT1, 2, 0, NULL, 0),
292*4882a593Smuzhiyun SND_SOC_DAPM_PGA("RIN2 Mixing Circuit",
293*4882a593Smuzhiyun AK4671_MIXING_POWER_MANAGEMENT1, 3, 0, NULL, 0),
294*4882a593Smuzhiyun SND_SOC_DAPM_PGA("LIN3 Mixing Circuit",
295*4882a593Smuzhiyun AK4671_MIXING_POWER_MANAGEMENT1, 4, 0, NULL, 0),
296*4882a593Smuzhiyun SND_SOC_DAPM_PGA("RIN3 Mixing Circuit",
297*4882a593Smuzhiyun AK4671_MIXING_POWER_MANAGEMENT1, 5, 0, NULL, 0),
298*4882a593Smuzhiyun SND_SOC_DAPM_PGA("LIN4 Mixing Circuit",
299*4882a593Smuzhiyun AK4671_MIXING_POWER_MANAGEMENT1, 6, 0, NULL, 0),
300*4882a593Smuzhiyun SND_SOC_DAPM_PGA("RIN4 Mixing Circuit",
301*4882a593Smuzhiyun AK4671_MIXING_POWER_MANAGEMENT1, 7, 0, NULL, 0),
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun /* Output Mixers */
304*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("LOUT1 Mixer", AK4671_LOUT1_POWER_MANAGERMENT, 0, 0,
305*4882a593Smuzhiyun &ak4671_lout1_mixer_controls[0],
306*4882a593Smuzhiyun ARRAY_SIZE(ak4671_lout1_mixer_controls)),
307*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("ROUT1 Mixer", AK4671_LOUT1_POWER_MANAGERMENT, 1, 0,
308*4882a593Smuzhiyun &ak4671_rout1_mixer_controls[0],
309*4882a593Smuzhiyun ARRAY_SIZE(ak4671_rout1_mixer_controls)),
310*4882a593Smuzhiyun SND_SOC_DAPM_MIXER_E("LOUT2 Mixer", AK4671_LOUT2_POWER_MANAGERMENT,
311*4882a593Smuzhiyun 0, 0, &ak4671_lout2_mixer_controls[0],
312*4882a593Smuzhiyun ARRAY_SIZE(ak4671_lout2_mixer_controls),
313*4882a593Smuzhiyun ak4671_out2_event,
314*4882a593Smuzhiyun SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_PRE_PMD),
315*4882a593Smuzhiyun SND_SOC_DAPM_MIXER_E("ROUT2 Mixer", AK4671_LOUT2_POWER_MANAGERMENT,
316*4882a593Smuzhiyun 1, 0, &ak4671_rout2_mixer_controls[0],
317*4882a593Smuzhiyun ARRAY_SIZE(ak4671_rout2_mixer_controls),
318*4882a593Smuzhiyun ak4671_out2_event,
319*4882a593Smuzhiyun SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_PRE_PMD),
320*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("LOUT3 Mixer", AK4671_LOUT3_POWER_MANAGERMENT, 0, 0,
321*4882a593Smuzhiyun &ak4671_lout3_mixer_controls[0],
322*4882a593Smuzhiyun ARRAY_SIZE(ak4671_lout3_mixer_controls)),
323*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("ROUT3 Mixer", AK4671_LOUT3_POWER_MANAGERMENT, 1, 0,
324*4882a593Smuzhiyun &ak4671_rout3_mixer_controls[0],
325*4882a593Smuzhiyun ARRAY_SIZE(ak4671_rout3_mixer_controls)),
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun /* Input MUXs */
328*4882a593Smuzhiyun SND_SOC_DAPM_MUX("LIN MUX", AK4671_AD_DA_POWER_MANAGEMENT, 2, 0,
329*4882a593Smuzhiyun &ak4671_lin_mux_control),
330*4882a593Smuzhiyun SND_SOC_DAPM_MUX("RIN MUX", AK4671_AD_DA_POWER_MANAGEMENT, 3, 0,
331*4882a593Smuzhiyun &ak4671_rin_mux_control),
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun /* Mic Power */
334*4882a593Smuzhiyun SND_SOC_DAPM_MICBIAS("Mic Bias", AK4671_AD_DA_POWER_MANAGEMENT, 1, 0),
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun /* Supply */
337*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("PMPLL", AK4671_PLL_MODE_SELECT1, 0, 0, NULL, 0),
338*4882a593Smuzhiyun };
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun static const struct snd_soc_dapm_route ak4671_intercon[] = {
341*4882a593Smuzhiyun {"DAC Left", NULL, "PMPLL"},
342*4882a593Smuzhiyun {"DAC Right", NULL, "PMPLL"},
343*4882a593Smuzhiyun {"ADC Left", NULL, "PMPLL"},
344*4882a593Smuzhiyun {"ADC Right", NULL, "PMPLL"},
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /* Outputs */
347*4882a593Smuzhiyun {"LOUT1", NULL, "LOUT1 Mixer"},
348*4882a593Smuzhiyun {"ROUT1", NULL, "ROUT1 Mixer"},
349*4882a593Smuzhiyun {"LOUT2", NULL, "LOUT2 Mix Amp"},
350*4882a593Smuzhiyun {"ROUT2", NULL, "ROUT2 Mix Amp"},
351*4882a593Smuzhiyun {"LOUT3", NULL, "LOUT3 Mixer"},
352*4882a593Smuzhiyun {"ROUT3", NULL, "ROUT3 Mixer"},
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun {"LOUT1 Mixer", "DACL", "DAC Left"},
355*4882a593Smuzhiyun {"ROUT1 Mixer", "DACR", "DAC Right"},
356*4882a593Smuzhiyun {"LOUT2 Mixer", "DACHL", "DAC Left"},
357*4882a593Smuzhiyun {"ROUT2 Mixer", "DACHR", "DAC Right"},
358*4882a593Smuzhiyun {"LOUT2 Mix Amp", NULL, "LOUT2 Mixer"},
359*4882a593Smuzhiyun {"ROUT2 Mix Amp", NULL, "ROUT2 Mixer"},
360*4882a593Smuzhiyun {"LOUT3 Mixer", "DACSL", "DAC Left"},
361*4882a593Smuzhiyun {"ROUT3 Mixer", "DACSR", "DAC Right"},
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun /* Inputs */
364*4882a593Smuzhiyun {"LIN MUX", "LIN1", "LIN1"},
365*4882a593Smuzhiyun {"LIN MUX", "LIN2", "LIN2"},
366*4882a593Smuzhiyun {"LIN MUX", "LIN3", "LIN3"},
367*4882a593Smuzhiyun {"LIN MUX", "LIN4", "LIN4"},
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun {"RIN MUX", "RIN1", "RIN1"},
370*4882a593Smuzhiyun {"RIN MUX", "RIN2", "RIN2"},
371*4882a593Smuzhiyun {"RIN MUX", "RIN3", "RIN3"},
372*4882a593Smuzhiyun {"RIN MUX", "RIN4", "RIN4"},
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun {"LIN1", NULL, "Mic Bias"},
375*4882a593Smuzhiyun {"RIN1", NULL, "Mic Bias"},
376*4882a593Smuzhiyun {"LIN2", NULL, "Mic Bias"},
377*4882a593Smuzhiyun {"RIN2", NULL, "Mic Bias"},
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun {"ADC Left", NULL, "LIN MUX"},
380*4882a593Smuzhiyun {"ADC Right", NULL, "RIN MUX"},
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun /* Analog Loops */
383*4882a593Smuzhiyun {"LIN1 Mixing Circuit", NULL, "LIN1"},
384*4882a593Smuzhiyun {"RIN1 Mixing Circuit", NULL, "RIN1"},
385*4882a593Smuzhiyun {"LIN2 Mixing Circuit", NULL, "LIN2"},
386*4882a593Smuzhiyun {"RIN2 Mixing Circuit", NULL, "RIN2"},
387*4882a593Smuzhiyun {"LIN3 Mixing Circuit", NULL, "LIN3"},
388*4882a593Smuzhiyun {"RIN3 Mixing Circuit", NULL, "RIN3"},
389*4882a593Smuzhiyun {"LIN4 Mixing Circuit", NULL, "LIN4"},
390*4882a593Smuzhiyun {"RIN4 Mixing Circuit", NULL, "RIN4"},
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun {"LOUT1 Mixer", "LINL1", "LIN1 Mixing Circuit"},
393*4882a593Smuzhiyun {"ROUT1 Mixer", "RINR1", "RIN1 Mixing Circuit"},
394*4882a593Smuzhiyun {"LOUT2 Mixer", "LINH1", "LIN1 Mixing Circuit"},
395*4882a593Smuzhiyun {"ROUT2 Mixer", "RINH1", "RIN1 Mixing Circuit"},
396*4882a593Smuzhiyun {"LOUT3 Mixer", "LINS1", "LIN1 Mixing Circuit"},
397*4882a593Smuzhiyun {"ROUT3 Mixer", "RINS1", "RIN1 Mixing Circuit"},
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun {"LOUT1 Mixer", "LINL2", "LIN2 Mixing Circuit"},
400*4882a593Smuzhiyun {"ROUT1 Mixer", "RINR2", "RIN2 Mixing Circuit"},
401*4882a593Smuzhiyun {"LOUT2 Mixer", "LINH2", "LIN2 Mixing Circuit"},
402*4882a593Smuzhiyun {"ROUT2 Mixer", "RINH2", "RIN2 Mixing Circuit"},
403*4882a593Smuzhiyun {"LOUT3 Mixer", "LINS2", "LIN2 Mixing Circuit"},
404*4882a593Smuzhiyun {"ROUT3 Mixer", "RINS2", "RIN2 Mixing Circuit"},
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun {"LOUT1 Mixer", "LINL3", "LIN3 Mixing Circuit"},
407*4882a593Smuzhiyun {"ROUT1 Mixer", "RINR3", "RIN3 Mixing Circuit"},
408*4882a593Smuzhiyun {"LOUT2 Mixer", "LINH3", "LIN3 Mixing Circuit"},
409*4882a593Smuzhiyun {"ROUT2 Mixer", "RINH3", "RIN3 Mixing Circuit"},
410*4882a593Smuzhiyun {"LOUT3 Mixer", "LINS3", "LIN3 Mixing Circuit"},
411*4882a593Smuzhiyun {"ROUT3 Mixer", "RINS3", "RIN3 Mixing Circuit"},
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun {"LOUT1 Mixer", "LINL4", "LIN4 Mixing Circuit"},
414*4882a593Smuzhiyun {"ROUT1 Mixer", "RINR4", "RIN4 Mixing Circuit"},
415*4882a593Smuzhiyun {"LOUT2 Mixer", "LINH4", "LIN4 Mixing Circuit"},
416*4882a593Smuzhiyun {"ROUT2 Mixer", "RINH4", "RIN4 Mixing Circuit"},
417*4882a593Smuzhiyun {"LOUT3 Mixer", "LINS4", "LIN4 Mixing Circuit"},
418*4882a593Smuzhiyun {"ROUT3 Mixer", "RINS4", "RIN4 Mixing Circuit"},
419*4882a593Smuzhiyun };
420*4882a593Smuzhiyun
ak4671_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)421*4882a593Smuzhiyun static int ak4671_hw_params(struct snd_pcm_substream *substream,
422*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
423*4882a593Smuzhiyun struct snd_soc_dai *dai)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
426*4882a593Smuzhiyun u8 fs;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun fs = snd_soc_component_read(component, AK4671_PLL_MODE_SELECT0);
429*4882a593Smuzhiyun fs &= ~AK4671_FS;
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun switch (params_rate(params)) {
432*4882a593Smuzhiyun case 8000:
433*4882a593Smuzhiyun fs |= AK4671_FS_8KHZ;
434*4882a593Smuzhiyun break;
435*4882a593Smuzhiyun case 12000:
436*4882a593Smuzhiyun fs |= AK4671_FS_12KHZ;
437*4882a593Smuzhiyun break;
438*4882a593Smuzhiyun case 16000:
439*4882a593Smuzhiyun fs |= AK4671_FS_16KHZ;
440*4882a593Smuzhiyun break;
441*4882a593Smuzhiyun case 24000:
442*4882a593Smuzhiyun fs |= AK4671_FS_24KHZ;
443*4882a593Smuzhiyun break;
444*4882a593Smuzhiyun case 11025:
445*4882a593Smuzhiyun fs |= AK4671_FS_11_025KHZ;
446*4882a593Smuzhiyun break;
447*4882a593Smuzhiyun case 22050:
448*4882a593Smuzhiyun fs |= AK4671_FS_22_05KHZ;
449*4882a593Smuzhiyun break;
450*4882a593Smuzhiyun case 32000:
451*4882a593Smuzhiyun fs |= AK4671_FS_32KHZ;
452*4882a593Smuzhiyun break;
453*4882a593Smuzhiyun case 44100:
454*4882a593Smuzhiyun fs |= AK4671_FS_44_1KHZ;
455*4882a593Smuzhiyun break;
456*4882a593Smuzhiyun case 48000:
457*4882a593Smuzhiyun fs |= AK4671_FS_48KHZ;
458*4882a593Smuzhiyun break;
459*4882a593Smuzhiyun default:
460*4882a593Smuzhiyun return -EINVAL;
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun snd_soc_component_write(component, AK4671_PLL_MODE_SELECT0, fs);
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun return 0;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun
ak4671_set_dai_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)468*4882a593Smuzhiyun static int ak4671_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
469*4882a593Smuzhiyun unsigned int freq, int dir)
470*4882a593Smuzhiyun {
471*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
472*4882a593Smuzhiyun u8 pll;
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun pll = snd_soc_component_read(component, AK4671_PLL_MODE_SELECT0);
475*4882a593Smuzhiyun pll &= ~AK4671_PLL;
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun switch (freq) {
478*4882a593Smuzhiyun case 11289600:
479*4882a593Smuzhiyun pll |= AK4671_PLL_11_2896MHZ;
480*4882a593Smuzhiyun break;
481*4882a593Smuzhiyun case 12000000:
482*4882a593Smuzhiyun pll |= AK4671_PLL_12MHZ;
483*4882a593Smuzhiyun break;
484*4882a593Smuzhiyun case 12288000:
485*4882a593Smuzhiyun pll |= AK4671_PLL_12_288MHZ;
486*4882a593Smuzhiyun break;
487*4882a593Smuzhiyun case 13000000:
488*4882a593Smuzhiyun pll |= AK4671_PLL_13MHZ;
489*4882a593Smuzhiyun break;
490*4882a593Smuzhiyun case 13500000:
491*4882a593Smuzhiyun pll |= AK4671_PLL_13_5MHZ;
492*4882a593Smuzhiyun break;
493*4882a593Smuzhiyun case 19200000:
494*4882a593Smuzhiyun pll |= AK4671_PLL_19_2MHZ;
495*4882a593Smuzhiyun break;
496*4882a593Smuzhiyun case 24000000:
497*4882a593Smuzhiyun pll |= AK4671_PLL_24MHZ;
498*4882a593Smuzhiyun break;
499*4882a593Smuzhiyun case 26000000:
500*4882a593Smuzhiyun pll |= AK4671_PLL_26MHZ;
501*4882a593Smuzhiyun break;
502*4882a593Smuzhiyun case 27000000:
503*4882a593Smuzhiyun pll |= AK4671_PLL_27MHZ;
504*4882a593Smuzhiyun break;
505*4882a593Smuzhiyun default:
506*4882a593Smuzhiyun return -EINVAL;
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun snd_soc_component_write(component, AK4671_PLL_MODE_SELECT0, pll);
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun return 0;
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun
ak4671_set_dai_fmt(struct snd_soc_dai * dai,unsigned int fmt)514*4882a593Smuzhiyun static int ak4671_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
515*4882a593Smuzhiyun {
516*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
517*4882a593Smuzhiyun u8 mode;
518*4882a593Smuzhiyun u8 format;
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun /* set master/slave audio interface */
521*4882a593Smuzhiyun mode = snd_soc_component_read(component, AK4671_PLL_MODE_SELECT1);
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
524*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFM:
525*4882a593Smuzhiyun mode |= AK4671_M_S;
526*4882a593Smuzhiyun break;
527*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFS:
528*4882a593Smuzhiyun mode &= ~(AK4671_M_S);
529*4882a593Smuzhiyun break;
530*4882a593Smuzhiyun default:
531*4882a593Smuzhiyun return -EINVAL;
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun /* interface format */
535*4882a593Smuzhiyun format = snd_soc_component_read(component, AK4671_FORMAT_SELECT);
536*4882a593Smuzhiyun format &= ~AK4671_DIF;
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
539*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
540*4882a593Smuzhiyun format |= AK4671_DIF_I2S_MODE;
541*4882a593Smuzhiyun break;
542*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
543*4882a593Smuzhiyun format |= AK4671_DIF_MSB_MODE;
544*4882a593Smuzhiyun break;
545*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_A:
546*4882a593Smuzhiyun format |= AK4671_DIF_DSP_MODE;
547*4882a593Smuzhiyun format |= AK4671_BCKP;
548*4882a593Smuzhiyun format |= AK4671_MSBS;
549*4882a593Smuzhiyun break;
550*4882a593Smuzhiyun default:
551*4882a593Smuzhiyun return -EINVAL;
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun /* set mode and format */
555*4882a593Smuzhiyun snd_soc_component_write(component, AK4671_PLL_MODE_SELECT1, mode);
556*4882a593Smuzhiyun snd_soc_component_write(component, AK4671_FORMAT_SELECT, format);
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun return 0;
559*4882a593Smuzhiyun }
560*4882a593Smuzhiyun
ak4671_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)561*4882a593Smuzhiyun static int ak4671_set_bias_level(struct snd_soc_component *component,
562*4882a593Smuzhiyun enum snd_soc_bias_level level)
563*4882a593Smuzhiyun {
564*4882a593Smuzhiyun switch (level) {
565*4882a593Smuzhiyun case SND_SOC_BIAS_ON:
566*4882a593Smuzhiyun case SND_SOC_BIAS_PREPARE:
567*4882a593Smuzhiyun case SND_SOC_BIAS_STANDBY:
568*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4671_AD_DA_POWER_MANAGEMENT,
569*4882a593Smuzhiyun AK4671_PMVCM, AK4671_PMVCM);
570*4882a593Smuzhiyun break;
571*4882a593Smuzhiyun case SND_SOC_BIAS_OFF:
572*4882a593Smuzhiyun snd_soc_component_write(component, AK4671_AD_DA_POWER_MANAGEMENT, 0x00);
573*4882a593Smuzhiyun break;
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun return 0;
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun #define AK4671_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
579*4882a593Smuzhiyun SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
580*4882a593Smuzhiyun SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
581*4882a593Smuzhiyun SNDRV_PCM_RATE_48000)
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun #define AK4671_FORMATS SNDRV_PCM_FMTBIT_S16_LE
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun static const struct snd_soc_dai_ops ak4671_dai_ops = {
586*4882a593Smuzhiyun .hw_params = ak4671_hw_params,
587*4882a593Smuzhiyun .set_sysclk = ak4671_set_dai_sysclk,
588*4882a593Smuzhiyun .set_fmt = ak4671_set_dai_fmt,
589*4882a593Smuzhiyun };
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun static struct snd_soc_dai_driver ak4671_dai = {
592*4882a593Smuzhiyun .name = "ak4671-hifi",
593*4882a593Smuzhiyun .playback = {
594*4882a593Smuzhiyun .stream_name = "Playback",
595*4882a593Smuzhiyun .channels_min = 1,
596*4882a593Smuzhiyun .channels_max = 2,
597*4882a593Smuzhiyun .rates = AK4671_RATES,
598*4882a593Smuzhiyun .formats = AK4671_FORMATS,},
599*4882a593Smuzhiyun .capture = {
600*4882a593Smuzhiyun .stream_name = "Capture",
601*4882a593Smuzhiyun .channels_min = 1,
602*4882a593Smuzhiyun .channels_max = 2,
603*4882a593Smuzhiyun .rates = AK4671_RATES,
604*4882a593Smuzhiyun .formats = AK4671_FORMATS,},
605*4882a593Smuzhiyun .ops = &ak4671_dai_ops,
606*4882a593Smuzhiyun };
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_ak4671 = {
609*4882a593Smuzhiyun .set_bias_level = ak4671_set_bias_level,
610*4882a593Smuzhiyun .controls = ak4671_snd_controls,
611*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(ak4671_snd_controls),
612*4882a593Smuzhiyun .dapm_widgets = ak4671_dapm_widgets,
613*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(ak4671_dapm_widgets),
614*4882a593Smuzhiyun .dapm_routes = ak4671_intercon,
615*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(ak4671_intercon),
616*4882a593Smuzhiyun .idle_bias_on = 1,
617*4882a593Smuzhiyun .use_pmdown_time = 1,
618*4882a593Smuzhiyun .endianness = 1,
619*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
620*4882a593Smuzhiyun };
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun static const struct regmap_config ak4671_regmap = {
623*4882a593Smuzhiyun .reg_bits = 8,
624*4882a593Smuzhiyun .val_bits = 8,
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun .max_register = AK4671_SAR_ADC_CONTROL,
627*4882a593Smuzhiyun .reg_defaults = ak4671_reg_defaults,
628*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(ak4671_reg_defaults),
629*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
630*4882a593Smuzhiyun };
631*4882a593Smuzhiyun
ak4671_i2c_probe(struct i2c_client * client,const struct i2c_device_id * id)632*4882a593Smuzhiyun static int ak4671_i2c_probe(struct i2c_client *client,
633*4882a593Smuzhiyun const struct i2c_device_id *id)
634*4882a593Smuzhiyun {
635*4882a593Smuzhiyun struct regmap *regmap;
636*4882a593Smuzhiyun int ret;
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun regmap = devm_regmap_init_i2c(client, &ak4671_regmap);
639*4882a593Smuzhiyun if (IS_ERR(regmap)) {
640*4882a593Smuzhiyun ret = PTR_ERR(regmap);
641*4882a593Smuzhiyun dev_err(&client->dev, "Failed to create regmap: %d\n", ret);
642*4882a593Smuzhiyun return ret;
643*4882a593Smuzhiyun }
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun ret = devm_snd_soc_register_component(&client->dev,
646*4882a593Smuzhiyun &soc_component_dev_ak4671, &ak4671_dai, 1);
647*4882a593Smuzhiyun return ret;
648*4882a593Smuzhiyun }
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun static const struct i2c_device_id ak4671_i2c_id[] = {
651*4882a593Smuzhiyun { "ak4671", 0 },
652*4882a593Smuzhiyun { }
653*4882a593Smuzhiyun };
654*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, ak4671_i2c_id);
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun static struct i2c_driver ak4671_i2c_driver = {
657*4882a593Smuzhiyun .driver = {
658*4882a593Smuzhiyun .name = "ak4671-codec",
659*4882a593Smuzhiyun },
660*4882a593Smuzhiyun .probe = ak4671_i2c_probe,
661*4882a593Smuzhiyun .id_table = ak4671_i2c_id,
662*4882a593Smuzhiyun };
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun module_i2c_driver(ak4671_i2c_driver);
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC AK4671 codec driver");
667*4882a593Smuzhiyun MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
668*4882a593Smuzhiyun MODULE_LICENSE("GPL");
669