xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/ak4613.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // ak4613.c  --  Asahi Kasei ALSA Soc Audio driver
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2015 Renesas Electronics Corporation
6*4882a593Smuzhiyun // Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
7*4882a593Smuzhiyun //
8*4882a593Smuzhiyun // Based on ak4642.c by Kuninori Morimoto
9*4882a593Smuzhiyun // Based on wm8731.c by Richard Purdie
10*4882a593Smuzhiyun // Based on ak4535.c by Richard Purdie
11*4882a593Smuzhiyun // Based on wm8753.c by Liam Girdwood
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/clk.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <linux/of_device.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/regmap.h>
20*4882a593Smuzhiyun #include <sound/soc.h>
21*4882a593Smuzhiyun #include <sound/pcm_params.h>
22*4882a593Smuzhiyun #include <sound/tlv.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define PW_MGMT1	0x00 /* Power Management 1 */
25*4882a593Smuzhiyun #define PW_MGMT2	0x01 /* Power Management 2 */
26*4882a593Smuzhiyun #define PW_MGMT3	0x02 /* Power Management 3 */
27*4882a593Smuzhiyun #define CTRL1		0x03 /* Control 1 */
28*4882a593Smuzhiyun #define CTRL2		0x04 /* Control 2 */
29*4882a593Smuzhiyun #define DEMP1		0x05 /* De-emphasis1 */
30*4882a593Smuzhiyun #define DEMP2		0x06 /* De-emphasis2 */
31*4882a593Smuzhiyun #define OFD		0x07 /* Overflow Detect */
32*4882a593Smuzhiyun #define ZRD		0x08 /* Zero Detect */
33*4882a593Smuzhiyun #define ICTRL		0x09 /* Input Control */
34*4882a593Smuzhiyun #define OCTRL		0x0a /* Output Control */
35*4882a593Smuzhiyun #define LOUT1		0x0b /* LOUT1 Volume Control */
36*4882a593Smuzhiyun #define ROUT1		0x0c /* ROUT1 Volume Control */
37*4882a593Smuzhiyun #define LOUT2		0x0d /* LOUT2 Volume Control */
38*4882a593Smuzhiyun #define ROUT2		0x0e /* ROUT2 Volume Control */
39*4882a593Smuzhiyun #define LOUT3		0x0f /* LOUT3 Volume Control */
40*4882a593Smuzhiyun #define ROUT3		0x10 /* ROUT3 Volume Control */
41*4882a593Smuzhiyun #define LOUT4		0x11 /* LOUT4 Volume Control */
42*4882a593Smuzhiyun #define ROUT4		0x12 /* ROUT4 Volume Control */
43*4882a593Smuzhiyun #define LOUT5		0x13 /* LOUT5 Volume Control */
44*4882a593Smuzhiyun #define ROUT5		0x14 /* ROUT5 Volume Control */
45*4882a593Smuzhiyun #define LOUT6		0x15 /* LOUT6 Volume Control */
46*4882a593Smuzhiyun #define ROUT6		0x16 /* ROUT6 Volume Control */
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /* PW_MGMT1 */
49*4882a593Smuzhiyun #define RSTN		BIT(0)
50*4882a593Smuzhiyun #define PMDAC		BIT(1)
51*4882a593Smuzhiyun #define PMADC		BIT(2)
52*4882a593Smuzhiyun #define PMVR		BIT(3)
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun /* PW_MGMT2 */
55*4882a593Smuzhiyun #define PMAD_ALL	0x7
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun /* PW_MGMT3 */
58*4882a593Smuzhiyun #define PMDA_ALL	0x3f
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /* CTRL1 */
61*4882a593Smuzhiyun #define DIF0		BIT(3)
62*4882a593Smuzhiyun #define DIF1		BIT(4)
63*4882a593Smuzhiyun #define DIF2		BIT(5)
64*4882a593Smuzhiyun #define TDM0		BIT(6)
65*4882a593Smuzhiyun #define TDM1		BIT(7)
66*4882a593Smuzhiyun #define NO_FMT		(0xff)
67*4882a593Smuzhiyun #define FMT_MASK	(0xf8)
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun /* CTRL2 */
70*4882a593Smuzhiyun #define DFS_MASK		(3 << 2)
71*4882a593Smuzhiyun #define DFS_NORMAL_SPEED	(0 << 2)
72*4882a593Smuzhiyun #define DFS_DOUBLE_SPEED	(1 << 2)
73*4882a593Smuzhiyun #define DFS_QUAD_SPEED		(2 << 2)
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun /* ICTRL */
76*4882a593Smuzhiyun #define ICTRL_MASK	(0x3)
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /* OCTRL */
79*4882a593Smuzhiyun #define OCTRL_MASK	(0x3F)
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun struct ak4613_formats {
82*4882a593Smuzhiyun 	unsigned int width;
83*4882a593Smuzhiyun 	unsigned int fmt;
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun struct ak4613_interface {
87*4882a593Smuzhiyun 	struct ak4613_formats capture;
88*4882a593Smuzhiyun 	struct ak4613_formats playback;
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun struct ak4613_priv {
92*4882a593Smuzhiyun 	struct mutex lock;
93*4882a593Smuzhiyun 	const struct ak4613_interface *iface;
94*4882a593Smuzhiyun 	struct snd_pcm_hw_constraint_list constraint;
95*4882a593Smuzhiyun 	struct work_struct dummy_write_work;
96*4882a593Smuzhiyun 	struct snd_soc_component *component;
97*4882a593Smuzhiyun 	unsigned int rate;
98*4882a593Smuzhiyun 	unsigned int sysclk;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	unsigned int fmt;
101*4882a593Smuzhiyun 	u8 oc;
102*4882a593Smuzhiyun 	u8 ic;
103*4882a593Smuzhiyun 	int cnt;
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun /*
107*4882a593Smuzhiyun  * Playback Volume
108*4882a593Smuzhiyun  *
109*4882a593Smuzhiyun  * max : 0x00 : 0 dB
110*4882a593Smuzhiyun  *       ( 0.5 dB step )
111*4882a593Smuzhiyun  * min : 0xFE : -127.0 dB
112*4882a593Smuzhiyun  * mute: 0xFF
113*4882a593Smuzhiyun  */
114*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(out_tlv, -12750, 50, 1);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4613_snd_controls[] = {
117*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("Digital Playback Volume1", LOUT1, ROUT1,
118*4882a593Smuzhiyun 			 0, 0xFF, 1, out_tlv),
119*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("Digital Playback Volume2", LOUT2, ROUT2,
120*4882a593Smuzhiyun 			 0, 0xFF, 1, out_tlv),
121*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("Digital Playback Volume3", LOUT3, ROUT3,
122*4882a593Smuzhiyun 			 0, 0xFF, 1, out_tlv),
123*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("Digital Playback Volume4", LOUT4, ROUT4,
124*4882a593Smuzhiyun 			 0, 0xFF, 1, out_tlv),
125*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("Digital Playback Volume5", LOUT5, ROUT5,
126*4882a593Smuzhiyun 			 0, 0xFF, 1, out_tlv),
127*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("Digital Playback Volume6", LOUT6, ROUT6,
128*4882a593Smuzhiyun 			 0, 0xFF, 1, out_tlv),
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun static const struct reg_default ak4613_reg[] = {
132*4882a593Smuzhiyun 	{ 0x0,  0x0f }, { 0x1,  0x07 }, { 0x2,  0x3f }, { 0x3,  0x20 },
133*4882a593Smuzhiyun 	{ 0x4,  0x20 }, { 0x5,  0x55 }, { 0x6,  0x05 }, { 0x7,  0x07 },
134*4882a593Smuzhiyun 	{ 0x8,  0x0f }, { 0x9,  0x07 }, { 0xa,  0x3f }, { 0xb,  0x00 },
135*4882a593Smuzhiyun 	{ 0xc,  0x00 }, { 0xd,  0x00 }, { 0xe,  0x00 }, { 0xf,  0x00 },
136*4882a593Smuzhiyun 	{ 0x10, 0x00 }, { 0x11, 0x00 }, { 0x12, 0x00 }, { 0x13, 0x00 },
137*4882a593Smuzhiyun 	{ 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0x00 },
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun #define AUDIO_IFACE_TO_VAL(fmts) ((fmts - ak4613_iface) << 3)
141*4882a593Smuzhiyun #define AUDIO_IFACE(b, fmt) { b, SND_SOC_DAIFMT_##fmt }
142*4882a593Smuzhiyun static const struct ak4613_interface ak4613_iface[] = {
143*4882a593Smuzhiyun 	/* capture */				/* playback */
144*4882a593Smuzhiyun 	/* [0] - [2] are not supported */
145*4882a593Smuzhiyun 	[3] = {	AUDIO_IFACE(24, LEFT_J),	AUDIO_IFACE(24, LEFT_J) },
146*4882a593Smuzhiyun 	[4] = {	AUDIO_IFACE(24, I2S),		AUDIO_IFACE(24, I2S) },
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun static const struct regmap_config ak4613_regmap_cfg = {
150*4882a593Smuzhiyun 	.reg_bits		= 8,
151*4882a593Smuzhiyun 	.val_bits		= 8,
152*4882a593Smuzhiyun 	.max_register		= 0x16,
153*4882a593Smuzhiyun 	.reg_defaults		= ak4613_reg,
154*4882a593Smuzhiyun 	.num_reg_defaults	= ARRAY_SIZE(ak4613_reg),
155*4882a593Smuzhiyun 	.cache_type		= REGCACHE_RBTREE,
156*4882a593Smuzhiyun };
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun static const struct of_device_id ak4613_of_match[] = {
159*4882a593Smuzhiyun 	{ .compatible = "asahi-kasei,ak4613",	.data = &ak4613_regmap_cfg },
160*4882a593Smuzhiyun 	{},
161*4882a593Smuzhiyun };
162*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ak4613_of_match);
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun static const struct i2c_device_id ak4613_i2c_id[] = {
165*4882a593Smuzhiyun 	{ "ak4613", (kernel_ulong_t)&ak4613_regmap_cfg },
166*4882a593Smuzhiyun 	{ }
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, ak4613_i2c_id);
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun static const struct snd_soc_dapm_widget ak4613_dapm_widgets[] = {
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	/* Outputs */
173*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("LOUT1"),
174*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("LOUT2"),
175*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("LOUT3"),
176*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("LOUT4"),
177*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("LOUT5"),
178*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("LOUT6"),
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("ROUT1"),
181*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("ROUT2"),
182*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("ROUT3"),
183*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("ROUT4"),
184*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("ROUT5"),
185*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("ROUT6"),
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	/* Inputs */
188*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("LIN1"),
189*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("LIN2"),
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("RIN1"),
192*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("RIN2"),
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	/* DAC */
195*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC("DAC1", NULL, PW_MGMT3, 0, 0),
196*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC("DAC2", NULL, PW_MGMT3, 1, 0),
197*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC("DAC3", NULL, PW_MGMT3, 2, 0),
198*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC("DAC4", NULL, PW_MGMT3, 3, 0),
199*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC("DAC5", NULL, PW_MGMT3, 4, 0),
200*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC("DAC6", NULL, PW_MGMT3, 5, 0),
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	/* ADC */
203*4882a593Smuzhiyun 	SND_SOC_DAPM_ADC("ADC1", NULL, PW_MGMT2, 0, 0),
204*4882a593Smuzhiyun 	SND_SOC_DAPM_ADC("ADC2", NULL, PW_MGMT2, 1, 0),
205*4882a593Smuzhiyun };
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun static const struct snd_soc_dapm_route ak4613_intercon[] = {
208*4882a593Smuzhiyun 	{"LOUT1", NULL, "DAC1"},
209*4882a593Smuzhiyun 	{"LOUT2", NULL, "DAC2"},
210*4882a593Smuzhiyun 	{"LOUT3", NULL, "DAC3"},
211*4882a593Smuzhiyun 	{"LOUT4", NULL, "DAC4"},
212*4882a593Smuzhiyun 	{"LOUT5", NULL, "DAC5"},
213*4882a593Smuzhiyun 	{"LOUT6", NULL, "DAC6"},
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	{"ROUT1", NULL, "DAC1"},
216*4882a593Smuzhiyun 	{"ROUT2", NULL, "DAC2"},
217*4882a593Smuzhiyun 	{"ROUT3", NULL, "DAC3"},
218*4882a593Smuzhiyun 	{"ROUT4", NULL, "DAC4"},
219*4882a593Smuzhiyun 	{"ROUT5", NULL, "DAC5"},
220*4882a593Smuzhiyun 	{"ROUT6", NULL, "DAC6"},
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	{"DAC1", NULL, "Playback"},
223*4882a593Smuzhiyun 	{"DAC2", NULL, "Playback"},
224*4882a593Smuzhiyun 	{"DAC3", NULL, "Playback"},
225*4882a593Smuzhiyun 	{"DAC4", NULL, "Playback"},
226*4882a593Smuzhiyun 	{"DAC5", NULL, "Playback"},
227*4882a593Smuzhiyun 	{"DAC6", NULL, "Playback"},
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	{"Capture", NULL, "ADC1"},
230*4882a593Smuzhiyun 	{"Capture", NULL, "ADC2"},
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	{"ADC1", NULL, "LIN1"},
233*4882a593Smuzhiyun 	{"ADC2", NULL, "LIN2"},
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	{"ADC1", NULL, "RIN1"},
236*4882a593Smuzhiyun 	{"ADC2", NULL, "RIN2"},
237*4882a593Smuzhiyun };
238*4882a593Smuzhiyun 
ak4613_dai_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)239*4882a593Smuzhiyun static void ak4613_dai_shutdown(struct snd_pcm_substream *substream,
240*4882a593Smuzhiyun 			       struct snd_soc_dai *dai)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
243*4882a593Smuzhiyun 	struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
244*4882a593Smuzhiyun 	struct device *dev = component->dev;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	mutex_lock(&priv->lock);
247*4882a593Smuzhiyun 	priv->cnt--;
248*4882a593Smuzhiyun 	if (priv->cnt < 0) {
249*4882a593Smuzhiyun 		dev_err(dev, "unexpected counter error\n");
250*4882a593Smuzhiyun 		priv->cnt = 0;
251*4882a593Smuzhiyun 	}
252*4882a593Smuzhiyun 	if (!priv->cnt)
253*4882a593Smuzhiyun 		priv->iface = NULL;
254*4882a593Smuzhiyun 	mutex_unlock(&priv->lock);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun 
ak4613_hw_constraints(struct ak4613_priv * priv,struct snd_pcm_runtime * runtime)257*4882a593Smuzhiyun static void ak4613_hw_constraints(struct ak4613_priv *priv,
258*4882a593Smuzhiyun 				  struct snd_pcm_runtime *runtime)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun 	static const unsigned int ak4613_rates[] = {
261*4882a593Smuzhiyun 		 32000,
262*4882a593Smuzhiyun 		 44100,
263*4882a593Smuzhiyun 		 48000,
264*4882a593Smuzhiyun 		 64000,
265*4882a593Smuzhiyun 		 88200,
266*4882a593Smuzhiyun 		 96000,
267*4882a593Smuzhiyun 		176400,
268*4882a593Smuzhiyun 		192000,
269*4882a593Smuzhiyun 	};
270*4882a593Smuzhiyun 	struct snd_pcm_hw_constraint_list *constraint = &priv->constraint;
271*4882a593Smuzhiyun 	unsigned int fs;
272*4882a593Smuzhiyun 	int i;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	constraint->list	= ak4613_rates;
275*4882a593Smuzhiyun 	constraint->mask	= 0;
276*4882a593Smuzhiyun 	constraint->count	= 0;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	/*
279*4882a593Smuzhiyun 	 * Slave Mode
280*4882a593Smuzhiyun 	 *	Normal: [32kHz, 48kHz] : 256fs,384fs or 512fs
281*4882a593Smuzhiyun 	 *	Double: [64kHz, 96kHz] : 256fs
282*4882a593Smuzhiyun 	 *	Quad  : [128kHz,192kHz]: 128fs
283*4882a593Smuzhiyun 	 *
284*4882a593Smuzhiyun 	 * Master mode
285*4882a593Smuzhiyun 	 *	Normal: [32kHz, 48kHz] : 256fs or 512fs
286*4882a593Smuzhiyun 	 *	Double: [64kHz, 96kHz] : 256fs
287*4882a593Smuzhiyun 	 *	Quad  : [128kHz,192kHz]: 128fs
288*4882a593Smuzhiyun 	*/
289*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(ak4613_rates); i++) {
290*4882a593Smuzhiyun 		/* minimum fs on each range */
291*4882a593Smuzhiyun 		fs = (ak4613_rates[i] <= 96000) ? 256 : 128;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 		if (priv->sysclk >= ak4613_rates[i] * fs)
294*4882a593Smuzhiyun 			constraint->count = i + 1;
295*4882a593Smuzhiyun 	}
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	snd_pcm_hw_constraint_list(runtime, 0,
298*4882a593Smuzhiyun 				SNDRV_PCM_HW_PARAM_RATE, constraint);
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun 
ak4613_dai_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)301*4882a593Smuzhiyun static int ak4613_dai_startup(struct snd_pcm_substream *substream,
302*4882a593Smuzhiyun 			      struct snd_soc_dai *dai)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
305*4882a593Smuzhiyun 	struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	priv->cnt++;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	ak4613_hw_constraints(priv, substream->runtime);
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	return 0;
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun 
ak4613_dai_set_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)314*4882a593Smuzhiyun static int ak4613_dai_set_sysclk(struct snd_soc_dai *codec_dai,
315*4882a593Smuzhiyun 				 int clk_id, unsigned int freq, int dir)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
318*4882a593Smuzhiyun 	struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	priv->sysclk = freq;
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	return 0;
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun 
ak4613_dai_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)325*4882a593Smuzhiyun static int ak4613_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
326*4882a593Smuzhiyun {
327*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
328*4882a593Smuzhiyun 	struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	fmt &= SND_SOC_DAIFMT_FORMAT_MASK;
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	switch (fmt) {
333*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
334*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
335*4882a593Smuzhiyun 		priv->fmt = fmt;
336*4882a593Smuzhiyun 		break;
337*4882a593Smuzhiyun 	default:
338*4882a593Smuzhiyun 		return -EINVAL;
339*4882a593Smuzhiyun 	}
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	return 0;
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun 
ak4613_dai_fmt_matching(const struct ak4613_interface * iface,int is_play,unsigned int fmt,unsigned int width)344*4882a593Smuzhiyun static bool ak4613_dai_fmt_matching(const struct ak4613_interface *iface,
345*4882a593Smuzhiyun 				    int is_play,
346*4882a593Smuzhiyun 				    unsigned int fmt, unsigned int width)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun 	const struct ak4613_formats *fmts;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	fmts = (is_play) ? &iface->playback : &iface->capture;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	if (fmts->fmt != fmt)
353*4882a593Smuzhiyun 		return false;
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	if (fmts->width != width)
356*4882a593Smuzhiyun 		return false;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	return true;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun 
ak4613_dai_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)361*4882a593Smuzhiyun static int ak4613_dai_hw_params(struct snd_pcm_substream *substream,
362*4882a593Smuzhiyun 				struct snd_pcm_hw_params *params,
363*4882a593Smuzhiyun 				struct snd_soc_dai *dai)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
366*4882a593Smuzhiyun 	struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
367*4882a593Smuzhiyun 	const struct ak4613_interface *iface;
368*4882a593Smuzhiyun 	struct device *dev = component->dev;
369*4882a593Smuzhiyun 	unsigned int width = params_width(params);
370*4882a593Smuzhiyun 	unsigned int fmt = priv->fmt;
371*4882a593Smuzhiyun 	unsigned int rate;
372*4882a593Smuzhiyun 	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
373*4882a593Smuzhiyun 	int i, ret;
374*4882a593Smuzhiyun 	u8 fmt_ctrl, ctrl2;
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	rate = params_rate(params);
377*4882a593Smuzhiyun 	switch (rate) {
378*4882a593Smuzhiyun 	case 32000:
379*4882a593Smuzhiyun 	case 44100:
380*4882a593Smuzhiyun 	case 48000:
381*4882a593Smuzhiyun 		ctrl2 = DFS_NORMAL_SPEED;
382*4882a593Smuzhiyun 		break;
383*4882a593Smuzhiyun 	case 64000:
384*4882a593Smuzhiyun 	case 88200:
385*4882a593Smuzhiyun 	case 96000:
386*4882a593Smuzhiyun 		ctrl2 = DFS_DOUBLE_SPEED;
387*4882a593Smuzhiyun 		break;
388*4882a593Smuzhiyun 	case 176400:
389*4882a593Smuzhiyun 	case 192000:
390*4882a593Smuzhiyun 		ctrl2 = DFS_QUAD_SPEED;
391*4882a593Smuzhiyun 		break;
392*4882a593Smuzhiyun 	default:
393*4882a593Smuzhiyun 		return -EINVAL;
394*4882a593Smuzhiyun 	}
395*4882a593Smuzhiyun 	priv->rate = rate;
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	/*
398*4882a593Smuzhiyun 	 * FIXME
399*4882a593Smuzhiyun 	 *
400*4882a593Smuzhiyun 	 * It doesn't support TDM at this point
401*4882a593Smuzhiyun 	 */
402*4882a593Smuzhiyun 	fmt_ctrl = NO_FMT;
403*4882a593Smuzhiyun 	ret = -EINVAL;
404*4882a593Smuzhiyun 	iface = NULL;
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	mutex_lock(&priv->lock);
407*4882a593Smuzhiyun 	if (priv->iface) {
408*4882a593Smuzhiyun 		if (ak4613_dai_fmt_matching(priv->iface, is_play, fmt, width))
409*4882a593Smuzhiyun 			iface = priv->iface;
410*4882a593Smuzhiyun 	} else {
411*4882a593Smuzhiyun 		for (i = ARRAY_SIZE(ak4613_iface) - 1; i >= 0; i--) {
412*4882a593Smuzhiyun 			if (!ak4613_dai_fmt_matching(ak4613_iface + i,
413*4882a593Smuzhiyun 						     is_play,
414*4882a593Smuzhiyun 						     fmt, width))
415*4882a593Smuzhiyun 				continue;
416*4882a593Smuzhiyun 			iface = ak4613_iface + i;
417*4882a593Smuzhiyun 			break;
418*4882a593Smuzhiyun 		}
419*4882a593Smuzhiyun 	}
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	if ((priv->iface == NULL) ||
422*4882a593Smuzhiyun 	    (priv->iface == iface)) {
423*4882a593Smuzhiyun 		priv->iface = iface;
424*4882a593Smuzhiyun 		ret = 0;
425*4882a593Smuzhiyun 	}
426*4882a593Smuzhiyun 	mutex_unlock(&priv->lock);
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	if (ret < 0)
429*4882a593Smuzhiyun 		goto hw_params_end;
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun 	fmt_ctrl = AUDIO_IFACE_TO_VAL(iface);
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, CTRL1, FMT_MASK, fmt_ctrl);
434*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, CTRL2, DFS_MASK, ctrl2);
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ICTRL, ICTRL_MASK, priv->ic);
437*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, OCTRL, OCTRL_MASK, priv->oc);
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun hw_params_end:
440*4882a593Smuzhiyun 	if (ret < 0)
441*4882a593Smuzhiyun 		dev_warn(dev, "unsupported data width/format combination\n");
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	return ret;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun 
ak4613_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)446*4882a593Smuzhiyun static int ak4613_set_bias_level(struct snd_soc_component *component,
447*4882a593Smuzhiyun 				 enum snd_soc_bias_level level)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun 	u8 mgmt1 = 0;
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	switch (level) {
452*4882a593Smuzhiyun 	case SND_SOC_BIAS_ON:
453*4882a593Smuzhiyun 		mgmt1 |= RSTN;
454*4882a593Smuzhiyun 		fallthrough;
455*4882a593Smuzhiyun 	case SND_SOC_BIAS_PREPARE:
456*4882a593Smuzhiyun 		mgmt1 |= PMADC | PMDAC;
457*4882a593Smuzhiyun 		fallthrough;
458*4882a593Smuzhiyun 	case SND_SOC_BIAS_STANDBY:
459*4882a593Smuzhiyun 		mgmt1 |= PMVR;
460*4882a593Smuzhiyun 		fallthrough;
461*4882a593Smuzhiyun 	case SND_SOC_BIAS_OFF:
462*4882a593Smuzhiyun 	default:
463*4882a593Smuzhiyun 		break;
464*4882a593Smuzhiyun 	}
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	snd_soc_component_write(component, PW_MGMT1, mgmt1);
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 	return 0;
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun 
ak4613_dummy_write(struct work_struct * work)471*4882a593Smuzhiyun static void ak4613_dummy_write(struct work_struct *work)
472*4882a593Smuzhiyun {
473*4882a593Smuzhiyun 	struct ak4613_priv *priv = container_of(work,
474*4882a593Smuzhiyun 						struct ak4613_priv,
475*4882a593Smuzhiyun 						dummy_write_work);
476*4882a593Smuzhiyun 	struct snd_soc_component *component = priv->component;
477*4882a593Smuzhiyun 	unsigned int mgmt1;
478*4882a593Smuzhiyun 	unsigned int mgmt3;
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	/*
481*4882a593Smuzhiyun 	 * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks
482*4882a593Smuzhiyun 	 *
483*4882a593Smuzhiyun 	 * Note
484*4882a593Smuzhiyun 	 *
485*4882a593Smuzhiyun 	 * To avoid extra delay, we want to avoid preemption here,
486*4882a593Smuzhiyun 	 * but we can't. Because it uses I2C access which is using IRQ
487*4882a593Smuzhiyun 	 * and sleep. Thus, delay might be more than 5 LR clocks
488*4882a593Smuzhiyun 	 * see also
489*4882a593Smuzhiyun 	 *	ak4613_dai_trigger()
490*4882a593Smuzhiyun 	 */
491*4882a593Smuzhiyun 	udelay(5000000 / priv->rate);
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	mgmt1 = snd_soc_component_read(component, PW_MGMT1);
494*4882a593Smuzhiyun 	mgmt3 = snd_soc_component_read(component, PW_MGMT3);
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 	snd_soc_component_write(component, PW_MGMT1, mgmt1);
497*4882a593Smuzhiyun 	snd_soc_component_write(component, PW_MGMT3, mgmt3);
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun 
ak4613_dai_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)500*4882a593Smuzhiyun static int ak4613_dai_trigger(struct snd_pcm_substream *substream, int cmd,
501*4882a593Smuzhiyun 			      struct snd_soc_dai *dai)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
504*4882a593Smuzhiyun 	struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun 	/*
507*4882a593Smuzhiyun 	 * FIXME
508*4882a593Smuzhiyun 	 *
509*4882a593Smuzhiyun 	 * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks
510*4882a593Smuzhiyun 	 * from Power Down Release. Otherwise, Playback volume will be 0dB.
511*4882a593Smuzhiyun 	 * To avoid complex multiple delay/dummy_write method from
512*4882a593Smuzhiyun 	 * ak4613_set_bias_level() / SND_SOC_DAPM_DAC_E("DACx", ...),
513*4882a593Smuzhiyun 	 * call it once here.
514*4882a593Smuzhiyun 	 *
515*4882a593Smuzhiyun 	 * But, unfortunately, we can't "write" here because here is atomic
516*4882a593Smuzhiyun 	 * context (It uses I2C access for writing).
517*4882a593Smuzhiyun 	 * Thus, use schedule_work() to switching to normal context
518*4882a593Smuzhiyun 	 * immediately.
519*4882a593Smuzhiyun 	 *
520*4882a593Smuzhiyun 	 * Note
521*4882a593Smuzhiyun 	 *
522*4882a593Smuzhiyun 	 * Calling ak4613_dummy_write() function might be delayed.
523*4882a593Smuzhiyun 	 * In such case, ak4613 volume might be temporarily 0dB when
524*4882a593Smuzhiyun 	 * beggining of playback.
525*4882a593Smuzhiyun 	 * see also
526*4882a593Smuzhiyun 	 *	ak4613_dummy_write()
527*4882a593Smuzhiyun 	 */
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	if ((cmd != SNDRV_PCM_TRIGGER_START) &&
530*4882a593Smuzhiyun 	    (cmd != SNDRV_PCM_TRIGGER_RESUME))
531*4882a593Smuzhiyun 		return 0;
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
534*4882a593Smuzhiyun 		return  0;
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	priv->component = component;
537*4882a593Smuzhiyun 	schedule_work(&priv->dummy_write_work);
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	return 0;
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun static const struct snd_soc_dai_ops ak4613_dai_ops = {
543*4882a593Smuzhiyun 	.startup	= ak4613_dai_startup,
544*4882a593Smuzhiyun 	.shutdown	= ak4613_dai_shutdown,
545*4882a593Smuzhiyun 	.set_sysclk	= ak4613_dai_set_sysclk,
546*4882a593Smuzhiyun 	.set_fmt	= ak4613_dai_set_fmt,
547*4882a593Smuzhiyun 	.trigger	= ak4613_dai_trigger,
548*4882a593Smuzhiyun 	.hw_params	= ak4613_dai_hw_params,
549*4882a593Smuzhiyun };
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun #define AK4613_PCM_RATE		(SNDRV_PCM_RATE_32000  |\
552*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_44100  |\
553*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_48000  |\
554*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_64000  |\
555*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_88200  |\
556*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_96000  |\
557*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_176400 |\
558*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000)
559*4882a593Smuzhiyun #define AK4613_PCM_FMTBIT	(SNDRV_PCM_FMTBIT_S24_LE)
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun static struct snd_soc_dai_driver ak4613_dai = {
562*4882a593Smuzhiyun 	.name = "ak4613-hifi",
563*4882a593Smuzhiyun 	.playback = {
564*4882a593Smuzhiyun 		.stream_name	= "Playback",
565*4882a593Smuzhiyun 		.channels_min	= 2,
566*4882a593Smuzhiyun 		.channels_max	= 2,
567*4882a593Smuzhiyun 		.rates		= AK4613_PCM_RATE,
568*4882a593Smuzhiyun 		.formats	= AK4613_PCM_FMTBIT,
569*4882a593Smuzhiyun 	},
570*4882a593Smuzhiyun 	.capture = {
571*4882a593Smuzhiyun 		.stream_name	= "Capture",
572*4882a593Smuzhiyun 		.channels_min	= 2,
573*4882a593Smuzhiyun 		.channels_max	= 2,
574*4882a593Smuzhiyun 		.rates		= AK4613_PCM_RATE,
575*4882a593Smuzhiyun 		.formats	= AK4613_PCM_FMTBIT,
576*4882a593Smuzhiyun 	},
577*4882a593Smuzhiyun 	.ops = &ak4613_dai_ops,
578*4882a593Smuzhiyun 	.symmetric_rates = 1,
579*4882a593Smuzhiyun };
580*4882a593Smuzhiyun 
ak4613_suspend(struct snd_soc_component * component)581*4882a593Smuzhiyun static int ak4613_suspend(struct snd_soc_component *component)
582*4882a593Smuzhiyun {
583*4882a593Smuzhiyun 	struct regmap *regmap = dev_get_regmap(component->dev, NULL);
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun 	regcache_cache_only(regmap, true);
586*4882a593Smuzhiyun 	regcache_mark_dirty(regmap);
587*4882a593Smuzhiyun 	return 0;
588*4882a593Smuzhiyun }
589*4882a593Smuzhiyun 
ak4613_resume(struct snd_soc_component * component)590*4882a593Smuzhiyun static int ak4613_resume(struct snd_soc_component *component)
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun 	struct regmap *regmap = dev_get_regmap(component->dev, NULL);
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	regcache_cache_only(regmap, false);
595*4882a593Smuzhiyun 	return regcache_sync(regmap);
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_ak4613 = {
599*4882a593Smuzhiyun 	.suspend		= ak4613_suspend,
600*4882a593Smuzhiyun 	.resume			= ak4613_resume,
601*4882a593Smuzhiyun 	.set_bias_level		= ak4613_set_bias_level,
602*4882a593Smuzhiyun 	.controls		= ak4613_snd_controls,
603*4882a593Smuzhiyun 	.num_controls		= ARRAY_SIZE(ak4613_snd_controls),
604*4882a593Smuzhiyun 	.dapm_widgets		= ak4613_dapm_widgets,
605*4882a593Smuzhiyun 	.num_dapm_widgets	= ARRAY_SIZE(ak4613_dapm_widgets),
606*4882a593Smuzhiyun 	.dapm_routes		= ak4613_intercon,
607*4882a593Smuzhiyun 	.num_dapm_routes	= ARRAY_SIZE(ak4613_intercon),
608*4882a593Smuzhiyun 	.idle_bias_on		= 1,
609*4882a593Smuzhiyun 	.endianness		= 1,
610*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
611*4882a593Smuzhiyun };
612*4882a593Smuzhiyun 
ak4613_parse_of(struct ak4613_priv * priv,struct device * dev)613*4882a593Smuzhiyun static void ak4613_parse_of(struct ak4613_priv *priv,
614*4882a593Smuzhiyun 			    struct device *dev)
615*4882a593Smuzhiyun {
616*4882a593Smuzhiyun 	struct device_node *np = dev->of_node;
617*4882a593Smuzhiyun 	char prop[32];
618*4882a593Smuzhiyun 	int i;
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun 	/* Input 1 - 2 */
621*4882a593Smuzhiyun 	for (i = 0; i < 2; i++) {
622*4882a593Smuzhiyun 		snprintf(prop, sizeof(prop), "asahi-kasei,in%d-single-end", i + 1);
623*4882a593Smuzhiyun 		if (!of_get_property(np, prop, NULL))
624*4882a593Smuzhiyun 			priv->ic |= 1 << i;
625*4882a593Smuzhiyun 	}
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	/* Output 1 - 6 */
628*4882a593Smuzhiyun 	for (i = 0; i < 6; i++) {
629*4882a593Smuzhiyun 		snprintf(prop, sizeof(prop), "asahi-kasei,out%d-single-end", i + 1);
630*4882a593Smuzhiyun 		if (!of_get_property(np, prop, NULL))
631*4882a593Smuzhiyun 			priv->oc |= 1 << i;
632*4882a593Smuzhiyun 	}
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun 
ak4613_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)635*4882a593Smuzhiyun static int ak4613_i2c_probe(struct i2c_client *i2c,
636*4882a593Smuzhiyun 			    const struct i2c_device_id *id)
637*4882a593Smuzhiyun {
638*4882a593Smuzhiyun 	struct device *dev = &i2c->dev;
639*4882a593Smuzhiyun 	struct device_node *np = dev->of_node;
640*4882a593Smuzhiyun 	const struct regmap_config *regmap_cfg;
641*4882a593Smuzhiyun 	struct regmap *regmap;
642*4882a593Smuzhiyun 	struct ak4613_priv *priv;
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 	regmap_cfg = NULL;
645*4882a593Smuzhiyun 	if (np) {
646*4882a593Smuzhiyun 		const struct of_device_id *of_id;
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 		of_id = of_match_device(ak4613_of_match, dev);
649*4882a593Smuzhiyun 		if (of_id)
650*4882a593Smuzhiyun 			regmap_cfg = of_id->data;
651*4882a593Smuzhiyun 	} else {
652*4882a593Smuzhiyun 		regmap_cfg = (const struct regmap_config *)id->driver_data;
653*4882a593Smuzhiyun 	}
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	if (!regmap_cfg)
656*4882a593Smuzhiyun 		return -EINVAL;
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
659*4882a593Smuzhiyun 	if (!priv)
660*4882a593Smuzhiyun 		return -ENOMEM;
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun 	ak4613_parse_of(priv, dev);
663*4882a593Smuzhiyun 
664*4882a593Smuzhiyun 	priv->iface		= NULL;
665*4882a593Smuzhiyun 	priv->cnt		= 0;
666*4882a593Smuzhiyun 	priv->sysclk		= 0;
667*4882a593Smuzhiyun 	INIT_WORK(&priv->dummy_write_work, ak4613_dummy_write);
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun 	mutex_init(&priv->lock);
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun 	i2c_set_clientdata(i2c, priv);
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun 	regmap = devm_regmap_init_i2c(i2c, regmap_cfg);
674*4882a593Smuzhiyun 	if (IS_ERR(regmap))
675*4882a593Smuzhiyun 		return PTR_ERR(regmap);
676*4882a593Smuzhiyun 
677*4882a593Smuzhiyun 	return devm_snd_soc_register_component(dev, &soc_component_dev_ak4613,
678*4882a593Smuzhiyun 				      &ak4613_dai, 1);
679*4882a593Smuzhiyun }
680*4882a593Smuzhiyun 
ak4613_i2c_remove(struct i2c_client * client)681*4882a593Smuzhiyun static int ak4613_i2c_remove(struct i2c_client *client)
682*4882a593Smuzhiyun {
683*4882a593Smuzhiyun 	return 0;
684*4882a593Smuzhiyun }
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun static struct i2c_driver ak4613_i2c_driver = {
687*4882a593Smuzhiyun 	.driver = {
688*4882a593Smuzhiyun 		.name = "ak4613-codec",
689*4882a593Smuzhiyun 		.of_match_table = ak4613_of_match,
690*4882a593Smuzhiyun 	},
691*4882a593Smuzhiyun 	.probe		= ak4613_i2c_probe,
692*4882a593Smuzhiyun 	.remove		= ak4613_i2c_remove,
693*4882a593Smuzhiyun 	.id_table	= ak4613_i2c_id,
694*4882a593Smuzhiyun };
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun module_i2c_driver(ak4613_i2c_driver);
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun MODULE_DESCRIPTION("Soc AK4613 driver");
699*4882a593Smuzhiyun MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
700*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
701