1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Audio driver for AK4458 DAC
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2016 Asahi Kasei Microdevices Corporation
6*4882a593Smuzhiyun // Copyright 2018 NXP
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/delay.h>
9*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
10*4882a593Smuzhiyun #include <linux/i2c.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/of_device.h>
13*4882a593Smuzhiyun #include <linux/of_gpio.h>
14*4882a593Smuzhiyun #include <linux/pm_runtime.h>
15*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <sound/initval.h>
18*4882a593Smuzhiyun #include <sound/pcm_params.h>
19*4882a593Smuzhiyun #include <sound/soc.h>
20*4882a593Smuzhiyun #include <sound/soc-dapm.h>
21*4882a593Smuzhiyun #include <sound/tlv.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include "ak4458.h"
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define AK4458_NUM_SUPPLIES 2
26*4882a593Smuzhiyun static const char *ak4458_supply_names[AK4458_NUM_SUPPLIES] = {
27*4882a593Smuzhiyun "DVDD",
28*4882a593Smuzhiyun "AVDD",
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun enum ak4458_type {
32*4882a593Smuzhiyun AK4458 = 0,
33*4882a593Smuzhiyun AK4497 = 1,
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun struct ak4458_drvdata {
37*4882a593Smuzhiyun struct snd_soc_dai_driver *dai_drv;
38*4882a593Smuzhiyun const struct snd_soc_component_driver *comp_drv;
39*4882a593Smuzhiyun enum ak4458_type type;
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* AK4458 Codec Private Data */
43*4882a593Smuzhiyun struct ak4458_priv {
44*4882a593Smuzhiyun struct regulator_bulk_data supplies[AK4458_NUM_SUPPLIES];
45*4882a593Smuzhiyun const struct ak4458_drvdata *drvdata;
46*4882a593Smuzhiyun struct device *dev;
47*4882a593Smuzhiyun struct regmap *regmap;
48*4882a593Smuzhiyun struct gpio_desc *reset_gpiod;
49*4882a593Smuzhiyun struct gpio_desc *mute_gpiod;
50*4882a593Smuzhiyun int digfil; /* SSLOW, SD, SLOW bits */
51*4882a593Smuzhiyun int fs; /* sampling rate */
52*4882a593Smuzhiyun int fmt;
53*4882a593Smuzhiyun int slots;
54*4882a593Smuzhiyun int slot_width;
55*4882a593Smuzhiyun u32 dsd_path; /* For ak4497 */
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun static const struct reg_default ak4458_reg_defaults[] = {
59*4882a593Smuzhiyun { 0x00, 0x0C }, /* 0x00 AK4458_00_CONTROL1 */
60*4882a593Smuzhiyun { 0x01, 0x22 }, /* 0x01 AK4458_01_CONTROL2 */
61*4882a593Smuzhiyun { 0x02, 0x00 }, /* 0x02 AK4458_02_CONTROL3 */
62*4882a593Smuzhiyun { 0x03, 0xFF }, /* 0x03 AK4458_03_LCHATT */
63*4882a593Smuzhiyun { 0x04, 0xFF }, /* 0x04 AK4458_04_RCHATT */
64*4882a593Smuzhiyun { 0x05, 0x00 }, /* 0x05 AK4458_05_CONTROL4 */
65*4882a593Smuzhiyun { 0x06, 0x00 }, /* 0x06 AK4458_06_DSD1 */
66*4882a593Smuzhiyun { 0x07, 0x03 }, /* 0x07 AK4458_07_CONTROL5 */
67*4882a593Smuzhiyun { 0x08, 0x00 }, /* 0x08 AK4458_08_SOUND_CONTROL */
68*4882a593Smuzhiyun { 0x09, 0x00 }, /* 0x09 AK4458_09_DSD2 */
69*4882a593Smuzhiyun { 0x0A, 0x0D }, /* 0x0A AK4458_0A_CONTROL6 */
70*4882a593Smuzhiyun { 0x0B, 0x0C }, /* 0x0B AK4458_0B_CONTROL7 */
71*4882a593Smuzhiyun { 0x0C, 0x00 }, /* 0x0C AK4458_0C_CONTROL8 */
72*4882a593Smuzhiyun { 0x0D, 0x00 }, /* 0x0D AK4458_0D_CONTROL9 */
73*4882a593Smuzhiyun { 0x0E, 0x50 }, /* 0x0E AK4458_0E_CONTROL10 */
74*4882a593Smuzhiyun { 0x0F, 0xFF }, /* 0x0F AK4458_0F_L2CHATT */
75*4882a593Smuzhiyun { 0x10, 0xFF }, /* 0x10 AK4458_10_R2CHATT */
76*4882a593Smuzhiyun { 0x11, 0xFF }, /* 0x11 AK4458_11_L3CHATT */
77*4882a593Smuzhiyun { 0x12, 0xFF }, /* 0x12 AK4458_12_R3CHATT */
78*4882a593Smuzhiyun { 0x13, 0xFF }, /* 0x13 AK4458_13_L4CHATT */
79*4882a593Smuzhiyun { 0x14, 0xFF }, /* 0x14 AK4458_14_R4CHATT */
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /*
83*4882a593Smuzhiyun * Volume control:
84*4882a593Smuzhiyun * from -127 to 0 dB in 0.5 dB steps (mute instead of -127.5 dB)
85*4882a593Smuzhiyun */
86*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /*
89*4882a593Smuzhiyun * DEM1 bit DEM0 bit Mode
90*4882a593Smuzhiyun * 0 0 44.1kHz
91*4882a593Smuzhiyun * 0 1 OFF (default)
92*4882a593Smuzhiyun * 1 0 48kHz
93*4882a593Smuzhiyun * 1 1 32kHz
94*4882a593Smuzhiyun */
95*4882a593Smuzhiyun static const char * const ak4458_dem_select_texts[] = {
96*4882a593Smuzhiyun "44.1kHz", "OFF", "48kHz", "32kHz"
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /*
100*4882a593Smuzhiyun * SSLOW, SD, SLOW bits Digital Filter Setting
101*4882a593Smuzhiyun * 0, 0, 0 : Sharp Roll-Off Filter
102*4882a593Smuzhiyun * 0, 0, 1 : Slow Roll-Off Filter
103*4882a593Smuzhiyun * 0, 1, 0 : Short delay Sharp Roll-Off Filter
104*4882a593Smuzhiyun * 0, 1, 1 : Short delay Slow Roll-Off Filter
105*4882a593Smuzhiyun * 1, *, * : Super Slow Roll-Off Filter
106*4882a593Smuzhiyun */
107*4882a593Smuzhiyun static const char * const ak4458_digfil_select_texts[] = {
108*4882a593Smuzhiyun "Sharp Roll-Off Filter",
109*4882a593Smuzhiyun "Slow Roll-Off Filter",
110*4882a593Smuzhiyun "Short delay Sharp Roll-Off Filter",
111*4882a593Smuzhiyun "Short delay Slow Roll-Off Filter",
112*4882a593Smuzhiyun "Super Slow Roll-Off Filter"
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun /*
116*4882a593Smuzhiyun * DZFB: Inverting Enable of DZF
117*4882a593Smuzhiyun * 0: DZF goes H at Zero Detection
118*4882a593Smuzhiyun * 1: DZF goes L at Zero Detection
119*4882a593Smuzhiyun */
120*4882a593Smuzhiyun static const char * const ak4458_dzfb_select_texts[] = {"H", "L"};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /*
123*4882a593Smuzhiyun * SC1-0 bits: Sound Mode Setting
124*4882a593Smuzhiyun * 0 0 : Sound Mode 0
125*4882a593Smuzhiyun * 0 1 : Sound Mode 1
126*4882a593Smuzhiyun * 1 0 : Sound Mode 2
127*4882a593Smuzhiyun * 1 1 : Reserved
128*4882a593Smuzhiyun */
129*4882a593Smuzhiyun static const char * const ak4458_sc_select_texts[] = {
130*4882a593Smuzhiyun "Sound Mode 0", "Sound Mode 1", "Sound Mode 2"
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /* FIR2-0 bits: FIR Filter Mode Setting */
134*4882a593Smuzhiyun static const char * const ak4458_fir_select_texts[] = {
135*4882a593Smuzhiyun "Mode 0", "Mode 1", "Mode 2", "Mode 3",
136*4882a593Smuzhiyun "Mode 4", "Mode 5", "Mode 6", "Mode 7",
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /* ATS1-0 bits Attenuation Speed */
140*4882a593Smuzhiyun static const char * const ak4458_ats_select_texts[] = {
141*4882a593Smuzhiyun "4080/fs", "2040/fs", "510/fs", "255/fs",
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /* DIF2 bit Audio Interface Format Setting(BICK fs) */
145*4882a593Smuzhiyun static const char * const ak4458_dif_select_texts[] = {"32fs,48fs", "64fs",};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun static const struct soc_enum ak4458_dac1_dem_enum =
148*4882a593Smuzhiyun SOC_ENUM_SINGLE(AK4458_01_CONTROL2, 1,
149*4882a593Smuzhiyun ARRAY_SIZE(ak4458_dem_select_texts),
150*4882a593Smuzhiyun ak4458_dem_select_texts);
151*4882a593Smuzhiyun static const struct soc_enum ak4458_dac2_dem_enum =
152*4882a593Smuzhiyun SOC_ENUM_SINGLE(AK4458_0A_CONTROL6, 0,
153*4882a593Smuzhiyun ARRAY_SIZE(ak4458_dem_select_texts),
154*4882a593Smuzhiyun ak4458_dem_select_texts);
155*4882a593Smuzhiyun static const struct soc_enum ak4458_dac3_dem_enum =
156*4882a593Smuzhiyun SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 4,
157*4882a593Smuzhiyun ARRAY_SIZE(ak4458_dem_select_texts),
158*4882a593Smuzhiyun ak4458_dem_select_texts);
159*4882a593Smuzhiyun static const struct soc_enum ak4458_dac4_dem_enum =
160*4882a593Smuzhiyun SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 6,
161*4882a593Smuzhiyun ARRAY_SIZE(ak4458_dem_select_texts),
162*4882a593Smuzhiyun ak4458_dem_select_texts);
163*4882a593Smuzhiyun static const struct soc_enum ak4458_digfil_enum =
164*4882a593Smuzhiyun SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak4458_digfil_select_texts),
165*4882a593Smuzhiyun ak4458_digfil_select_texts);
166*4882a593Smuzhiyun static const struct soc_enum ak4458_dzfb_enum =
167*4882a593Smuzhiyun SOC_ENUM_SINGLE(AK4458_02_CONTROL3, 2,
168*4882a593Smuzhiyun ARRAY_SIZE(ak4458_dzfb_select_texts),
169*4882a593Smuzhiyun ak4458_dzfb_select_texts);
170*4882a593Smuzhiyun static const struct soc_enum ak4458_sm_enum =
171*4882a593Smuzhiyun SOC_ENUM_SINGLE(AK4458_08_SOUND_CONTROL, 0,
172*4882a593Smuzhiyun ARRAY_SIZE(ak4458_sc_select_texts),
173*4882a593Smuzhiyun ak4458_sc_select_texts);
174*4882a593Smuzhiyun static const struct soc_enum ak4458_fir_enum =
175*4882a593Smuzhiyun SOC_ENUM_SINGLE(AK4458_0C_CONTROL8, 0,
176*4882a593Smuzhiyun ARRAY_SIZE(ak4458_fir_select_texts),
177*4882a593Smuzhiyun ak4458_fir_select_texts);
178*4882a593Smuzhiyun static const struct soc_enum ak4458_ats_enum =
179*4882a593Smuzhiyun SOC_ENUM_SINGLE(AK4458_0B_CONTROL7, 6,
180*4882a593Smuzhiyun ARRAY_SIZE(ak4458_ats_select_texts),
181*4882a593Smuzhiyun ak4458_ats_select_texts);
182*4882a593Smuzhiyun static const struct soc_enum ak4458_dif_enum =
183*4882a593Smuzhiyun SOC_ENUM_SINGLE(AK4458_00_CONTROL1, 3,
184*4882a593Smuzhiyun ARRAY_SIZE(ak4458_dif_select_texts),
185*4882a593Smuzhiyun ak4458_dif_select_texts);
186*4882a593Smuzhiyun
get_digfil(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)187*4882a593Smuzhiyun static int get_digfil(struct snd_kcontrol *kcontrol,
188*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
191*4882a593Smuzhiyun struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun ucontrol->value.enumerated.item[0] = ak4458->digfil;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun return 0;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
set_digfil(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)198*4882a593Smuzhiyun static int set_digfil(struct snd_kcontrol *kcontrol,
199*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
202*4882a593Smuzhiyun struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
203*4882a593Smuzhiyun int num;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun num = ucontrol->value.enumerated.item[0];
206*4882a593Smuzhiyun if (num > 4)
207*4882a593Smuzhiyun return -EINVAL;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun ak4458->digfil = num;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun /* write SD bit */
212*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4458_01_CONTROL2,
213*4882a593Smuzhiyun AK4458_SD_MASK,
214*4882a593Smuzhiyun ((ak4458->digfil & 0x02) << 4));
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun /* write SLOW bit */
217*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
218*4882a593Smuzhiyun AK4458_SLOW_MASK,
219*4882a593Smuzhiyun (ak4458->digfil & 0x01));
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun /* write SSLOW bit */
222*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4458_05_CONTROL4,
223*4882a593Smuzhiyun AK4458_SSLOW_MASK,
224*4882a593Smuzhiyun ((ak4458->digfil & 0x04) >> 2));
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun return 0;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4458_snd_controls[] = {
230*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("DAC1 Playback Volume", AK4458_03_LCHATT,
231*4882a593Smuzhiyun AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
232*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("DAC2 Playback Volume", AK4458_0F_L2CHATT,
233*4882a593Smuzhiyun AK4458_10_R2CHATT, 0, 0xFF, 0, dac_tlv),
234*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("DAC3 Playback Volume", AK4458_11_L3CHATT,
235*4882a593Smuzhiyun AK4458_12_R3CHATT, 0, 0xFF, 0, dac_tlv),
236*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("DAC4 Playback Volume", AK4458_13_L4CHATT,
237*4882a593Smuzhiyun AK4458_14_R4CHATT, 0, 0xFF, 0, dac_tlv),
238*4882a593Smuzhiyun SOC_ENUM("AK4458 De-emphasis Response DAC1", ak4458_dac1_dem_enum),
239*4882a593Smuzhiyun SOC_ENUM("AK4458 De-emphasis Response DAC2", ak4458_dac2_dem_enum),
240*4882a593Smuzhiyun SOC_ENUM("AK4458 De-emphasis Response DAC3", ak4458_dac3_dem_enum),
241*4882a593Smuzhiyun SOC_ENUM("AK4458 De-emphasis Response DAC4", ak4458_dac4_dem_enum),
242*4882a593Smuzhiyun SOC_ENUM_EXT("AK4458 Digital Filter Setting", ak4458_digfil_enum,
243*4882a593Smuzhiyun get_digfil, set_digfil),
244*4882a593Smuzhiyun SOC_ENUM("AK4458 Inverting Enable of DZFB", ak4458_dzfb_enum),
245*4882a593Smuzhiyun SOC_ENUM("AK4458 Sound Mode", ak4458_sm_enum),
246*4882a593Smuzhiyun SOC_ENUM("AK4458 FIR Filter Mode Setting", ak4458_fir_enum),
247*4882a593Smuzhiyun SOC_ENUM("AK4458 Attenuation transition Time Setting",
248*4882a593Smuzhiyun ak4458_ats_enum),
249*4882a593Smuzhiyun SOC_ENUM("AK4458 BICK fs Setting", ak4458_dif_enum),
250*4882a593Smuzhiyun };
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun /* ak4458 dapm widgets */
253*4882a593Smuzhiyun static const struct snd_soc_dapm_widget ak4458_dapm_widgets[] = {
254*4882a593Smuzhiyun SND_SOC_DAPM_DAC("AK4458 DAC1", NULL, AK4458_0A_CONTROL6, 2, 0),/*pw*/
255*4882a593Smuzhiyun SND_SOC_DAPM_AIF_IN("AK4458 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
256*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("AK4458 AOUTA"),
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun SND_SOC_DAPM_DAC("AK4458 DAC2", NULL, AK4458_0A_CONTROL6, 3, 0),/*pw*/
259*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("AK4458 AOUTB"),
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun SND_SOC_DAPM_DAC("AK4458 DAC3", NULL, AK4458_0B_CONTROL7, 2, 0),/*pw*/
262*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("AK4458 AOUTC"),
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun SND_SOC_DAPM_DAC("AK4458 DAC4", NULL, AK4458_0B_CONTROL7, 3, 0),/*pw*/
265*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("AK4458 AOUTD"),
266*4882a593Smuzhiyun };
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun static const struct snd_soc_dapm_route ak4458_intercon[] = {
269*4882a593Smuzhiyun {"AK4458 DAC1", NULL, "AK4458 SDTI"},
270*4882a593Smuzhiyun {"AK4458 AOUTA", NULL, "AK4458 DAC1"},
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun {"AK4458 DAC2", NULL, "AK4458 SDTI"},
273*4882a593Smuzhiyun {"AK4458 AOUTB", NULL, "AK4458 DAC2"},
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun {"AK4458 DAC3", NULL, "AK4458 SDTI"},
276*4882a593Smuzhiyun {"AK4458 AOUTC", NULL, "AK4458 DAC3"},
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun {"AK4458 DAC4", NULL, "AK4458 SDTI"},
279*4882a593Smuzhiyun {"AK4458 AOUTD", NULL, "AK4458 DAC4"},
280*4882a593Smuzhiyun };
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun /* ak4497 controls */
283*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4497_snd_controls[] = {
284*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("DAC Playback Volume", AK4458_03_LCHATT,
285*4882a593Smuzhiyun AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
286*4882a593Smuzhiyun SOC_ENUM("AK4497 De-emphasis Response DAC", ak4458_dac1_dem_enum),
287*4882a593Smuzhiyun SOC_ENUM_EXT("AK4497 Digital Filter Setting", ak4458_digfil_enum,
288*4882a593Smuzhiyun get_digfil, set_digfil),
289*4882a593Smuzhiyun SOC_ENUM("AK4497 Inverting Enable of DZFB", ak4458_dzfb_enum),
290*4882a593Smuzhiyun SOC_ENUM("AK4497 Sound Mode", ak4458_sm_enum),
291*4882a593Smuzhiyun SOC_ENUM("AK4497 Attenuation transition Time Setting",
292*4882a593Smuzhiyun ak4458_ats_enum),
293*4882a593Smuzhiyun };
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun /* ak4497 dapm widgets */
296*4882a593Smuzhiyun static const struct snd_soc_dapm_widget ak4497_dapm_widgets[] = {
297*4882a593Smuzhiyun SND_SOC_DAPM_DAC("AK4497 DAC", NULL, AK4458_0A_CONTROL6, 2, 0),
298*4882a593Smuzhiyun SND_SOC_DAPM_AIF_IN("AK4497 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
299*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("AK4497 AOUT"),
300*4882a593Smuzhiyun };
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /* ak4497 dapm routes */
303*4882a593Smuzhiyun static const struct snd_soc_dapm_route ak4497_intercon[] = {
304*4882a593Smuzhiyun {"AK4497 DAC", NULL, "AK4497 SDTI"},
305*4882a593Smuzhiyun {"AK4497 AOUT", NULL, "AK4497 DAC"},
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun };
308*4882a593Smuzhiyun
ak4458_rstn_control(struct snd_soc_component * component,int bit)309*4882a593Smuzhiyun static int ak4458_rstn_control(struct snd_soc_component *component, int bit)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun int ret;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun if (bit)
314*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component,
315*4882a593Smuzhiyun AK4458_00_CONTROL1,
316*4882a593Smuzhiyun AK4458_RSTN_MASK,
317*4882a593Smuzhiyun 0x1);
318*4882a593Smuzhiyun else
319*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component,
320*4882a593Smuzhiyun AK4458_00_CONTROL1,
321*4882a593Smuzhiyun AK4458_RSTN_MASK,
322*4882a593Smuzhiyun 0x0);
323*4882a593Smuzhiyun if (ret < 0)
324*4882a593Smuzhiyun return ret;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun return 0;
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun
ak4458_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)329*4882a593Smuzhiyun static int ak4458_hw_params(struct snd_pcm_substream *substream,
330*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
331*4882a593Smuzhiyun struct snd_soc_dai *dai)
332*4882a593Smuzhiyun {
333*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
334*4882a593Smuzhiyun struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
335*4882a593Smuzhiyun int pcm_width = max(params_physical_width(params), ak4458->slot_width);
336*4882a593Smuzhiyun u8 format, dsdsel0, dsdsel1;
337*4882a593Smuzhiyun int nfs1, dsd_bclk;
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun nfs1 = params_rate(params);
340*4882a593Smuzhiyun ak4458->fs = nfs1;
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun /* calculate bit clock */
343*4882a593Smuzhiyun switch (params_format(params)) {
344*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_DSD_U8:
345*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_DSD_U16_LE:
346*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_DSD_U16_BE:
347*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_DSD_U32_LE:
348*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_DSD_U32_BE:
349*4882a593Smuzhiyun dsd_bclk = nfs1 * params_physical_width(params);
350*4882a593Smuzhiyun switch (dsd_bclk) {
351*4882a593Smuzhiyun case 2822400:
352*4882a593Smuzhiyun dsdsel0 = 0;
353*4882a593Smuzhiyun dsdsel1 = 0;
354*4882a593Smuzhiyun break;
355*4882a593Smuzhiyun case 5644800:
356*4882a593Smuzhiyun dsdsel0 = 1;
357*4882a593Smuzhiyun dsdsel1 = 0;
358*4882a593Smuzhiyun break;
359*4882a593Smuzhiyun case 11289600:
360*4882a593Smuzhiyun dsdsel0 = 0;
361*4882a593Smuzhiyun dsdsel1 = 1;
362*4882a593Smuzhiyun break;
363*4882a593Smuzhiyun case 22579200:
364*4882a593Smuzhiyun if (ak4458->drvdata->type == AK4497) {
365*4882a593Smuzhiyun dsdsel0 = 1;
366*4882a593Smuzhiyun dsdsel1 = 1;
367*4882a593Smuzhiyun } else {
368*4882a593Smuzhiyun dev_err(dai->dev, "DSD512 not supported.\n");
369*4882a593Smuzhiyun return -EINVAL;
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun break;
372*4882a593Smuzhiyun default:
373*4882a593Smuzhiyun dev_err(dai->dev, "Unsupported dsd bclk.\n");
374*4882a593Smuzhiyun return -EINVAL;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4458_06_DSD1,
378*4882a593Smuzhiyun AK4458_DSDSEL_MASK, dsdsel0);
379*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4458_09_DSD2,
380*4882a593Smuzhiyun AK4458_DSDSEL_MASK, dsdsel1);
381*4882a593Smuzhiyun break;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun /* Master Clock Frequency Auto Setting Mode Enable */
385*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 0x80, 0x80);
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun switch (pcm_width) {
388*4882a593Smuzhiyun case 16:
389*4882a593Smuzhiyun if (ak4458->fmt == SND_SOC_DAIFMT_I2S)
390*4882a593Smuzhiyun format = AK4458_DIF_24BIT_I2S;
391*4882a593Smuzhiyun else
392*4882a593Smuzhiyun format = AK4458_DIF_16BIT_LSB;
393*4882a593Smuzhiyun break;
394*4882a593Smuzhiyun case 32:
395*4882a593Smuzhiyun switch (ak4458->fmt) {
396*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
397*4882a593Smuzhiyun format = AK4458_DIF_32BIT_I2S;
398*4882a593Smuzhiyun break;
399*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
400*4882a593Smuzhiyun format = AK4458_DIF_32BIT_MSB;
401*4882a593Smuzhiyun break;
402*4882a593Smuzhiyun case SND_SOC_DAIFMT_RIGHT_J:
403*4882a593Smuzhiyun format = AK4458_DIF_32BIT_LSB;
404*4882a593Smuzhiyun break;
405*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_B:
406*4882a593Smuzhiyun format = AK4458_DIF_32BIT_MSB;
407*4882a593Smuzhiyun break;
408*4882a593Smuzhiyun case SND_SOC_DAIFMT_PDM:
409*4882a593Smuzhiyun format = AK4458_DIF_32BIT_MSB;
410*4882a593Smuzhiyun break;
411*4882a593Smuzhiyun default:
412*4882a593Smuzhiyun return -EINVAL;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun break;
415*4882a593Smuzhiyun default:
416*4882a593Smuzhiyun return -EINVAL;
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
420*4882a593Smuzhiyun AK4458_DIF_MASK, format);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun ak4458_rstn_control(component, 0);
423*4882a593Smuzhiyun ak4458_rstn_control(component, 1);
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun return 0;
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun
ak4458_set_dai_fmt(struct snd_soc_dai * dai,unsigned int fmt)428*4882a593Smuzhiyun static int ak4458_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
429*4882a593Smuzhiyun {
430*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
431*4882a593Smuzhiyun struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
434*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFS: /* Slave Mode */
435*4882a593Smuzhiyun break;
436*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFM: /* Master Mode is not supported */
437*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFM:
438*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFS:
439*4882a593Smuzhiyun default:
440*4882a593Smuzhiyun dev_err(component->dev, "Master mode unsupported\n");
441*4882a593Smuzhiyun return -EINVAL;
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
445*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
446*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
447*4882a593Smuzhiyun case SND_SOC_DAIFMT_RIGHT_J:
448*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_B:
449*4882a593Smuzhiyun case SND_SOC_DAIFMT_PDM:
450*4882a593Smuzhiyun ak4458->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
451*4882a593Smuzhiyun break;
452*4882a593Smuzhiyun default:
453*4882a593Smuzhiyun dev_err(component->dev, "Audio format 0x%02X unsupported\n",
454*4882a593Smuzhiyun fmt & SND_SOC_DAIFMT_FORMAT_MASK);
455*4882a593Smuzhiyun return -EINVAL;
456*4882a593Smuzhiyun }
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun /* DSD mode */
459*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
460*4882a593Smuzhiyun AK4458_DP_MASK,
461*4882a593Smuzhiyun ak4458->fmt == SND_SOC_DAIFMT_PDM ?
462*4882a593Smuzhiyun AK4458_DP_MASK : 0);
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun ak4458_rstn_control(component, 0);
465*4882a593Smuzhiyun ak4458_rstn_control(component, 1);
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun return 0;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun static const int att_speed[] = { 4080, 2040, 510, 255 };
471*4882a593Smuzhiyun
ak4458_set_dai_mute(struct snd_soc_dai * dai,int mute,int direction)472*4882a593Smuzhiyun static int ak4458_set_dai_mute(struct snd_soc_dai *dai, int mute, int direction)
473*4882a593Smuzhiyun {
474*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
475*4882a593Smuzhiyun struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
476*4882a593Smuzhiyun int nfs, ndt, reg;
477*4882a593Smuzhiyun int ats;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun nfs = ak4458->fs;
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun reg = snd_soc_component_read(component, AK4458_0B_CONTROL7);
482*4882a593Smuzhiyun ats = (reg & AK4458_ATS_MASK) >> AK4458_ATS_SHIFT;
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun ndt = att_speed[ats] / (nfs / 1000);
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun if (mute) {
487*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 1);
488*4882a593Smuzhiyun mdelay(ndt);
489*4882a593Smuzhiyun if (ak4458->mute_gpiod)
490*4882a593Smuzhiyun gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
491*4882a593Smuzhiyun } else {
492*4882a593Smuzhiyun if (ak4458->mute_gpiod)
493*4882a593Smuzhiyun gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
494*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 0);
495*4882a593Smuzhiyun mdelay(ndt);
496*4882a593Smuzhiyun }
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun return 0;
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun
ak4458_set_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)501*4882a593Smuzhiyun static int ak4458_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
502*4882a593Smuzhiyun unsigned int rx_mask, int slots, int slot_width)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
505*4882a593Smuzhiyun struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
506*4882a593Smuzhiyun int mode;
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun ak4458->slots = slots;
509*4882a593Smuzhiyun ak4458->slot_width = slot_width;
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun switch (slots * slot_width) {
512*4882a593Smuzhiyun case 128:
513*4882a593Smuzhiyun mode = AK4458_MODE_TDM128;
514*4882a593Smuzhiyun break;
515*4882a593Smuzhiyun case 256:
516*4882a593Smuzhiyun mode = AK4458_MODE_TDM256;
517*4882a593Smuzhiyun break;
518*4882a593Smuzhiyun case 512:
519*4882a593Smuzhiyun mode = AK4458_MODE_TDM512;
520*4882a593Smuzhiyun break;
521*4882a593Smuzhiyun default:
522*4882a593Smuzhiyun mode = AK4458_MODE_NORMAL;
523*4882a593Smuzhiyun break;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun snd_soc_component_update_bits(component, AK4458_0A_CONTROL6,
527*4882a593Smuzhiyun AK4458_MODE_MASK,
528*4882a593Smuzhiyun mode);
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun return 0;
531*4882a593Smuzhiyun }
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun #define AK4458_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
534*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE |\
535*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S32_LE |\
536*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_DSD_U8 |\
537*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_DSD_U16_LE |\
538*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_DSD_U32_LE)
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun static const unsigned int ak4458_rates[] = {
541*4882a593Smuzhiyun 8000, 11025, 16000, 22050,
542*4882a593Smuzhiyun 32000, 44100, 48000, 88200,
543*4882a593Smuzhiyun 96000, 176400, 192000, 352800,
544*4882a593Smuzhiyun 384000, 705600, 768000, 1411200,
545*4882a593Smuzhiyun 2822400,
546*4882a593Smuzhiyun };
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list ak4458_rate_constraints = {
549*4882a593Smuzhiyun .count = ARRAY_SIZE(ak4458_rates),
550*4882a593Smuzhiyun .list = ak4458_rates,
551*4882a593Smuzhiyun };
552*4882a593Smuzhiyun
ak4458_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)553*4882a593Smuzhiyun static int ak4458_startup(struct snd_pcm_substream *substream,
554*4882a593Smuzhiyun struct snd_soc_dai *dai)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun int ret;
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
559*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_RATE,
560*4882a593Smuzhiyun &ak4458_rate_constraints);
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun return ret;
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun static const struct snd_soc_dai_ops ak4458_dai_ops = {
566*4882a593Smuzhiyun .startup = ak4458_startup,
567*4882a593Smuzhiyun .hw_params = ak4458_hw_params,
568*4882a593Smuzhiyun .set_fmt = ak4458_set_dai_fmt,
569*4882a593Smuzhiyun .mute_stream = ak4458_set_dai_mute,
570*4882a593Smuzhiyun .set_tdm_slot = ak4458_set_tdm_slot,
571*4882a593Smuzhiyun .no_capture_mute = 1,
572*4882a593Smuzhiyun };
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun static struct snd_soc_dai_driver ak4458_dai = {
575*4882a593Smuzhiyun .name = "ak4458-aif",
576*4882a593Smuzhiyun .playback = {
577*4882a593Smuzhiyun .stream_name = "Playback",
578*4882a593Smuzhiyun .channels_min = 1,
579*4882a593Smuzhiyun .channels_max = 8,
580*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_KNOT,
581*4882a593Smuzhiyun .formats = AK4458_FORMATS,
582*4882a593Smuzhiyun },
583*4882a593Smuzhiyun .ops = &ak4458_dai_ops,
584*4882a593Smuzhiyun };
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun static struct snd_soc_dai_driver ak4497_dai = {
587*4882a593Smuzhiyun .name = "ak4497-aif",
588*4882a593Smuzhiyun .playback = {
589*4882a593Smuzhiyun .stream_name = "Playback",
590*4882a593Smuzhiyun .channels_min = 1,
591*4882a593Smuzhiyun .channels_max = 2,
592*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_KNOT,
593*4882a593Smuzhiyun .formats = AK4458_FORMATS,
594*4882a593Smuzhiyun },
595*4882a593Smuzhiyun .ops = &ak4458_dai_ops,
596*4882a593Smuzhiyun };
597*4882a593Smuzhiyun
ak4458_reset(struct ak4458_priv * ak4458,bool active)598*4882a593Smuzhiyun static void ak4458_reset(struct ak4458_priv *ak4458, bool active)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun if (ak4458->reset_gpiod) {
601*4882a593Smuzhiyun gpiod_set_value_cansleep(ak4458->reset_gpiod, active);
602*4882a593Smuzhiyun usleep_range(1000, 2000);
603*4882a593Smuzhiyun }
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun
ak4458_init(struct snd_soc_component * component)606*4882a593Smuzhiyun static int ak4458_init(struct snd_soc_component *component)
607*4882a593Smuzhiyun {
608*4882a593Smuzhiyun struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
609*4882a593Smuzhiyun int ret;
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun /* External Mute ON */
612*4882a593Smuzhiyun if (ak4458->mute_gpiod)
613*4882a593Smuzhiyun gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun ak4458_reset(ak4458, false);
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
618*4882a593Smuzhiyun 0x80, 0x80); /* ACKS bit = 1; 10000000 */
619*4882a593Smuzhiyun if (ret < 0)
620*4882a593Smuzhiyun return ret;
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun if (ak4458->drvdata->type == AK4497) {
623*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, AK4458_09_DSD2,
624*4882a593Smuzhiyun 0x4, (ak4458->dsd_path << 2));
625*4882a593Smuzhiyun if (ret < 0)
626*4882a593Smuzhiyun return ret;
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun return ak4458_rstn_control(component, 1);
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun
ak4458_probe(struct snd_soc_component * component)632*4882a593Smuzhiyun static int ak4458_probe(struct snd_soc_component *component)
633*4882a593Smuzhiyun {
634*4882a593Smuzhiyun struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun ak4458->fs = 48000;
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun return ak4458_init(component);
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun
ak4458_remove(struct snd_soc_component * component)641*4882a593Smuzhiyun static void ak4458_remove(struct snd_soc_component *component)
642*4882a593Smuzhiyun {
643*4882a593Smuzhiyun struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun ak4458_reset(ak4458, true);
646*4882a593Smuzhiyun }
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun #ifdef CONFIG_PM
ak4458_runtime_suspend(struct device * dev)649*4882a593Smuzhiyun static int __maybe_unused ak4458_runtime_suspend(struct device *dev)
650*4882a593Smuzhiyun {
651*4882a593Smuzhiyun struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun regcache_cache_only(ak4458->regmap, true);
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun ak4458_reset(ak4458, true);
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun if (ak4458->mute_gpiod)
658*4882a593Smuzhiyun gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun regulator_bulk_disable(ARRAY_SIZE(ak4458->supplies),
661*4882a593Smuzhiyun ak4458->supplies);
662*4882a593Smuzhiyun return 0;
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun
ak4458_runtime_resume(struct device * dev)665*4882a593Smuzhiyun static int __maybe_unused ak4458_runtime_resume(struct device *dev)
666*4882a593Smuzhiyun {
667*4882a593Smuzhiyun struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
668*4882a593Smuzhiyun int ret;
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun ret = regulator_bulk_enable(ARRAY_SIZE(ak4458->supplies),
671*4882a593Smuzhiyun ak4458->supplies);
672*4882a593Smuzhiyun if (ret != 0) {
673*4882a593Smuzhiyun dev_err(ak4458->dev, "Failed to enable supplies: %d\n", ret);
674*4882a593Smuzhiyun return ret;
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun if (ak4458->mute_gpiod)
678*4882a593Smuzhiyun gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun ak4458_reset(ak4458, true);
681*4882a593Smuzhiyun ak4458_reset(ak4458, false);
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun regcache_cache_only(ak4458->regmap, false);
684*4882a593Smuzhiyun regcache_mark_dirty(ak4458->regmap);
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun return regcache_sync(ak4458->regmap);
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun #endif /* CONFIG_PM */
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_codec_dev_ak4458 = {
691*4882a593Smuzhiyun .probe = ak4458_probe,
692*4882a593Smuzhiyun .remove = ak4458_remove,
693*4882a593Smuzhiyun .controls = ak4458_snd_controls,
694*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(ak4458_snd_controls),
695*4882a593Smuzhiyun .dapm_widgets = ak4458_dapm_widgets,
696*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(ak4458_dapm_widgets),
697*4882a593Smuzhiyun .dapm_routes = ak4458_intercon,
698*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(ak4458_intercon),
699*4882a593Smuzhiyun .idle_bias_on = 1,
700*4882a593Smuzhiyun .use_pmdown_time = 1,
701*4882a593Smuzhiyun .endianness = 1,
702*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
703*4882a593Smuzhiyun };
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_codec_dev_ak4497 = {
706*4882a593Smuzhiyun .probe = ak4458_probe,
707*4882a593Smuzhiyun .remove = ak4458_remove,
708*4882a593Smuzhiyun .controls = ak4497_snd_controls,
709*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(ak4497_snd_controls),
710*4882a593Smuzhiyun .dapm_widgets = ak4497_dapm_widgets,
711*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(ak4497_dapm_widgets),
712*4882a593Smuzhiyun .dapm_routes = ak4497_intercon,
713*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(ak4497_intercon),
714*4882a593Smuzhiyun .idle_bias_on = 1,
715*4882a593Smuzhiyun .use_pmdown_time = 1,
716*4882a593Smuzhiyun .endianness = 1,
717*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
718*4882a593Smuzhiyun };
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun static const struct regmap_config ak4458_regmap = {
721*4882a593Smuzhiyun .reg_bits = 8,
722*4882a593Smuzhiyun .val_bits = 8,
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun .max_register = AK4458_14_R4CHATT,
725*4882a593Smuzhiyun .reg_defaults = ak4458_reg_defaults,
726*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(ak4458_reg_defaults),
727*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
728*4882a593Smuzhiyun };
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun static const struct ak4458_drvdata ak4458_drvdata = {
731*4882a593Smuzhiyun .dai_drv = &ak4458_dai,
732*4882a593Smuzhiyun .comp_drv = &soc_codec_dev_ak4458,
733*4882a593Smuzhiyun .type = AK4458,
734*4882a593Smuzhiyun };
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun static const struct ak4458_drvdata ak4497_drvdata = {
737*4882a593Smuzhiyun .dai_drv = &ak4497_dai,
738*4882a593Smuzhiyun .comp_drv = &soc_codec_dev_ak4497,
739*4882a593Smuzhiyun .type = AK4497,
740*4882a593Smuzhiyun };
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun static const struct dev_pm_ops ak4458_pm = {
743*4882a593Smuzhiyun SET_RUNTIME_PM_OPS(ak4458_runtime_suspend, ak4458_runtime_resume, NULL)
744*4882a593Smuzhiyun SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
745*4882a593Smuzhiyun pm_runtime_force_resume)
746*4882a593Smuzhiyun };
747*4882a593Smuzhiyun
ak4458_i2c_probe(struct i2c_client * i2c)748*4882a593Smuzhiyun static int ak4458_i2c_probe(struct i2c_client *i2c)
749*4882a593Smuzhiyun {
750*4882a593Smuzhiyun struct ak4458_priv *ak4458;
751*4882a593Smuzhiyun int ret, i;
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun ak4458 = devm_kzalloc(&i2c->dev, sizeof(*ak4458), GFP_KERNEL);
754*4882a593Smuzhiyun if (!ak4458)
755*4882a593Smuzhiyun return -ENOMEM;
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun ak4458->regmap = devm_regmap_init_i2c(i2c, &ak4458_regmap);
758*4882a593Smuzhiyun if (IS_ERR(ak4458->regmap))
759*4882a593Smuzhiyun return PTR_ERR(ak4458->regmap);
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun i2c_set_clientdata(i2c, ak4458);
762*4882a593Smuzhiyun ak4458->dev = &i2c->dev;
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun ak4458->drvdata = of_device_get_match_data(&i2c->dev);
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun ak4458->reset_gpiod = devm_gpiod_get_optional(ak4458->dev, "reset",
767*4882a593Smuzhiyun GPIOD_OUT_LOW);
768*4882a593Smuzhiyun if (IS_ERR(ak4458->reset_gpiod))
769*4882a593Smuzhiyun return PTR_ERR(ak4458->reset_gpiod);
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun ak4458->mute_gpiod = devm_gpiod_get_optional(ak4458->dev, "mute",
772*4882a593Smuzhiyun GPIOD_OUT_LOW);
773*4882a593Smuzhiyun if (IS_ERR(ak4458->mute_gpiod))
774*4882a593Smuzhiyun return PTR_ERR(ak4458->mute_gpiod);
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun /* Optional property for ak4497 */
777*4882a593Smuzhiyun of_property_read_u32(i2c->dev.of_node, "dsd-path", &ak4458->dsd_path);
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(ak4458->supplies); i++)
780*4882a593Smuzhiyun ak4458->supplies[i].supply = ak4458_supply_names[i];
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun ret = devm_regulator_bulk_get(ak4458->dev, ARRAY_SIZE(ak4458->supplies),
783*4882a593Smuzhiyun ak4458->supplies);
784*4882a593Smuzhiyun if (ret != 0) {
785*4882a593Smuzhiyun dev_err(ak4458->dev, "Failed to request supplies: %d\n", ret);
786*4882a593Smuzhiyun return ret;
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun ret = devm_snd_soc_register_component(ak4458->dev,
790*4882a593Smuzhiyun ak4458->drvdata->comp_drv,
791*4882a593Smuzhiyun ak4458->drvdata->dai_drv, 1);
792*4882a593Smuzhiyun if (ret < 0) {
793*4882a593Smuzhiyun dev_err(ak4458->dev, "Failed to register CODEC: %d\n", ret);
794*4882a593Smuzhiyun return ret;
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun pm_runtime_enable(&i2c->dev);
798*4882a593Smuzhiyun regcache_cache_only(ak4458->regmap, true);
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun return 0;
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun
ak4458_i2c_remove(struct i2c_client * i2c)803*4882a593Smuzhiyun static int ak4458_i2c_remove(struct i2c_client *i2c)
804*4882a593Smuzhiyun {
805*4882a593Smuzhiyun pm_runtime_disable(&i2c->dev);
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun return 0;
808*4882a593Smuzhiyun }
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun static const struct of_device_id ak4458_of_match[] = {
811*4882a593Smuzhiyun { .compatible = "asahi-kasei,ak4458", .data = &ak4458_drvdata},
812*4882a593Smuzhiyun { .compatible = "asahi-kasei,ak4497", .data = &ak4497_drvdata},
813*4882a593Smuzhiyun { },
814*4882a593Smuzhiyun };
815*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ak4458_of_match);
816*4882a593Smuzhiyun
817*4882a593Smuzhiyun static struct i2c_driver ak4458_i2c_driver = {
818*4882a593Smuzhiyun .driver = {
819*4882a593Smuzhiyun .name = "ak4458",
820*4882a593Smuzhiyun .pm = &ak4458_pm,
821*4882a593Smuzhiyun .of_match_table = ak4458_of_match,
822*4882a593Smuzhiyun },
823*4882a593Smuzhiyun .probe_new = ak4458_i2c_probe,
824*4882a593Smuzhiyun .remove = ak4458_i2c_remove,
825*4882a593Smuzhiyun };
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun module_i2c_driver(ak4458_i2c_driver);
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun MODULE_AUTHOR("Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp>");
830*4882a593Smuzhiyun MODULE_AUTHOR("Mihai Serban <mihai.serban@nxp.com>");
831*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC AK4458 DAC driver");
832*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
833