xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/ak4118.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * ak4118.c  --  Asahi Kasei ALSA Soc Audio driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2018 DEVIALET
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/i2c.h>
9*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/of_device.h>
12*4882a593Smuzhiyun #include <linux/of_gpio.h>
13*4882a593Smuzhiyun #include <linux/regmap.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <sound/asoundef.h>
17*4882a593Smuzhiyun #include <sound/core.h>
18*4882a593Smuzhiyun #include <sound/initval.h>
19*4882a593Smuzhiyun #include <sound/soc.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define AK4118_REG_CLK_PWR_CTL		0x00
22*4882a593Smuzhiyun #define AK4118_REG_FORMAT_CTL		0x01
23*4882a593Smuzhiyun #define AK4118_REG_IO_CTL0		0x02
24*4882a593Smuzhiyun #define AK4118_REG_IO_CTL1		0x03
25*4882a593Smuzhiyun #define AK4118_REG_INT0_MASK		0x04
26*4882a593Smuzhiyun #define AK4118_REG_INT1_MASK		0x05
27*4882a593Smuzhiyun #define AK4118_REG_RCV_STATUS0		0x06
28*4882a593Smuzhiyun #define AK4118_REG_RCV_STATUS1		0x07
29*4882a593Smuzhiyun #define AK4118_REG_RXCHAN_STATUS0	0x08
30*4882a593Smuzhiyun #define AK4118_REG_RXCHAN_STATUS1	0x09
31*4882a593Smuzhiyun #define AK4118_REG_RXCHAN_STATUS2	0x0a
32*4882a593Smuzhiyun #define AK4118_REG_RXCHAN_STATUS3	0x0b
33*4882a593Smuzhiyun #define AK4118_REG_RXCHAN_STATUS4	0x0c
34*4882a593Smuzhiyun #define AK4118_REG_TXCHAN_STATUS0	0x0d
35*4882a593Smuzhiyun #define AK4118_REG_TXCHAN_STATUS1	0x0e
36*4882a593Smuzhiyun #define AK4118_REG_TXCHAN_STATUS2	0x0f
37*4882a593Smuzhiyun #define AK4118_REG_TXCHAN_STATUS3	0x10
38*4882a593Smuzhiyun #define AK4118_REG_TXCHAN_STATUS4	0x11
39*4882a593Smuzhiyun #define AK4118_REG_BURST_PREAMB_PC0	0x12
40*4882a593Smuzhiyun #define AK4118_REG_BURST_PREAMB_PC1	0x13
41*4882a593Smuzhiyun #define AK4118_REG_BURST_PREAMB_PD0	0x14
42*4882a593Smuzhiyun #define AK4118_REG_BURST_PREAMB_PD1	0x15
43*4882a593Smuzhiyun #define AK4118_REG_QSUB_CTL		0x16
44*4882a593Smuzhiyun #define AK4118_REG_QSUB_TRACK		0x17
45*4882a593Smuzhiyun #define AK4118_REG_QSUB_INDEX		0x18
46*4882a593Smuzhiyun #define AK4118_REG_QSUB_MIN		0x19
47*4882a593Smuzhiyun #define AK4118_REG_QSUB_SEC		0x1a
48*4882a593Smuzhiyun #define AK4118_REG_QSUB_FRAME		0x1b
49*4882a593Smuzhiyun #define AK4118_REG_QSUB_ZERO		0x1c
50*4882a593Smuzhiyun #define AK4118_REG_QSUB_ABS_MIN		0x1d
51*4882a593Smuzhiyun #define AK4118_REG_QSUB_ABS_SEC		0x1e
52*4882a593Smuzhiyun #define AK4118_REG_QSUB_ABS_FRAME	0x1f
53*4882a593Smuzhiyun #define AK4118_REG_GPE			0x20
54*4882a593Smuzhiyun #define AK4118_REG_GPDR			0x21
55*4882a593Smuzhiyun #define AK4118_REG_GPSCR		0x22
56*4882a593Smuzhiyun #define AK4118_REG_GPLR			0x23
57*4882a593Smuzhiyun #define AK4118_REG_DAT_MASK_DTS		0x24
58*4882a593Smuzhiyun #define AK4118_REG_RX_DETECT		0x25
59*4882a593Smuzhiyun #define AK4118_REG_STC_DAT_DETECT	0x26
60*4882a593Smuzhiyun #define AK4118_REG_RXCHAN_STATUS5	0x27
61*4882a593Smuzhiyun #define AK4118_REG_TXCHAN_STATUS5	0x28
62*4882a593Smuzhiyun #define AK4118_REG_MAX			0x29
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun #define AK4118_REG_FORMAT_CTL_DIF0	(1 << 4)
65*4882a593Smuzhiyun #define AK4118_REG_FORMAT_CTL_DIF1	(1 << 5)
66*4882a593Smuzhiyun #define AK4118_REG_FORMAT_CTL_DIF2	(1 << 6)
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun struct ak4118_priv {
69*4882a593Smuzhiyun 	struct regmap *regmap;
70*4882a593Smuzhiyun 	struct gpio_desc *reset;
71*4882a593Smuzhiyun 	struct gpio_desc *irq;
72*4882a593Smuzhiyun 	struct snd_soc_component *component;
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun static const struct reg_default ak4118_reg_defaults[] = {
76*4882a593Smuzhiyun 	{AK4118_REG_CLK_PWR_CTL,	0x43},
77*4882a593Smuzhiyun 	{AK4118_REG_FORMAT_CTL,		0x6a},
78*4882a593Smuzhiyun 	{AK4118_REG_IO_CTL0,		0x88},
79*4882a593Smuzhiyun 	{AK4118_REG_IO_CTL1,		0x48},
80*4882a593Smuzhiyun 	{AK4118_REG_INT0_MASK,		0xee},
81*4882a593Smuzhiyun 	{AK4118_REG_INT1_MASK,		0xb5},
82*4882a593Smuzhiyun 	{AK4118_REG_RCV_STATUS0,	0x00},
83*4882a593Smuzhiyun 	{AK4118_REG_RCV_STATUS1,	0x10},
84*4882a593Smuzhiyun 	{AK4118_REG_TXCHAN_STATUS0,	0x00},
85*4882a593Smuzhiyun 	{AK4118_REG_TXCHAN_STATUS1,	0x00},
86*4882a593Smuzhiyun 	{AK4118_REG_TXCHAN_STATUS2,	0x00},
87*4882a593Smuzhiyun 	{AK4118_REG_TXCHAN_STATUS3,	0x00},
88*4882a593Smuzhiyun 	{AK4118_REG_TXCHAN_STATUS4,	0x00},
89*4882a593Smuzhiyun 	{AK4118_REG_GPE,		0x77},
90*4882a593Smuzhiyun 	{AK4118_REG_GPDR,		0x00},
91*4882a593Smuzhiyun 	{AK4118_REG_GPSCR,		0x00},
92*4882a593Smuzhiyun 	{AK4118_REG_GPLR,		0x00},
93*4882a593Smuzhiyun 	{AK4118_REG_DAT_MASK_DTS,	0x3f},
94*4882a593Smuzhiyun 	{AK4118_REG_RX_DETECT,		0x00},
95*4882a593Smuzhiyun 	{AK4118_REG_STC_DAT_DETECT,	0x00},
96*4882a593Smuzhiyun 	{AK4118_REG_TXCHAN_STATUS5,	0x00},
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun static const char * const ak4118_input_select_txt[] = {
100*4882a593Smuzhiyun 	"RX0", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7",
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(ak4118_insel_enum, AK4118_REG_IO_CTL1, 0x0,
103*4882a593Smuzhiyun 			    ak4118_input_select_txt);
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun static const struct snd_kcontrol_new ak4118_input_mux_controls =
106*4882a593Smuzhiyun 	SOC_DAPM_ENUM("Input Select", ak4118_insel_enum);
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun static const char * const ak4118_iec958_fs_txt[] = {
109*4882a593Smuzhiyun 	"44100", "48000", "32000", "22050", "11025", "24000", "16000", "88200",
110*4882a593Smuzhiyun 	"8000", "96000", "64000", "176400", "192000",
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun static const int ak4118_iec958_fs_val[] = {
114*4882a593Smuzhiyun 	0x0, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xA, 0xB, 0xC, 0xE,
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun static SOC_VALUE_ENUM_SINGLE_DECL(ak4118_iec958_fs_enum, AK4118_REG_RCV_STATUS1,
118*4882a593Smuzhiyun 				  0x4, 0x4, ak4118_iec958_fs_txt,
119*4882a593Smuzhiyun 				  ak4118_iec958_fs_val);
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun static struct snd_kcontrol_new ak4118_iec958_controls[] = {
122*4882a593Smuzhiyun 	SOC_SINGLE("IEC958 Parity Errors", AK4118_REG_RCV_STATUS0, 0, 1, 0),
123*4882a593Smuzhiyun 	SOC_SINGLE("IEC958 No Audio", AK4118_REG_RCV_STATUS0, 1, 1, 0),
124*4882a593Smuzhiyun 	SOC_SINGLE("IEC958 PLL Lock", AK4118_REG_RCV_STATUS0, 4, 1, 1),
125*4882a593Smuzhiyun 	SOC_SINGLE("IEC958 Non PCM", AK4118_REG_RCV_STATUS0, 6, 1, 0),
126*4882a593Smuzhiyun 	SOC_ENUM("IEC958 Sampling Freq", ak4118_iec958_fs_enum),
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun static const struct snd_soc_dapm_widget ak4118_dapm_widgets[] = {
130*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("INRX0"),
131*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("INRX1"),
132*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("INRX2"),
133*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("INRX3"),
134*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("INRX4"),
135*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("INRX5"),
136*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("INRX6"),
137*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("INRX7"),
138*4882a593Smuzhiyun 	SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
139*4882a593Smuzhiyun 			 &ak4118_input_mux_controls),
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun static const struct snd_soc_dapm_route ak4118_dapm_routes[] = {
143*4882a593Smuzhiyun 	{"Input Mux", "RX0", "INRX0"},
144*4882a593Smuzhiyun 	{"Input Mux", "RX1", "INRX1"},
145*4882a593Smuzhiyun 	{"Input Mux", "RX2", "INRX2"},
146*4882a593Smuzhiyun 	{"Input Mux", "RX3", "INRX3"},
147*4882a593Smuzhiyun 	{"Input Mux", "RX4", "INRX4"},
148*4882a593Smuzhiyun 	{"Input Mux", "RX5", "INRX5"},
149*4882a593Smuzhiyun 	{"Input Mux", "RX6", "INRX6"},
150*4882a593Smuzhiyun 	{"Input Mux", "RX7", "INRX7"},
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 
ak4118_set_dai_fmt_master(struct ak4118_priv * ak4118,unsigned int format)154*4882a593Smuzhiyun static int ak4118_set_dai_fmt_master(struct ak4118_priv *ak4118,
155*4882a593Smuzhiyun 				     unsigned int format)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun 	int dif;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
160*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
161*4882a593Smuzhiyun 		dif = AK4118_REG_FORMAT_CTL_DIF0 | AK4118_REG_FORMAT_CTL_DIF2;
162*4882a593Smuzhiyun 		break;
163*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_RIGHT_J:
164*4882a593Smuzhiyun 		dif = AK4118_REG_FORMAT_CTL_DIF0 | AK4118_REG_FORMAT_CTL_DIF1;
165*4882a593Smuzhiyun 		break;
166*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
167*4882a593Smuzhiyun 		dif = AK4118_REG_FORMAT_CTL_DIF2;
168*4882a593Smuzhiyun 		break;
169*4882a593Smuzhiyun 	default:
170*4882a593Smuzhiyun 		return -ENOTSUPP;
171*4882a593Smuzhiyun 	}
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	return dif;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun 
ak4118_set_dai_fmt_slave(struct ak4118_priv * ak4118,unsigned int format)176*4882a593Smuzhiyun static int ak4118_set_dai_fmt_slave(struct ak4118_priv *ak4118,
177*4882a593Smuzhiyun 				    unsigned int format)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun 	int dif;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
182*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
183*4882a593Smuzhiyun 		dif = AK4118_REG_FORMAT_CTL_DIF0 | AK4118_REG_FORMAT_CTL_DIF1 |
184*4882a593Smuzhiyun 		      AK4118_REG_FORMAT_CTL_DIF2;
185*4882a593Smuzhiyun 		break;
186*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
187*4882a593Smuzhiyun 		dif = AK4118_REG_FORMAT_CTL_DIF1 | AK4118_REG_FORMAT_CTL_DIF2;
188*4882a593Smuzhiyun 		break;
189*4882a593Smuzhiyun 	default:
190*4882a593Smuzhiyun 		return -ENOTSUPP;
191*4882a593Smuzhiyun 	}
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	return dif;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun 
ak4118_set_dai_fmt(struct snd_soc_dai * dai,unsigned int format)196*4882a593Smuzhiyun static int ak4118_set_dai_fmt(struct snd_soc_dai *dai,
197*4882a593Smuzhiyun 			      unsigned int format)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
200*4882a593Smuzhiyun 	struct ak4118_priv *ak4118 = snd_soc_component_get_drvdata(component);
201*4882a593Smuzhiyun 	int dif;
202*4882a593Smuzhiyun 	int ret = 0;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
205*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBM_CFM:
206*4882a593Smuzhiyun 		/* component is master */
207*4882a593Smuzhiyun 		dif = ak4118_set_dai_fmt_master(ak4118, format);
208*4882a593Smuzhiyun 		break;
209*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBS_CFS:
210*4882a593Smuzhiyun 		/*component is slave */
211*4882a593Smuzhiyun 		dif = ak4118_set_dai_fmt_slave(ak4118, format);
212*4882a593Smuzhiyun 		break;
213*4882a593Smuzhiyun 	default:
214*4882a593Smuzhiyun 		ret = -ENOTSUPP;
215*4882a593Smuzhiyun 		goto exit;
216*4882a593Smuzhiyun 	}
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	/* format not supported */
219*4882a593Smuzhiyun 	if (dif < 0) {
220*4882a593Smuzhiyun 		ret = dif;
221*4882a593Smuzhiyun 		goto exit;
222*4882a593Smuzhiyun 	}
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	ret = regmap_update_bits(ak4118->regmap, AK4118_REG_FORMAT_CTL,
225*4882a593Smuzhiyun 				 AK4118_REG_FORMAT_CTL_DIF0 |
226*4882a593Smuzhiyun 				 AK4118_REG_FORMAT_CTL_DIF1 |
227*4882a593Smuzhiyun 				 AK4118_REG_FORMAT_CTL_DIF2, dif);
228*4882a593Smuzhiyun 	if (ret < 0)
229*4882a593Smuzhiyun 		goto exit;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun exit:
232*4882a593Smuzhiyun 	return ret;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun 
ak4118_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)235*4882a593Smuzhiyun static int ak4118_hw_params(struct snd_pcm_substream *substream,
236*4882a593Smuzhiyun 			    struct snd_pcm_hw_params *params,
237*4882a593Smuzhiyun 			    struct snd_soc_dai *dai)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun 	return 0;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun static const struct snd_soc_dai_ops ak4118_dai_ops = {
243*4882a593Smuzhiyun 	.hw_params = ak4118_hw_params,
244*4882a593Smuzhiyun 	.set_fmt   = ak4118_set_dai_fmt,
245*4882a593Smuzhiyun };
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun static struct snd_soc_dai_driver ak4118_dai = {
248*4882a593Smuzhiyun 	.name = "ak4118-hifi",
249*4882a593Smuzhiyun 	.capture = {
250*4882a593Smuzhiyun 		.stream_name = "Capture",
251*4882a593Smuzhiyun 		.channels_min = 2,
252*4882a593Smuzhiyun 		.channels_max = 2,
253*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
254*4882a593Smuzhiyun 			 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
255*4882a593Smuzhiyun 			 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
256*4882a593Smuzhiyun 			 SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000,
257*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S16_LE  |
258*4882a593Smuzhiyun 			   SNDRV_PCM_FMTBIT_S24_3LE |
259*4882a593Smuzhiyun 			   SNDRV_PCM_FMTBIT_S24_LE
260*4882a593Smuzhiyun 	},
261*4882a593Smuzhiyun 	.ops = &ak4118_dai_ops,
262*4882a593Smuzhiyun };
263*4882a593Smuzhiyun 
ak4118_irq_handler(int irq,void * data)264*4882a593Smuzhiyun static irqreturn_t ak4118_irq_handler(int irq, void *data)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun 	struct ak4118_priv *ak4118 = data;
267*4882a593Smuzhiyun 	struct snd_soc_component *component = ak4118->component;
268*4882a593Smuzhiyun 	struct snd_kcontrol_new *kctl_new;
269*4882a593Smuzhiyun 	struct snd_kcontrol *kctl;
270*4882a593Smuzhiyun 	struct snd_ctl_elem_id *id;
271*4882a593Smuzhiyun 	unsigned int i;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	if (!component)
274*4882a593Smuzhiyun 		return IRQ_NONE;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(ak4118_iec958_controls); i++) {
277*4882a593Smuzhiyun 		kctl_new = &ak4118_iec958_controls[i];
278*4882a593Smuzhiyun 		kctl = snd_soc_card_get_kcontrol(component->card,
279*4882a593Smuzhiyun 						 kctl_new->name);
280*4882a593Smuzhiyun 		if (!kctl)
281*4882a593Smuzhiyun 			continue;
282*4882a593Smuzhiyun 		id = &kctl->id;
283*4882a593Smuzhiyun 		snd_ctl_notify(component->card->snd_card,
284*4882a593Smuzhiyun 			       SNDRV_CTL_EVENT_MASK_VALUE, id);
285*4882a593Smuzhiyun 	}
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	return IRQ_HANDLED;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun 
ak4118_probe(struct snd_soc_component * component)290*4882a593Smuzhiyun static int ak4118_probe(struct snd_soc_component *component)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun 	struct ak4118_priv *ak4118 = snd_soc_component_get_drvdata(component);
293*4882a593Smuzhiyun 	int ret = 0;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	ak4118->component = component;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	/* release reset */
298*4882a593Smuzhiyun 	gpiod_set_value(ak4118->reset, 0);
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	/* unmask all int1 sources */
301*4882a593Smuzhiyun 	ret = regmap_write(ak4118->regmap, AK4118_REG_INT1_MASK, 0x00);
302*4882a593Smuzhiyun 	if (ret < 0) {
303*4882a593Smuzhiyun 		dev_err(component->dev,
304*4882a593Smuzhiyun 			"failed to write regmap 0x%x 0x%x: %d\n",
305*4882a593Smuzhiyun 			AK4118_REG_INT1_MASK, 0x00, ret);
306*4882a593Smuzhiyun 		return ret;
307*4882a593Smuzhiyun 	}
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	/* rx detect enable on all channels */
310*4882a593Smuzhiyun 	ret = regmap_write(ak4118->regmap, AK4118_REG_RX_DETECT, 0xff);
311*4882a593Smuzhiyun 	if (ret < 0) {
312*4882a593Smuzhiyun 		dev_err(component->dev,
313*4882a593Smuzhiyun 			"failed to write regmap 0x%x 0x%x: %d\n",
314*4882a593Smuzhiyun 			AK4118_REG_RX_DETECT, 0xff, ret);
315*4882a593Smuzhiyun 		return ret;
316*4882a593Smuzhiyun 	}
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	ret = snd_soc_add_component_controls(component, ak4118_iec958_controls,
319*4882a593Smuzhiyun 					 ARRAY_SIZE(ak4118_iec958_controls));
320*4882a593Smuzhiyun 	if (ret) {
321*4882a593Smuzhiyun 		dev_err(component->dev,
322*4882a593Smuzhiyun 			"failed to add component kcontrols: %d\n", ret);
323*4882a593Smuzhiyun 		return ret;
324*4882a593Smuzhiyun 	}
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	return 0;
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun 
ak4118_remove(struct snd_soc_component * component)329*4882a593Smuzhiyun static void ak4118_remove(struct snd_soc_component *component)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun 	struct ak4118_priv *ak4118 = snd_soc_component_get_drvdata(component);
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	/* hold reset */
334*4882a593Smuzhiyun 	gpiod_set_value(ak4118->reset, 1);
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_drv_ak4118 = {
338*4882a593Smuzhiyun 	.probe			= ak4118_probe,
339*4882a593Smuzhiyun 	.remove			= ak4118_remove,
340*4882a593Smuzhiyun 	.dapm_widgets		= ak4118_dapm_widgets,
341*4882a593Smuzhiyun 	.num_dapm_widgets	= ARRAY_SIZE(ak4118_dapm_widgets),
342*4882a593Smuzhiyun 	.dapm_routes		= ak4118_dapm_routes,
343*4882a593Smuzhiyun 	.num_dapm_routes	= ARRAY_SIZE(ak4118_dapm_routes),
344*4882a593Smuzhiyun 	.idle_bias_on		= 1,
345*4882a593Smuzhiyun 	.use_pmdown_time	= 1,
346*4882a593Smuzhiyun 	.endianness		= 1,
347*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
348*4882a593Smuzhiyun };
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun static const struct regmap_config ak4118_regmap = {
351*4882a593Smuzhiyun 	.reg_bits = 8,
352*4882a593Smuzhiyun 	.val_bits = 8,
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	.reg_defaults = ak4118_reg_defaults,
355*4882a593Smuzhiyun 	.num_reg_defaults = ARRAY_SIZE(ak4118_reg_defaults),
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	.cache_type = REGCACHE_NONE,
358*4882a593Smuzhiyun 	.max_register = AK4118_REG_MAX - 1,
359*4882a593Smuzhiyun };
360*4882a593Smuzhiyun 
ak4118_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)361*4882a593Smuzhiyun static int ak4118_i2c_probe(struct i2c_client *i2c,
362*4882a593Smuzhiyun 			    const struct i2c_device_id *id)
363*4882a593Smuzhiyun {
364*4882a593Smuzhiyun 	struct ak4118_priv *ak4118;
365*4882a593Smuzhiyun 	int ret;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	ak4118 = devm_kzalloc(&i2c->dev, sizeof(struct ak4118_priv),
368*4882a593Smuzhiyun 			      GFP_KERNEL);
369*4882a593Smuzhiyun 	if (ak4118 == NULL)
370*4882a593Smuzhiyun 		return -ENOMEM;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	ak4118->regmap = devm_regmap_init_i2c(i2c, &ak4118_regmap);
373*4882a593Smuzhiyun 	if (IS_ERR(ak4118->regmap))
374*4882a593Smuzhiyun 		return PTR_ERR(ak4118->regmap);
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	i2c_set_clientdata(i2c, ak4118);
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	ak4118->reset = devm_gpiod_get(&i2c->dev, "reset", GPIOD_OUT_HIGH);
379*4882a593Smuzhiyun 	if (IS_ERR(ak4118->reset)) {
380*4882a593Smuzhiyun 		ret = PTR_ERR(ak4118->reset);
381*4882a593Smuzhiyun 		if (ret != -EPROBE_DEFER)
382*4882a593Smuzhiyun 			dev_err(&i2c->dev, "Failed to get reset: %d\n", ret);
383*4882a593Smuzhiyun 		return ret;
384*4882a593Smuzhiyun 	}
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	ak4118->irq = devm_gpiod_get(&i2c->dev, "irq", GPIOD_IN);
387*4882a593Smuzhiyun 	if (IS_ERR(ak4118->irq)) {
388*4882a593Smuzhiyun 		ret = PTR_ERR(ak4118->irq);
389*4882a593Smuzhiyun 		if (ret != -EPROBE_DEFER)
390*4882a593Smuzhiyun 			dev_err(&i2c->dev, "Failed to get IRQ: %d\n", ret);
391*4882a593Smuzhiyun 		return ret;
392*4882a593Smuzhiyun 	}
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	ret = devm_request_threaded_irq(&i2c->dev, gpiod_to_irq(ak4118->irq),
395*4882a593Smuzhiyun 					NULL, ak4118_irq_handler,
396*4882a593Smuzhiyun 					IRQF_TRIGGER_RISING | IRQF_ONESHOT,
397*4882a593Smuzhiyun 					"ak4118-irq", ak4118);
398*4882a593Smuzhiyun 	if (ret < 0) {
399*4882a593Smuzhiyun 		dev_err(&i2c->dev, "Fail to request_irq: %d\n", ret);
400*4882a593Smuzhiyun 		return ret;
401*4882a593Smuzhiyun 	}
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	return devm_snd_soc_register_component(&i2c->dev,
404*4882a593Smuzhiyun 				&soc_component_drv_ak4118, &ak4118_dai, 1);
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun static const struct of_device_id ak4118_of_match[] = {
408*4882a593Smuzhiyun 	{ .compatible = "asahi-kasei,ak4118", },
409*4882a593Smuzhiyun 	{}
410*4882a593Smuzhiyun };
411*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ak4118_of_match);
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun static const struct i2c_device_id ak4118_id_table[] = {
414*4882a593Smuzhiyun 	{ "ak4118", 0 },
415*4882a593Smuzhiyun 	{}
416*4882a593Smuzhiyun };
417*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, ak4118_id_table);
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun static struct i2c_driver ak4118_i2c_driver = {
420*4882a593Smuzhiyun 	.driver  = {
421*4882a593Smuzhiyun 		.name = "ak4118",
422*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(ak4118_of_match),
423*4882a593Smuzhiyun 	},
424*4882a593Smuzhiyun 	.id_table = ak4118_id_table,
425*4882a593Smuzhiyun 	.probe  = ak4118_i2c_probe,
426*4882a593Smuzhiyun };
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun module_i2c_driver(ak4118_i2c_driver);
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun MODULE_DESCRIPTION("Asahi Kasei AK4118 ALSA SoC driver");
431*4882a593Smuzhiyun MODULE_AUTHOR("Adrien Charruel <adrien.charruel@devialet.com>");
432*4882a593Smuzhiyun MODULE_LICENSE("GPL");
433