1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for ADAU1361/ADAU1461/ADAU1761/ADAU1961 codec
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2011-2013 Analog Devices Inc.
6*4882a593Smuzhiyun * Author: Lars-Peter Clausen <lars@metafoo.de>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/spi/spi.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <sound/core.h>
15*4882a593Smuzhiyun #include <sound/pcm.h>
16*4882a593Smuzhiyun #include <sound/pcm_params.h>
17*4882a593Smuzhiyun #include <sound/soc.h>
18*4882a593Smuzhiyun #include <sound/tlv.h>
19*4882a593Smuzhiyun #include <linux/platform_data/adau17x1.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include "adau17x1.h"
22*4882a593Smuzhiyun #include "adau1761.h"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define ADAU1761_DIGMIC_JACKDETECT 0x4008
25*4882a593Smuzhiyun #define ADAU1761_REC_MIXER_LEFT0 0x400a
26*4882a593Smuzhiyun #define ADAU1761_REC_MIXER_LEFT1 0x400b
27*4882a593Smuzhiyun #define ADAU1761_REC_MIXER_RIGHT0 0x400c
28*4882a593Smuzhiyun #define ADAU1761_REC_MIXER_RIGHT1 0x400d
29*4882a593Smuzhiyun #define ADAU1761_LEFT_DIFF_INPUT_VOL 0x400e
30*4882a593Smuzhiyun #define ADAU1761_RIGHT_DIFF_INPUT_VOL 0x400f
31*4882a593Smuzhiyun #define ADAU1761_ALC_CTRL0 0x4011
32*4882a593Smuzhiyun #define ADAU1761_ALC_CTRL1 0x4012
33*4882a593Smuzhiyun #define ADAU1761_ALC_CTRL2 0x4013
34*4882a593Smuzhiyun #define ADAU1761_ALC_CTRL3 0x4014
35*4882a593Smuzhiyun #define ADAU1761_PLAY_LR_MIXER_LEFT 0x4020
36*4882a593Smuzhiyun #define ADAU1761_PLAY_MIXER_LEFT0 0x401c
37*4882a593Smuzhiyun #define ADAU1761_PLAY_MIXER_LEFT1 0x401d
38*4882a593Smuzhiyun #define ADAU1761_PLAY_MIXER_RIGHT0 0x401e
39*4882a593Smuzhiyun #define ADAU1761_PLAY_MIXER_RIGHT1 0x401f
40*4882a593Smuzhiyun #define ADAU1761_PLAY_LR_MIXER_RIGHT 0x4021
41*4882a593Smuzhiyun #define ADAU1761_PLAY_MIXER_MONO 0x4022
42*4882a593Smuzhiyun #define ADAU1761_PLAY_HP_LEFT_VOL 0x4023
43*4882a593Smuzhiyun #define ADAU1761_PLAY_HP_RIGHT_VOL 0x4024
44*4882a593Smuzhiyun #define ADAU1761_PLAY_LINE_LEFT_VOL 0x4025
45*4882a593Smuzhiyun #define ADAU1761_PLAY_LINE_RIGHT_VOL 0x4026
46*4882a593Smuzhiyun #define ADAU1761_PLAY_MONO_OUTPUT_VOL 0x4027
47*4882a593Smuzhiyun #define ADAU1761_POP_CLICK_SUPPRESS 0x4028
48*4882a593Smuzhiyun #define ADAU1761_JACK_DETECT_PIN 0x4031
49*4882a593Smuzhiyun #define ADAU1761_DEJITTER 0x4036
50*4882a593Smuzhiyun #define ADAU1761_CLK_ENABLE0 0x40f9
51*4882a593Smuzhiyun #define ADAU1761_CLK_ENABLE1 0x40fa
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #define ADAU1761_DIGMIC_JACKDETECT_ACTIVE_LOW BIT(0)
54*4882a593Smuzhiyun #define ADAU1761_DIGMIC_JACKDETECT_DIGMIC BIT(5)
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #define ADAU1761_DIFF_INPUT_VOL_LDEN BIT(0)
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #define ADAU1761_PLAY_MONO_OUTPUT_VOL_MODE_HP BIT(0)
59*4882a593Smuzhiyun #define ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE BIT(1)
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define ADAU1761_PLAY_HP_RIGHT_VOL_MODE_HP BIT(0)
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun #define ADAU1761_PLAY_LINE_LEFT_VOL_MODE_HP BIT(0)
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun #define ADAU1761_PLAY_LINE_RIGHT_VOL_MODE_HP BIT(0)
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun #define ADAU1761_FIRMWARE "adau1761.bin"
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun static const struct reg_default adau1761_reg_defaults[] = {
71*4882a593Smuzhiyun { ADAU1761_DEJITTER, 0x03 },
72*4882a593Smuzhiyun { ADAU1761_DIGMIC_JACKDETECT, 0x00 },
73*4882a593Smuzhiyun { ADAU1761_REC_MIXER_LEFT0, 0x00 },
74*4882a593Smuzhiyun { ADAU1761_REC_MIXER_LEFT1, 0x00 },
75*4882a593Smuzhiyun { ADAU1761_REC_MIXER_RIGHT0, 0x00 },
76*4882a593Smuzhiyun { ADAU1761_REC_MIXER_RIGHT1, 0x00 },
77*4882a593Smuzhiyun { ADAU1761_LEFT_DIFF_INPUT_VOL, 0x00 },
78*4882a593Smuzhiyun { ADAU1761_ALC_CTRL0, 0x00 },
79*4882a593Smuzhiyun { ADAU1761_ALC_CTRL1, 0x00 },
80*4882a593Smuzhiyun { ADAU1761_ALC_CTRL2, 0x00 },
81*4882a593Smuzhiyun { ADAU1761_ALC_CTRL3, 0x00 },
82*4882a593Smuzhiyun { ADAU1761_RIGHT_DIFF_INPUT_VOL, 0x00 },
83*4882a593Smuzhiyun { ADAU1761_PLAY_LR_MIXER_LEFT, 0x00 },
84*4882a593Smuzhiyun { ADAU1761_PLAY_MIXER_LEFT0, 0x00 },
85*4882a593Smuzhiyun { ADAU1761_PLAY_MIXER_LEFT1, 0x00 },
86*4882a593Smuzhiyun { ADAU1761_PLAY_MIXER_RIGHT0, 0x00 },
87*4882a593Smuzhiyun { ADAU1761_PLAY_MIXER_RIGHT1, 0x00 },
88*4882a593Smuzhiyun { ADAU1761_PLAY_LR_MIXER_RIGHT, 0x00 },
89*4882a593Smuzhiyun { ADAU1761_PLAY_MIXER_MONO, 0x00 },
90*4882a593Smuzhiyun { ADAU1761_PLAY_HP_LEFT_VOL, 0x00 },
91*4882a593Smuzhiyun { ADAU1761_PLAY_HP_RIGHT_VOL, 0x00 },
92*4882a593Smuzhiyun { ADAU1761_PLAY_LINE_LEFT_VOL, 0x00 },
93*4882a593Smuzhiyun { ADAU1761_PLAY_LINE_RIGHT_VOL, 0x00 },
94*4882a593Smuzhiyun { ADAU1761_PLAY_MONO_OUTPUT_VOL, 0x00 },
95*4882a593Smuzhiyun { ADAU1761_POP_CLICK_SUPPRESS, 0x00 },
96*4882a593Smuzhiyun { ADAU1761_JACK_DETECT_PIN, 0x00 },
97*4882a593Smuzhiyun { ADAU1761_CLK_ENABLE0, 0x00 },
98*4882a593Smuzhiyun { ADAU1761_CLK_ENABLE1, 0x00 },
99*4882a593Smuzhiyun { ADAU17X1_CLOCK_CONTROL, 0x00 },
100*4882a593Smuzhiyun { ADAU17X1_PLL_CONTROL, 0x00 },
101*4882a593Smuzhiyun { ADAU17X1_REC_POWER_MGMT, 0x00 },
102*4882a593Smuzhiyun { ADAU17X1_MICBIAS, 0x00 },
103*4882a593Smuzhiyun { ADAU17X1_SERIAL_PORT0, 0x00 },
104*4882a593Smuzhiyun { ADAU17X1_SERIAL_PORT1, 0x00 },
105*4882a593Smuzhiyun { ADAU17X1_CONVERTER0, 0x00 },
106*4882a593Smuzhiyun { ADAU17X1_CONVERTER1, 0x00 },
107*4882a593Smuzhiyun { ADAU17X1_LEFT_INPUT_DIGITAL_VOL, 0x00 },
108*4882a593Smuzhiyun { ADAU17X1_RIGHT_INPUT_DIGITAL_VOL, 0x00 },
109*4882a593Smuzhiyun { ADAU17X1_ADC_CONTROL, 0x00 },
110*4882a593Smuzhiyun { ADAU17X1_PLAY_POWER_MGMT, 0x00 },
111*4882a593Smuzhiyun { ADAU17X1_DAC_CONTROL0, 0x00 },
112*4882a593Smuzhiyun { ADAU17X1_DAC_CONTROL1, 0x00 },
113*4882a593Smuzhiyun { ADAU17X1_DAC_CONTROL2, 0x00 },
114*4882a593Smuzhiyun { ADAU17X1_SERIAL_PORT_PAD, 0xaa },
115*4882a593Smuzhiyun { ADAU17X1_CONTROL_PORT_PAD0, 0xaa },
116*4882a593Smuzhiyun { ADAU17X1_CONTROL_PORT_PAD1, 0x00 },
117*4882a593Smuzhiyun { ADAU17X1_DSP_SAMPLING_RATE, 0x01 },
118*4882a593Smuzhiyun { ADAU17X1_SERIAL_INPUT_ROUTE, 0x00 },
119*4882a593Smuzhiyun { ADAU17X1_SERIAL_OUTPUT_ROUTE, 0x00 },
120*4882a593Smuzhiyun { ADAU17X1_DSP_ENABLE, 0x00 },
121*4882a593Smuzhiyun { ADAU17X1_DSP_RUN, 0x00 },
122*4882a593Smuzhiyun { ADAU17X1_SERIAL_SAMPLING_RATE, 0x00 },
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adau1761_sing_in_tlv, -1500, 300, 1);
126*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adau1761_diff_in_tlv, -1200, 75, 0);
127*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adau1761_out_tlv, -5700, 100, 0);
128*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adau1761_sidetone_tlv, -1800, 300, 1);
129*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adau1761_boost_tlv, -600, 600, 1);
130*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adau1761_pga_boost_tlv, -2000, 2000, 1);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adau1761_alc_max_gain_tlv, -1200, 600, 0);
133*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adau1761_alc_target_tlv, -2850, 150, 0);
134*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adau1761_alc_ng_threshold_tlv, -7650, 150, 0);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun static const unsigned int adau1761_bias_select_values[] = {
137*4882a593Smuzhiyun 0, 2, 3,
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun static const char * const adau1761_bias_select_text[] = {
141*4882a593Smuzhiyun "Normal operation", "Enhanced performance", "Power saving",
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun static const char * const adau1761_bias_select_extreme_text[] = {
145*4882a593Smuzhiyun "Normal operation", "Extreme power saving", "Enhanced performance",
146*4882a593Smuzhiyun "Power saving",
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(adau1761_adc_bias_enum,
150*4882a593Smuzhiyun ADAU17X1_REC_POWER_MGMT, 3, adau1761_bias_select_extreme_text);
151*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(adau1761_hp_bias_enum,
152*4882a593Smuzhiyun ADAU17X1_PLAY_POWER_MGMT, 6, adau1761_bias_select_extreme_text);
153*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(adau1761_dac_bias_enum,
154*4882a593Smuzhiyun ADAU17X1_PLAY_POWER_MGMT, 4, adau1761_bias_select_extreme_text);
155*4882a593Smuzhiyun static SOC_VALUE_ENUM_SINGLE_DECL(adau1761_playback_bias_enum,
156*4882a593Smuzhiyun ADAU17X1_PLAY_POWER_MGMT, 2, 0x3, adau1761_bias_select_text,
157*4882a593Smuzhiyun adau1761_bias_select_values);
158*4882a593Smuzhiyun static SOC_VALUE_ENUM_SINGLE_DECL(adau1761_capture_bias_enum,
159*4882a593Smuzhiyun ADAU17X1_REC_POWER_MGMT, 1, 0x3, adau1761_bias_select_text,
160*4882a593Smuzhiyun adau1761_bias_select_values);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun static const unsigned int adau1761_pga_slew_time_values[] = {
163*4882a593Smuzhiyun 3, 0, 1, 2,
164*4882a593Smuzhiyun };
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun static const char * const adau1761_pga_slew_time_text[] = {
167*4882a593Smuzhiyun "Off",
168*4882a593Smuzhiyun "24 ms",
169*4882a593Smuzhiyun "48 ms",
170*4882a593Smuzhiyun "96 ms",
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun static const char * const adau1761_alc_function_text[] = {
174*4882a593Smuzhiyun "Off",
175*4882a593Smuzhiyun "Right",
176*4882a593Smuzhiyun "Left",
177*4882a593Smuzhiyun "Stereo",
178*4882a593Smuzhiyun "DSP control",
179*4882a593Smuzhiyun };
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun static const char * const adau1761_alc_hold_time_text[] = {
182*4882a593Smuzhiyun "2.67 ms",
183*4882a593Smuzhiyun "5.34 ms",
184*4882a593Smuzhiyun "10.68 ms",
185*4882a593Smuzhiyun "21.36 ms",
186*4882a593Smuzhiyun "42.72 ms",
187*4882a593Smuzhiyun "85.44 ms",
188*4882a593Smuzhiyun "170.88 ms",
189*4882a593Smuzhiyun "341.76 ms",
190*4882a593Smuzhiyun "683.52 ms",
191*4882a593Smuzhiyun "1367 ms",
192*4882a593Smuzhiyun "2734.1 ms",
193*4882a593Smuzhiyun "5468.2 ms",
194*4882a593Smuzhiyun "10936 ms",
195*4882a593Smuzhiyun "21873 ms",
196*4882a593Smuzhiyun "43745 ms",
197*4882a593Smuzhiyun "87491 ms",
198*4882a593Smuzhiyun };
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun static const char * const adau1761_alc_attack_time_text[] = {
201*4882a593Smuzhiyun "6 ms",
202*4882a593Smuzhiyun "12 ms",
203*4882a593Smuzhiyun "24 ms",
204*4882a593Smuzhiyun "48 ms",
205*4882a593Smuzhiyun "96 ms",
206*4882a593Smuzhiyun "192 ms",
207*4882a593Smuzhiyun "384 ms",
208*4882a593Smuzhiyun "768 ms",
209*4882a593Smuzhiyun "1540 ms",
210*4882a593Smuzhiyun "3070 ms",
211*4882a593Smuzhiyun "6140 ms",
212*4882a593Smuzhiyun "12290 ms",
213*4882a593Smuzhiyun "24580 ms",
214*4882a593Smuzhiyun "49150 ms",
215*4882a593Smuzhiyun "98300 ms",
216*4882a593Smuzhiyun "196610 ms",
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun static const char * const adau1761_alc_decay_time_text[] = {
220*4882a593Smuzhiyun "24 ms",
221*4882a593Smuzhiyun "48 ms",
222*4882a593Smuzhiyun "96 ms",
223*4882a593Smuzhiyun "192 ms",
224*4882a593Smuzhiyun "384 ms",
225*4882a593Smuzhiyun "768 ms",
226*4882a593Smuzhiyun "15400 ms",
227*4882a593Smuzhiyun "30700 ms",
228*4882a593Smuzhiyun "61400 ms",
229*4882a593Smuzhiyun "12290 ms",
230*4882a593Smuzhiyun "24580 ms",
231*4882a593Smuzhiyun "49150 ms",
232*4882a593Smuzhiyun "98300 ms",
233*4882a593Smuzhiyun "196610 ms",
234*4882a593Smuzhiyun "393220 ms",
235*4882a593Smuzhiyun "786430 ms",
236*4882a593Smuzhiyun };
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun static const char * const adau1761_alc_ng_type_text[] = {
239*4882a593Smuzhiyun "Hold",
240*4882a593Smuzhiyun "Mute",
241*4882a593Smuzhiyun "Fade",
242*4882a593Smuzhiyun "Fade + Mute",
243*4882a593Smuzhiyun };
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun static SOC_VALUE_ENUM_SINGLE_DECL(adau1761_pga_slew_time_enum,
246*4882a593Smuzhiyun ADAU1761_ALC_CTRL0, 6, 0x3, adau1761_pga_slew_time_text,
247*4882a593Smuzhiyun adau1761_pga_slew_time_values);
248*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(adau1761_alc_function_enum,
249*4882a593Smuzhiyun ADAU1761_ALC_CTRL0, 0, adau1761_alc_function_text);
250*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(adau1761_alc_hold_time_enum,
251*4882a593Smuzhiyun ADAU1761_ALC_CTRL1, 4, adau1761_alc_hold_time_text);
252*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(adau1761_alc_attack_time_enum,
253*4882a593Smuzhiyun ADAU1761_ALC_CTRL2, 4, adau1761_alc_attack_time_text);
254*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(adau1761_alc_decay_time_enum,
255*4882a593Smuzhiyun ADAU1761_ALC_CTRL2, 0, adau1761_alc_decay_time_text);
256*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(adau1761_alc_ng_type_enum,
257*4882a593Smuzhiyun ADAU1761_ALC_CTRL3, 6, adau1761_alc_ng_type_text);
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun static const struct snd_kcontrol_new adau1761_jack_detect_controls[] = {
260*4882a593Smuzhiyun SOC_SINGLE("Speaker Auto-mute Switch", ADAU1761_DIGMIC_JACKDETECT,
261*4882a593Smuzhiyun 4, 1, 0),
262*4882a593Smuzhiyun };
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun static const struct snd_kcontrol_new adau1761_differential_mode_controls[] = {
265*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Capture Volume", ADAU1761_LEFT_DIFF_INPUT_VOL,
266*4882a593Smuzhiyun ADAU1761_RIGHT_DIFF_INPUT_VOL, 2, 0x3f, 0,
267*4882a593Smuzhiyun adau1761_diff_in_tlv),
268*4882a593Smuzhiyun SOC_DOUBLE_R("Capture Switch", ADAU1761_LEFT_DIFF_INPUT_VOL,
269*4882a593Smuzhiyun ADAU1761_RIGHT_DIFF_INPUT_VOL, 1, 1, 0),
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("PGA Boost Capture Volume", ADAU1761_REC_MIXER_LEFT1,
272*4882a593Smuzhiyun ADAU1761_REC_MIXER_RIGHT1, 3, 2, 0, adau1761_pga_boost_tlv),
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun SOC_ENUM("PGA Capture Slew Time", adau1761_pga_slew_time_enum),
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun SOC_SINGLE_TLV("ALC Capture Max Gain Volume", ADAU1761_ALC_CTRL0,
277*4882a593Smuzhiyun 3, 7, 0, adau1761_alc_max_gain_tlv),
278*4882a593Smuzhiyun SOC_ENUM("ALC Capture Function", adau1761_alc_function_enum),
279*4882a593Smuzhiyun SOC_ENUM("ALC Capture Hold Time", adau1761_alc_hold_time_enum),
280*4882a593Smuzhiyun SOC_SINGLE_TLV("ALC Capture Target Volume", ADAU1761_ALC_CTRL1,
281*4882a593Smuzhiyun 0, 15, 0, adau1761_alc_target_tlv),
282*4882a593Smuzhiyun SOC_ENUM("ALC Capture Attack Time", adau1761_alc_decay_time_enum),
283*4882a593Smuzhiyun SOC_ENUM("ALC Capture Decay Time", adau1761_alc_attack_time_enum),
284*4882a593Smuzhiyun SOC_ENUM("ALC Capture Noise Gate Type", adau1761_alc_ng_type_enum),
285*4882a593Smuzhiyun SOC_SINGLE("ALC Capture Noise Gate Switch",
286*4882a593Smuzhiyun ADAU1761_ALC_CTRL3, 5, 1, 0),
287*4882a593Smuzhiyun SOC_SINGLE_TLV("ALC Capture Noise Gate Threshold Volume",
288*4882a593Smuzhiyun ADAU1761_ALC_CTRL3, 0, 31, 0, adau1761_alc_ng_threshold_tlv),
289*4882a593Smuzhiyun };
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun static const struct snd_kcontrol_new adau1761_single_mode_controls[] = {
292*4882a593Smuzhiyun SOC_SINGLE_TLV("Input 1 Capture Volume", ADAU1761_REC_MIXER_LEFT0,
293*4882a593Smuzhiyun 4, 7, 0, adau1761_sing_in_tlv),
294*4882a593Smuzhiyun SOC_SINGLE_TLV("Input 2 Capture Volume", ADAU1761_REC_MIXER_LEFT0,
295*4882a593Smuzhiyun 1, 7, 0, adau1761_sing_in_tlv),
296*4882a593Smuzhiyun SOC_SINGLE_TLV("Input 3 Capture Volume", ADAU1761_REC_MIXER_RIGHT0,
297*4882a593Smuzhiyun 4, 7, 0, adau1761_sing_in_tlv),
298*4882a593Smuzhiyun SOC_SINGLE_TLV("Input 4 Capture Volume", ADAU1761_REC_MIXER_RIGHT0,
299*4882a593Smuzhiyun 1, 7, 0, adau1761_sing_in_tlv),
300*4882a593Smuzhiyun };
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun static const struct snd_kcontrol_new adau1761_controls[] = {
303*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Aux Capture Volume", ADAU1761_REC_MIXER_LEFT1,
304*4882a593Smuzhiyun ADAU1761_REC_MIXER_RIGHT1, 0, 7, 0, adau1761_sing_in_tlv),
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Headphone Playback Volume", ADAU1761_PLAY_HP_LEFT_VOL,
307*4882a593Smuzhiyun ADAU1761_PLAY_HP_RIGHT_VOL, 2, 0x3f, 0, adau1761_out_tlv),
308*4882a593Smuzhiyun SOC_DOUBLE_R("Headphone Playback Switch", ADAU1761_PLAY_HP_LEFT_VOL,
309*4882a593Smuzhiyun ADAU1761_PLAY_HP_RIGHT_VOL, 1, 1, 0),
310*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Lineout Playback Volume", ADAU1761_PLAY_LINE_LEFT_VOL,
311*4882a593Smuzhiyun ADAU1761_PLAY_LINE_RIGHT_VOL, 2, 0x3f, 0, adau1761_out_tlv),
312*4882a593Smuzhiyun SOC_DOUBLE_R("Lineout Playback Switch", ADAU1761_PLAY_LINE_LEFT_VOL,
313*4882a593Smuzhiyun ADAU1761_PLAY_LINE_RIGHT_VOL, 1, 1, 0),
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun SOC_ENUM("ADC Bias", adau1761_adc_bias_enum),
316*4882a593Smuzhiyun SOC_ENUM("DAC Bias", adau1761_dac_bias_enum),
317*4882a593Smuzhiyun SOC_ENUM("Capture Bias", adau1761_capture_bias_enum),
318*4882a593Smuzhiyun SOC_ENUM("Playback Bias", adau1761_playback_bias_enum),
319*4882a593Smuzhiyun SOC_ENUM("Headphone Bias", adau1761_hp_bias_enum),
320*4882a593Smuzhiyun };
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun static const struct snd_kcontrol_new adau1761_mono_controls[] = {
323*4882a593Smuzhiyun SOC_SINGLE_TLV("Mono Playback Volume", ADAU1761_PLAY_MONO_OUTPUT_VOL,
324*4882a593Smuzhiyun 2, 0x3f, 0, adau1761_out_tlv),
325*4882a593Smuzhiyun SOC_SINGLE("Mono Playback Switch", ADAU1761_PLAY_MONO_OUTPUT_VOL,
326*4882a593Smuzhiyun 1, 1, 0),
327*4882a593Smuzhiyun };
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun static const struct snd_kcontrol_new adau1761_left_mixer_controls[] = {
330*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("Left DAC Switch",
331*4882a593Smuzhiyun ADAU1761_PLAY_MIXER_LEFT0, 5, 1, 0),
332*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("Right DAC Switch",
333*4882a593Smuzhiyun ADAU1761_PLAY_MIXER_LEFT0, 6, 1, 0),
334*4882a593Smuzhiyun SOC_DAPM_SINGLE_TLV("Aux Bypass Volume",
335*4882a593Smuzhiyun ADAU1761_PLAY_MIXER_LEFT0, 1, 8, 0, adau1761_sidetone_tlv),
336*4882a593Smuzhiyun SOC_DAPM_SINGLE_TLV("Right Bypass Volume",
337*4882a593Smuzhiyun ADAU1761_PLAY_MIXER_LEFT1, 4, 8, 0, adau1761_sidetone_tlv),
338*4882a593Smuzhiyun SOC_DAPM_SINGLE_TLV("Left Bypass Volume",
339*4882a593Smuzhiyun ADAU1761_PLAY_MIXER_LEFT1, 0, 8, 0, adau1761_sidetone_tlv),
340*4882a593Smuzhiyun };
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun static const struct snd_kcontrol_new adau1761_right_mixer_controls[] = {
343*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("Left DAC Switch",
344*4882a593Smuzhiyun ADAU1761_PLAY_MIXER_RIGHT0, 5, 1, 0),
345*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("Right DAC Switch",
346*4882a593Smuzhiyun ADAU1761_PLAY_MIXER_RIGHT0, 6, 1, 0),
347*4882a593Smuzhiyun SOC_DAPM_SINGLE_TLV("Aux Bypass Volume",
348*4882a593Smuzhiyun ADAU1761_PLAY_MIXER_RIGHT0, 1, 8, 0, adau1761_sidetone_tlv),
349*4882a593Smuzhiyun SOC_DAPM_SINGLE_TLV("Right Bypass Volume",
350*4882a593Smuzhiyun ADAU1761_PLAY_MIXER_RIGHT1, 4, 8, 0, adau1761_sidetone_tlv),
351*4882a593Smuzhiyun SOC_DAPM_SINGLE_TLV("Left Bypass Volume",
352*4882a593Smuzhiyun ADAU1761_PLAY_MIXER_RIGHT1, 0, 8, 0, adau1761_sidetone_tlv),
353*4882a593Smuzhiyun };
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun static const struct snd_kcontrol_new adau1761_left_lr_mixer_controls[] = {
356*4882a593Smuzhiyun SOC_DAPM_SINGLE_TLV("Left Volume",
357*4882a593Smuzhiyun ADAU1761_PLAY_LR_MIXER_LEFT, 1, 2, 0, adau1761_boost_tlv),
358*4882a593Smuzhiyun SOC_DAPM_SINGLE_TLV("Right Volume",
359*4882a593Smuzhiyun ADAU1761_PLAY_LR_MIXER_LEFT, 3, 2, 0, adau1761_boost_tlv),
360*4882a593Smuzhiyun };
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun static const struct snd_kcontrol_new adau1761_right_lr_mixer_controls[] = {
363*4882a593Smuzhiyun SOC_DAPM_SINGLE_TLV("Left Volume",
364*4882a593Smuzhiyun ADAU1761_PLAY_LR_MIXER_RIGHT, 1, 2, 0, adau1761_boost_tlv),
365*4882a593Smuzhiyun SOC_DAPM_SINGLE_TLV("Right Volume",
366*4882a593Smuzhiyun ADAU1761_PLAY_LR_MIXER_RIGHT, 3, 2, 0, adau1761_boost_tlv),
367*4882a593Smuzhiyun };
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun static const char * const adau1761_input_mux_text[] = {
370*4882a593Smuzhiyun "ADC", "DMIC",
371*4882a593Smuzhiyun };
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(adau1761_input_mux_enum,
374*4882a593Smuzhiyun ADAU17X1_ADC_CONTROL, 2, adau1761_input_mux_text);
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun static const struct snd_kcontrol_new adau1761_input_mux_control =
377*4882a593Smuzhiyun SOC_DAPM_ENUM("Input Select", adau1761_input_mux_enum);
378*4882a593Smuzhiyun
adau1761_dejitter_fixup(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)379*4882a593Smuzhiyun static int adau1761_dejitter_fixup(struct snd_soc_dapm_widget *w,
380*4882a593Smuzhiyun struct snd_kcontrol *kcontrol, int event)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
383*4882a593Smuzhiyun struct adau *adau = snd_soc_component_get_drvdata(component);
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun /* After any power changes have been made the dejitter circuit
386*4882a593Smuzhiyun * has to be reinitialized. */
387*4882a593Smuzhiyun regmap_write(adau->regmap, ADAU1761_DEJITTER, 0);
388*4882a593Smuzhiyun if (!adau->master)
389*4882a593Smuzhiyun regmap_write(adau->regmap, ADAU1761_DEJITTER, 3);
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun return 0;
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun static const struct snd_soc_dapm_widget adau1x61_dapm_widgets[] = {
395*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Left Input Mixer", ADAU1761_REC_MIXER_LEFT0, 0, 0,
396*4882a593Smuzhiyun NULL, 0),
397*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Right Input Mixer", ADAU1761_REC_MIXER_RIGHT0, 0, 0,
398*4882a593Smuzhiyun NULL, 0),
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun SOC_MIXER_ARRAY("Left Playback Mixer", ADAU1761_PLAY_MIXER_LEFT0,
401*4882a593Smuzhiyun 0, 0, adau1761_left_mixer_controls),
402*4882a593Smuzhiyun SOC_MIXER_ARRAY("Right Playback Mixer", ADAU1761_PLAY_MIXER_RIGHT0,
403*4882a593Smuzhiyun 0, 0, adau1761_right_mixer_controls),
404*4882a593Smuzhiyun SOC_MIXER_ARRAY("Left LR Playback Mixer", ADAU1761_PLAY_LR_MIXER_LEFT,
405*4882a593Smuzhiyun 0, 0, adau1761_left_lr_mixer_controls),
406*4882a593Smuzhiyun SOC_MIXER_ARRAY("Right LR Playback Mixer", ADAU1761_PLAY_LR_MIXER_RIGHT,
407*4882a593Smuzhiyun 0, 0, adau1761_right_lr_mixer_controls),
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Headphone", ADAU1761_PLAY_HP_LEFT_VOL,
410*4882a593Smuzhiyun 0, 0, NULL, 0),
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY_S("SYSCLK", 2, SND_SOC_NOPM, 0, 0, NULL, 0),
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun SND_SOC_DAPM_POST("Dejitter fixup", adau1761_dejitter_fixup),
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LAUX"),
417*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("RAUX"),
418*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LINP"),
419*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LINN"),
420*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("RINP"),
421*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("RINN"),
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LOUT"),
424*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("ROUT"),
425*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LHP"),
426*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("RHP"),
427*4882a593Smuzhiyun };
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun static const struct snd_soc_dapm_widget adau1761_mono_dapm_widgets[] = {
430*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Mono Playback Mixer", ADAU1761_PLAY_MIXER_MONO,
431*4882a593Smuzhiyun 0, 0, NULL, 0),
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("MONOOUT"),
434*4882a593Smuzhiyun };
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun static const struct snd_soc_dapm_widget adau1761_capless_dapm_widgets[] = {
437*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY_S("Headphone VGND", 1, ADAU1761_PLAY_MIXER_MONO,
438*4882a593Smuzhiyun 0, 0, NULL, 0),
439*4882a593Smuzhiyun };
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun static const struct snd_soc_dapm_route adau1x61_dapm_routes[] = {
442*4882a593Smuzhiyun { "Left Input Mixer", NULL, "LINP" },
443*4882a593Smuzhiyun { "Left Input Mixer", NULL, "LINN" },
444*4882a593Smuzhiyun { "Left Input Mixer", NULL, "LAUX" },
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun { "Right Input Mixer", NULL, "RINP" },
447*4882a593Smuzhiyun { "Right Input Mixer", NULL, "RINN" },
448*4882a593Smuzhiyun { "Right Input Mixer", NULL, "RAUX" },
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun { "Left Playback Mixer", NULL, "Left Playback Enable"},
451*4882a593Smuzhiyun { "Right Playback Mixer", NULL, "Right Playback Enable"},
452*4882a593Smuzhiyun { "Left LR Playback Mixer", NULL, "Left Playback Enable"},
453*4882a593Smuzhiyun { "Right LR Playback Mixer", NULL, "Right Playback Enable"},
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun { "Left Playback Mixer", "Left DAC Switch", "Left DAC" },
456*4882a593Smuzhiyun { "Left Playback Mixer", "Right DAC Switch", "Right DAC" },
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun { "Right Playback Mixer", "Left DAC Switch", "Left DAC" },
459*4882a593Smuzhiyun { "Right Playback Mixer", "Right DAC Switch", "Right DAC" },
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun { "Left LR Playback Mixer", "Left Volume", "Left Playback Mixer" },
462*4882a593Smuzhiyun { "Left LR Playback Mixer", "Right Volume", "Right Playback Mixer" },
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun { "Right LR Playback Mixer", "Left Volume", "Left Playback Mixer" },
465*4882a593Smuzhiyun { "Right LR Playback Mixer", "Right Volume", "Right Playback Mixer" },
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun { "LHP", NULL, "Left Playback Mixer" },
468*4882a593Smuzhiyun { "RHP", NULL, "Right Playback Mixer" },
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun { "LHP", NULL, "Headphone" },
471*4882a593Smuzhiyun { "RHP", NULL, "Headphone" },
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun { "LOUT", NULL, "Left LR Playback Mixer" },
474*4882a593Smuzhiyun { "ROUT", NULL, "Right LR Playback Mixer" },
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun { "Left Playback Mixer", "Aux Bypass Volume", "LAUX" },
477*4882a593Smuzhiyun { "Left Playback Mixer", "Left Bypass Volume", "Left Input Mixer" },
478*4882a593Smuzhiyun { "Left Playback Mixer", "Right Bypass Volume", "Right Input Mixer" },
479*4882a593Smuzhiyun { "Right Playback Mixer", "Aux Bypass Volume", "RAUX" },
480*4882a593Smuzhiyun { "Right Playback Mixer", "Left Bypass Volume", "Left Input Mixer" },
481*4882a593Smuzhiyun { "Right Playback Mixer", "Right Bypass Volume", "Right Input Mixer" },
482*4882a593Smuzhiyun };
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun static const struct snd_soc_dapm_route adau1761_mono_dapm_routes[] = {
485*4882a593Smuzhiyun { "Mono Playback Mixer", NULL, "Left Playback Mixer" },
486*4882a593Smuzhiyun { "Mono Playback Mixer", NULL, "Right Playback Mixer" },
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun { "MONOOUT", NULL, "Mono Playback Mixer" },
489*4882a593Smuzhiyun };
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun static const struct snd_soc_dapm_route adau1761_capless_dapm_routes[] = {
492*4882a593Smuzhiyun { "Headphone", NULL, "Headphone VGND" },
493*4882a593Smuzhiyun };
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun static const struct snd_soc_dapm_widget adau1761_dmic_widgets[] = {
496*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Left Decimator Mux", SND_SOC_NOPM, 0, 0,
497*4882a593Smuzhiyun &adau1761_input_mux_control),
498*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Right Decimator Mux", SND_SOC_NOPM, 0, 0,
499*4882a593Smuzhiyun &adau1761_input_mux_control),
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("DMIC"),
502*4882a593Smuzhiyun };
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun static const struct snd_soc_dapm_route adau1761_dmic_routes[] = {
505*4882a593Smuzhiyun { "Left Decimator Mux", "ADC", "Left Input Mixer" },
506*4882a593Smuzhiyun { "Left Decimator Mux", "DMIC", "DMIC" },
507*4882a593Smuzhiyun { "Right Decimator Mux", "ADC", "Right Input Mixer" },
508*4882a593Smuzhiyun { "Right Decimator Mux", "DMIC", "DMIC" },
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun { "Left Decimator", NULL, "Left Decimator Mux" },
511*4882a593Smuzhiyun { "Right Decimator", NULL, "Right Decimator Mux" },
512*4882a593Smuzhiyun };
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun static const struct snd_soc_dapm_route adau1761_no_dmic_routes[] = {
515*4882a593Smuzhiyun { "Left Decimator", NULL, "Left Input Mixer" },
516*4882a593Smuzhiyun { "Right Decimator", NULL, "Right Input Mixer" },
517*4882a593Smuzhiyun };
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun static const struct snd_soc_dapm_widget adau1761_dapm_widgets[] = {
520*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Serial Port Clock", ADAU1761_CLK_ENABLE0,
521*4882a593Smuzhiyun 0, 0, NULL, 0),
522*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Serial Input Routing Clock", ADAU1761_CLK_ENABLE0,
523*4882a593Smuzhiyun 1, 0, NULL, 0),
524*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Serial Output Routing Clock", ADAU1761_CLK_ENABLE0,
525*4882a593Smuzhiyun 3, 0, NULL, 0),
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Decimator Resync Clock", ADAU1761_CLK_ENABLE0,
528*4882a593Smuzhiyun 4, 0, NULL, 0),
529*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Interpolator Resync Clock", ADAU1761_CLK_ENABLE0,
530*4882a593Smuzhiyun 2, 0, NULL, 0),
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Slew Clock", ADAU1761_CLK_ENABLE0, 6, 0, NULL, 0),
533*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("ALC Clock", ADAU1761_CLK_ENABLE0, 5, 0, NULL, 0),
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY_S("Digital Clock 0", 1, ADAU1761_CLK_ENABLE1,
536*4882a593Smuzhiyun 0, 0, NULL, 0),
537*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY_S("Digital Clock 1", 1, ADAU1761_CLK_ENABLE1,
538*4882a593Smuzhiyun 1, 0, NULL, 0),
539*4882a593Smuzhiyun };
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun static const struct snd_soc_dapm_route adau1761_dapm_routes[] = {
542*4882a593Smuzhiyun { "Left Decimator", NULL, "Digital Clock 0", },
543*4882a593Smuzhiyun { "Right Decimator", NULL, "Digital Clock 0", },
544*4882a593Smuzhiyun { "Left DAC", NULL, "Digital Clock 0", },
545*4882a593Smuzhiyun { "Right DAC", NULL, "Digital Clock 0", },
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun { "AIFCLK", NULL, "Digital Clock 1" },
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun { "Playback", NULL, "Serial Port Clock" },
550*4882a593Smuzhiyun { "Capture", NULL, "Serial Port Clock" },
551*4882a593Smuzhiyun { "Playback", NULL, "Serial Input Routing Clock" },
552*4882a593Smuzhiyun { "Capture", NULL, "Serial Output Routing Clock" },
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun { "Left Decimator", NULL, "Decimator Resync Clock" },
555*4882a593Smuzhiyun { "Right Decimator", NULL, "Decimator Resync Clock" },
556*4882a593Smuzhiyun { "Left DAC", NULL, "Interpolator Resync Clock" },
557*4882a593Smuzhiyun { "Right DAC", NULL, "Interpolator Resync Clock" },
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun { "DSP", NULL, "Digital Clock 0" },
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun { "Slew Clock", NULL, "Digital Clock 0" },
562*4882a593Smuzhiyun { "Right Playback Mixer", NULL, "Slew Clock" },
563*4882a593Smuzhiyun { "Left Playback Mixer", NULL, "Slew Clock" },
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun { "Left Input Mixer", NULL, "ALC Clock" },
566*4882a593Smuzhiyun { "Right Input Mixer", NULL, "ALC Clock" },
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun { "Digital Clock 0", NULL, "SYSCLK" },
569*4882a593Smuzhiyun { "Digital Clock 1", NULL, "SYSCLK" },
570*4882a593Smuzhiyun };
571*4882a593Smuzhiyun
adau1761_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)572*4882a593Smuzhiyun static int adau1761_set_bias_level(struct snd_soc_component *component,
573*4882a593Smuzhiyun enum snd_soc_bias_level level)
574*4882a593Smuzhiyun {
575*4882a593Smuzhiyun struct adau *adau = snd_soc_component_get_drvdata(component);
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun switch (level) {
578*4882a593Smuzhiyun case SND_SOC_BIAS_ON:
579*4882a593Smuzhiyun break;
580*4882a593Smuzhiyun case SND_SOC_BIAS_PREPARE:
581*4882a593Smuzhiyun break;
582*4882a593Smuzhiyun case SND_SOC_BIAS_STANDBY:
583*4882a593Smuzhiyun regcache_cache_only(adau->regmap, false);
584*4882a593Smuzhiyun regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
585*4882a593Smuzhiyun ADAU17X1_CLOCK_CONTROL_SYSCLK_EN,
586*4882a593Smuzhiyun ADAU17X1_CLOCK_CONTROL_SYSCLK_EN);
587*4882a593Smuzhiyun if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
588*4882a593Smuzhiyun regcache_sync(adau->regmap);
589*4882a593Smuzhiyun break;
590*4882a593Smuzhiyun case SND_SOC_BIAS_OFF:
591*4882a593Smuzhiyun regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
592*4882a593Smuzhiyun ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, 0);
593*4882a593Smuzhiyun regcache_cache_only(adau->regmap, true);
594*4882a593Smuzhiyun break;
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun return 0;
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun
adau1761_get_lineout_mode(struct snd_soc_component * component)600*4882a593Smuzhiyun static enum adau1761_output_mode adau1761_get_lineout_mode(
601*4882a593Smuzhiyun struct snd_soc_component *component)
602*4882a593Smuzhiyun {
603*4882a593Smuzhiyun struct adau1761_platform_data *pdata = component->dev->platform_data;
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun if (pdata)
606*4882a593Smuzhiyun return pdata->lineout_mode;
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun return ADAU1761_OUTPUT_MODE_LINE;
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun
adau1761_setup_digmic_jackdetect(struct snd_soc_component * component)611*4882a593Smuzhiyun static int adau1761_setup_digmic_jackdetect(struct snd_soc_component *component)
612*4882a593Smuzhiyun {
613*4882a593Smuzhiyun struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
614*4882a593Smuzhiyun struct adau1761_platform_data *pdata = component->dev->platform_data;
615*4882a593Smuzhiyun struct adau *adau = snd_soc_component_get_drvdata(component);
616*4882a593Smuzhiyun enum adau1761_digmic_jackdet_pin_mode mode;
617*4882a593Smuzhiyun unsigned int val = 0;
618*4882a593Smuzhiyun int ret;
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun if (pdata)
621*4882a593Smuzhiyun mode = pdata->digmic_jackdetect_pin_mode;
622*4882a593Smuzhiyun else
623*4882a593Smuzhiyun mode = ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE;
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun switch (mode) {
626*4882a593Smuzhiyun case ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT:
627*4882a593Smuzhiyun switch (pdata->jackdetect_debounce_time) {
628*4882a593Smuzhiyun case ADAU1761_JACKDETECT_DEBOUNCE_5MS:
629*4882a593Smuzhiyun case ADAU1761_JACKDETECT_DEBOUNCE_10MS:
630*4882a593Smuzhiyun case ADAU1761_JACKDETECT_DEBOUNCE_20MS:
631*4882a593Smuzhiyun case ADAU1761_JACKDETECT_DEBOUNCE_40MS:
632*4882a593Smuzhiyun val |= pdata->jackdetect_debounce_time << 6;
633*4882a593Smuzhiyun break;
634*4882a593Smuzhiyun default:
635*4882a593Smuzhiyun return -EINVAL;
636*4882a593Smuzhiyun }
637*4882a593Smuzhiyun if (pdata->jackdetect_active_low)
638*4882a593Smuzhiyun val |= ADAU1761_DIGMIC_JACKDETECT_ACTIVE_LOW;
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun ret = snd_soc_add_component_controls(component,
641*4882a593Smuzhiyun adau1761_jack_detect_controls,
642*4882a593Smuzhiyun ARRAY_SIZE(adau1761_jack_detect_controls));
643*4882a593Smuzhiyun if (ret)
644*4882a593Smuzhiyun return ret;
645*4882a593Smuzhiyun fallthrough;
646*4882a593Smuzhiyun case ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE:
647*4882a593Smuzhiyun ret = snd_soc_dapm_add_routes(dapm, adau1761_no_dmic_routes,
648*4882a593Smuzhiyun ARRAY_SIZE(adau1761_no_dmic_routes));
649*4882a593Smuzhiyun if (ret)
650*4882a593Smuzhiyun return ret;
651*4882a593Smuzhiyun break;
652*4882a593Smuzhiyun case ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC:
653*4882a593Smuzhiyun ret = snd_soc_dapm_new_controls(dapm, adau1761_dmic_widgets,
654*4882a593Smuzhiyun ARRAY_SIZE(adau1761_dmic_widgets));
655*4882a593Smuzhiyun if (ret)
656*4882a593Smuzhiyun return ret;
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun ret = snd_soc_dapm_add_routes(dapm, adau1761_dmic_routes,
659*4882a593Smuzhiyun ARRAY_SIZE(adau1761_dmic_routes));
660*4882a593Smuzhiyun if (ret)
661*4882a593Smuzhiyun return ret;
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun val |= ADAU1761_DIGMIC_JACKDETECT_DIGMIC;
664*4882a593Smuzhiyun break;
665*4882a593Smuzhiyun default:
666*4882a593Smuzhiyun return -EINVAL;
667*4882a593Smuzhiyun }
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun regmap_write(adau->regmap, ADAU1761_DIGMIC_JACKDETECT, val);
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun return 0;
672*4882a593Smuzhiyun }
673*4882a593Smuzhiyun
adau1761_setup_headphone_mode(struct snd_soc_component * component)674*4882a593Smuzhiyun static int adau1761_setup_headphone_mode(struct snd_soc_component *component)
675*4882a593Smuzhiyun {
676*4882a593Smuzhiyun struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
677*4882a593Smuzhiyun struct adau *adau = snd_soc_component_get_drvdata(component);
678*4882a593Smuzhiyun struct adau1761_platform_data *pdata = component->dev->platform_data;
679*4882a593Smuzhiyun enum adau1761_output_mode mode;
680*4882a593Smuzhiyun int ret;
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun if (pdata)
683*4882a593Smuzhiyun mode = pdata->headphone_mode;
684*4882a593Smuzhiyun else
685*4882a593Smuzhiyun mode = ADAU1761_OUTPUT_MODE_HEADPHONE;
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun switch (mode) {
688*4882a593Smuzhiyun case ADAU1761_OUTPUT_MODE_LINE:
689*4882a593Smuzhiyun break;
690*4882a593Smuzhiyun case ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS:
691*4882a593Smuzhiyun regmap_update_bits(adau->regmap, ADAU1761_PLAY_MONO_OUTPUT_VOL,
692*4882a593Smuzhiyun ADAU1761_PLAY_MONO_OUTPUT_VOL_MODE_HP |
693*4882a593Smuzhiyun ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE,
694*4882a593Smuzhiyun ADAU1761_PLAY_MONO_OUTPUT_VOL_MODE_HP |
695*4882a593Smuzhiyun ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE);
696*4882a593Smuzhiyun fallthrough;
697*4882a593Smuzhiyun case ADAU1761_OUTPUT_MODE_HEADPHONE:
698*4882a593Smuzhiyun regmap_update_bits(adau->regmap, ADAU1761_PLAY_HP_RIGHT_VOL,
699*4882a593Smuzhiyun ADAU1761_PLAY_HP_RIGHT_VOL_MODE_HP,
700*4882a593Smuzhiyun ADAU1761_PLAY_HP_RIGHT_VOL_MODE_HP);
701*4882a593Smuzhiyun break;
702*4882a593Smuzhiyun default:
703*4882a593Smuzhiyun return -EINVAL;
704*4882a593Smuzhiyun }
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun if (mode == ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS) {
707*4882a593Smuzhiyun ret = snd_soc_dapm_new_controls(dapm,
708*4882a593Smuzhiyun adau1761_capless_dapm_widgets,
709*4882a593Smuzhiyun ARRAY_SIZE(adau1761_capless_dapm_widgets));
710*4882a593Smuzhiyun if (ret)
711*4882a593Smuzhiyun return ret;
712*4882a593Smuzhiyun ret = snd_soc_dapm_add_routes(dapm,
713*4882a593Smuzhiyun adau1761_capless_dapm_routes,
714*4882a593Smuzhiyun ARRAY_SIZE(adau1761_capless_dapm_routes));
715*4882a593Smuzhiyun } else {
716*4882a593Smuzhiyun ret = snd_soc_add_component_controls(component, adau1761_mono_controls,
717*4882a593Smuzhiyun ARRAY_SIZE(adau1761_mono_controls));
718*4882a593Smuzhiyun if (ret)
719*4882a593Smuzhiyun return ret;
720*4882a593Smuzhiyun ret = snd_soc_dapm_new_controls(dapm,
721*4882a593Smuzhiyun adau1761_mono_dapm_widgets,
722*4882a593Smuzhiyun ARRAY_SIZE(adau1761_mono_dapm_widgets));
723*4882a593Smuzhiyun if (ret)
724*4882a593Smuzhiyun return ret;
725*4882a593Smuzhiyun ret = snd_soc_dapm_add_routes(dapm,
726*4882a593Smuzhiyun adau1761_mono_dapm_routes,
727*4882a593Smuzhiyun ARRAY_SIZE(adau1761_mono_dapm_routes));
728*4882a593Smuzhiyun }
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun return ret;
731*4882a593Smuzhiyun }
732*4882a593Smuzhiyun
adau1761_readable_register(struct device * dev,unsigned int reg)733*4882a593Smuzhiyun static bool adau1761_readable_register(struct device *dev, unsigned int reg)
734*4882a593Smuzhiyun {
735*4882a593Smuzhiyun switch (reg) {
736*4882a593Smuzhiyun case ADAU1761_DIGMIC_JACKDETECT:
737*4882a593Smuzhiyun case ADAU1761_REC_MIXER_LEFT0:
738*4882a593Smuzhiyun case ADAU1761_REC_MIXER_LEFT1:
739*4882a593Smuzhiyun case ADAU1761_REC_MIXER_RIGHT0:
740*4882a593Smuzhiyun case ADAU1761_REC_MIXER_RIGHT1:
741*4882a593Smuzhiyun case ADAU1761_LEFT_DIFF_INPUT_VOL:
742*4882a593Smuzhiyun case ADAU1761_RIGHT_DIFF_INPUT_VOL:
743*4882a593Smuzhiyun case ADAU1761_PLAY_LR_MIXER_LEFT:
744*4882a593Smuzhiyun case ADAU1761_PLAY_MIXER_LEFT0:
745*4882a593Smuzhiyun case ADAU1761_PLAY_MIXER_LEFT1:
746*4882a593Smuzhiyun case ADAU1761_PLAY_MIXER_RIGHT0:
747*4882a593Smuzhiyun case ADAU1761_PLAY_MIXER_RIGHT1:
748*4882a593Smuzhiyun case ADAU1761_PLAY_LR_MIXER_RIGHT:
749*4882a593Smuzhiyun case ADAU1761_PLAY_MIXER_MONO:
750*4882a593Smuzhiyun case ADAU1761_PLAY_HP_LEFT_VOL:
751*4882a593Smuzhiyun case ADAU1761_PLAY_HP_RIGHT_VOL:
752*4882a593Smuzhiyun case ADAU1761_PLAY_LINE_LEFT_VOL:
753*4882a593Smuzhiyun case ADAU1761_PLAY_LINE_RIGHT_VOL:
754*4882a593Smuzhiyun case ADAU1761_PLAY_MONO_OUTPUT_VOL:
755*4882a593Smuzhiyun case ADAU1761_POP_CLICK_SUPPRESS:
756*4882a593Smuzhiyun case ADAU1761_JACK_DETECT_PIN:
757*4882a593Smuzhiyun case ADAU1761_DEJITTER:
758*4882a593Smuzhiyun case ADAU1761_CLK_ENABLE0:
759*4882a593Smuzhiyun case ADAU1761_CLK_ENABLE1:
760*4882a593Smuzhiyun case ADAU1761_ALC_CTRL0:
761*4882a593Smuzhiyun case ADAU1761_ALC_CTRL1:
762*4882a593Smuzhiyun case ADAU1761_ALC_CTRL2:
763*4882a593Smuzhiyun case ADAU1761_ALC_CTRL3:
764*4882a593Smuzhiyun return true;
765*4882a593Smuzhiyun default:
766*4882a593Smuzhiyun break;
767*4882a593Smuzhiyun }
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun return adau17x1_readable_register(dev, reg);
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun
adau1761_component_probe(struct snd_soc_component * component)772*4882a593Smuzhiyun static int adau1761_component_probe(struct snd_soc_component *component)
773*4882a593Smuzhiyun {
774*4882a593Smuzhiyun struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
775*4882a593Smuzhiyun struct adau1761_platform_data *pdata = component->dev->platform_data;
776*4882a593Smuzhiyun struct adau *adau = snd_soc_component_get_drvdata(component);
777*4882a593Smuzhiyun int ret;
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun ret = adau17x1_add_widgets(component);
780*4882a593Smuzhiyun if (ret < 0)
781*4882a593Smuzhiyun return ret;
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun if (pdata && pdata->input_differential) {
784*4882a593Smuzhiyun regmap_update_bits(adau->regmap, ADAU1761_LEFT_DIFF_INPUT_VOL,
785*4882a593Smuzhiyun ADAU1761_DIFF_INPUT_VOL_LDEN,
786*4882a593Smuzhiyun ADAU1761_DIFF_INPUT_VOL_LDEN);
787*4882a593Smuzhiyun regmap_update_bits(adau->regmap, ADAU1761_RIGHT_DIFF_INPUT_VOL,
788*4882a593Smuzhiyun ADAU1761_DIFF_INPUT_VOL_LDEN,
789*4882a593Smuzhiyun ADAU1761_DIFF_INPUT_VOL_LDEN);
790*4882a593Smuzhiyun ret = snd_soc_add_component_controls(component,
791*4882a593Smuzhiyun adau1761_differential_mode_controls,
792*4882a593Smuzhiyun ARRAY_SIZE(adau1761_differential_mode_controls));
793*4882a593Smuzhiyun if (ret)
794*4882a593Smuzhiyun return ret;
795*4882a593Smuzhiyun } else {
796*4882a593Smuzhiyun ret = snd_soc_add_component_controls(component,
797*4882a593Smuzhiyun adau1761_single_mode_controls,
798*4882a593Smuzhiyun ARRAY_SIZE(adau1761_single_mode_controls));
799*4882a593Smuzhiyun if (ret)
800*4882a593Smuzhiyun return ret;
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun switch (adau1761_get_lineout_mode(component)) {
804*4882a593Smuzhiyun case ADAU1761_OUTPUT_MODE_LINE:
805*4882a593Smuzhiyun break;
806*4882a593Smuzhiyun case ADAU1761_OUTPUT_MODE_HEADPHONE:
807*4882a593Smuzhiyun regmap_update_bits(adau->regmap, ADAU1761_PLAY_LINE_LEFT_VOL,
808*4882a593Smuzhiyun ADAU1761_PLAY_LINE_LEFT_VOL_MODE_HP,
809*4882a593Smuzhiyun ADAU1761_PLAY_LINE_LEFT_VOL_MODE_HP);
810*4882a593Smuzhiyun regmap_update_bits(adau->regmap, ADAU1761_PLAY_LINE_RIGHT_VOL,
811*4882a593Smuzhiyun ADAU1761_PLAY_LINE_RIGHT_VOL_MODE_HP,
812*4882a593Smuzhiyun ADAU1761_PLAY_LINE_RIGHT_VOL_MODE_HP);
813*4882a593Smuzhiyun break;
814*4882a593Smuzhiyun default:
815*4882a593Smuzhiyun return -EINVAL;
816*4882a593Smuzhiyun }
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun ret = adau1761_setup_headphone_mode(component);
819*4882a593Smuzhiyun if (ret)
820*4882a593Smuzhiyun return ret;
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun ret = adau1761_setup_digmic_jackdetect(component);
823*4882a593Smuzhiyun if (ret)
824*4882a593Smuzhiyun return ret;
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun if (adau->type == ADAU1761) {
827*4882a593Smuzhiyun ret = snd_soc_dapm_new_controls(dapm, adau1761_dapm_widgets,
828*4882a593Smuzhiyun ARRAY_SIZE(adau1761_dapm_widgets));
829*4882a593Smuzhiyun if (ret)
830*4882a593Smuzhiyun return ret;
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun ret = snd_soc_dapm_add_routes(dapm, adau1761_dapm_routes,
833*4882a593Smuzhiyun ARRAY_SIZE(adau1761_dapm_routes));
834*4882a593Smuzhiyun if (ret)
835*4882a593Smuzhiyun return ret;
836*4882a593Smuzhiyun }
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun ret = adau17x1_add_routes(component);
839*4882a593Smuzhiyun if (ret < 0)
840*4882a593Smuzhiyun return ret;
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun return 0;
843*4882a593Smuzhiyun }
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun static const struct snd_soc_component_driver adau1761_component_driver = {
846*4882a593Smuzhiyun .probe = adau1761_component_probe,
847*4882a593Smuzhiyun .resume = adau17x1_resume,
848*4882a593Smuzhiyun .set_bias_level = adau1761_set_bias_level,
849*4882a593Smuzhiyun .controls = adau1761_controls,
850*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(adau1761_controls),
851*4882a593Smuzhiyun .dapm_widgets = adau1x61_dapm_widgets,
852*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(adau1x61_dapm_widgets),
853*4882a593Smuzhiyun .dapm_routes = adau1x61_dapm_routes,
854*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(adau1x61_dapm_routes),
855*4882a593Smuzhiyun .suspend_bias_off = 1,
856*4882a593Smuzhiyun .idle_bias_on = 1,
857*4882a593Smuzhiyun .use_pmdown_time = 1,
858*4882a593Smuzhiyun .endianness = 1,
859*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
860*4882a593Smuzhiyun };
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun #define ADAU1761_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
863*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S32_LE)
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun static struct snd_soc_dai_driver adau1361_dai_driver = {
866*4882a593Smuzhiyun .name = "adau-hifi",
867*4882a593Smuzhiyun .playback = {
868*4882a593Smuzhiyun .stream_name = "Playback",
869*4882a593Smuzhiyun .channels_min = 2,
870*4882a593Smuzhiyun .channels_max = 4,
871*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_8000_96000,
872*4882a593Smuzhiyun .formats = ADAU1761_FORMATS,
873*4882a593Smuzhiyun },
874*4882a593Smuzhiyun .capture = {
875*4882a593Smuzhiyun .stream_name = "Capture",
876*4882a593Smuzhiyun .channels_min = 2,
877*4882a593Smuzhiyun .channels_max = 4,
878*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_8000_96000,
879*4882a593Smuzhiyun .formats = ADAU1761_FORMATS,
880*4882a593Smuzhiyun },
881*4882a593Smuzhiyun .ops = &adau17x1_dai_ops,
882*4882a593Smuzhiyun };
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun static struct snd_soc_dai_driver adau1761_dai_driver = {
885*4882a593Smuzhiyun .name = "adau-hifi",
886*4882a593Smuzhiyun .playback = {
887*4882a593Smuzhiyun .stream_name = "Playback",
888*4882a593Smuzhiyun .channels_min = 2,
889*4882a593Smuzhiyun .channels_max = 8,
890*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_8000_96000,
891*4882a593Smuzhiyun .formats = ADAU1761_FORMATS,
892*4882a593Smuzhiyun },
893*4882a593Smuzhiyun .capture = {
894*4882a593Smuzhiyun .stream_name = "Capture",
895*4882a593Smuzhiyun .channels_min = 2,
896*4882a593Smuzhiyun .channels_max = 8,
897*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_8000_96000,
898*4882a593Smuzhiyun .formats = ADAU1761_FORMATS,
899*4882a593Smuzhiyun },
900*4882a593Smuzhiyun .ops = &adau17x1_dai_ops,
901*4882a593Smuzhiyun };
902*4882a593Smuzhiyun
adau1761_probe(struct device * dev,struct regmap * regmap,enum adau17x1_type type,void (* switch_mode)(struct device * dev))903*4882a593Smuzhiyun int adau1761_probe(struct device *dev, struct regmap *regmap,
904*4882a593Smuzhiyun enum adau17x1_type type, void (*switch_mode)(struct device *dev))
905*4882a593Smuzhiyun {
906*4882a593Smuzhiyun struct snd_soc_dai_driver *dai_drv;
907*4882a593Smuzhiyun const char *firmware_name;
908*4882a593Smuzhiyun int ret;
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun if (type == ADAU1361) {
911*4882a593Smuzhiyun dai_drv = &adau1361_dai_driver;
912*4882a593Smuzhiyun firmware_name = NULL;
913*4882a593Smuzhiyun } else {
914*4882a593Smuzhiyun dai_drv = &adau1761_dai_driver;
915*4882a593Smuzhiyun firmware_name = ADAU1761_FIRMWARE;
916*4882a593Smuzhiyun }
917*4882a593Smuzhiyun
918*4882a593Smuzhiyun ret = adau17x1_probe(dev, regmap, type, switch_mode, firmware_name);
919*4882a593Smuzhiyun if (ret)
920*4882a593Smuzhiyun return ret;
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun /* Enable cache only mode as we could miss writes before bias level
923*4882a593Smuzhiyun * reaches standby and the core clock is enabled */
924*4882a593Smuzhiyun regcache_cache_only(regmap, true);
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun return devm_snd_soc_register_component(dev, &adau1761_component_driver,
927*4882a593Smuzhiyun dai_drv, 1);
928*4882a593Smuzhiyun }
929*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(adau1761_probe);
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun const struct regmap_config adau1761_regmap_config = {
932*4882a593Smuzhiyun .val_bits = 8,
933*4882a593Smuzhiyun .reg_bits = 16,
934*4882a593Smuzhiyun .max_register = 0x40fa,
935*4882a593Smuzhiyun .reg_defaults = adau1761_reg_defaults,
936*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(adau1761_reg_defaults),
937*4882a593Smuzhiyun .readable_reg = adau1761_readable_register,
938*4882a593Smuzhiyun .volatile_reg = adau17x1_volatile_register,
939*4882a593Smuzhiyun .precious_reg = adau17x1_precious_register,
940*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
941*4882a593Smuzhiyun };
942*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(adau1761_regmap_config);
943*4882a593Smuzhiyun
944*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC ADAU1361/ADAU1461/ADAU1761/ADAU1961 CODEC driver");
945*4882a593Smuzhiyun MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
946*4882a593Smuzhiyun MODULE_LICENSE("GPL");
947