xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/ad193x.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * AD193X Audio Codec driver supporting AD1936/7/8/9
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2010 Analog Devices Inc.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/device.h>
11*4882a593Smuzhiyun #include <linux/regmap.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun #include <sound/core.h>
14*4882a593Smuzhiyun #include <sound/pcm.h>
15*4882a593Smuzhiyun #include <sound/pcm_params.h>
16*4882a593Smuzhiyun #include <sound/initval.h>
17*4882a593Smuzhiyun #include <sound/soc.h>
18*4882a593Smuzhiyun #include <sound/tlv.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include "ad193x.h"
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun /* codec private data */
23*4882a593Smuzhiyun struct ad193x_priv {
24*4882a593Smuzhiyun 	struct regmap *regmap;
25*4882a593Smuzhiyun 	enum ad193x_type type;
26*4882a593Smuzhiyun 	int sysclk;
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /*
30*4882a593Smuzhiyun  * AD193X volume/mute/de-emphasis etc. controls
31*4882a593Smuzhiyun  */
32*4882a593Smuzhiyun static const char * const ad193x_deemp[] = {"None", "48kHz", "44.1kHz", "32kHz"};
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(ad193x_deemp_enum, AD193X_DAC_CTRL2, 1,
35*4882a593Smuzhiyun 			    ad193x_deemp);
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun static const DECLARE_TLV_DB_MINMAX(adau193x_tlv, -9563, 0);
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun static const unsigned int ad193x_sb[] = {32};
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun static struct snd_pcm_hw_constraint_list constr = {
42*4882a593Smuzhiyun 	.list = ad193x_sb,
43*4882a593Smuzhiyun 	.count = ARRAY_SIZE(ad193x_sb),
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun static const struct snd_kcontrol_new ad193x_snd_controls[] = {
47*4882a593Smuzhiyun 	/* DAC volume control */
48*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("DAC1 Volume", AD193X_DAC_L1_VOL,
49*4882a593Smuzhiyun 			AD193X_DAC_R1_VOL, 0, 0xFF, 1, adau193x_tlv),
50*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("DAC2 Volume", AD193X_DAC_L2_VOL,
51*4882a593Smuzhiyun 			AD193X_DAC_R2_VOL, 0, 0xFF, 1, adau193x_tlv),
52*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("DAC3 Volume", AD193X_DAC_L3_VOL,
53*4882a593Smuzhiyun 			AD193X_DAC_R3_VOL, 0, 0xFF, 1, adau193x_tlv),
54*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("DAC4 Volume", AD193X_DAC_L4_VOL,
55*4882a593Smuzhiyun 			AD193X_DAC_R4_VOL, 0, 0xFF, 1, adau193x_tlv),
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	/* DAC switch control */
58*4882a593Smuzhiyun 	SOC_DOUBLE("DAC1 Switch", AD193X_DAC_CHNL_MUTE, AD193X_DACL1_MUTE,
59*4882a593Smuzhiyun 		AD193X_DACR1_MUTE, 1, 1),
60*4882a593Smuzhiyun 	SOC_DOUBLE("DAC2 Switch", AD193X_DAC_CHNL_MUTE, AD193X_DACL2_MUTE,
61*4882a593Smuzhiyun 		AD193X_DACR2_MUTE, 1, 1),
62*4882a593Smuzhiyun 	SOC_DOUBLE("DAC3 Switch", AD193X_DAC_CHNL_MUTE, AD193X_DACL3_MUTE,
63*4882a593Smuzhiyun 		AD193X_DACR3_MUTE, 1, 1),
64*4882a593Smuzhiyun 	SOC_DOUBLE("DAC4 Switch", AD193X_DAC_CHNL_MUTE, AD193X_DACL4_MUTE,
65*4882a593Smuzhiyun 		AD193X_DACR4_MUTE, 1, 1),
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	/* DAC de-emphasis */
68*4882a593Smuzhiyun 	SOC_ENUM("Playback Deemphasis", ad193x_deemp_enum),
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun static const struct snd_kcontrol_new ad193x_adc_snd_controls[] = {
72*4882a593Smuzhiyun 	/* ADC switch control */
73*4882a593Smuzhiyun 	SOC_DOUBLE("ADC1 Switch", AD193X_ADC_CTRL0, AD193X_ADCL1_MUTE,
74*4882a593Smuzhiyun 		AD193X_ADCR1_MUTE, 1, 1),
75*4882a593Smuzhiyun 	SOC_DOUBLE("ADC2 Switch", AD193X_ADC_CTRL0, AD193X_ADCL2_MUTE,
76*4882a593Smuzhiyun 		AD193X_ADCR2_MUTE, 1, 1),
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	/* ADC high-pass filter */
79*4882a593Smuzhiyun 	SOC_SINGLE("ADC High Pass Filter Switch", AD193X_ADC_CTRL0,
80*4882a593Smuzhiyun 			AD193X_ADC_HIGHPASS_FILTER, 1, 0),
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun static const struct snd_soc_dapm_widget ad193x_dapm_widgets[] = {
84*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
85*4882a593Smuzhiyun 	SND_SOC_DAPM_PGA("DAC Output", AD193X_DAC_CTRL0, 0, 1, NULL, 0),
86*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("PLL_PWR", AD193X_PLL_CLK_CTRL0, 0, 1, NULL, 0),
87*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("SYSCLK", AD193X_PLL_CLK_CTRL0, 7, 0, NULL, 0),
88*4882a593Smuzhiyun 	SND_SOC_DAPM_VMID("VMID"),
89*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("DAC1OUT"),
90*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("DAC2OUT"),
91*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("DAC3OUT"),
92*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("DAC4OUT"),
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun static const struct snd_soc_dapm_widget ad193x_adc_widgets[] = {
96*4882a593Smuzhiyun 	SND_SOC_DAPM_ADC("ADC", "Capture", SND_SOC_NOPM, 0, 0),
97*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("ADC_PWR", AD193X_ADC_CTRL0, 0, 1, NULL, 0),
98*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("ADC1IN"),
99*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("ADC2IN"),
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun 
ad193x_check_pll(struct snd_soc_dapm_widget * source,struct snd_soc_dapm_widget * sink)102*4882a593Smuzhiyun static int ad193x_check_pll(struct snd_soc_dapm_widget *source,
103*4882a593Smuzhiyun 			    struct snd_soc_dapm_widget *sink)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun 	struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
106*4882a593Smuzhiyun 	struct ad193x_priv *ad193x = snd_soc_component_get_drvdata(component);
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	return !!ad193x->sysclk;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun static const struct snd_soc_dapm_route audio_paths[] = {
112*4882a593Smuzhiyun 	{ "DAC", NULL, "SYSCLK" },
113*4882a593Smuzhiyun 	{ "DAC Output", NULL, "DAC" },
114*4882a593Smuzhiyun 	{ "DAC Output", NULL, "VMID" },
115*4882a593Smuzhiyun 	{ "DAC1OUT", NULL, "DAC Output" },
116*4882a593Smuzhiyun 	{ "DAC2OUT", NULL, "DAC Output" },
117*4882a593Smuzhiyun 	{ "DAC3OUT", NULL, "DAC Output" },
118*4882a593Smuzhiyun 	{ "DAC4OUT", NULL, "DAC Output" },
119*4882a593Smuzhiyun 	{ "SYSCLK", NULL, "PLL_PWR", &ad193x_check_pll },
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun static const struct snd_soc_dapm_route ad193x_adc_audio_paths[] = {
123*4882a593Smuzhiyun 	{ "ADC", NULL, "SYSCLK" },
124*4882a593Smuzhiyun 	{ "ADC", NULL, "ADC_PWR" },
125*4882a593Smuzhiyun 	{ "ADC", NULL, "ADC1IN" },
126*4882a593Smuzhiyun 	{ "ADC", NULL, "ADC2IN" },
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
ad193x_has_adc(const struct ad193x_priv * ad193x)129*4882a593Smuzhiyun static inline bool ad193x_has_adc(const struct ad193x_priv *ad193x)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun 	switch (ad193x->type) {
132*4882a593Smuzhiyun 	case AD1933:
133*4882a593Smuzhiyun 	case AD1934:
134*4882a593Smuzhiyun 		return false;
135*4882a593Smuzhiyun 	default:
136*4882a593Smuzhiyun 		break;
137*4882a593Smuzhiyun 	}
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	return true;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun /*
143*4882a593Smuzhiyun  * DAI ops entries
144*4882a593Smuzhiyun  */
145*4882a593Smuzhiyun 
ad193x_mute(struct snd_soc_dai * dai,int mute,int direction)146*4882a593Smuzhiyun static int ad193x_mute(struct snd_soc_dai *dai, int mute, int direction)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	struct ad193x_priv *ad193x = snd_soc_component_get_drvdata(dai->component);
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	if (mute)
151*4882a593Smuzhiyun 		regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL2,
152*4882a593Smuzhiyun 				    AD193X_DAC_MASTER_MUTE,
153*4882a593Smuzhiyun 				    AD193X_DAC_MASTER_MUTE);
154*4882a593Smuzhiyun 	else
155*4882a593Smuzhiyun 		regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL2,
156*4882a593Smuzhiyun 				    AD193X_DAC_MASTER_MUTE, 0);
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	return 0;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun 
ad193x_set_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int width)161*4882a593Smuzhiyun static int ad193x_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
162*4882a593Smuzhiyun 			       unsigned int rx_mask, int slots, int width)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	struct ad193x_priv *ad193x = snd_soc_component_get_drvdata(dai->component);
165*4882a593Smuzhiyun 	unsigned int channels;
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	switch (slots) {
168*4882a593Smuzhiyun 	case 2:
169*4882a593Smuzhiyun 		channels = AD193X_2_CHANNELS;
170*4882a593Smuzhiyun 		break;
171*4882a593Smuzhiyun 	case 4:
172*4882a593Smuzhiyun 		channels = AD193X_4_CHANNELS;
173*4882a593Smuzhiyun 		break;
174*4882a593Smuzhiyun 	case 8:
175*4882a593Smuzhiyun 		channels = AD193X_8_CHANNELS;
176*4882a593Smuzhiyun 		break;
177*4882a593Smuzhiyun 	case 16:
178*4882a593Smuzhiyun 		channels = AD193X_16_CHANNELS;
179*4882a593Smuzhiyun 		break;
180*4882a593Smuzhiyun 	default:
181*4882a593Smuzhiyun 		return -EINVAL;
182*4882a593Smuzhiyun 	}
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL1,
185*4882a593Smuzhiyun 		AD193X_DAC_CHAN_MASK, channels << AD193X_DAC_CHAN_SHFT);
186*4882a593Smuzhiyun 	if (ad193x_has_adc(ad193x))
187*4882a593Smuzhiyun 		regmap_update_bits(ad193x->regmap, AD193X_ADC_CTRL2,
188*4882a593Smuzhiyun 				   AD193X_ADC_CHAN_MASK,
189*4882a593Smuzhiyun 				   channels << AD193X_ADC_CHAN_SHFT);
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	return 0;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun 
ad193x_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)194*4882a593Smuzhiyun static int ad193x_set_dai_fmt(struct snd_soc_dai *codec_dai,
195*4882a593Smuzhiyun 		unsigned int fmt)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun 	struct ad193x_priv *ad193x = snd_soc_component_get_drvdata(codec_dai->component);
198*4882a593Smuzhiyun 	unsigned int adc_serfmt = 0;
199*4882a593Smuzhiyun 	unsigned int dac_serfmt = 0;
200*4882a593Smuzhiyun 	unsigned int adc_fmt = 0;
201*4882a593Smuzhiyun 	unsigned int dac_fmt = 0;
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	/* At present, the driver only support AUX ADC mode(SND_SOC_DAIFMT_I2S
204*4882a593Smuzhiyun 	 * with TDM), ADC&DAC TDM mode(SND_SOC_DAIFMT_DSP_A) and DAC I2S mode
205*4882a593Smuzhiyun 	 * (SND_SOC_DAIFMT_I2S)
206*4882a593Smuzhiyun 	 */
207*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
208*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
209*4882a593Smuzhiyun 		adc_serfmt |= AD193X_ADC_SERFMT_TDM;
210*4882a593Smuzhiyun 		dac_serfmt |= AD193X_DAC_SERFMT_STEREO;
211*4882a593Smuzhiyun 		break;
212*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_A:
213*4882a593Smuzhiyun 		adc_serfmt |= AD193X_ADC_SERFMT_AUX;
214*4882a593Smuzhiyun 		dac_serfmt |= AD193X_DAC_SERFMT_TDM;
215*4882a593Smuzhiyun 		break;
216*4882a593Smuzhiyun 	default:
217*4882a593Smuzhiyun 		if (ad193x_has_adc(ad193x))
218*4882a593Smuzhiyun 			return -EINVAL;
219*4882a593Smuzhiyun 	}
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
222*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_NF: /* normal bit clock + frame */
223*4882a593Smuzhiyun 		break;
224*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_IF: /* normal bclk + invert frm */
225*4882a593Smuzhiyun 		adc_fmt |= AD193X_ADC_LEFT_HIGH;
226*4882a593Smuzhiyun 		dac_fmt |= AD193X_DAC_LEFT_HIGH;
227*4882a593Smuzhiyun 		break;
228*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_NF: /* invert bclk + normal frm */
229*4882a593Smuzhiyun 		adc_fmt |= AD193X_ADC_BCLK_INV;
230*4882a593Smuzhiyun 		dac_fmt |= AD193X_DAC_BCLK_INV;
231*4882a593Smuzhiyun 		break;
232*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_IF: /* invert bclk + frm */
233*4882a593Smuzhiyun 		adc_fmt |= AD193X_ADC_LEFT_HIGH;
234*4882a593Smuzhiyun 		adc_fmt |= AD193X_ADC_BCLK_INV;
235*4882a593Smuzhiyun 		dac_fmt |= AD193X_DAC_LEFT_HIGH;
236*4882a593Smuzhiyun 		dac_fmt |= AD193X_DAC_BCLK_INV;
237*4882a593Smuzhiyun 		break;
238*4882a593Smuzhiyun 	default:
239*4882a593Smuzhiyun 		return -EINVAL;
240*4882a593Smuzhiyun 	}
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	/* For DSP_*, LRCLK's polarity must be inverted */
243*4882a593Smuzhiyun 	if (fmt & SND_SOC_DAIFMT_DSP_A)
244*4882a593Smuzhiyun 		dac_fmt ^= AD193X_DAC_LEFT_HIGH;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
247*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBM_CFM: /* codec clk & frm master */
248*4882a593Smuzhiyun 		adc_fmt |= AD193X_ADC_LCR_MASTER;
249*4882a593Smuzhiyun 		adc_fmt |= AD193X_ADC_BCLK_MASTER;
250*4882a593Smuzhiyun 		dac_fmt |= AD193X_DAC_LCR_MASTER;
251*4882a593Smuzhiyun 		dac_fmt |= AD193X_DAC_BCLK_MASTER;
252*4882a593Smuzhiyun 		break;
253*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBS_CFM: /* codec clk slave & frm master */
254*4882a593Smuzhiyun 		adc_fmt |= AD193X_ADC_LCR_MASTER;
255*4882a593Smuzhiyun 		dac_fmt |= AD193X_DAC_LCR_MASTER;
256*4882a593Smuzhiyun 		break;
257*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBM_CFS: /* codec clk master & frame slave */
258*4882a593Smuzhiyun 		adc_fmt |= AD193X_ADC_BCLK_MASTER;
259*4882a593Smuzhiyun 		dac_fmt |= AD193X_DAC_BCLK_MASTER;
260*4882a593Smuzhiyun 		break;
261*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBS_CFS: /* codec clk & frm slave */
262*4882a593Smuzhiyun 		break;
263*4882a593Smuzhiyun 	default:
264*4882a593Smuzhiyun 		return -EINVAL;
265*4882a593Smuzhiyun 	}
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	if (ad193x_has_adc(ad193x)) {
268*4882a593Smuzhiyun 		regmap_update_bits(ad193x->regmap, AD193X_ADC_CTRL1,
269*4882a593Smuzhiyun 				   AD193X_ADC_SERFMT_MASK, adc_serfmt);
270*4882a593Smuzhiyun 		regmap_update_bits(ad193x->regmap, AD193X_ADC_CTRL2,
271*4882a593Smuzhiyun 				   AD193X_ADC_FMT_MASK, adc_fmt);
272*4882a593Smuzhiyun 	}
273*4882a593Smuzhiyun 	regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL0,
274*4882a593Smuzhiyun 			   AD193X_DAC_SERFMT_MASK, dac_serfmt);
275*4882a593Smuzhiyun 	regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL1,
276*4882a593Smuzhiyun 		AD193X_DAC_FMT_MASK, dac_fmt);
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	return 0;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun 
ad193x_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)281*4882a593Smuzhiyun static int ad193x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
282*4882a593Smuzhiyun 		int clk_id, unsigned int freq, int dir)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
285*4882a593Smuzhiyun 	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
286*4882a593Smuzhiyun 	struct ad193x_priv *ad193x = snd_soc_component_get_drvdata(component);
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	if (clk_id == AD193X_SYSCLK_MCLK) {
289*4882a593Smuzhiyun 		/* MCLK must be 512 x fs */
290*4882a593Smuzhiyun 		if (dir == SND_SOC_CLOCK_OUT || freq != 24576000)
291*4882a593Smuzhiyun 			return -EINVAL;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 		regmap_update_bits(ad193x->regmap, AD193X_PLL_CLK_CTRL1,
294*4882a593Smuzhiyun 				   AD193X_PLL_SRC_MASK,
295*4882a593Smuzhiyun 				   AD193X_PLL_DAC_SRC_MCLK |
296*4882a593Smuzhiyun 				   AD193X_PLL_CLK_SRC_MCLK);
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 		snd_soc_dapm_sync(dapm);
299*4882a593Smuzhiyun 		return 0;
300*4882a593Smuzhiyun 	}
301*4882a593Smuzhiyun 	switch (freq) {
302*4882a593Smuzhiyun 	case 12288000:
303*4882a593Smuzhiyun 	case 18432000:
304*4882a593Smuzhiyun 	case 24576000:
305*4882a593Smuzhiyun 	case 36864000:
306*4882a593Smuzhiyun 		ad193x->sysclk = freq;
307*4882a593Smuzhiyun 		return 0;
308*4882a593Smuzhiyun 	}
309*4882a593Smuzhiyun 	return -EINVAL;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun 
ad193x_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)312*4882a593Smuzhiyun static int ad193x_hw_params(struct snd_pcm_substream *substream,
313*4882a593Smuzhiyun 		struct snd_pcm_hw_params *params,
314*4882a593Smuzhiyun 		struct snd_soc_dai *dai)
315*4882a593Smuzhiyun {
316*4882a593Smuzhiyun 	int word_len = 0, master_rate = 0;
317*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
318*4882a593Smuzhiyun 	struct ad193x_priv *ad193x = snd_soc_component_get_drvdata(component);
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	/* bit size */
321*4882a593Smuzhiyun 	switch (params_width(params)) {
322*4882a593Smuzhiyun 	case 16:
323*4882a593Smuzhiyun 		word_len = 3;
324*4882a593Smuzhiyun 		break;
325*4882a593Smuzhiyun 	case 20:
326*4882a593Smuzhiyun 		word_len = 1;
327*4882a593Smuzhiyun 		break;
328*4882a593Smuzhiyun 	case 24:
329*4882a593Smuzhiyun 	case 32:
330*4882a593Smuzhiyun 		word_len = 0;
331*4882a593Smuzhiyun 		break;
332*4882a593Smuzhiyun 	}
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	switch (ad193x->sysclk) {
335*4882a593Smuzhiyun 	case 12288000:
336*4882a593Smuzhiyun 		master_rate = AD193X_PLL_INPUT_256;
337*4882a593Smuzhiyun 		break;
338*4882a593Smuzhiyun 	case 18432000:
339*4882a593Smuzhiyun 		master_rate = AD193X_PLL_INPUT_384;
340*4882a593Smuzhiyun 		break;
341*4882a593Smuzhiyun 	case 24576000:
342*4882a593Smuzhiyun 		master_rate = AD193X_PLL_INPUT_512;
343*4882a593Smuzhiyun 		break;
344*4882a593Smuzhiyun 	case 36864000:
345*4882a593Smuzhiyun 		master_rate = AD193X_PLL_INPUT_768;
346*4882a593Smuzhiyun 		break;
347*4882a593Smuzhiyun 	}
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	regmap_update_bits(ad193x->regmap, AD193X_PLL_CLK_CTRL0,
350*4882a593Smuzhiyun 			    AD193X_PLL_INPUT_MASK, master_rate);
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL2,
353*4882a593Smuzhiyun 			    AD193X_DAC_WORD_LEN_MASK,
354*4882a593Smuzhiyun 			    word_len << AD193X_DAC_WORD_LEN_SHFT);
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	if (ad193x_has_adc(ad193x))
357*4882a593Smuzhiyun 		regmap_update_bits(ad193x->regmap, AD193X_ADC_CTRL1,
358*4882a593Smuzhiyun 				   AD193X_ADC_WORD_LEN_MASK, word_len);
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	return 0;
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun 
ad193x_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)363*4882a593Smuzhiyun static int ad193x_startup(struct snd_pcm_substream *substream,
364*4882a593Smuzhiyun 			  struct snd_soc_dai *dai)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun 	return snd_pcm_hw_constraint_list(substream->runtime, 0,
367*4882a593Smuzhiyun 				   SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
368*4882a593Smuzhiyun 				   &constr);
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun static const struct snd_soc_dai_ops ad193x_dai_ops = {
372*4882a593Smuzhiyun 	.startup = ad193x_startup,
373*4882a593Smuzhiyun 	.hw_params = ad193x_hw_params,
374*4882a593Smuzhiyun 	.mute_stream = ad193x_mute,
375*4882a593Smuzhiyun 	.set_tdm_slot = ad193x_set_tdm_slot,
376*4882a593Smuzhiyun 	.set_sysclk	= ad193x_set_dai_sysclk,
377*4882a593Smuzhiyun 	.set_fmt = ad193x_set_dai_fmt,
378*4882a593Smuzhiyun 	.no_capture_mute = 1,
379*4882a593Smuzhiyun };
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun /* codec DAI instance */
382*4882a593Smuzhiyun static struct snd_soc_dai_driver ad193x_dai = {
383*4882a593Smuzhiyun 	.name = "ad193x-hifi",
384*4882a593Smuzhiyun 	.playback = {
385*4882a593Smuzhiyun 		.stream_name = "Playback",
386*4882a593Smuzhiyun 		.channels_min = 2,
387*4882a593Smuzhiyun 		.channels_max = 8,
388*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_48000,
389*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE |
390*4882a593Smuzhiyun 			SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE,
391*4882a593Smuzhiyun 	},
392*4882a593Smuzhiyun 	.capture = {
393*4882a593Smuzhiyun 		.stream_name = "Capture",
394*4882a593Smuzhiyun 		.channels_min = 2,
395*4882a593Smuzhiyun 		.channels_max = 4,
396*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_48000,
397*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE |
398*4882a593Smuzhiyun 			SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE,
399*4882a593Smuzhiyun 	},
400*4882a593Smuzhiyun 	.ops = &ad193x_dai_ops,
401*4882a593Smuzhiyun };
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun /* codec DAI instance for DAC only */
404*4882a593Smuzhiyun static struct snd_soc_dai_driver ad193x_no_adc_dai = {
405*4882a593Smuzhiyun 	.name = "ad193x-hifi",
406*4882a593Smuzhiyun 	.playback = {
407*4882a593Smuzhiyun 		.stream_name = "Playback",
408*4882a593Smuzhiyun 		.channels_min = 2,
409*4882a593Smuzhiyun 		.channels_max = 8,
410*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_48000,
411*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE |
412*4882a593Smuzhiyun 			SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE,
413*4882a593Smuzhiyun 	},
414*4882a593Smuzhiyun 	.ops = &ad193x_dai_ops,
415*4882a593Smuzhiyun };
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun /* codec register values to set after reset */
ad193x_reg_default_init(struct ad193x_priv * ad193x)418*4882a593Smuzhiyun static void ad193x_reg_default_init(struct ad193x_priv *ad193x)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun 	static const struct reg_sequence reg_init[] = {
421*4882a593Smuzhiyun 		{  0, 0x99 },	/* PLL_CLK_CTRL0: pll input: mclki/xi 12.288Mhz */
422*4882a593Smuzhiyun 		{  1, 0x04 },	/* PLL_CLK_CTRL1: no on-chip Vref */
423*4882a593Smuzhiyun 		{  2, 0x40 },	/* DAC_CTRL0: TDM mode */
424*4882a593Smuzhiyun 		{  3, 0x00 },	/* DAC_CTRL1: reset */
425*4882a593Smuzhiyun 		{  4, 0x1A },	/* DAC_CTRL2: 48kHz de-emphasis, unmute dac */
426*4882a593Smuzhiyun 		{  5, 0x00 },	/* DAC_CHNL_MUTE: unmute DAC channels */
427*4882a593Smuzhiyun 		{  6, 0x00 },	/* DAC_L1_VOL: no attenuation */
428*4882a593Smuzhiyun 		{  7, 0x00 },	/* DAC_R1_VOL: no attenuation */
429*4882a593Smuzhiyun 		{  8, 0x00 },	/* DAC_L2_VOL: no attenuation */
430*4882a593Smuzhiyun 		{  9, 0x00 },	/* DAC_R2_VOL: no attenuation */
431*4882a593Smuzhiyun 		{ 10, 0x00 },	/* DAC_L3_VOL: no attenuation */
432*4882a593Smuzhiyun 		{ 11, 0x00 },	/* DAC_R3_VOL: no attenuation */
433*4882a593Smuzhiyun 		{ 12, 0x00 },	/* DAC_L4_VOL: no attenuation */
434*4882a593Smuzhiyun 		{ 13, 0x00 },	/* DAC_R4_VOL: no attenuation */
435*4882a593Smuzhiyun 	};
436*4882a593Smuzhiyun 	static const struct reg_sequence reg_adc_init[] = {
437*4882a593Smuzhiyun 		{ 14, 0x03 },	/* ADC_CTRL0: high-pass filter enable */
438*4882a593Smuzhiyun 		{ 15, 0x43 },	/* ADC_CTRL1: sata delay=1, adc aux mode */
439*4882a593Smuzhiyun 		{ 16, 0x00 },	/* ADC_CTRL2: reset */
440*4882a593Smuzhiyun 	};
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	regmap_multi_reg_write(ad193x->regmap, reg_init, ARRAY_SIZE(reg_init));
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 	if (ad193x_has_adc(ad193x)) {
445*4882a593Smuzhiyun 		regmap_multi_reg_write(ad193x->regmap, reg_adc_init,
446*4882a593Smuzhiyun 				       ARRAY_SIZE(reg_adc_init));
447*4882a593Smuzhiyun 	}
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun 
ad193x_component_probe(struct snd_soc_component * component)450*4882a593Smuzhiyun static int ad193x_component_probe(struct snd_soc_component *component)
451*4882a593Smuzhiyun {
452*4882a593Smuzhiyun 	struct ad193x_priv *ad193x = snd_soc_component_get_drvdata(component);
453*4882a593Smuzhiyun 	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
454*4882a593Smuzhiyun 	int num, ret;
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	/* default setting for ad193x */
457*4882a593Smuzhiyun 	ad193x_reg_default_init(ad193x);
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	/* adc only */
460*4882a593Smuzhiyun 	if (ad193x_has_adc(ad193x)) {
461*4882a593Smuzhiyun 		/* add adc controls */
462*4882a593Smuzhiyun 		num = ARRAY_SIZE(ad193x_adc_snd_controls);
463*4882a593Smuzhiyun 		ret = snd_soc_add_component_controls(component,
464*4882a593Smuzhiyun 						 ad193x_adc_snd_controls,
465*4882a593Smuzhiyun 						 num);
466*4882a593Smuzhiyun 		if (ret)
467*4882a593Smuzhiyun 			return ret;
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 		/* add adc widgets */
470*4882a593Smuzhiyun 		num = ARRAY_SIZE(ad193x_adc_widgets);
471*4882a593Smuzhiyun 		ret = snd_soc_dapm_new_controls(dapm,
472*4882a593Smuzhiyun 						ad193x_adc_widgets,
473*4882a593Smuzhiyun 						num);
474*4882a593Smuzhiyun 		if (ret)
475*4882a593Smuzhiyun 			return ret;
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 		/* add adc routes */
478*4882a593Smuzhiyun 		num = ARRAY_SIZE(ad193x_adc_audio_paths);
479*4882a593Smuzhiyun 		ret = snd_soc_dapm_add_routes(dapm,
480*4882a593Smuzhiyun 					      ad193x_adc_audio_paths,
481*4882a593Smuzhiyun 					      num);
482*4882a593Smuzhiyun 		if (ret)
483*4882a593Smuzhiyun 			return ret;
484*4882a593Smuzhiyun 	}
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	return 0;
487*4882a593Smuzhiyun }
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_ad193x = {
490*4882a593Smuzhiyun 	.probe			= ad193x_component_probe,
491*4882a593Smuzhiyun 	.controls		= ad193x_snd_controls,
492*4882a593Smuzhiyun 	.num_controls		= ARRAY_SIZE(ad193x_snd_controls),
493*4882a593Smuzhiyun 	.dapm_widgets		= ad193x_dapm_widgets,
494*4882a593Smuzhiyun 	.num_dapm_widgets	= ARRAY_SIZE(ad193x_dapm_widgets),
495*4882a593Smuzhiyun 	.dapm_routes		= audio_paths,
496*4882a593Smuzhiyun 	.num_dapm_routes	= ARRAY_SIZE(audio_paths),
497*4882a593Smuzhiyun 	.idle_bias_on		= 1,
498*4882a593Smuzhiyun 	.use_pmdown_time	= 1,
499*4882a593Smuzhiyun 	.endianness		= 1,
500*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
501*4882a593Smuzhiyun };
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun const struct regmap_config ad193x_regmap_config = {
504*4882a593Smuzhiyun 	.max_register = AD193X_NUM_REGS - 1,
505*4882a593Smuzhiyun };
506*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ad193x_regmap_config);
507*4882a593Smuzhiyun 
ad193x_probe(struct device * dev,struct regmap * regmap,enum ad193x_type type)508*4882a593Smuzhiyun int ad193x_probe(struct device *dev, struct regmap *regmap,
509*4882a593Smuzhiyun 		 enum ad193x_type type)
510*4882a593Smuzhiyun {
511*4882a593Smuzhiyun 	struct ad193x_priv *ad193x;
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	if (IS_ERR(regmap))
514*4882a593Smuzhiyun 		return PTR_ERR(regmap);
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	ad193x = devm_kzalloc(dev, sizeof(*ad193x), GFP_KERNEL);
517*4882a593Smuzhiyun 	if (ad193x == NULL)
518*4882a593Smuzhiyun 		return -ENOMEM;
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun 	ad193x->regmap = regmap;
521*4882a593Smuzhiyun 	ad193x->type = type;
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun 	dev_set_drvdata(dev, ad193x);
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	if (ad193x_has_adc(ad193x))
526*4882a593Smuzhiyun 		return devm_snd_soc_register_component(dev, &soc_component_dev_ad193x,
527*4882a593Smuzhiyun 						       &ad193x_dai, 1);
528*4882a593Smuzhiyun 	return devm_snd_soc_register_component(dev, &soc_component_dev_ad193x,
529*4882a593Smuzhiyun 		&ad193x_no_adc_dai, 1);
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ad193x_probe);
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC ad193x driver");
534*4882a593Smuzhiyun MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
535*4882a593Smuzhiyun MODULE_LICENSE("GPL");
536