xref: /OK3568_Linux_fs/kernel/sound/soc/bcm/bcm63xx-pcm-whistler.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun // linux/sound/bcm/bcm63xx-pcm-whistler.c
3*4882a593Smuzhiyun // BCM63xx whistler pcm interface
4*4882a593Smuzhiyun // Copyright (c) 2020 Broadcom Corporation
5*4882a593Smuzhiyun // Author: Kevin-Ke Li <kevin-ke.li@broadcom.com>
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/dma-mapping.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <sound/pcm_params.h>
11*4882a593Smuzhiyun #include <linux/regmap.h>
12*4882a593Smuzhiyun #include <linux/of_device.h>
13*4882a593Smuzhiyun #include <sound/soc.h>
14*4882a593Smuzhiyun #include "bcm63xx-i2s.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun struct i2s_dma_desc {
18*4882a593Smuzhiyun 	unsigned char *dma_area;
19*4882a593Smuzhiyun 	dma_addr_t dma_addr;
20*4882a593Smuzhiyun 	unsigned int dma_len;
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun struct bcm63xx_runtime_data {
24*4882a593Smuzhiyun 	int dma_len;
25*4882a593Smuzhiyun 	dma_addr_t dma_addr;
26*4882a593Smuzhiyun 	dma_addr_t dma_addr_next;
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun static const struct snd_pcm_hardware bcm63xx_pcm_hardware = {
30*4882a593Smuzhiyun 	.info = SNDRV_PCM_INFO_MMAP |
31*4882a593Smuzhiyun 		SNDRV_PCM_INFO_MMAP_VALID |
32*4882a593Smuzhiyun 		SNDRV_PCM_INFO_INTERLEAVED |
33*4882a593Smuzhiyun 		SNDRV_PCM_INFO_PAUSE |
34*4882a593Smuzhiyun 		SNDRV_PCM_INFO_RESUME,
35*4882a593Smuzhiyun 	.formats = SNDRV_PCM_FMTBIT_S32_LE, /* support S32 only */
36*4882a593Smuzhiyun 	.period_bytes_max = 8192 - 32,
37*4882a593Smuzhiyun 	.periods_min = 1,
38*4882a593Smuzhiyun 	.periods_max = PAGE_SIZE/sizeof(struct i2s_dma_desc),
39*4882a593Smuzhiyun 	.buffer_bytes_max = 128 * 1024,
40*4882a593Smuzhiyun 	.fifo_size = 32,
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun 
bcm63xx_pcm_hw_params(struct snd_soc_component * component,struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)43*4882a593Smuzhiyun static int bcm63xx_pcm_hw_params(struct snd_soc_component *component,
44*4882a593Smuzhiyun 				 struct snd_pcm_substream *substream,
45*4882a593Smuzhiyun 				 struct snd_pcm_hw_params *params)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	struct i2s_dma_desc *dma_desc;
48*4882a593Smuzhiyun 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
49*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
52*4882a593Smuzhiyun 	runtime->dma_bytes = params_buffer_bytes(params);
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	dma_desc = kzalloc(sizeof(*dma_desc), GFP_NOWAIT);
55*4882a593Smuzhiyun 	if (!dma_desc)
56*4882a593Smuzhiyun 		return -ENOMEM;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	snd_soc_dai_set_dma_data(asoc_rtd_to_cpu(rtd, 0), substream, dma_desc);
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	return 0;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun 
bcm63xx_pcm_hw_free(struct snd_soc_component * component,struct snd_pcm_substream * substream)63*4882a593Smuzhiyun static int bcm63xx_pcm_hw_free(struct snd_soc_component *component,
64*4882a593Smuzhiyun 			struct snd_pcm_substream *substream)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun 	struct i2s_dma_desc	*dma_desc;
67*4882a593Smuzhiyun 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	dma_desc = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
70*4882a593Smuzhiyun 	kfree(dma_desc);
71*4882a593Smuzhiyun 	snd_pcm_set_runtime_buffer(substream, NULL);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	return 0;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
bcm63xx_pcm_trigger(struct snd_soc_component * component,struct snd_pcm_substream * substream,int cmd)76*4882a593Smuzhiyun static int bcm63xx_pcm_trigger(struct snd_soc_component *component,
77*4882a593Smuzhiyun 			       struct snd_pcm_substream *substream, int cmd)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	int ret = 0;
80*4882a593Smuzhiyun 	struct snd_soc_pcm_runtime *rtd;
81*4882a593Smuzhiyun 	struct bcm_i2s_priv *i2s_priv;
82*4882a593Smuzhiyun 	struct regmap   *regmap_i2s;
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	rtd = asoc_substream_to_rtd(substream);
85*4882a593Smuzhiyun 	i2s_priv = dev_get_drvdata(asoc_rtd_to_cpu(rtd, 0)->dev);
86*4882a593Smuzhiyun 	regmap_i2s = i2s_priv->regmap_i2s;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
89*4882a593Smuzhiyun 		switch (cmd) {
90*4882a593Smuzhiyun 		case SNDRV_PCM_TRIGGER_START:
91*4882a593Smuzhiyun 			regmap_update_bits(regmap_i2s,
92*4882a593Smuzhiyun 					   I2S_TX_IRQ_EN,
93*4882a593Smuzhiyun 					   I2S_TX_DESC_OFF_INTR_EN,
94*4882a593Smuzhiyun 					   I2S_TX_DESC_OFF_INTR_EN);
95*4882a593Smuzhiyun 			regmap_update_bits(regmap_i2s,
96*4882a593Smuzhiyun 					   I2S_TX_CFG,
97*4882a593Smuzhiyun 					   I2S_TX_ENABLE_MASK,
98*4882a593Smuzhiyun 					   I2S_TX_ENABLE);
99*4882a593Smuzhiyun 			break;
100*4882a593Smuzhiyun 		case SNDRV_PCM_TRIGGER_STOP:
101*4882a593Smuzhiyun 		case SNDRV_PCM_TRIGGER_SUSPEND:
102*4882a593Smuzhiyun 		case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
103*4882a593Smuzhiyun 			regmap_write(regmap_i2s,
104*4882a593Smuzhiyun 				     I2S_TX_IRQ_EN,
105*4882a593Smuzhiyun 				     0);
106*4882a593Smuzhiyun 			regmap_update_bits(regmap_i2s,
107*4882a593Smuzhiyun 					   I2S_TX_CFG,
108*4882a593Smuzhiyun 					   I2S_TX_ENABLE_MASK,
109*4882a593Smuzhiyun 					   0);
110*4882a593Smuzhiyun 			break;
111*4882a593Smuzhiyun 		default:
112*4882a593Smuzhiyun 			ret = -EINVAL;
113*4882a593Smuzhiyun 		}
114*4882a593Smuzhiyun 	} else {
115*4882a593Smuzhiyun 		switch (cmd) {
116*4882a593Smuzhiyun 		case SNDRV_PCM_TRIGGER_START:
117*4882a593Smuzhiyun 			regmap_update_bits(regmap_i2s,
118*4882a593Smuzhiyun 					   I2S_RX_IRQ_EN,
119*4882a593Smuzhiyun 					   I2S_RX_DESC_OFF_INTR_EN_MSK,
120*4882a593Smuzhiyun 					   I2S_RX_DESC_OFF_INTR_EN);
121*4882a593Smuzhiyun 			regmap_update_bits(regmap_i2s,
122*4882a593Smuzhiyun 					   I2S_RX_CFG,
123*4882a593Smuzhiyun 					   I2S_RX_ENABLE_MASK,
124*4882a593Smuzhiyun 					   I2S_RX_ENABLE);
125*4882a593Smuzhiyun 			break;
126*4882a593Smuzhiyun 		case SNDRV_PCM_TRIGGER_STOP:
127*4882a593Smuzhiyun 		case SNDRV_PCM_TRIGGER_SUSPEND:
128*4882a593Smuzhiyun 		case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
129*4882a593Smuzhiyun 			regmap_update_bits(regmap_i2s,
130*4882a593Smuzhiyun 					   I2S_RX_IRQ_EN,
131*4882a593Smuzhiyun 					   I2S_RX_DESC_OFF_INTR_EN_MSK,
132*4882a593Smuzhiyun 					   0);
133*4882a593Smuzhiyun 			regmap_update_bits(regmap_i2s,
134*4882a593Smuzhiyun 					   I2S_RX_CFG,
135*4882a593Smuzhiyun 					   I2S_RX_ENABLE_MASK,
136*4882a593Smuzhiyun 					   0);
137*4882a593Smuzhiyun 			break;
138*4882a593Smuzhiyun 		default:
139*4882a593Smuzhiyun 			ret = -EINVAL;
140*4882a593Smuzhiyun 		}
141*4882a593Smuzhiyun 	}
142*4882a593Smuzhiyun 	return ret;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
bcm63xx_pcm_prepare(struct snd_soc_component * component,struct snd_pcm_substream * substream)145*4882a593Smuzhiyun static int bcm63xx_pcm_prepare(struct snd_soc_component *component,
146*4882a593Smuzhiyun 			struct snd_pcm_substream *substream)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	struct i2s_dma_desc	*dma_desc;
149*4882a593Smuzhiyun 	struct regmap		*regmap_i2s;
150*4882a593Smuzhiyun 	struct bcm_i2s_priv	*i2s_priv;
151*4882a593Smuzhiyun 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
152*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
153*4882a593Smuzhiyun 	uint32_t regaddr_desclen, regaddr_descaddr;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	dma_desc = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
156*4882a593Smuzhiyun 	dma_desc->dma_len  = snd_pcm_lib_period_bytes(substream);
157*4882a593Smuzhiyun 	dma_desc->dma_addr = runtime->dma_addr;
158*4882a593Smuzhiyun 	dma_desc->dma_area = runtime->dma_area;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
161*4882a593Smuzhiyun 		regaddr_desclen = I2S_TX_DESC_IFF_LEN;
162*4882a593Smuzhiyun 		regaddr_descaddr = I2S_TX_DESC_IFF_ADDR;
163*4882a593Smuzhiyun 	} else {
164*4882a593Smuzhiyun 		regaddr_desclen = I2S_RX_DESC_IFF_LEN;
165*4882a593Smuzhiyun 		regaddr_descaddr = I2S_RX_DESC_IFF_ADDR;
166*4882a593Smuzhiyun 	}
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	i2s_priv = dev_get_drvdata(asoc_rtd_to_cpu(rtd, 0)->dev);
169*4882a593Smuzhiyun 	regmap_i2s = i2s_priv->regmap_i2s;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	regmap_write(regmap_i2s, regaddr_desclen, dma_desc->dma_len);
172*4882a593Smuzhiyun 	regmap_write(regmap_i2s, regaddr_descaddr, dma_desc->dma_addr);
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	return 0;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun static snd_pcm_uframes_t
bcm63xx_pcm_pointer(struct snd_soc_component * component,struct snd_pcm_substream * substream)178*4882a593Smuzhiyun bcm63xx_pcm_pointer(struct snd_soc_component *component,
179*4882a593Smuzhiyun 		struct snd_pcm_substream *substream)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun 	snd_pcm_uframes_t x;
182*4882a593Smuzhiyun 	struct bcm63xx_runtime_data *prtd = substream->runtime->private_data;
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	if (!prtd->dma_addr_next)
185*4882a593Smuzhiyun 		prtd->dma_addr_next = substream->runtime->dma_addr;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	x = bytes_to_frames(substream->runtime,
188*4882a593Smuzhiyun 		prtd->dma_addr_next - substream->runtime->dma_addr);
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	return x == substream->runtime->buffer_size ? 0 : x;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun 
bcm63xx_pcm_mmap(struct snd_soc_component * component,struct snd_pcm_substream * substream,struct vm_area_struct * vma)193*4882a593Smuzhiyun static int bcm63xx_pcm_mmap(struct snd_soc_component *component,
194*4882a593Smuzhiyun 				struct snd_pcm_substream *substream,
195*4882a593Smuzhiyun 				struct vm_area_struct *vma)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	return  dma_mmap_wc(substream->pcm->card->dev, vma,
200*4882a593Smuzhiyun 			    runtime->dma_area,
201*4882a593Smuzhiyun 			    runtime->dma_addr,
202*4882a593Smuzhiyun 			    runtime->dma_bytes);
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun 
bcm63xx_pcm_open(struct snd_soc_component * component,struct snd_pcm_substream * substream)206*4882a593Smuzhiyun static int bcm63xx_pcm_open(struct snd_soc_component *component,
207*4882a593Smuzhiyun 			struct snd_pcm_substream *substream)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun 	int ret = 0;
210*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
211*4882a593Smuzhiyun 	struct bcm63xx_runtime_data *prtd;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	runtime->hw = bcm63xx_pcm_hardware;
214*4882a593Smuzhiyun 	ret = snd_pcm_hw_constraint_step(runtime, 0,
215*4882a593Smuzhiyun 					 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
216*4882a593Smuzhiyun 	if (ret)
217*4882a593Smuzhiyun 		goto out;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	ret = snd_pcm_hw_constraint_step(runtime, 0,
220*4882a593Smuzhiyun 					 SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
221*4882a593Smuzhiyun 	if (ret)
222*4882a593Smuzhiyun 		goto out;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	ret = snd_pcm_hw_constraint_integer(runtime,
225*4882a593Smuzhiyun 					    SNDRV_PCM_HW_PARAM_PERIODS);
226*4882a593Smuzhiyun 	if (ret < 0)
227*4882a593Smuzhiyun 		goto out;
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	ret = -ENOMEM;
230*4882a593Smuzhiyun 	prtd = kzalloc(sizeof(*prtd), GFP_KERNEL);
231*4882a593Smuzhiyun 	if (!prtd)
232*4882a593Smuzhiyun 		goto out;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	runtime->private_data = prtd;
235*4882a593Smuzhiyun 	return 0;
236*4882a593Smuzhiyun out:
237*4882a593Smuzhiyun 	return ret;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun 
bcm63xx_pcm_close(struct snd_soc_component * component,struct snd_pcm_substream * substream)240*4882a593Smuzhiyun static int bcm63xx_pcm_close(struct snd_soc_component *component,
241*4882a593Smuzhiyun 			struct snd_pcm_substream *substream)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
244*4882a593Smuzhiyun 	struct bcm63xx_runtime_data *prtd = runtime->private_data;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	kfree(prtd);
247*4882a593Smuzhiyun 	return 0;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun 
i2s_dma_isr(int irq,void * bcm_i2s_priv)250*4882a593Smuzhiyun static irqreturn_t i2s_dma_isr(int irq, void *bcm_i2s_priv)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	unsigned int availdepth, ifflevel, offlevel, int_status, val_1, val_2;
253*4882a593Smuzhiyun 	struct bcm63xx_runtime_data *prtd;
254*4882a593Smuzhiyun 	struct snd_pcm_substream *substream;
255*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime;
256*4882a593Smuzhiyun 	struct regmap *regmap_i2s;
257*4882a593Smuzhiyun 	struct i2s_dma_desc *dma_desc;
258*4882a593Smuzhiyun 	struct snd_soc_pcm_runtime *rtd;
259*4882a593Smuzhiyun 	struct bcm_i2s_priv *i2s_priv;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	i2s_priv = (struct bcm_i2s_priv *)bcm_i2s_priv;
262*4882a593Smuzhiyun 	regmap_i2s = i2s_priv->regmap_i2s;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	/* rx */
265*4882a593Smuzhiyun 	regmap_read(regmap_i2s, I2S_RX_IRQ_CTL, &int_status);
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	if (int_status & I2S_RX_DESC_OFF_INTR_EN_MSK) {
268*4882a593Smuzhiyun 		substream = i2s_priv->capture_substream;
269*4882a593Smuzhiyun 		runtime = substream->runtime;
270*4882a593Smuzhiyun 		rtd = asoc_substream_to_rtd(substream);
271*4882a593Smuzhiyun 		prtd = runtime->private_data;
272*4882a593Smuzhiyun 		dma_desc = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 		offlevel = (int_status & I2S_RX_DESC_OFF_LEVEL_MASK) >>
275*4882a593Smuzhiyun 			   I2S_RX_DESC_OFF_LEVEL_SHIFT;
276*4882a593Smuzhiyun 		while (offlevel) {
277*4882a593Smuzhiyun 			regmap_read(regmap_i2s, I2S_RX_DESC_OFF_ADDR, &val_1);
278*4882a593Smuzhiyun 			regmap_read(regmap_i2s, I2S_RX_DESC_OFF_LEN, &val_2);
279*4882a593Smuzhiyun 			offlevel--;
280*4882a593Smuzhiyun 		}
281*4882a593Smuzhiyun 		prtd->dma_addr_next = val_1 + val_2;
282*4882a593Smuzhiyun 		ifflevel = (int_status & I2S_RX_DESC_IFF_LEVEL_MASK) >>
283*4882a593Smuzhiyun 			   I2S_RX_DESC_IFF_LEVEL_SHIFT;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 		availdepth = I2S_DESC_FIFO_DEPTH - ifflevel;
286*4882a593Smuzhiyun 		while (availdepth) {
287*4882a593Smuzhiyun 			dma_desc->dma_addr +=
288*4882a593Smuzhiyun 					snd_pcm_lib_period_bytes(substream);
289*4882a593Smuzhiyun 			dma_desc->dma_area +=
290*4882a593Smuzhiyun 					snd_pcm_lib_period_bytes(substream);
291*4882a593Smuzhiyun 			if (dma_desc->dma_addr - runtime->dma_addr >=
292*4882a593Smuzhiyun 						runtime->dma_bytes) {
293*4882a593Smuzhiyun 				dma_desc->dma_addr = runtime->dma_addr;
294*4882a593Smuzhiyun 				dma_desc->dma_area = runtime->dma_area;
295*4882a593Smuzhiyun 			}
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 			prtd->dma_addr = dma_desc->dma_addr;
298*4882a593Smuzhiyun 			regmap_write(regmap_i2s, I2S_RX_DESC_IFF_LEN,
299*4882a593Smuzhiyun 				     snd_pcm_lib_period_bytes(substream));
300*4882a593Smuzhiyun 			regmap_write(regmap_i2s, I2S_RX_DESC_IFF_ADDR,
301*4882a593Smuzhiyun 				     dma_desc->dma_addr);
302*4882a593Smuzhiyun 			availdepth--;
303*4882a593Smuzhiyun 		}
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 		snd_pcm_period_elapsed(substream);
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 		/* Clear interrupt by writing 0 */
308*4882a593Smuzhiyun 		regmap_update_bits(regmap_i2s, I2S_RX_IRQ_CTL,
309*4882a593Smuzhiyun 				   I2S_RX_INTR_MASK, 0);
310*4882a593Smuzhiyun 	}
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	/* tx */
313*4882a593Smuzhiyun 	regmap_read(regmap_i2s, I2S_TX_IRQ_CTL, &int_status);
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	if (int_status & I2S_TX_DESC_OFF_INTR_EN_MSK) {
316*4882a593Smuzhiyun 		substream = i2s_priv->play_substream;
317*4882a593Smuzhiyun 		runtime = substream->runtime;
318*4882a593Smuzhiyun 		rtd = asoc_substream_to_rtd(substream);
319*4882a593Smuzhiyun 		prtd = runtime->private_data;
320*4882a593Smuzhiyun 		dma_desc = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 		offlevel = (int_status & I2S_TX_DESC_OFF_LEVEL_MASK) >>
323*4882a593Smuzhiyun 			   I2S_TX_DESC_OFF_LEVEL_SHIFT;
324*4882a593Smuzhiyun 		while (offlevel) {
325*4882a593Smuzhiyun 			regmap_read(regmap_i2s, I2S_TX_DESC_OFF_ADDR, &val_1);
326*4882a593Smuzhiyun 			regmap_read(regmap_i2s, I2S_TX_DESC_OFF_LEN,  &val_2);
327*4882a593Smuzhiyun 			prtd->dma_addr_next = val_1 + val_2;
328*4882a593Smuzhiyun 			offlevel--;
329*4882a593Smuzhiyun 		}
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 		ifflevel = (int_status & I2S_TX_DESC_IFF_LEVEL_MASK) >>
332*4882a593Smuzhiyun 			I2S_TX_DESC_IFF_LEVEL_SHIFT;
333*4882a593Smuzhiyun 		availdepth = I2S_DESC_FIFO_DEPTH - ifflevel;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 		while (availdepth) {
336*4882a593Smuzhiyun 			dma_desc->dma_addr +=
337*4882a593Smuzhiyun 					snd_pcm_lib_period_bytes(substream);
338*4882a593Smuzhiyun 			dma_desc->dma_area +=
339*4882a593Smuzhiyun 					snd_pcm_lib_period_bytes(substream);
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 			if (dma_desc->dma_addr - runtime->dma_addr >=
342*4882a593Smuzhiyun 							runtime->dma_bytes) {
343*4882a593Smuzhiyun 				dma_desc->dma_addr = runtime->dma_addr;
344*4882a593Smuzhiyun 				dma_desc->dma_area = runtime->dma_area;
345*4882a593Smuzhiyun 			}
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 			prtd->dma_addr = dma_desc->dma_addr;
348*4882a593Smuzhiyun 			regmap_write(regmap_i2s, I2S_TX_DESC_IFF_LEN,
349*4882a593Smuzhiyun 				snd_pcm_lib_period_bytes(substream));
350*4882a593Smuzhiyun 			regmap_write(regmap_i2s, I2S_TX_DESC_IFF_ADDR,
351*4882a593Smuzhiyun 					dma_desc->dma_addr);
352*4882a593Smuzhiyun 			availdepth--;
353*4882a593Smuzhiyun 		}
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 		snd_pcm_period_elapsed(substream);
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 		/* Clear interrupt by writing 0 */
358*4882a593Smuzhiyun 		regmap_update_bits(regmap_i2s, I2S_TX_IRQ_CTL,
359*4882a593Smuzhiyun 				   I2S_TX_INTR_MASK, 0);
360*4882a593Smuzhiyun 	}
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	return IRQ_HANDLED;
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun 
bcm63xx_pcm_preallocate_dma_buffer(struct snd_pcm * pcm,int stream)365*4882a593Smuzhiyun static int bcm63xx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
366*4882a593Smuzhiyun {
367*4882a593Smuzhiyun 	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
368*4882a593Smuzhiyun 	struct snd_dma_buffer *buf = &substream->dma_buffer;
369*4882a593Smuzhiyun 	size_t size = bcm63xx_pcm_hardware.buffer_bytes_max;
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	buf->dev.type = SNDRV_DMA_TYPE_DEV;
372*4882a593Smuzhiyun 	buf->dev.dev = pcm->card->dev;
373*4882a593Smuzhiyun 	buf->private_data = NULL;
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	buf->area = dma_alloc_wc(pcm->card->dev,
376*4882a593Smuzhiyun 				 size, &buf->addr,
377*4882a593Smuzhiyun 				 GFP_KERNEL);
378*4882a593Smuzhiyun 	if (!buf->area)
379*4882a593Smuzhiyun 		return -ENOMEM;
380*4882a593Smuzhiyun 	buf->bytes = size;
381*4882a593Smuzhiyun 	return 0;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun 
bcm63xx_soc_pcm_new(struct snd_soc_component * component,struct snd_soc_pcm_runtime * rtd)384*4882a593Smuzhiyun static int bcm63xx_soc_pcm_new(struct snd_soc_component *component,
385*4882a593Smuzhiyun 		struct snd_soc_pcm_runtime *rtd)
386*4882a593Smuzhiyun {
387*4882a593Smuzhiyun 	struct snd_pcm *pcm = rtd->pcm;
388*4882a593Smuzhiyun 	struct bcm_i2s_priv *i2s_priv;
389*4882a593Smuzhiyun 	int ret;
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	i2s_priv = dev_get_drvdata(asoc_rtd_to_cpu(rtd, 0)->dev);
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	of_dma_configure(pcm->card->dev, pcm->card->dev->of_node, 1);
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	ret = dma_coerce_mask_and_coherent(pcm->card->dev, DMA_BIT_MASK(32));
396*4882a593Smuzhiyun 	if (ret)
397*4882a593Smuzhiyun 		goto out;
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
400*4882a593Smuzhiyun 		ret = bcm63xx_pcm_preallocate_dma_buffer(pcm,
401*4882a593Smuzhiyun 						 SNDRV_PCM_STREAM_PLAYBACK);
402*4882a593Smuzhiyun 		if (ret)
403*4882a593Smuzhiyun 			goto out;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 		i2s_priv->play_substream =
406*4882a593Smuzhiyun 			pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
407*4882a593Smuzhiyun 	}
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
410*4882a593Smuzhiyun 		ret = bcm63xx_pcm_preallocate_dma_buffer(pcm,
411*4882a593Smuzhiyun 					SNDRV_PCM_STREAM_CAPTURE);
412*4882a593Smuzhiyun 		if (ret)
413*4882a593Smuzhiyun 			goto out;
414*4882a593Smuzhiyun 		i2s_priv->capture_substream =
415*4882a593Smuzhiyun 			pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
416*4882a593Smuzhiyun 	}
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun out:
419*4882a593Smuzhiyun 	return ret;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun 
bcm63xx_pcm_free_dma_buffers(struct snd_soc_component * component,struct snd_pcm * pcm)422*4882a593Smuzhiyun static void bcm63xx_pcm_free_dma_buffers(struct snd_soc_component *component,
423*4882a593Smuzhiyun 			 struct snd_pcm *pcm)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun 	int stream;
426*4882a593Smuzhiyun 	struct snd_dma_buffer *buf;
427*4882a593Smuzhiyun 	struct snd_pcm_substream *substream;
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	for (stream = 0; stream < 2; stream++) {
430*4882a593Smuzhiyun 		substream = pcm->streams[stream].substream;
431*4882a593Smuzhiyun 		if (!substream)
432*4882a593Smuzhiyun 			continue;
433*4882a593Smuzhiyun 		buf = &substream->dma_buffer;
434*4882a593Smuzhiyun 		if (!buf->area)
435*4882a593Smuzhiyun 			continue;
436*4882a593Smuzhiyun 		dma_free_wc(pcm->card->dev, buf->bytes,
437*4882a593Smuzhiyun 					buf->area, buf->addr);
438*4882a593Smuzhiyun 		buf->area = NULL;
439*4882a593Smuzhiyun 	}
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun static const struct snd_soc_component_driver bcm63xx_soc_platform = {
443*4882a593Smuzhiyun 	.open = bcm63xx_pcm_open,
444*4882a593Smuzhiyun 	.close = bcm63xx_pcm_close,
445*4882a593Smuzhiyun 	.hw_params = bcm63xx_pcm_hw_params,
446*4882a593Smuzhiyun 	.hw_free = bcm63xx_pcm_hw_free,
447*4882a593Smuzhiyun 	.prepare = bcm63xx_pcm_prepare,
448*4882a593Smuzhiyun 	.trigger = bcm63xx_pcm_trigger,
449*4882a593Smuzhiyun 	.pointer = bcm63xx_pcm_pointer,
450*4882a593Smuzhiyun 	.mmap = bcm63xx_pcm_mmap,
451*4882a593Smuzhiyun 	.pcm_construct = bcm63xx_soc_pcm_new,
452*4882a593Smuzhiyun 	.pcm_destruct = bcm63xx_pcm_free_dma_buffers,
453*4882a593Smuzhiyun };
454*4882a593Smuzhiyun 
bcm63xx_soc_platform_probe(struct platform_device * pdev,struct bcm_i2s_priv * i2s_priv)455*4882a593Smuzhiyun int bcm63xx_soc_platform_probe(struct platform_device *pdev,
456*4882a593Smuzhiyun 			       struct bcm_i2s_priv *i2s_priv)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun 	int ret;
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	i2s_priv->r_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
461*4882a593Smuzhiyun 	if (!i2s_priv->r_irq) {
462*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Unable to get register irq resource.\n");
463*4882a593Smuzhiyun 		return -ENODEV;
464*4882a593Smuzhiyun 	}
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	ret = devm_request_irq(&pdev->dev, i2s_priv->r_irq->start, i2s_dma_isr,
467*4882a593Smuzhiyun 			i2s_priv->r_irq->flags, "i2s_dma", (void *)i2s_priv);
468*4882a593Smuzhiyun 	if (ret) {
469*4882a593Smuzhiyun 		dev_err(&pdev->dev,
470*4882a593Smuzhiyun 			"i2s_init: failed to request interrupt.ret=%d\n", ret);
471*4882a593Smuzhiyun 		return ret;
472*4882a593Smuzhiyun 	}
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	return devm_snd_soc_register_component(&pdev->dev,
475*4882a593Smuzhiyun 					&bcm63xx_soc_platform, NULL, 0);
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun 
bcm63xx_soc_platform_remove(struct platform_device * pdev)478*4882a593Smuzhiyun int bcm63xx_soc_platform_remove(struct platform_device *pdev)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun 	return 0;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun MODULE_AUTHOR("Kevin,Li <kevin-ke.li@broadcom.com>");
484*4882a593Smuzhiyun MODULE_DESCRIPTION("Broadcom DSL XPON ASOC PCM Interface");
485*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
486