1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Au12x0/Au1550 PSC ALSA ASoC audio support.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
6*4882a593Smuzhiyun * Manuel Lauss <manuel.lauss@gmail.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Au1xxx-PSC I2S glue.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * NOTE: so far only PSC slave mode (bit- and frameclock) is supported.
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/suspend.h>
17*4882a593Smuzhiyun #include <sound/core.h>
18*4882a593Smuzhiyun #include <sound/pcm.h>
19*4882a593Smuzhiyun #include <sound/initval.h>
20*4882a593Smuzhiyun #include <sound/soc.h>
21*4882a593Smuzhiyun #include <asm/mach-au1x00/au1000.h>
22*4882a593Smuzhiyun #include <asm/mach-au1x00/au1xxx_psc.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include "psc.h"
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* supported I2S DAI hardware formats */
27*4882a593Smuzhiyun #define AU1XPSC_I2S_DAIFMT \
28*4882a593Smuzhiyun (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | \
29*4882a593Smuzhiyun SND_SOC_DAIFMT_NB_NF)
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /* supported I2S direction */
32*4882a593Smuzhiyun #define AU1XPSC_I2S_DIR \
33*4882a593Smuzhiyun (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define AU1XPSC_I2S_RATES \
36*4882a593Smuzhiyun SNDRV_PCM_RATE_8000_192000
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #define AU1XPSC_I2S_FMTS \
39*4882a593Smuzhiyun (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #define I2SSTAT_BUSY(stype) \
42*4882a593Smuzhiyun ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SSTAT_TB : PSC_I2SSTAT_RB)
43*4882a593Smuzhiyun #define I2SPCR_START(stype) \
44*4882a593Smuzhiyun ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TS : PSC_I2SPCR_RS)
45*4882a593Smuzhiyun #define I2SPCR_STOP(stype) \
46*4882a593Smuzhiyun ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TP : PSC_I2SPCR_RP)
47*4882a593Smuzhiyun #define I2SPCR_CLRFIFO(stype) \
48*4882a593Smuzhiyun ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TC : PSC_I2SPCR_RC)
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun
au1xpsc_i2s_set_fmt(struct snd_soc_dai * cpu_dai,unsigned int fmt)51*4882a593Smuzhiyun static int au1xpsc_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
52*4882a593Smuzhiyun unsigned int fmt)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(cpu_dai);
55*4882a593Smuzhiyun unsigned long ct;
56*4882a593Smuzhiyun int ret;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun ret = -EINVAL;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun ct = pscdata->cfg;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun ct &= ~(PSC_I2SCFG_XM | PSC_I2SCFG_MLJ); /* left-justified */
63*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
64*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
65*4882a593Smuzhiyun ct |= PSC_I2SCFG_XM; /* enable I2S mode */
66*4882a593Smuzhiyun break;
67*4882a593Smuzhiyun case SND_SOC_DAIFMT_MSB:
68*4882a593Smuzhiyun break;
69*4882a593Smuzhiyun case SND_SOC_DAIFMT_LSB:
70*4882a593Smuzhiyun ct |= PSC_I2SCFG_MLJ; /* LSB (right-) justified */
71*4882a593Smuzhiyun break;
72*4882a593Smuzhiyun default:
73*4882a593Smuzhiyun goto out;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun ct &= ~(PSC_I2SCFG_BI | PSC_I2SCFG_WI); /* IB-IF */
77*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
78*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_NF:
79*4882a593Smuzhiyun ct |= PSC_I2SCFG_BI | PSC_I2SCFG_WI;
80*4882a593Smuzhiyun break;
81*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_IF:
82*4882a593Smuzhiyun ct |= PSC_I2SCFG_BI;
83*4882a593Smuzhiyun break;
84*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_NF:
85*4882a593Smuzhiyun ct |= PSC_I2SCFG_WI;
86*4882a593Smuzhiyun break;
87*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_IF:
88*4882a593Smuzhiyun break;
89*4882a593Smuzhiyun default:
90*4882a593Smuzhiyun goto out;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
94*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFM: /* CODEC master */
95*4882a593Smuzhiyun ct |= PSC_I2SCFG_MS; /* PSC I2S slave mode */
96*4882a593Smuzhiyun break;
97*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFS: /* CODEC slave */
98*4882a593Smuzhiyun ct &= ~PSC_I2SCFG_MS; /* PSC I2S Master mode */
99*4882a593Smuzhiyun break;
100*4882a593Smuzhiyun default:
101*4882a593Smuzhiyun goto out;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun pscdata->cfg = ct;
105*4882a593Smuzhiyun ret = 0;
106*4882a593Smuzhiyun out:
107*4882a593Smuzhiyun return ret;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
au1xpsc_i2s_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)110*4882a593Smuzhiyun static int au1xpsc_i2s_hw_params(struct snd_pcm_substream *substream,
111*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
112*4882a593Smuzhiyun struct snd_soc_dai *dai)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun int cfgbits;
117*4882a593Smuzhiyun unsigned long stat;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /* check if the PSC is already streaming data */
120*4882a593Smuzhiyun stat = __raw_readl(I2S_STAT(pscdata));
121*4882a593Smuzhiyun if (stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB)) {
122*4882a593Smuzhiyun /* reject parameters not currently set up in hardware */
123*4882a593Smuzhiyun cfgbits = __raw_readl(I2S_CFG(pscdata));
124*4882a593Smuzhiyun if ((PSC_I2SCFG_GET_LEN(cfgbits) != params->msbits) ||
125*4882a593Smuzhiyun (params_rate(params) != pscdata->rate))
126*4882a593Smuzhiyun return -EINVAL;
127*4882a593Smuzhiyun } else {
128*4882a593Smuzhiyun /* set sample bitdepth */
129*4882a593Smuzhiyun pscdata->cfg &= ~(0x1f << 4);
130*4882a593Smuzhiyun pscdata->cfg |= PSC_I2SCFG_SET_LEN(params->msbits);
131*4882a593Smuzhiyun /* remember current rate for other stream */
132*4882a593Smuzhiyun pscdata->rate = params_rate(params);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun return 0;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /* Configure PSC late: on my devel systems the codec is I2S master and
138*4882a593Smuzhiyun * supplies the i2sbitclock __AND__ i2sMclk (!) to the PSC unit. ASoC
139*4882a593Smuzhiyun * uses aggressive PM and switches the codec off when it is not in use
140*4882a593Smuzhiyun * which also means the PSC unit doesn't get any clocks and is therefore
141*4882a593Smuzhiyun * dead. That's why this chunk here gets called from the trigger callback
142*4882a593Smuzhiyun * because I can be reasonably certain the codec is driving the clocks.
143*4882a593Smuzhiyun */
au1xpsc_i2s_configure(struct au1xpsc_audio_data * pscdata)144*4882a593Smuzhiyun static int au1xpsc_i2s_configure(struct au1xpsc_audio_data *pscdata)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun unsigned long tmo;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun /* bring PSC out of sleep, and configure I2S unit */
149*4882a593Smuzhiyun __raw_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
150*4882a593Smuzhiyun wmb(); /* drain writebuffer */
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun tmo = 1000000;
153*4882a593Smuzhiyun while (!(__raw_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_SR) && tmo)
154*4882a593Smuzhiyun tmo--;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun if (!tmo)
157*4882a593Smuzhiyun goto psc_err;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun __raw_writel(0, I2S_CFG(pscdata));
160*4882a593Smuzhiyun wmb(); /* drain writebuffer */
161*4882a593Smuzhiyun __raw_writel(pscdata->cfg | PSC_I2SCFG_DE_ENABLE, I2S_CFG(pscdata));
162*4882a593Smuzhiyun wmb(); /* drain writebuffer */
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun /* wait for I2S controller to become ready */
165*4882a593Smuzhiyun tmo = 1000000;
166*4882a593Smuzhiyun while (!(__raw_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_DR) && tmo)
167*4882a593Smuzhiyun tmo--;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun if (tmo)
170*4882a593Smuzhiyun return 0;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun psc_err:
173*4882a593Smuzhiyun __raw_writel(0, I2S_CFG(pscdata));
174*4882a593Smuzhiyun __raw_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
175*4882a593Smuzhiyun wmb(); /* drain writebuffer */
176*4882a593Smuzhiyun return -ETIMEDOUT;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
au1xpsc_i2s_start(struct au1xpsc_audio_data * pscdata,int stype)179*4882a593Smuzhiyun static int au1xpsc_i2s_start(struct au1xpsc_audio_data *pscdata, int stype)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun unsigned long tmo, stat;
182*4882a593Smuzhiyun int ret;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun ret = 0;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /* if both TX and RX are idle, configure the PSC */
187*4882a593Smuzhiyun stat = __raw_readl(I2S_STAT(pscdata));
188*4882a593Smuzhiyun if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
189*4882a593Smuzhiyun ret = au1xpsc_i2s_configure(pscdata);
190*4882a593Smuzhiyun if (ret)
191*4882a593Smuzhiyun goto out;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun __raw_writel(I2SPCR_CLRFIFO(stype), I2S_PCR(pscdata));
195*4882a593Smuzhiyun wmb(); /* drain writebuffer */
196*4882a593Smuzhiyun __raw_writel(I2SPCR_START(stype), I2S_PCR(pscdata));
197*4882a593Smuzhiyun wmb(); /* drain writebuffer */
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /* wait for start confirmation */
200*4882a593Smuzhiyun tmo = 1000000;
201*4882a593Smuzhiyun while (!(__raw_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
202*4882a593Smuzhiyun tmo--;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun if (!tmo) {
205*4882a593Smuzhiyun __raw_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
206*4882a593Smuzhiyun wmb(); /* drain writebuffer */
207*4882a593Smuzhiyun ret = -ETIMEDOUT;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun out:
210*4882a593Smuzhiyun return ret;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
au1xpsc_i2s_stop(struct au1xpsc_audio_data * pscdata,int stype)213*4882a593Smuzhiyun static int au1xpsc_i2s_stop(struct au1xpsc_audio_data *pscdata, int stype)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun unsigned long tmo, stat;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun __raw_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
218*4882a593Smuzhiyun wmb(); /* drain writebuffer */
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun /* wait for stop confirmation */
221*4882a593Smuzhiyun tmo = 1000000;
222*4882a593Smuzhiyun while ((__raw_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
223*4882a593Smuzhiyun tmo--;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* if both TX and RX are idle, disable PSC */
226*4882a593Smuzhiyun stat = __raw_readl(I2S_STAT(pscdata));
227*4882a593Smuzhiyun if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
228*4882a593Smuzhiyun __raw_writel(0, I2S_CFG(pscdata));
229*4882a593Smuzhiyun wmb(); /* drain writebuffer */
230*4882a593Smuzhiyun __raw_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
231*4882a593Smuzhiyun wmb(); /* drain writebuffer */
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun return 0;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
au1xpsc_i2s_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)236*4882a593Smuzhiyun static int au1xpsc_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
237*4882a593Smuzhiyun struct snd_soc_dai *dai)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
240*4882a593Smuzhiyun int ret, stype = substream->stream;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun switch (cmd) {
243*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_START:
244*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_RESUME:
245*4882a593Smuzhiyun ret = au1xpsc_i2s_start(pscdata, stype);
246*4882a593Smuzhiyun break;
247*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_STOP:
248*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_SUSPEND:
249*4882a593Smuzhiyun ret = au1xpsc_i2s_stop(pscdata, stype);
250*4882a593Smuzhiyun break;
251*4882a593Smuzhiyun default:
252*4882a593Smuzhiyun ret = -EINVAL;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun return ret;
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
au1xpsc_i2s_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)257*4882a593Smuzhiyun static int au1xpsc_i2s_startup(struct snd_pcm_substream *substream,
258*4882a593Smuzhiyun struct snd_soc_dai *dai)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
261*4882a593Smuzhiyun snd_soc_dai_set_dma_data(dai, substream, &pscdata->dmaids[0]);
262*4882a593Smuzhiyun return 0;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun static const struct snd_soc_dai_ops au1xpsc_i2s_dai_ops = {
266*4882a593Smuzhiyun .startup = au1xpsc_i2s_startup,
267*4882a593Smuzhiyun .trigger = au1xpsc_i2s_trigger,
268*4882a593Smuzhiyun .hw_params = au1xpsc_i2s_hw_params,
269*4882a593Smuzhiyun .set_fmt = au1xpsc_i2s_set_fmt,
270*4882a593Smuzhiyun };
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun static const struct snd_soc_dai_driver au1xpsc_i2s_dai_template = {
273*4882a593Smuzhiyun .playback = {
274*4882a593Smuzhiyun .rates = AU1XPSC_I2S_RATES,
275*4882a593Smuzhiyun .formats = AU1XPSC_I2S_FMTS,
276*4882a593Smuzhiyun .channels_min = 2,
277*4882a593Smuzhiyun .channels_max = 8, /* 2 without external help */
278*4882a593Smuzhiyun },
279*4882a593Smuzhiyun .capture = {
280*4882a593Smuzhiyun .rates = AU1XPSC_I2S_RATES,
281*4882a593Smuzhiyun .formats = AU1XPSC_I2S_FMTS,
282*4882a593Smuzhiyun .channels_min = 2,
283*4882a593Smuzhiyun .channels_max = 8, /* 2 without external help */
284*4882a593Smuzhiyun },
285*4882a593Smuzhiyun .ops = &au1xpsc_i2s_dai_ops,
286*4882a593Smuzhiyun };
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun static const struct snd_soc_component_driver au1xpsc_i2s_component = {
289*4882a593Smuzhiyun .name = "au1xpsc-i2s",
290*4882a593Smuzhiyun };
291*4882a593Smuzhiyun
au1xpsc_i2s_drvprobe(struct platform_device * pdev)292*4882a593Smuzhiyun static int au1xpsc_i2s_drvprobe(struct platform_device *pdev)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun struct resource *dmares;
295*4882a593Smuzhiyun unsigned long sel;
296*4882a593Smuzhiyun struct au1xpsc_audio_data *wd;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun wd = devm_kzalloc(&pdev->dev, sizeof(struct au1xpsc_audio_data),
299*4882a593Smuzhiyun GFP_KERNEL);
300*4882a593Smuzhiyun if (!wd)
301*4882a593Smuzhiyun return -ENOMEM;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun wd->mmio = devm_platform_ioremap_resource(pdev, 0);
304*4882a593Smuzhiyun if (IS_ERR(wd->mmio))
305*4882a593Smuzhiyun return PTR_ERR(wd->mmio);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
308*4882a593Smuzhiyun if (!dmares)
309*4882a593Smuzhiyun return -EBUSY;
310*4882a593Smuzhiyun wd->dmaids[SNDRV_PCM_STREAM_PLAYBACK] = dmares->start;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun dmares = platform_get_resource(pdev, IORESOURCE_DMA, 1);
313*4882a593Smuzhiyun if (!dmares)
314*4882a593Smuzhiyun return -EBUSY;
315*4882a593Smuzhiyun wd->dmaids[SNDRV_PCM_STREAM_CAPTURE] = dmares->start;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun /* preserve PSC clock source set up by platform (dev.platform_data
318*4882a593Smuzhiyun * is already occupied by soc layer)
319*4882a593Smuzhiyun */
320*4882a593Smuzhiyun sel = __raw_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
321*4882a593Smuzhiyun __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
322*4882a593Smuzhiyun wmb(); /* drain writebuffer */
323*4882a593Smuzhiyun __raw_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(wd));
324*4882a593Smuzhiyun __raw_writel(0, I2S_CFG(wd));
325*4882a593Smuzhiyun wmb(); /* drain writebuffer */
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun /* preconfigure: set max rx/tx fifo depths */
328*4882a593Smuzhiyun wd->cfg |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun /* don't wait for I2S core to become ready now; clocks may not
331*4882a593Smuzhiyun * be running yet; depending on clock input for PSC a wait might
332*4882a593Smuzhiyun * time out.
333*4882a593Smuzhiyun */
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun /* name the DAI like this device instance ("au1xpsc-i2s.PSCINDEX") */
336*4882a593Smuzhiyun memcpy(&wd->dai_drv, &au1xpsc_i2s_dai_template,
337*4882a593Smuzhiyun sizeof(struct snd_soc_dai_driver));
338*4882a593Smuzhiyun wd->dai_drv.name = dev_name(&pdev->dev);
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun platform_set_drvdata(pdev, wd);
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun return devm_snd_soc_register_component(&pdev->dev,
343*4882a593Smuzhiyun &au1xpsc_i2s_component, &wd->dai_drv, 1);
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
au1xpsc_i2s_drvremove(struct platform_device * pdev)346*4882a593Smuzhiyun static int au1xpsc_i2s_drvremove(struct platform_device *pdev)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev);
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun __raw_writel(0, I2S_CFG(wd));
351*4882a593Smuzhiyun wmb(); /* drain writebuffer */
352*4882a593Smuzhiyun __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
353*4882a593Smuzhiyun wmb(); /* drain writebuffer */
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun return 0;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun #ifdef CONFIG_PM
au1xpsc_i2s_drvsuspend(struct device * dev)359*4882a593Smuzhiyun static int au1xpsc_i2s_drvsuspend(struct device *dev)
360*4882a593Smuzhiyun {
361*4882a593Smuzhiyun struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun /* save interesting register and disable PSC */
364*4882a593Smuzhiyun wd->pm[0] = __raw_readl(PSC_SEL(wd));
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun __raw_writel(0, I2S_CFG(wd));
367*4882a593Smuzhiyun wmb(); /* drain writebuffer */
368*4882a593Smuzhiyun __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
369*4882a593Smuzhiyun wmb(); /* drain writebuffer */
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun return 0;
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun
au1xpsc_i2s_drvresume(struct device * dev)374*4882a593Smuzhiyun static int au1xpsc_i2s_drvresume(struct device *dev)
375*4882a593Smuzhiyun {
376*4882a593Smuzhiyun struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun /* select I2S mode and PSC clock */
379*4882a593Smuzhiyun __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
380*4882a593Smuzhiyun wmb(); /* drain writebuffer */
381*4882a593Smuzhiyun __raw_writel(0, PSC_SEL(wd));
382*4882a593Smuzhiyun wmb(); /* drain writebuffer */
383*4882a593Smuzhiyun __raw_writel(wd->pm[0], PSC_SEL(wd));
384*4882a593Smuzhiyun wmb(); /* drain writebuffer */
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun return 0;
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun static const struct dev_pm_ops au1xpsci2s_pmops = {
390*4882a593Smuzhiyun .suspend = au1xpsc_i2s_drvsuspend,
391*4882a593Smuzhiyun .resume = au1xpsc_i2s_drvresume,
392*4882a593Smuzhiyun };
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun #define AU1XPSCI2S_PMOPS &au1xpsci2s_pmops
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun #else
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun #define AU1XPSCI2S_PMOPS NULL
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun #endif
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun static struct platform_driver au1xpsc_i2s_driver = {
403*4882a593Smuzhiyun .driver = {
404*4882a593Smuzhiyun .name = "au1xpsc_i2s",
405*4882a593Smuzhiyun .pm = AU1XPSCI2S_PMOPS,
406*4882a593Smuzhiyun },
407*4882a593Smuzhiyun .probe = au1xpsc_i2s_drvprobe,
408*4882a593Smuzhiyun .remove = au1xpsc_i2s_drvremove,
409*4882a593Smuzhiyun };
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun module_platform_driver(au1xpsc_i2s_driver);
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun MODULE_LICENSE("GPL");
414*4882a593Smuzhiyun MODULE_DESCRIPTION("Au12x0/Au1550 PSC I2S ALSA ASoC audio driver");
415*4882a593Smuzhiyun MODULE_AUTHOR("Manuel Lauss");
416