xref: /OK3568_Linux_fs/kernel/sound/soc/au1x/dbdma2.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Au12x0/Au1550 PSC ALSA ASoC audio support.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
6*4882a593Smuzhiyun  *	Manuel Lauss <manuel.lauss@gmail.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * DMA glue for Au1x-PSC audio.
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/dma-mapping.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <sound/core.h>
19*4882a593Smuzhiyun #include <sound/pcm.h>
20*4882a593Smuzhiyun #include <sound/pcm_params.h>
21*4882a593Smuzhiyun #include <sound/soc.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include <asm/mach-au1x00/au1000.h>
24*4882a593Smuzhiyun #include <asm/mach-au1x00/au1xxx_dbdma.h>
25*4882a593Smuzhiyun #include <asm/mach-au1x00/au1xxx_psc.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include "psc.h"
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /*#define PCM_DEBUG*/
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define DRV_NAME "dbdma2"
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define MSG(x...)	printk(KERN_INFO "au1xpsc_pcm: " x)
34*4882a593Smuzhiyun #ifdef PCM_DEBUG
35*4882a593Smuzhiyun #define DBG		MSG
36*4882a593Smuzhiyun #else
37*4882a593Smuzhiyun #define DBG(x...)	do {} while (0)
38*4882a593Smuzhiyun #endif
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun struct au1xpsc_audio_dmadata {
41*4882a593Smuzhiyun 	/* DDMA control data */
42*4882a593Smuzhiyun 	unsigned int ddma_id;		/* DDMA direction ID for this PSC */
43*4882a593Smuzhiyun 	u32 ddma_chan;			/* DDMA context */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	/* PCM context (for irq handlers) */
46*4882a593Smuzhiyun 	struct snd_pcm_substream *substream;
47*4882a593Smuzhiyun 	unsigned long curr_period;	/* current segment DDMA is working on */
48*4882a593Smuzhiyun 	unsigned long q_period;		/* queue period(s) */
49*4882a593Smuzhiyun 	dma_addr_t dma_area;		/* address of queued DMA area */
50*4882a593Smuzhiyun 	dma_addr_t dma_area_s;		/* start address of DMA area */
51*4882a593Smuzhiyun 	unsigned long pos;		/* current byte position being played */
52*4882a593Smuzhiyun 	unsigned long periods;		/* number of SG segments in total */
53*4882a593Smuzhiyun 	unsigned long period_bytes;	/* size in bytes of one SG segment */
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	/* runtime data */
56*4882a593Smuzhiyun 	int msbits;
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /*
60*4882a593Smuzhiyun  * These settings are somewhat okay, at least on my machine audio plays
61*4882a593Smuzhiyun  * almost skip-free. Especially the 64kB buffer seems to help a LOT.
62*4882a593Smuzhiyun  */
63*4882a593Smuzhiyun #define AU1XPSC_PERIOD_MIN_BYTES	1024
64*4882a593Smuzhiyun #define AU1XPSC_BUFFER_MIN_BYTES	65536
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /* PCM hardware DMA capabilities - platform specific */
67*4882a593Smuzhiyun static const struct snd_pcm_hardware au1xpsc_pcm_hardware = {
68*4882a593Smuzhiyun 	.info		  = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
69*4882a593Smuzhiyun 			    SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BATCH,
70*4882a593Smuzhiyun 	.period_bytes_min = AU1XPSC_PERIOD_MIN_BYTES,
71*4882a593Smuzhiyun 	.period_bytes_max = 4096 * 1024 - 1,
72*4882a593Smuzhiyun 	.periods_min	  = 2,
73*4882a593Smuzhiyun 	.periods_max	  = 4096,	/* 2 to as-much-as-you-like */
74*4882a593Smuzhiyun 	.buffer_bytes_max = 4096 * 1024 - 1,
75*4882a593Smuzhiyun 	.fifo_size	  = 16,		/* fifo entries of AC97/I2S PSC */
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun 
au1x_pcm_queue_tx(struct au1xpsc_audio_dmadata * cd)78*4882a593Smuzhiyun static void au1x_pcm_queue_tx(struct au1xpsc_audio_dmadata *cd)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	au1xxx_dbdma_put_source(cd->ddma_chan, cd->dma_area,
81*4882a593Smuzhiyun 				cd->period_bytes, DDMA_FLAGS_IE);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	/* update next-to-queue period */
84*4882a593Smuzhiyun 	++cd->q_period;
85*4882a593Smuzhiyun 	cd->dma_area += cd->period_bytes;
86*4882a593Smuzhiyun 	if (cd->q_period >= cd->periods) {
87*4882a593Smuzhiyun 		cd->q_period = 0;
88*4882a593Smuzhiyun 		cd->dma_area = cd->dma_area_s;
89*4882a593Smuzhiyun 	}
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun 
au1x_pcm_queue_rx(struct au1xpsc_audio_dmadata * cd)92*4882a593Smuzhiyun static void au1x_pcm_queue_rx(struct au1xpsc_audio_dmadata *cd)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	au1xxx_dbdma_put_dest(cd->ddma_chan, cd->dma_area,
95*4882a593Smuzhiyun 			      cd->period_bytes, DDMA_FLAGS_IE);
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	/* update next-to-queue period */
98*4882a593Smuzhiyun 	++cd->q_period;
99*4882a593Smuzhiyun 	cd->dma_area += cd->period_bytes;
100*4882a593Smuzhiyun 	if (cd->q_period >= cd->periods) {
101*4882a593Smuzhiyun 		cd->q_period = 0;
102*4882a593Smuzhiyun 		cd->dma_area = cd->dma_area_s;
103*4882a593Smuzhiyun 	}
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun 
au1x_pcm_dmatx_cb(int irq,void * dev_id)106*4882a593Smuzhiyun static void au1x_pcm_dmatx_cb(int irq, void *dev_id)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun 	struct au1xpsc_audio_dmadata *cd = dev_id;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	cd->pos += cd->period_bytes;
111*4882a593Smuzhiyun 	if (++cd->curr_period >= cd->periods) {
112*4882a593Smuzhiyun 		cd->pos = 0;
113*4882a593Smuzhiyun 		cd->curr_period = 0;
114*4882a593Smuzhiyun 	}
115*4882a593Smuzhiyun 	snd_pcm_period_elapsed(cd->substream);
116*4882a593Smuzhiyun 	au1x_pcm_queue_tx(cd);
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
au1x_pcm_dmarx_cb(int irq,void * dev_id)119*4882a593Smuzhiyun static void au1x_pcm_dmarx_cb(int irq, void *dev_id)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	struct au1xpsc_audio_dmadata *cd = dev_id;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	cd->pos += cd->period_bytes;
124*4882a593Smuzhiyun 	if (++cd->curr_period >= cd->periods) {
125*4882a593Smuzhiyun 		cd->pos = 0;
126*4882a593Smuzhiyun 		cd->curr_period = 0;
127*4882a593Smuzhiyun 	}
128*4882a593Smuzhiyun 	snd_pcm_period_elapsed(cd->substream);
129*4882a593Smuzhiyun 	au1x_pcm_queue_rx(cd);
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun 
au1x_pcm_dbdma_free(struct au1xpsc_audio_dmadata * pcd)132*4882a593Smuzhiyun static void au1x_pcm_dbdma_free(struct au1xpsc_audio_dmadata *pcd)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	if (pcd->ddma_chan) {
135*4882a593Smuzhiyun 		au1xxx_dbdma_stop(pcd->ddma_chan);
136*4882a593Smuzhiyun 		au1xxx_dbdma_reset(pcd->ddma_chan);
137*4882a593Smuzhiyun 		au1xxx_dbdma_chan_free(pcd->ddma_chan);
138*4882a593Smuzhiyun 		pcd->ddma_chan = 0;
139*4882a593Smuzhiyun 		pcd->msbits = 0;
140*4882a593Smuzhiyun 	}
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun /* in case of missing DMA ring or changed TX-source / RX-dest bit widths,
144*4882a593Smuzhiyun  * allocate (or reallocate) a 2-descriptor DMA ring with bit depth according
145*4882a593Smuzhiyun  * to ALSA-supplied sample depth.  This is due to limitations in the dbdma api
146*4882a593Smuzhiyun  * (cannot adjust source/dest widths of already allocated descriptor ring).
147*4882a593Smuzhiyun  */
au1x_pcm_dbdma_realloc(struct au1xpsc_audio_dmadata * pcd,int stype,int msbits)148*4882a593Smuzhiyun static int au1x_pcm_dbdma_realloc(struct au1xpsc_audio_dmadata *pcd,
149*4882a593Smuzhiyun 				 int stype, int msbits)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun 	/* DMA only in 8/16/32 bit widths */
152*4882a593Smuzhiyun 	if (msbits == 24)
153*4882a593Smuzhiyun 		msbits = 32;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	/* check current config: correct bits and descriptors allocated? */
156*4882a593Smuzhiyun 	if ((pcd->ddma_chan) && (msbits == pcd->msbits))
157*4882a593Smuzhiyun 		goto out;	/* all ok! */
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	au1x_pcm_dbdma_free(pcd);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	if (stype == SNDRV_PCM_STREAM_CAPTURE)
162*4882a593Smuzhiyun 		pcd->ddma_chan = au1xxx_dbdma_chan_alloc(pcd->ddma_id,
163*4882a593Smuzhiyun 					DSCR_CMD0_ALWAYS,
164*4882a593Smuzhiyun 					au1x_pcm_dmarx_cb, (void *)pcd);
165*4882a593Smuzhiyun 	else
166*4882a593Smuzhiyun 		pcd->ddma_chan = au1xxx_dbdma_chan_alloc(DSCR_CMD0_ALWAYS,
167*4882a593Smuzhiyun 					pcd->ddma_id,
168*4882a593Smuzhiyun 					au1x_pcm_dmatx_cb, (void *)pcd);
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	if (!pcd->ddma_chan)
171*4882a593Smuzhiyun 		return -ENOMEM;
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	au1xxx_dbdma_set_devwidth(pcd->ddma_chan, msbits);
174*4882a593Smuzhiyun 	au1xxx_dbdma_ring_alloc(pcd->ddma_chan, 2);
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	pcd->msbits = msbits;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	au1xxx_dbdma_stop(pcd->ddma_chan);
179*4882a593Smuzhiyun 	au1xxx_dbdma_reset(pcd->ddma_chan);
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun out:
182*4882a593Smuzhiyun 	return 0;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun 
to_dmadata(struct snd_pcm_substream * ss,struct snd_soc_component * component)185*4882a593Smuzhiyun static inline struct au1xpsc_audio_dmadata *to_dmadata(struct snd_pcm_substream *ss,
186*4882a593Smuzhiyun 						       struct snd_soc_component *component)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun 	struct au1xpsc_audio_dmadata *pcd = snd_soc_component_get_drvdata(component);
189*4882a593Smuzhiyun 	return &pcd[ss->stream];
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun 
au1xpsc_pcm_hw_params(struct snd_soc_component * component,struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)192*4882a593Smuzhiyun static int au1xpsc_pcm_hw_params(struct snd_soc_component *component,
193*4882a593Smuzhiyun 				 struct snd_pcm_substream *substream,
194*4882a593Smuzhiyun 				 struct snd_pcm_hw_params *params)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
197*4882a593Smuzhiyun 	struct au1xpsc_audio_dmadata *pcd;
198*4882a593Smuzhiyun 	int stype, ret;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	stype = substream->stream;
201*4882a593Smuzhiyun 	pcd = to_dmadata(substream, component);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	DBG("runtime->dma_area = 0x%08lx dma_addr_t = 0x%08lx dma_size = %zu "
204*4882a593Smuzhiyun 	    "runtime->min_align %lu\n",
205*4882a593Smuzhiyun 		(unsigned long)runtime->dma_area,
206*4882a593Smuzhiyun 		(unsigned long)runtime->dma_addr, runtime->dma_bytes,
207*4882a593Smuzhiyun 		runtime->min_align);
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	DBG("bits %d  frags %d  frag_bytes %d  is_rx %d\n", params->msbits,
210*4882a593Smuzhiyun 		params_periods(params), params_period_bytes(params), stype);
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	ret = au1x_pcm_dbdma_realloc(pcd, stype, params->msbits);
213*4882a593Smuzhiyun 	if (ret) {
214*4882a593Smuzhiyun 		MSG("DDMA channel (re)alloc failed!\n");
215*4882a593Smuzhiyun 		goto out;
216*4882a593Smuzhiyun 	}
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	pcd->substream = substream;
219*4882a593Smuzhiyun 	pcd->period_bytes = params_period_bytes(params);
220*4882a593Smuzhiyun 	pcd->periods = params_periods(params);
221*4882a593Smuzhiyun 	pcd->dma_area_s = pcd->dma_area = runtime->dma_addr;
222*4882a593Smuzhiyun 	pcd->q_period = 0;
223*4882a593Smuzhiyun 	pcd->curr_period = 0;
224*4882a593Smuzhiyun 	pcd->pos = 0;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	ret = 0;
227*4882a593Smuzhiyun out:
228*4882a593Smuzhiyun 	return ret;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun 
au1xpsc_pcm_prepare(struct snd_soc_component * component,struct snd_pcm_substream * substream)231*4882a593Smuzhiyun static int au1xpsc_pcm_prepare(struct snd_soc_component *component,
232*4882a593Smuzhiyun 			       struct snd_pcm_substream *substream)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun 	struct au1xpsc_audio_dmadata *pcd = to_dmadata(substream, component);
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	au1xxx_dbdma_reset(pcd->ddma_chan);
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
239*4882a593Smuzhiyun 		au1x_pcm_queue_rx(pcd);
240*4882a593Smuzhiyun 		au1x_pcm_queue_rx(pcd);
241*4882a593Smuzhiyun 	} else {
242*4882a593Smuzhiyun 		au1x_pcm_queue_tx(pcd);
243*4882a593Smuzhiyun 		au1x_pcm_queue_tx(pcd);
244*4882a593Smuzhiyun 	}
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	return 0;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun 
au1xpsc_pcm_trigger(struct snd_soc_component * component,struct snd_pcm_substream * substream,int cmd)249*4882a593Smuzhiyun static int au1xpsc_pcm_trigger(struct snd_soc_component *component,
250*4882a593Smuzhiyun 			       struct snd_pcm_substream *substream, int cmd)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	u32 c = to_dmadata(substream, component)->ddma_chan;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	switch (cmd) {
255*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_START:
256*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_RESUME:
257*4882a593Smuzhiyun 		au1xxx_dbdma_start(c);
258*4882a593Smuzhiyun 		break;
259*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_STOP:
260*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_SUSPEND:
261*4882a593Smuzhiyun 		au1xxx_dbdma_stop(c);
262*4882a593Smuzhiyun 		break;
263*4882a593Smuzhiyun 	default:
264*4882a593Smuzhiyun 		return -EINVAL;
265*4882a593Smuzhiyun 	}
266*4882a593Smuzhiyun 	return 0;
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun static snd_pcm_uframes_t
au1xpsc_pcm_pointer(struct snd_soc_component * component,struct snd_pcm_substream * substream)270*4882a593Smuzhiyun au1xpsc_pcm_pointer(struct snd_soc_component *component,
271*4882a593Smuzhiyun 		    struct snd_pcm_substream *substream)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun 	return bytes_to_frames(substream->runtime,
274*4882a593Smuzhiyun 			       to_dmadata(substream, component)->pos);
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun 
au1xpsc_pcm_open(struct snd_soc_component * component,struct snd_pcm_substream * substream)277*4882a593Smuzhiyun static int au1xpsc_pcm_open(struct snd_soc_component *component,
278*4882a593Smuzhiyun 			    struct snd_pcm_substream *substream)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun 	struct au1xpsc_audio_dmadata *pcd = to_dmadata(substream, component);
281*4882a593Smuzhiyun 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
282*4882a593Smuzhiyun 	int stype = substream->stream, *dmaids;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	dmaids = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
285*4882a593Smuzhiyun 	if (!dmaids)
286*4882a593Smuzhiyun 		return -ENODEV;	/* whoa, has ordering changed? */
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	pcd->ddma_id = dmaids[stype];
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	snd_soc_set_runtime_hwparams(substream, &au1xpsc_pcm_hardware);
291*4882a593Smuzhiyun 	return 0;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun 
au1xpsc_pcm_close(struct snd_soc_component * component,struct snd_pcm_substream * substream)294*4882a593Smuzhiyun static int au1xpsc_pcm_close(struct snd_soc_component *component,
295*4882a593Smuzhiyun 			     struct snd_pcm_substream *substream)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun 	au1x_pcm_dbdma_free(to_dmadata(substream, component));
298*4882a593Smuzhiyun 	return 0;
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun 
au1xpsc_pcm_new(struct snd_soc_component * component,struct snd_soc_pcm_runtime * rtd)301*4882a593Smuzhiyun static int au1xpsc_pcm_new(struct snd_soc_component *component,
302*4882a593Smuzhiyun 			   struct snd_soc_pcm_runtime *rtd)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun 	struct snd_card *card = rtd->card->snd_card;
305*4882a593Smuzhiyun 	struct snd_pcm *pcm = rtd->pcm;
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
308*4882a593Smuzhiyun 		card->dev, AU1XPSC_BUFFER_MIN_BYTES, (4096 * 1024) - 1);
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	return 0;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun /* au1xpsc audio platform */
314*4882a593Smuzhiyun static struct snd_soc_component_driver au1xpsc_soc_component = {
315*4882a593Smuzhiyun 	.name		= DRV_NAME,
316*4882a593Smuzhiyun 	.open		= au1xpsc_pcm_open,
317*4882a593Smuzhiyun 	.close		= au1xpsc_pcm_close,
318*4882a593Smuzhiyun 	.hw_params	= au1xpsc_pcm_hw_params,
319*4882a593Smuzhiyun 	.prepare	= au1xpsc_pcm_prepare,
320*4882a593Smuzhiyun 	.trigger	= au1xpsc_pcm_trigger,
321*4882a593Smuzhiyun 	.pointer	= au1xpsc_pcm_pointer,
322*4882a593Smuzhiyun 	.pcm_construct	= au1xpsc_pcm_new,
323*4882a593Smuzhiyun };
324*4882a593Smuzhiyun 
au1xpsc_pcm_drvprobe(struct platform_device * pdev)325*4882a593Smuzhiyun static int au1xpsc_pcm_drvprobe(struct platform_device *pdev)
326*4882a593Smuzhiyun {
327*4882a593Smuzhiyun 	struct au1xpsc_audio_dmadata *dmadata;
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 	dmadata = devm_kcalloc(&pdev->dev,
330*4882a593Smuzhiyun 			       2, sizeof(struct au1xpsc_audio_dmadata),
331*4882a593Smuzhiyun 			       GFP_KERNEL);
332*4882a593Smuzhiyun 	if (!dmadata)
333*4882a593Smuzhiyun 		return -ENOMEM;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	platform_set_drvdata(pdev, dmadata);
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	return devm_snd_soc_register_component(&pdev->dev,
338*4882a593Smuzhiyun 					&au1xpsc_soc_component, NULL, 0);
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun static struct platform_driver au1xpsc_pcm_driver = {
342*4882a593Smuzhiyun 	.driver	= {
343*4882a593Smuzhiyun 		.name	= "au1xpsc-pcm",
344*4882a593Smuzhiyun 	},
345*4882a593Smuzhiyun 	.probe		= au1xpsc_pcm_drvprobe,
346*4882a593Smuzhiyun };
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun module_platform_driver(au1xpsc_pcm_driver);
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun MODULE_LICENSE("GPL");
351*4882a593Smuzhiyun MODULE_DESCRIPTION("Au12x0/Au1550 PSC Audio DMA driver");
352*4882a593Smuzhiyun MODULE_AUTHOR("Manuel Lauss");
353