xref: /OK3568_Linux_fs/kernel/sound/soc/au1x/ac97c.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Au1000/Au1500/Au1100 AC97C controller driver for ASoC
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * (c) 2011 Manuel Lauss <manuel.lauss@googlemail.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * based on the old ALSA driver originally written by
8*4882a593Smuzhiyun  *			Charles Eidsness <charles@cooper-street.com>
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/device.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/mutex.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun #include <linux/suspend.h>
19*4882a593Smuzhiyun #include <sound/core.h>
20*4882a593Smuzhiyun #include <sound/pcm.h>
21*4882a593Smuzhiyun #include <sound/initval.h>
22*4882a593Smuzhiyun #include <sound/soc.h>
23*4882a593Smuzhiyun #include <asm/mach-au1x00/au1000.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include "psc.h"
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun /* register offsets and bits */
28*4882a593Smuzhiyun #define AC97_CONFIG	0x00
29*4882a593Smuzhiyun #define AC97_STATUS	0x04
30*4882a593Smuzhiyun #define AC97_DATA	0x08
31*4882a593Smuzhiyun #define AC97_CMDRESP	0x0c
32*4882a593Smuzhiyun #define AC97_ENABLE	0x10
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define CFG_RC(x)	(((x) & 0x3ff) << 13)	/* valid rx slots mask */
35*4882a593Smuzhiyun #define CFG_XS(x)	(((x) & 0x3ff) << 3)	/* valid tx slots mask */
36*4882a593Smuzhiyun #define CFG_SG		(1 << 2)	/* sync gate */
37*4882a593Smuzhiyun #define CFG_SN		(1 << 1)	/* sync control */
38*4882a593Smuzhiyun #define CFG_RS		(1 << 0)	/* acrst# control */
39*4882a593Smuzhiyun #define STAT_XU		(1 << 11)	/* tx underflow */
40*4882a593Smuzhiyun #define STAT_XO		(1 << 10)	/* tx overflow */
41*4882a593Smuzhiyun #define STAT_RU		(1 << 9)	/* rx underflow */
42*4882a593Smuzhiyun #define STAT_RO		(1 << 8)	/* rx overflow */
43*4882a593Smuzhiyun #define STAT_RD		(1 << 7)	/* codec ready */
44*4882a593Smuzhiyun #define STAT_CP		(1 << 6)	/* command pending */
45*4882a593Smuzhiyun #define STAT_TE		(1 << 4)	/* tx fifo empty */
46*4882a593Smuzhiyun #define STAT_TF		(1 << 3)	/* tx fifo full */
47*4882a593Smuzhiyun #define STAT_RE		(1 << 1)	/* rx fifo empty */
48*4882a593Smuzhiyun #define STAT_RF		(1 << 0)	/* rx fifo full */
49*4882a593Smuzhiyun #define CMD_SET_DATA(x)	(((x) & 0xffff) << 16)
50*4882a593Smuzhiyun #define CMD_GET_DATA(x)	((x) & 0xffff)
51*4882a593Smuzhiyun #define CMD_READ	(1 << 7)
52*4882a593Smuzhiyun #define CMD_WRITE	(0 << 7)
53*4882a593Smuzhiyun #define CMD_IDX(x)	((x) & 0x7f)
54*4882a593Smuzhiyun #define EN_D		(1 << 1)	/* DISable bit */
55*4882a593Smuzhiyun #define EN_CE		(1 << 0)	/* clock enable bit */
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun /* how often to retry failed codec register reads/writes */
58*4882a593Smuzhiyun #define AC97_RW_RETRIES	5
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #define AC97_RATES	\
61*4882a593Smuzhiyun 	SNDRV_PCM_RATE_CONTINUOUS
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #define AC97_FMTS	\
64*4882a593Smuzhiyun 	(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE)
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /* instance data. There can be only one, MacLeod!!!!, fortunately there IS only
67*4882a593Smuzhiyun  * once AC97C on early Alchemy chips. The newer ones aren't so lucky.
68*4882a593Smuzhiyun  */
69*4882a593Smuzhiyun static struct au1xpsc_audio_data *ac97c_workdata;
70*4882a593Smuzhiyun #define ac97_to_ctx(x)		ac97c_workdata
71*4882a593Smuzhiyun 
RD(struct au1xpsc_audio_data * ctx,int reg)72*4882a593Smuzhiyun static inline unsigned long RD(struct au1xpsc_audio_data *ctx, int reg)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	return __raw_readl(ctx->mmio + reg);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun 
WR(struct au1xpsc_audio_data * ctx,int reg,unsigned long v)77*4882a593Smuzhiyun static inline void WR(struct au1xpsc_audio_data *ctx, int reg, unsigned long v)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	__raw_writel(v, ctx->mmio + reg);
80*4882a593Smuzhiyun 	wmb();
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun 
au1xac97c_ac97_read(struct snd_ac97 * ac97,unsigned short r)83*4882a593Smuzhiyun static unsigned short au1xac97c_ac97_read(struct snd_ac97 *ac97,
84*4882a593Smuzhiyun 					  unsigned short r)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	struct au1xpsc_audio_data *ctx = ac97_to_ctx(ac97);
87*4882a593Smuzhiyun 	unsigned int tmo, retry;
88*4882a593Smuzhiyun 	unsigned long data;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	data = ~0;
91*4882a593Smuzhiyun 	retry = AC97_RW_RETRIES;
92*4882a593Smuzhiyun 	do {
93*4882a593Smuzhiyun 		mutex_lock(&ctx->lock);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 		tmo = 6;
96*4882a593Smuzhiyun 		while ((RD(ctx, AC97_STATUS) & STAT_CP) && --tmo)
97*4882a593Smuzhiyun 			udelay(21);	/* wait an ac97 frame time */
98*4882a593Smuzhiyun 		if (!tmo) {
99*4882a593Smuzhiyun 			pr_debug("ac97rd timeout #1\n");
100*4882a593Smuzhiyun 			goto next;
101*4882a593Smuzhiyun 		}
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 		WR(ctx, AC97_CMDRESP, CMD_IDX(r) | CMD_READ);
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 		/* stupid errata: data is only valid for 21us, so
106*4882a593Smuzhiyun 		 * poll, Forrest, poll...
107*4882a593Smuzhiyun 		 */
108*4882a593Smuzhiyun 		tmo = 0x10000;
109*4882a593Smuzhiyun 		while ((RD(ctx, AC97_STATUS) & STAT_CP) && --tmo)
110*4882a593Smuzhiyun 			asm volatile ("nop");
111*4882a593Smuzhiyun 		data = RD(ctx, AC97_CMDRESP);
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 		if (!tmo)
114*4882a593Smuzhiyun 			pr_debug("ac97rd timeout #2\n");
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun next:
117*4882a593Smuzhiyun 		mutex_unlock(&ctx->lock);
118*4882a593Smuzhiyun 	} while (--retry && !tmo);
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	pr_debug("AC97RD %04x %04lx %d\n", r, data, retry);
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	return retry ? data & 0xffff : 0xffff;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun 
au1xac97c_ac97_write(struct snd_ac97 * ac97,unsigned short r,unsigned short v)125*4882a593Smuzhiyun static void au1xac97c_ac97_write(struct snd_ac97 *ac97, unsigned short r,
126*4882a593Smuzhiyun 				 unsigned short v)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	struct au1xpsc_audio_data *ctx = ac97_to_ctx(ac97);
129*4882a593Smuzhiyun 	unsigned int tmo, retry;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	retry = AC97_RW_RETRIES;
132*4882a593Smuzhiyun 	do {
133*4882a593Smuzhiyun 		mutex_lock(&ctx->lock);
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 		for (tmo = 5; (RD(ctx, AC97_STATUS) & STAT_CP) && tmo; tmo--)
136*4882a593Smuzhiyun 			udelay(21);
137*4882a593Smuzhiyun 		if (!tmo) {
138*4882a593Smuzhiyun 			pr_debug("ac97wr timeout #1\n");
139*4882a593Smuzhiyun 			goto next;
140*4882a593Smuzhiyun 		}
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 		WR(ctx, AC97_CMDRESP, CMD_WRITE | CMD_IDX(r) | CMD_SET_DATA(v));
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 		for (tmo = 10; (RD(ctx, AC97_STATUS) & STAT_CP) && tmo; tmo--)
145*4882a593Smuzhiyun 			udelay(21);
146*4882a593Smuzhiyun 		if (!tmo)
147*4882a593Smuzhiyun 			pr_debug("ac97wr timeout #2\n");
148*4882a593Smuzhiyun next:
149*4882a593Smuzhiyun 		mutex_unlock(&ctx->lock);
150*4882a593Smuzhiyun 	} while (--retry && !tmo);
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	pr_debug("AC97WR %04x %04x %d\n", r, v, retry);
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun 
au1xac97c_ac97_warm_reset(struct snd_ac97 * ac97)155*4882a593Smuzhiyun static void au1xac97c_ac97_warm_reset(struct snd_ac97 *ac97)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun 	struct au1xpsc_audio_data *ctx = ac97_to_ctx(ac97);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	WR(ctx, AC97_CONFIG, ctx->cfg | CFG_SG | CFG_SN);
160*4882a593Smuzhiyun 	msleep(20);
161*4882a593Smuzhiyun 	WR(ctx, AC97_CONFIG, ctx->cfg | CFG_SG);
162*4882a593Smuzhiyun 	WR(ctx, AC97_CONFIG, ctx->cfg);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun 
au1xac97c_ac97_cold_reset(struct snd_ac97 * ac97)165*4882a593Smuzhiyun static void au1xac97c_ac97_cold_reset(struct snd_ac97 *ac97)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun 	struct au1xpsc_audio_data *ctx = ac97_to_ctx(ac97);
168*4882a593Smuzhiyun 	int i;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	WR(ctx, AC97_CONFIG, ctx->cfg | CFG_RS);
171*4882a593Smuzhiyun 	msleep(500);
172*4882a593Smuzhiyun 	WR(ctx, AC97_CONFIG, ctx->cfg);
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	/* wait for codec ready */
175*4882a593Smuzhiyun 	i = 50;
176*4882a593Smuzhiyun 	while (((RD(ctx, AC97_STATUS) & STAT_RD) == 0) && --i)
177*4882a593Smuzhiyun 		msleep(20);
178*4882a593Smuzhiyun 	if (!i)
179*4882a593Smuzhiyun 		printk(KERN_ERR "ac97c: codec not ready after cold reset\n");
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun /* AC97 controller operations */
183*4882a593Smuzhiyun static struct snd_ac97_bus_ops ac97c_bus_ops = {
184*4882a593Smuzhiyun 	.read		= au1xac97c_ac97_read,
185*4882a593Smuzhiyun 	.write		= au1xac97c_ac97_write,
186*4882a593Smuzhiyun 	.reset		= au1xac97c_ac97_cold_reset,
187*4882a593Smuzhiyun 	.warm_reset	= au1xac97c_ac97_warm_reset,
188*4882a593Smuzhiyun };
189*4882a593Smuzhiyun 
alchemy_ac97c_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)190*4882a593Smuzhiyun static int alchemy_ac97c_startup(struct snd_pcm_substream *substream,
191*4882a593Smuzhiyun 				 struct snd_soc_dai *dai)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	struct au1xpsc_audio_data *ctx = snd_soc_dai_get_drvdata(dai);
194*4882a593Smuzhiyun 	snd_soc_dai_set_dma_data(dai, substream, &ctx->dmaids[0]);
195*4882a593Smuzhiyun 	return 0;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun static const struct snd_soc_dai_ops alchemy_ac97c_ops = {
199*4882a593Smuzhiyun 	.startup		= alchemy_ac97c_startup,
200*4882a593Smuzhiyun };
201*4882a593Smuzhiyun 
au1xac97c_dai_probe(struct snd_soc_dai * dai)202*4882a593Smuzhiyun static int au1xac97c_dai_probe(struct snd_soc_dai *dai)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun 	return ac97c_workdata ? 0 : -ENODEV;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun static struct snd_soc_dai_driver au1xac97c_dai_driver = {
208*4882a593Smuzhiyun 	.name			= "alchemy-ac97c",
209*4882a593Smuzhiyun 	.probe			= au1xac97c_dai_probe,
210*4882a593Smuzhiyun 	.playback = {
211*4882a593Smuzhiyun 		.rates		= AC97_RATES,
212*4882a593Smuzhiyun 		.formats	= AC97_FMTS,
213*4882a593Smuzhiyun 		.channels_min	= 2,
214*4882a593Smuzhiyun 		.channels_max	= 2,
215*4882a593Smuzhiyun 	},
216*4882a593Smuzhiyun 	.capture = {
217*4882a593Smuzhiyun 		.rates		= AC97_RATES,
218*4882a593Smuzhiyun 		.formats	= AC97_FMTS,
219*4882a593Smuzhiyun 		.channels_min	= 2,
220*4882a593Smuzhiyun 		.channels_max	= 2,
221*4882a593Smuzhiyun 	},
222*4882a593Smuzhiyun 	.ops			= &alchemy_ac97c_ops,
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun static const struct snd_soc_component_driver au1xac97c_component = {
226*4882a593Smuzhiyun 	.name		= "au1xac97c",
227*4882a593Smuzhiyun };
228*4882a593Smuzhiyun 
au1xac97c_drvprobe(struct platform_device * pdev)229*4882a593Smuzhiyun static int au1xac97c_drvprobe(struct platform_device *pdev)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun 	int ret;
232*4882a593Smuzhiyun 	struct resource *iores, *dmares;
233*4882a593Smuzhiyun 	struct au1xpsc_audio_data *ctx;
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
236*4882a593Smuzhiyun 	if (!ctx)
237*4882a593Smuzhiyun 		return -ENOMEM;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	mutex_init(&ctx->lock);
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
242*4882a593Smuzhiyun 	if (!iores)
243*4882a593Smuzhiyun 		return -ENODEV;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	if (!devm_request_mem_region(&pdev->dev, iores->start,
246*4882a593Smuzhiyun 				     resource_size(iores),
247*4882a593Smuzhiyun 				     pdev->name))
248*4882a593Smuzhiyun 		return -EBUSY;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	ctx->mmio = devm_ioremap(&pdev->dev, iores->start,
251*4882a593Smuzhiyun 					 resource_size(iores));
252*4882a593Smuzhiyun 	if (!ctx->mmio)
253*4882a593Smuzhiyun 		return -EBUSY;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
256*4882a593Smuzhiyun 	if (!dmares)
257*4882a593Smuzhiyun 		return -EBUSY;
258*4882a593Smuzhiyun 	ctx->dmaids[SNDRV_PCM_STREAM_PLAYBACK] = dmares->start;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	dmares = platform_get_resource(pdev, IORESOURCE_DMA, 1);
261*4882a593Smuzhiyun 	if (!dmares)
262*4882a593Smuzhiyun 		return -EBUSY;
263*4882a593Smuzhiyun 	ctx->dmaids[SNDRV_PCM_STREAM_CAPTURE] = dmares->start;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	/* switch it on */
266*4882a593Smuzhiyun 	WR(ctx, AC97_ENABLE, EN_D | EN_CE);
267*4882a593Smuzhiyun 	WR(ctx, AC97_ENABLE, EN_CE);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	ctx->cfg = CFG_RC(3) | CFG_XS(3);
270*4882a593Smuzhiyun 	WR(ctx, AC97_CONFIG, ctx->cfg);
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	platform_set_drvdata(pdev, ctx);
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	ret = snd_soc_set_ac97_ops(&ac97c_bus_ops);
275*4882a593Smuzhiyun 	if (ret)
276*4882a593Smuzhiyun 		return ret;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	ret = snd_soc_register_component(&pdev->dev, &au1xac97c_component,
279*4882a593Smuzhiyun 					 &au1xac97c_dai_driver, 1);
280*4882a593Smuzhiyun 	if (ret)
281*4882a593Smuzhiyun 		return ret;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	ac97c_workdata = ctx;
284*4882a593Smuzhiyun 	return 0;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun 
au1xac97c_drvremove(struct platform_device * pdev)287*4882a593Smuzhiyun static int au1xac97c_drvremove(struct platform_device *pdev)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun 	struct au1xpsc_audio_data *ctx = platform_get_drvdata(pdev);
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	snd_soc_unregister_component(&pdev->dev);
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	WR(ctx, AC97_ENABLE, EN_D);	/* clock off, disable */
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	ac97c_workdata = NULL;	/* MDEV */
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	return 0;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun #ifdef CONFIG_PM
au1xac97c_drvsuspend(struct device * dev)301*4882a593Smuzhiyun static int au1xac97c_drvsuspend(struct device *dev)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun 	struct au1xpsc_audio_data *ctx = dev_get_drvdata(dev);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	WR(ctx, AC97_ENABLE, EN_D);	/* clock off, disable */
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	return 0;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun 
au1xac97c_drvresume(struct device * dev)310*4882a593Smuzhiyun static int au1xac97c_drvresume(struct device *dev)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun 	struct au1xpsc_audio_data *ctx = dev_get_drvdata(dev);
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	WR(ctx, AC97_ENABLE, EN_D | EN_CE);
315*4882a593Smuzhiyun 	WR(ctx, AC97_ENABLE, EN_CE);
316*4882a593Smuzhiyun 	WR(ctx, AC97_CONFIG, ctx->cfg);
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	return 0;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun static const struct dev_pm_ops au1xpscac97_pmops = {
322*4882a593Smuzhiyun 	.suspend	= au1xac97c_drvsuspend,
323*4882a593Smuzhiyun 	.resume		= au1xac97c_drvresume,
324*4882a593Smuzhiyun };
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun #define AU1XPSCAC97_PMOPS (&au1xpscac97_pmops)
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun #else
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun #define AU1XPSCAC97_PMOPS NULL
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun #endif
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun static struct platform_driver au1xac97c_driver = {
335*4882a593Smuzhiyun 	.driver	= {
336*4882a593Smuzhiyun 		.name	= "alchemy-ac97c",
337*4882a593Smuzhiyun 		.pm	= AU1XPSCAC97_PMOPS,
338*4882a593Smuzhiyun 	},
339*4882a593Smuzhiyun 	.probe		= au1xac97c_drvprobe,
340*4882a593Smuzhiyun 	.remove		= au1xac97c_drvremove,
341*4882a593Smuzhiyun };
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun module_platform_driver(au1xac97c_driver);
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun MODULE_LICENSE("GPL");
346*4882a593Smuzhiyun MODULE_DESCRIPTION("Au1000/1500/1100 AC97C ASoC driver");
347*4882a593Smuzhiyun MODULE_AUTHOR("Manuel Lauss");
348