1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // AMD ALSA SoC PDM Driver
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun //Copyright 2020 Advanced Micro Devices, Inc.
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/platform_device.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/err.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/pm_runtime.h>
12*4882a593Smuzhiyun #include <sound/pcm_params.h>
13*4882a593Smuzhiyun #include <sound/soc.h>
14*4882a593Smuzhiyun #include <sound/soc-dai.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include "rn_acp3x.h"
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define DRV_NAME "acp_rn_pdm_dma"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun static const struct snd_pcm_hardware acp_pdm_hardware_capture = {
21*4882a593Smuzhiyun .info = SNDRV_PCM_INFO_INTERLEAVED |
22*4882a593Smuzhiyun SNDRV_PCM_INFO_BLOCK_TRANSFER |
23*4882a593Smuzhiyun SNDRV_PCM_INFO_MMAP |
24*4882a593Smuzhiyun SNDRV_PCM_INFO_MMAP_VALID |
25*4882a593Smuzhiyun SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
26*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S32_LE,
27*4882a593Smuzhiyun .channels_min = 2,
28*4882a593Smuzhiyun .channels_max = 2,
29*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_48000,
30*4882a593Smuzhiyun .rate_min = 48000,
31*4882a593Smuzhiyun .rate_max = 48000,
32*4882a593Smuzhiyun .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE,
33*4882a593Smuzhiyun .period_bytes_min = CAPTURE_MIN_PERIOD_SIZE,
34*4882a593Smuzhiyun .period_bytes_max = CAPTURE_MAX_PERIOD_SIZE,
35*4882a593Smuzhiyun .periods_min = CAPTURE_MIN_NUM_PERIODS,
36*4882a593Smuzhiyun .periods_max = CAPTURE_MAX_NUM_PERIODS,
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
pdm_irq_handler(int irq,void * dev_id)39*4882a593Smuzhiyun static irqreturn_t pdm_irq_handler(int irq, void *dev_id)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun struct pdm_dev_data *rn_pdm_data;
42*4882a593Smuzhiyun u16 cap_flag;
43*4882a593Smuzhiyun u32 val;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun rn_pdm_data = dev_id;
46*4882a593Smuzhiyun if (!rn_pdm_data)
47*4882a593Smuzhiyun return IRQ_NONE;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun cap_flag = 0;
50*4882a593Smuzhiyun val = rn_readl(rn_pdm_data->acp_base + ACP_EXTERNAL_INTR_STAT);
51*4882a593Smuzhiyun if ((val & BIT(PDM_DMA_STAT)) && rn_pdm_data->capture_stream) {
52*4882a593Smuzhiyun rn_writel(BIT(PDM_DMA_STAT), rn_pdm_data->acp_base +
53*4882a593Smuzhiyun ACP_EXTERNAL_INTR_STAT);
54*4882a593Smuzhiyun snd_pcm_period_elapsed(rn_pdm_data->capture_stream);
55*4882a593Smuzhiyun cap_flag = 1;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun if (cap_flag)
59*4882a593Smuzhiyun return IRQ_HANDLED;
60*4882a593Smuzhiyun else
61*4882a593Smuzhiyun return IRQ_NONE;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
init_pdm_ring_buffer(u32 physical_addr,u32 buffer_size,u32 watermark_size,void __iomem * acp_base)64*4882a593Smuzhiyun static void init_pdm_ring_buffer(u32 physical_addr,
65*4882a593Smuzhiyun u32 buffer_size,
66*4882a593Smuzhiyun u32 watermark_size,
67*4882a593Smuzhiyun void __iomem *acp_base)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun rn_writel(physical_addr, acp_base + ACP_WOV_RX_RINGBUFADDR);
70*4882a593Smuzhiyun rn_writel(buffer_size, acp_base + ACP_WOV_RX_RINGBUFSIZE);
71*4882a593Smuzhiyun rn_writel(watermark_size, acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
72*4882a593Smuzhiyun rn_writel(0x01, acp_base + ACPAXI2AXI_ATU_CTRL);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
enable_pdm_clock(void __iomem * acp_base)75*4882a593Smuzhiyun static void enable_pdm_clock(void __iomem *acp_base)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun u32 pdm_clk_enable, pdm_ctrl;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun pdm_clk_enable = ACP_PDM_CLK_FREQ_MASK;
80*4882a593Smuzhiyun pdm_ctrl = 0x00;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun rn_writel(pdm_clk_enable, acp_base + ACP_WOV_CLK_CTRL);
83*4882a593Smuzhiyun pdm_ctrl = rn_readl(acp_base + ACP_WOV_MISC_CTRL);
84*4882a593Smuzhiyun pdm_ctrl |= ACP_WOV_MISC_CTRL_MASK;
85*4882a593Smuzhiyun rn_writel(pdm_ctrl, acp_base + ACP_WOV_MISC_CTRL);
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
enable_pdm_interrupts(void __iomem * acp_base)88*4882a593Smuzhiyun static void enable_pdm_interrupts(void __iomem *acp_base)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun u32 ext_int_ctrl;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun ext_int_ctrl = rn_readl(acp_base + ACP_EXTERNAL_INTR_CNTL);
93*4882a593Smuzhiyun ext_int_ctrl |= PDM_DMA_INTR_MASK;
94*4882a593Smuzhiyun rn_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
disable_pdm_interrupts(void __iomem * acp_base)97*4882a593Smuzhiyun static void disable_pdm_interrupts(void __iomem *acp_base)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun u32 ext_int_ctrl;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun ext_int_ctrl = rn_readl(acp_base + ACP_EXTERNAL_INTR_CNTL);
102*4882a593Smuzhiyun ext_int_ctrl |= ~PDM_DMA_INTR_MASK;
103*4882a593Smuzhiyun rn_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL);
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
check_pdm_dma_status(void __iomem * acp_base)106*4882a593Smuzhiyun static bool check_pdm_dma_status(void __iomem *acp_base)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun bool pdm_dma_status;
109*4882a593Smuzhiyun u32 pdm_enable, pdm_dma_enable;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun pdm_dma_status = false;
112*4882a593Smuzhiyun pdm_enable = rn_readl(acp_base + ACP_WOV_PDM_ENABLE);
113*4882a593Smuzhiyun pdm_dma_enable = rn_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
114*4882a593Smuzhiyun if ((pdm_enable & ACP_PDM_ENABLE) && (pdm_dma_enable &
115*4882a593Smuzhiyun ACP_PDM_DMA_EN_STATUS))
116*4882a593Smuzhiyun pdm_dma_status = true;
117*4882a593Smuzhiyun return pdm_dma_status;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
start_pdm_dma(void __iomem * acp_base)120*4882a593Smuzhiyun static int start_pdm_dma(void __iomem *acp_base)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun u32 pdm_enable;
123*4882a593Smuzhiyun u32 pdm_dma_enable;
124*4882a593Smuzhiyun int timeout;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun pdm_enable = 0x01;
127*4882a593Smuzhiyun pdm_dma_enable = 0x01;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun enable_pdm_clock(acp_base);
130*4882a593Smuzhiyun rn_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE);
131*4882a593Smuzhiyun rn_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE);
132*4882a593Smuzhiyun pdm_dma_enable = 0x00;
133*4882a593Smuzhiyun timeout = 0;
134*4882a593Smuzhiyun while (++timeout < ACP_COUNTER) {
135*4882a593Smuzhiyun pdm_dma_enable = rn_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
136*4882a593Smuzhiyun if ((pdm_dma_enable & 0x02) == ACP_PDM_DMA_EN_STATUS)
137*4882a593Smuzhiyun return 0;
138*4882a593Smuzhiyun udelay(DELAY_US);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun return -ETIMEDOUT;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
stop_pdm_dma(void __iomem * acp_base)143*4882a593Smuzhiyun static int stop_pdm_dma(void __iomem *acp_base)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun u32 pdm_enable, pdm_dma_enable;
146*4882a593Smuzhiyun int timeout;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun pdm_enable = 0x00;
149*4882a593Smuzhiyun pdm_dma_enable = 0x00;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun pdm_enable = rn_readl(acp_base + ACP_WOV_PDM_ENABLE);
152*4882a593Smuzhiyun pdm_dma_enable = rn_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
153*4882a593Smuzhiyun if (pdm_dma_enable & 0x01) {
154*4882a593Smuzhiyun pdm_dma_enable = 0x02;
155*4882a593Smuzhiyun rn_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE);
156*4882a593Smuzhiyun pdm_dma_enable = 0x00;
157*4882a593Smuzhiyun timeout = 0;
158*4882a593Smuzhiyun while (++timeout < ACP_COUNTER) {
159*4882a593Smuzhiyun pdm_dma_enable = rn_readl(acp_base +
160*4882a593Smuzhiyun ACP_WOV_PDM_DMA_ENABLE);
161*4882a593Smuzhiyun if ((pdm_dma_enable & 0x02) == 0x00)
162*4882a593Smuzhiyun break;
163*4882a593Smuzhiyun udelay(DELAY_US);
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun if (timeout == ACP_COUNTER)
166*4882a593Smuzhiyun return -ETIMEDOUT;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun if (pdm_enable == ACP_PDM_ENABLE) {
169*4882a593Smuzhiyun pdm_enable = ACP_PDM_DISABLE;
170*4882a593Smuzhiyun rn_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE);
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun rn_writel(0x01, acp_base + ACP_WOV_PDM_FIFO_FLUSH);
173*4882a593Smuzhiyun return 0;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
config_acp_dma(struct pdm_stream_instance * rtd,int direction)176*4882a593Smuzhiyun static void config_acp_dma(struct pdm_stream_instance *rtd, int direction)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun u16 page_idx;
179*4882a593Smuzhiyun u32 low, high, val;
180*4882a593Smuzhiyun dma_addr_t addr;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun addr = rtd->dma_addr;
183*4882a593Smuzhiyun val = 0;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /* Group Enable */
186*4882a593Smuzhiyun rn_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp_base +
187*4882a593Smuzhiyun ACPAXI2AXI_ATU_BASE_ADDR_GRP_1);
188*4882a593Smuzhiyun rn_writel(PAGE_SIZE_4K_ENABLE, rtd->acp_base +
189*4882a593Smuzhiyun ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun for (page_idx = 0; page_idx < rtd->num_pages; page_idx++) {
192*4882a593Smuzhiyun /* Load the low address of page int ACP SRAM through SRBM */
193*4882a593Smuzhiyun low = lower_32_bits(addr);
194*4882a593Smuzhiyun high = upper_32_bits(addr);
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun rn_writel(low, rtd->acp_base + ACP_SCRATCH_REG_0 + val);
197*4882a593Smuzhiyun high |= BIT(31);
198*4882a593Smuzhiyun rn_writel(high, rtd->acp_base + ACP_SCRATCH_REG_0 + val + 4);
199*4882a593Smuzhiyun val += 8;
200*4882a593Smuzhiyun addr += PAGE_SIZE;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
acp_pdm_dma_open(struct snd_soc_component * component,struct snd_pcm_substream * substream)204*4882a593Smuzhiyun static int acp_pdm_dma_open(struct snd_soc_component *component,
205*4882a593Smuzhiyun struct snd_pcm_substream *substream)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun struct snd_pcm_runtime *runtime;
208*4882a593Smuzhiyun struct pdm_dev_data *adata;
209*4882a593Smuzhiyun struct pdm_stream_instance *pdm_data;
210*4882a593Smuzhiyun int ret;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun runtime = substream->runtime;
213*4882a593Smuzhiyun adata = dev_get_drvdata(component->dev);
214*4882a593Smuzhiyun pdm_data = kzalloc(sizeof(*pdm_data), GFP_KERNEL);
215*4882a593Smuzhiyun if (!pdm_data)
216*4882a593Smuzhiyun return -EINVAL;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
219*4882a593Smuzhiyun runtime->hw = acp_pdm_hardware_capture;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun ret = snd_pcm_hw_constraint_integer(runtime,
222*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_PERIODS);
223*4882a593Smuzhiyun if (ret < 0) {
224*4882a593Smuzhiyun dev_err(component->dev, "set integer constraint failed\n");
225*4882a593Smuzhiyun kfree(pdm_data);
226*4882a593Smuzhiyun return ret;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun enable_pdm_interrupts(adata->acp_base);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
232*4882a593Smuzhiyun adata->capture_stream = substream;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun pdm_data->acp_base = adata->acp_base;
235*4882a593Smuzhiyun runtime->private_data = pdm_data;
236*4882a593Smuzhiyun return ret;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun
acp_pdm_dma_hw_params(struct snd_soc_component * component,struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)239*4882a593Smuzhiyun static int acp_pdm_dma_hw_params(struct snd_soc_component *component,
240*4882a593Smuzhiyun struct snd_pcm_substream *substream,
241*4882a593Smuzhiyun struct snd_pcm_hw_params *params)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun struct pdm_stream_instance *rtd;
244*4882a593Smuzhiyun size_t size, period_bytes;
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun rtd = substream->runtime->private_data;
247*4882a593Smuzhiyun if (!rtd)
248*4882a593Smuzhiyun return -EINVAL;
249*4882a593Smuzhiyun size = params_buffer_bytes(params);
250*4882a593Smuzhiyun period_bytes = params_period_bytes(params);
251*4882a593Smuzhiyun rtd->dma_addr = substream->runtime->dma_addr;
252*4882a593Smuzhiyun rtd->num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT);
253*4882a593Smuzhiyun config_acp_dma(rtd, substream->stream);
254*4882a593Smuzhiyun init_pdm_ring_buffer(MEM_WINDOW_START, size, period_bytes,
255*4882a593Smuzhiyun rtd->acp_base);
256*4882a593Smuzhiyun return 0;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun
acp_pdm_get_byte_count(struct pdm_stream_instance * rtd,int direction)259*4882a593Smuzhiyun static u64 acp_pdm_get_byte_count(struct pdm_stream_instance *rtd,
260*4882a593Smuzhiyun int direction)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun union acp_pdm_dma_count byte_count;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun byte_count.bcount.high =
265*4882a593Smuzhiyun rn_readl(rtd->acp_base +
266*4882a593Smuzhiyun ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH);
267*4882a593Smuzhiyun byte_count.bcount.low =
268*4882a593Smuzhiyun rn_readl(rtd->acp_base +
269*4882a593Smuzhiyun ACP_WOV_RX_LINEARPOSITIONCNTR_LOW);
270*4882a593Smuzhiyun return byte_count.bytescount;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
acp_pdm_dma_pointer(struct snd_soc_component * comp,struct snd_pcm_substream * stream)273*4882a593Smuzhiyun static snd_pcm_uframes_t acp_pdm_dma_pointer(struct snd_soc_component *comp,
274*4882a593Smuzhiyun struct snd_pcm_substream *stream)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun struct pdm_stream_instance *rtd;
277*4882a593Smuzhiyun u32 pos, buffersize;
278*4882a593Smuzhiyun u64 bytescount;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun rtd = stream->runtime->private_data;
281*4882a593Smuzhiyun buffersize = frames_to_bytes(stream->runtime,
282*4882a593Smuzhiyun stream->runtime->buffer_size);
283*4882a593Smuzhiyun bytescount = acp_pdm_get_byte_count(rtd, stream->stream);
284*4882a593Smuzhiyun if (bytescount > rtd->bytescount)
285*4882a593Smuzhiyun bytescount -= rtd->bytescount;
286*4882a593Smuzhiyun pos = do_div(bytescount, buffersize);
287*4882a593Smuzhiyun return bytes_to_frames(stream->runtime, pos);
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
acp_pdm_dma_new(struct snd_soc_component * component,struct snd_soc_pcm_runtime * rtd)290*4882a593Smuzhiyun static int acp_pdm_dma_new(struct snd_soc_component *component,
291*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun struct device *parent = component->dev->parent;
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV,
296*4882a593Smuzhiyun parent, MIN_BUFFER, MAX_BUFFER);
297*4882a593Smuzhiyun return 0;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
acp_pdm_dma_mmap(struct snd_soc_component * component,struct snd_pcm_substream * substream,struct vm_area_struct * vma)300*4882a593Smuzhiyun static int acp_pdm_dma_mmap(struct snd_soc_component *component,
301*4882a593Smuzhiyun struct snd_pcm_substream *substream,
302*4882a593Smuzhiyun struct vm_area_struct *vma)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun return snd_pcm_lib_default_mmap(substream, vma);
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun
acp_pdm_dma_close(struct snd_soc_component * component,struct snd_pcm_substream * substream)307*4882a593Smuzhiyun static int acp_pdm_dma_close(struct snd_soc_component *component,
308*4882a593Smuzhiyun struct snd_pcm_substream *substream)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun struct pdm_dev_data *adata = dev_get_drvdata(component->dev);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun disable_pdm_interrupts(adata->acp_base);
313*4882a593Smuzhiyun adata->capture_stream = NULL;
314*4882a593Smuzhiyun return 0;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
acp_pdm_dai_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)317*4882a593Smuzhiyun static int acp_pdm_dai_trigger(struct snd_pcm_substream *substream,
318*4882a593Smuzhiyun int cmd, struct snd_soc_dai *dai)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun struct pdm_stream_instance *rtd;
321*4882a593Smuzhiyun int ret;
322*4882a593Smuzhiyun bool pdm_status;
323*4882a593Smuzhiyun unsigned int ch_mask;
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun rtd = substream->runtime->private_data;
326*4882a593Smuzhiyun ret = 0;
327*4882a593Smuzhiyun switch (substream->runtime->channels) {
328*4882a593Smuzhiyun case TWO_CH:
329*4882a593Smuzhiyun ch_mask = 0x00;
330*4882a593Smuzhiyun break;
331*4882a593Smuzhiyun default:
332*4882a593Smuzhiyun return -EINVAL;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun switch (cmd) {
335*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_START:
336*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_RESUME:
337*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
338*4882a593Smuzhiyun rn_writel(ch_mask, rtd->acp_base + ACP_WOV_PDM_NO_OF_CHANNELS);
339*4882a593Smuzhiyun rn_writel(PDM_DECIMATION_FACTOR, rtd->acp_base +
340*4882a593Smuzhiyun ACP_WOV_PDM_DECIMATION_FACTOR);
341*4882a593Smuzhiyun rtd->bytescount = acp_pdm_get_byte_count(rtd,
342*4882a593Smuzhiyun substream->stream);
343*4882a593Smuzhiyun pdm_status = check_pdm_dma_status(rtd->acp_base);
344*4882a593Smuzhiyun if (!pdm_status)
345*4882a593Smuzhiyun ret = start_pdm_dma(rtd->acp_base);
346*4882a593Smuzhiyun break;
347*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_STOP:
348*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_SUSPEND:
349*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
350*4882a593Smuzhiyun pdm_status = check_pdm_dma_status(rtd->acp_base);
351*4882a593Smuzhiyun if (pdm_status)
352*4882a593Smuzhiyun ret = stop_pdm_dma(rtd->acp_base);
353*4882a593Smuzhiyun break;
354*4882a593Smuzhiyun default:
355*4882a593Smuzhiyun ret = -EINVAL;
356*4882a593Smuzhiyun break;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun return ret;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun static struct snd_soc_dai_ops acp_pdm_dai_ops = {
362*4882a593Smuzhiyun .trigger = acp_pdm_dai_trigger,
363*4882a593Smuzhiyun };
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun static struct snd_soc_dai_driver acp_pdm_dai_driver = {
366*4882a593Smuzhiyun .capture = {
367*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_48000,
368*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S24_LE |
369*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S32_LE,
370*4882a593Smuzhiyun .channels_min = 2,
371*4882a593Smuzhiyun .channels_max = 2,
372*4882a593Smuzhiyun .rate_min = 48000,
373*4882a593Smuzhiyun .rate_max = 48000,
374*4882a593Smuzhiyun },
375*4882a593Smuzhiyun .ops = &acp_pdm_dai_ops,
376*4882a593Smuzhiyun };
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun static const struct snd_soc_component_driver acp_pdm_component = {
379*4882a593Smuzhiyun .name = DRV_NAME,
380*4882a593Smuzhiyun .open = acp_pdm_dma_open,
381*4882a593Smuzhiyun .close = acp_pdm_dma_close,
382*4882a593Smuzhiyun .hw_params = acp_pdm_dma_hw_params,
383*4882a593Smuzhiyun .pointer = acp_pdm_dma_pointer,
384*4882a593Smuzhiyun .mmap = acp_pdm_dma_mmap,
385*4882a593Smuzhiyun .pcm_construct = acp_pdm_dma_new,
386*4882a593Smuzhiyun };
387*4882a593Smuzhiyun
acp_pdm_audio_probe(struct platform_device * pdev)388*4882a593Smuzhiyun static int acp_pdm_audio_probe(struct platform_device *pdev)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun struct resource *res;
391*4882a593Smuzhiyun struct pdm_dev_data *adata;
392*4882a593Smuzhiyun unsigned int irqflags;
393*4882a593Smuzhiyun int status;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun if (!pdev->dev.platform_data) {
396*4882a593Smuzhiyun dev_err(&pdev->dev, "platform_data not retrieved\n");
397*4882a593Smuzhiyun return -ENODEV;
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun irqflags = *((unsigned int *)(pdev->dev.platform_data));
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
402*4882a593Smuzhiyun if (!res) {
403*4882a593Smuzhiyun dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n");
404*4882a593Smuzhiyun return -ENODEV;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun adata = devm_kzalloc(&pdev->dev, sizeof(*adata), GFP_KERNEL);
408*4882a593Smuzhiyun if (!adata)
409*4882a593Smuzhiyun return -ENOMEM;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun adata->acp_base = devm_ioremap(&pdev->dev, res->start,
412*4882a593Smuzhiyun resource_size(res));
413*4882a593Smuzhiyun if (!adata->acp_base)
414*4882a593Smuzhiyun return -ENOMEM;
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
417*4882a593Smuzhiyun if (!res) {
418*4882a593Smuzhiyun dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
419*4882a593Smuzhiyun return -ENODEV;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun adata->pdm_irq = res->start;
423*4882a593Smuzhiyun adata->capture_stream = NULL;
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun dev_set_drvdata(&pdev->dev, adata);
426*4882a593Smuzhiyun status = devm_snd_soc_register_component(&pdev->dev,
427*4882a593Smuzhiyun &acp_pdm_component,
428*4882a593Smuzhiyun &acp_pdm_dai_driver, 1);
429*4882a593Smuzhiyun if (status) {
430*4882a593Smuzhiyun dev_err(&pdev->dev, "Fail to register acp pdm dai\n");
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun return -ENODEV;
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun status = devm_request_irq(&pdev->dev, adata->pdm_irq, pdm_irq_handler,
435*4882a593Smuzhiyun irqflags, "ACP_PDM_IRQ", adata);
436*4882a593Smuzhiyun if (status) {
437*4882a593Smuzhiyun dev_err(&pdev->dev, "ACP PDM IRQ request failed\n");
438*4882a593Smuzhiyun return -ENODEV;
439*4882a593Smuzhiyun }
440*4882a593Smuzhiyun pm_runtime_set_autosuspend_delay(&pdev->dev, ACP_SUSPEND_DELAY_MS);
441*4882a593Smuzhiyun pm_runtime_use_autosuspend(&pdev->dev);
442*4882a593Smuzhiyun pm_runtime_enable(&pdev->dev);
443*4882a593Smuzhiyun pm_runtime_allow(&pdev->dev);
444*4882a593Smuzhiyun return 0;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun
acp_pdm_audio_remove(struct platform_device * pdev)447*4882a593Smuzhiyun static int acp_pdm_audio_remove(struct platform_device *pdev)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun pm_runtime_disable(&pdev->dev);
450*4882a593Smuzhiyun return 0;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun
acp_pdm_resume(struct device * dev)453*4882a593Smuzhiyun static int acp_pdm_resume(struct device *dev)
454*4882a593Smuzhiyun {
455*4882a593Smuzhiyun struct pdm_dev_data *adata;
456*4882a593Smuzhiyun struct snd_pcm_runtime *runtime;
457*4882a593Smuzhiyun struct pdm_stream_instance *rtd;
458*4882a593Smuzhiyun u32 period_bytes, buffer_len;
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun adata = dev_get_drvdata(dev);
461*4882a593Smuzhiyun if (adata->capture_stream && adata->capture_stream->runtime) {
462*4882a593Smuzhiyun runtime = adata->capture_stream->runtime;
463*4882a593Smuzhiyun rtd = runtime->private_data;
464*4882a593Smuzhiyun period_bytes = frames_to_bytes(runtime, runtime->period_size);
465*4882a593Smuzhiyun buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
466*4882a593Smuzhiyun config_acp_dma(rtd, SNDRV_PCM_STREAM_CAPTURE);
467*4882a593Smuzhiyun init_pdm_ring_buffer(MEM_WINDOW_START, buffer_len, period_bytes,
468*4882a593Smuzhiyun adata->acp_base);
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun enable_pdm_interrupts(adata->acp_base);
471*4882a593Smuzhiyun return 0;
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
acp_pdm_runtime_suspend(struct device * dev)474*4882a593Smuzhiyun static int acp_pdm_runtime_suspend(struct device *dev)
475*4882a593Smuzhiyun {
476*4882a593Smuzhiyun struct pdm_dev_data *adata;
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun adata = dev_get_drvdata(dev);
479*4882a593Smuzhiyun disable_pdm_interrupts(adata->acp_base);
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun return 0;
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
acp_pdm_runtime_resume(struct device * dev)484*4882a593Smuzhiyun static int acp_pdm_runtime_resume(struct device *dev)
485*4882a593Smuzhiyun {
486*4882a593Smuzhiyun struct pdm_dev_data *adata;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun adata = dev_get_drvdata(dev);
489*4882a593Smuzhiyun enable_pdm_interrupts(adata->acp_base);
490*4882a593Smuzhiyun return 0;
491*4882a593Smuzhiyun }
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun static const struct dev_pm_ops acp_pdm_pm_ops = {
494*4882a593Smuzhiyun .runtime_suspend = acp_pdm_runtime_suspend,
495*4882a593Smuzhiyun .runtime_resume = acp_pdm_runtime_resume,
496*4882a593Smuzhiyun .resume = acp_pdm_resume,
497*4882a593Smuzhiyun };
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun static struct platform_driver acp_pdm_dma_driver = {
500*4882a593Smuzhiyun .probe = acp_pdm_audio_probe,
501*4882a593Smuzhiyun .remove = acp_pdm_audio_remove,
502*4882a593Smuzhiyun .driver = {
503*4882a593Smuzhiyun .name = "acp_rn_pdm_dma",
504*4882a593Smuzhiyun .pm = &acp_pdm_pm_ops,
505*4882a593Smuzhiyun },
506*4882a593Smuzhiyun };
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun module_platform_driver(acp_pdm_dma_driver);
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun MODULE_AUTHOR("Vijendar.Mukunda@amd.com");
511*4882a593Smuzhiyun MODULE_DESCRIPTION("AMD ACP3x Renior PDM Driver");
512*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
513*4882a593Smuzhiyun MODULE_ALIAS("platform:" DRV_NAME);
514