xref: /OK3568_Linux_fs/kernel/sound/pci/ymfpci/ymfpci_main.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4*4882a593Smuzhiyun  *  Routines for control of YMF724/740/744/754 chips
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/delay.h>
8*4882a593Smuzhiyun #include <linux/firmware.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/interrupt.h>
11*4882a593Smuzhiyun #include <linux/pci.h>
12*4882a593Smuzhiyun #include <linux/sched.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/mutex.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <sound/core.h>
19*4882a593Smuzhiyun #include <sound/control.h>
20*4882a593Smuzhiyun #include <sound/info.h>
21*4882a593Smuzhiyun #include <sound/tlv.h>
22*4882a593Smuzhiyun #include "ymfpci.h"
23*4882a593Smuzhiyun #include <sound/asoundef.h>
24*4882a593Smuzhiyun #include <sound/mpu401.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include <asm/byteorder.h>
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun  *  common I/O routines
30*4882a593Smuzhiyun  */
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
33*4882a593Smuzhiyun 
snd_ymfpci_readb(struct snd_ymfpci * chip,u32 offset)34*4882a593Smuzhiyun static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	return readb(chip->reg_area_virt + offset);
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun 
snd_ymfpci_writeb(struct snd_ymfpci * chip,u32 offset,u8 val)39*4882a593Smuzhiyun static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	writeb(val, chip->reg_area_virt + offset);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun 
snd_ymfpci_readw(struct snd_ymfpci * chip,u32 offset)44*4882a593Smuzhiyun static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun 	return readw(chip->reg_area_virt + offset);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun 
snd_ymfpci_writew(struct snd_ymfpci * chip,u32 offset,u16 val)49*4882a593Smuzhiyun static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	writew(val, chip->reg_area_virt + offset);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
snd_ymfpci_readl(struct snd_ymfpci * chip,u32 offset)54*4882a593Smuzhiyun static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun 	return readl(chip->reg_area_virt + offset);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
snd_ymfpci_writel(struct snd_ymfpci * chip,u32 offset,u32 val)59*4882a593Smuzhiyun static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	writel(val, chip->reg_area_virt + offset);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun 
snd_ymfpci_codec_ready(struct snd_ymfpci * chip,int secondary)64*4882a593Smuzhiyun static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun 	unsigned long end_time;
67*4882a593Smuzhiyun 	u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	end_time = jiffies + msecs_to_jiffies(750);
70*4882a593Smuzhiyun 	do {
71*4882a593Smuzhiyun 		if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
72*4882a593Smuzhiyun 			return 0;
73*4882a593Smuzhiyun 		schedule_timeout_uninterruptible(1);
74*4882a593Smuzhiyun 	} while (time_before(jiffies, end_time));
75*4882a593Smuzhiyun 	dev_err(chip->card->dev,
76*4882a593Smuzhiyun 		"codec_ready: codec %i is not ready [0x%x]\n",
77*4882a593Smuzhiyun 		secondary, snd_ymfpci_readw(chip, reg));
78*4882a593Smuzhiyun 	return -EBUSY;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
snd_ymfpci_codec_write(struct snd_ac97 * ac97,u16 reg,u16 val)81*4882a593Smuzhiyun static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	struct snd_ymfpci *chip = ac97->private_data;
84*4882a593Smuzhiyun 	u32 cmd;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	snd_ymfpci_codec_ready(chip, 0);
87*4882a593Smuzhiyun 	cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
88*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
snd_ymfpci_codec_read(struct snd_ac97 * ac97,u16 reg)91*4882a593Smuzhiyun static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	struct snd_ymfpci *chip = ac97->private_data;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	if (snd_ymfpci_codec_ready(chip, 0))
96*4882a593Smuzhiyun 		return ~0;
97*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
98*4882a593Smuzhiyun 	if (snd_ymfpci_codec_ready(chip, 0))
99*4882a593Smuzhiyun 		return ~0;
100*4882a593Smuzhiyun 	if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
101*4882a593Smuzhiyun 		int i;
102*4882a593Smuzhiyun 		for (i = 0; i < 600; i++)
103*4882a593Smuzhiyun 			snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
104*4882a593Smuzhiyun 	}
105*4882a593Smuzhiyun 	return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun /*
109*4882a593Smuzhiyun  *  Misc routines
110*4882a593Smuzhiyun  */
111*4882a593Smuzhiyun 
snd_ymfpci_calc_delta(u32 rate)112*4882a593Smuzhiyun static u32 snd_ymfpci_calc_delta(u32 rate)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun 	switch (rate) {
115*4882a593Smuzhiyun 	case 8000:	return 0x02aaab00;
116*4882a593Smuzhiyun 	case 11025:	return 0x03accd00;
117*4882a593Smuzhiyun 	case 16000:	return 0x05555500;
118*4882a593Smuzhiyun 	case 22050:	return 0x07599a00;
119*4882a593Smuzhiyun 	case 32000:	return 0x0aaaab00;
120*4882a593Smuzhiyun 	case 44100:	return 0x0eb33300;
121*4882a593Smuzhiyun 	default:	return ((rate << 16) / 375) << 5;
122*4882a593Smuzhiyun 	}
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun static const u32 def_rate[8] = {
126*4882a593Smuzhiyun 	100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
snd_ymfpci_calc_lpfK(u32 rate)129*4882a593Smuzhiyun static u32 snd_ymfpci_calc_lpfK(u32 rate)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun 	u32 i;
132*4882a593Smuzhiyun 	static const u32 val[8] = {
133*4882a593Smuzhiyun 		0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
134*4882a593Smuzhiyun 		0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
135*4882a593Smuzhiyun 	};
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	if (rate == 44100)
138*4882a593Smuzhiyun 		return 0x40000000;	/* FIXME: What's the right value? */
139*4882a593Smuzhiyun 	for (i = 0; i < 8; i++)
140*4882a593Smuzhiyun 		if (rate <= def_rate[i])
141*4882a593Smuzhiyun 			return val[i];
142*4882a593Smuzhiyun 	return val[0];
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
snd_ymfpci_calc_lpfQ(u32 rate)145*4882a593Smuzhiyun static u32 snd_ymfpci_calc_lpfQ(u32 rate)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	u32 i;
148*4882a593Smuzhiyun 	static const u32 val[8] = {
149*4882a593Smuzhiyun 		0x35280000, 0x34A70000, 0x32020000, 0x31770000,
150*4882a593Smuzhiyun 		0x31390000, 0x31C90000, 0x33D00000, 0x40000000
151*4882a593Smuzhiyun 	};
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	if (rate == 44100)
154*4882a593Smuzhiyun 		return 0x370A0000;
155*4882a593Smuzhiyun 	for (i = 0; i < 8; i++)
156*4882a593Smuzhiyun 		if (rate <= def_rate[i])
157*4882a593Smuzhiyun 			return val[i];
158*4882a593Smuzhiyun 	return val[0];
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun /*
162*4882a593Smuzhiyun  *  Hardware start management
163*4882a593Smuzhiyun  */
164*4882a593Smuzhiyun 
snd_ymfpci_hw_start(struct snd_ymfpci * chip)165*4882a593Smuzhiyun static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun 	unsigned long flags;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	spin_lock_irqsave(&chip->reg_lock, flags);
170*4882a593Smuzhiyun 	if (chip->start_count++ > 0)
171*4882a593Smuzhiyun 		goto __end;
172*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_MODE,
173*4882a593Smuzhiyun 			  snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
174*4882a593Smuzhiyun 	chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
175*4882a593Smuzhiyun       __end:
176*4882a593Smuzhiyun       	spin_unlock_irqrestore(&chip->reg_lock, flags);
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun 
snd_ymfpci_hw_stop(struct snd_ymfpci * chip)179*4882a593Smuzhiyun static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun 	unsigned long flags;
182*4882a593Smuzhiyun 	long timeout = 1000;
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	spin_lock_irqsave(&chip->reg_lock, flags);
185*4882a593Smuzhiyun 	if (--chip->start_count > 0)
186*4882a593Smuzhiyun 		goto __end;
187*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_MODE,
188*4882a593Smuzhiyun 			  snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
189*4882a593Smuzhiyun 	while (timeout-- > 0) {
190*4882a593Smuzhiyun 		if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
191*4882a593Smuzhiyun 			break;
192*4882a593Smuzhiyun 	}
193*4882a593Smuzhiyun 	if (atomic_read(&chip->interrupt_sleep_count)) {
194*4882a593Smuzhiyun 		atomic_set(&chip->interrupt_sleep_count, 0);
195*4882a593Smuzhiyun 		wake_up(&chip->interrupt_sleep);
196*4882a593Smuzhiyun 	}
197*4882a593Smuzhiyun       __end:
198*4882a593Smuzhiyun       	spin_unlock_irqrestore(&chip->reg_lock, flags);
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun /*
202*4882a593Smuzhiyun  *  Playback voice management
203*4882a593Smuzhiyun  */
204*4882a593Smuzhiyun 
voice_alloc(struct snd_ymfpci * chip,enum snd_ymfpci_voice_type type,int pair,struct snd_ymfpci_voice ** rvoice)205*4882a593Smuzhiyun static int voice_alloc(struct snd_ymfpci *chip,
206*4882a593Smuzhiyun 		       enum snd_ymfpci_voice_type type, int pair,
207*4882a593Smuzhiyun 		       struct snd_ymfpci_voice **rvoice)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun 	struct snd_ymfpci_voice *voice, *voice2;
210*4882a593Smuzhiyun 	int idx;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	*rvoice = NULL;
213*4882a593Smuzhiyun 	for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
214*4882a593Smuzhiyun 		voice = &chip->voices[idx];
215*4882a593Smuzhiyun 		voice2 = pair ? &chip->voices[idx+1] : NULL;
216*4882a593Smuzhiyun 		if (voice->use || (voice2 && voice2->use))
217*4882a593Smuzhiyun 			continue;
218*4882a593Smuzhiyun 		voice->use = 1;
219*4882a593Smuzhiyun 		if (voice2)
220*4882a593Smuzhiyun 			voice2->use = 1;
221*4882a593Smuzhiyun 		switch (type) {
222*4882a593Smuzhiyun 		case YMFPCI_PCM:
223*4882a593Smuzhiyun 			voice->pcm = 1;
224*4882a593Smuzhiyun 			if (voice2)
225*4882a593Smuzhiyun 				voice2->pcm = 1;
226*4882a593Smuzhiyun 			break;
227*4882a593Smuzhiyun 		case YMFPCI_SYNTH:
228*4882a593Smuzhiyun 			voice->synth = 1;
229*4882a593Smuzhiyun 			break;
230*4882a593Smuzhiyun 		case YMFPCI_MIDI:
231*4882a593Smuzhiyun 			voice->midi = 1;
232*4882a593Smuzhiyun 			break;
233*4882a593Smuzhiyun 		}
234*4882a593Smuzhiyun 		snd_ymfpci_hw_start(chip);
235*4882a593Smuzhiyun 		if (voice2)
236*4882a593Smuzhiyun 			snd_ymfpci_hw_start(chip);
237*4882a593Smuzhiyun 		*rvoice = voice;
238*4882a593Smuzhiyun 		return 0;
239*4882a593Smuzhiyun 	}
240*4882a593Smuzhiyun 	return -ENOMEM;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun 
snd_ymfpci_voice_alloc(struct snd_ymfpci * chip,enum snd_ymfpci_voice_type type,int pair,struct snd_ymfpci_voice ** rvoice)243*4882a593Smuzhiyun static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
244*4882a593Smuzhiyun 				  enum snd_ymfpci_voice_type type, int pair,
245*4882a593Smuzhiyun 				  struct snd_ymfpci_voice **rvoice)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun 	unsigned long flags;
248*4882a593Smuzhiyun 	int result;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	if (snd_BUG_ON(!rvoice))
251*4882a593Smuzhiyun 		return -EINVAL;
252*4882a593Smuzhiyun 	if (snd_BUG_ON(pair && type != YMFPCI_PCM))
253*4882a593Smuzhiyun 		return -EINVAL;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	spin_lock_irqsave(&chip->voice_lock, flags);
256*4882a593Smuzhiyun 	for (;;) {
257*4882a593Smuzhiyun 		result = voice_alloc(chip, type, pair, rvoice);
258*4882a593Smuzhiyun 		if (result == 0 || type != YMFPCI_PCM)
259*4882a593Smuzhiyun 			break;
260*4882a593Smuzhiyun 		/* TODO: synth/midi voice deallocation */
261*4882a593Smuzhiyun 		break;
262*4882a593Smuzhiyun 	}
263*4882a593Smuzhiyun 	spin_unlock_irqrestore(&chip->voice_lock, flags);
264*4882a593Smuzhiyun 	return result;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun 
snd_ymfpci_voice_free(struct snd_ymfpci * chip,struct snd_ymfpci_voice * pvoice)267*4882a593Smuzhiyun static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun 	unsigned long flags;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	if (snd_BUG_ON(!pvoice))
272*4882a593Smuzhiyun 		return -EINVAL;
273*4882a593Smuzhiyun 	snd_ymfpci_hw_stop(chip);
274*4882a593Smuzhiyun 	spin_lock_irqsave(&chip->voice_lock, flags);
275*4882a593Smuzhiyun 	if (pvoice->number == chip->src441_used) {
276*4882a593Smuzhiyun 		chip->src441_used = -1;
277*4882a593Smuzhiyun 		pvoice->ypcm->use_441_slot = 0;
278*4882a593Smuzhiyun 	}
279*4882a593Smuzhiyun 	pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
280*4882a593Smuzhiyun 	pvoice->ypcm = NULL;
281*4882a593Smuzhiyun 	pvoice->interrupt = NULL;
282*4882a593Smuzhiyun 	spin_unlock_irqrestore(&chip->voice_lock, flags);
283*4882a593Smuzhiyun 	return 0;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun /*
287*4882a593Smuzhiyun  *  PCM part
288*4882a593Smuzhiyun  */
289*4882a593Smuzhiyun 
snd_ymfpci_pcm_interrupt(struct snd_ymfpci * chip,struct snd_ymfpci_voice * voice)290*4882a593Smuzhiyun static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm;
293*4882a593Smuzhiyun 	u32 pos, delta;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	if ((ypcm = voice->ypcm) == NULL)
296*4882a593Smuzhiyun 		return;
297*4882a593Smuzhiyun 	if (ypcm->substream == NULL)
298*4882a593Smuzhiyun 		return;
299*4882a593Smuzhiyun 	spin_lock(&chip->reg_lock);
300*4882a593Smuzhiyun 	if (ypcm->running) {
301*4882a593Smuzhiyun 		pos = le32_to_cpu(voice->bank[chip->active_bank].start);
302*4882a593Smuzhiyun 		if (pos < ypcm->last_pos)
303*4882a593Smuzhiyun 			delta = pos + (ypcm->buffer_size - ypcm->last_pos);
304*4882a593Smuzhiyun 		else
305*4882a593Smuzhiyun 			delta = pos - ypcm->last_pos;
306*4882a593Smuzhiyun 		ypcm->period_pos += delta;
307*4882a593Smuzhiyun 		ypcm->last_pos = pos;
308*4882a593Smuzhiyun 		if (ypcm->period_pos >= ypcm->period_size) {
309*4882a593Smuzhiyun 			/*
310*4882a593Smuzhiyun 			dev_dbg(chip->card->dev,
311*4882a593Smuzhiyun 			       "done - active_bank = 0x%x, start = 0x%x\n",
312*4882a593Smuzhiyun 			       chip->active_bank,
313*4882a593Smuzhiyun 			       voice->bank[chip->active_bank].start);
314*4882a593Smuzhiyun 			*/
315*4882a593Smuzhiyun 			ypcm->period_pos %= ypcm->period_size;
316*4882a593Smuzhiyun 			spin_unlock(&chip->reg_lock);
317*4882a593Smuzhiyun 			snd_pcm_period_elapsed(ypcm->substream);
318*4882a593Smuzhiyun 			spin_lock(&chip->reg_lock);
319*4882a593Smuzhiyun 		}
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 		if (unlikely(ypcm->update_pcm_vol)) {
322*4882a593Smuzhiyun 			unsigned int subs = ypcm->substream->number;
323*4882a593Smuzhiyun 			unsigned int next_bank = 1 - chip->active_bank;
324*4882a593Smuzhiyun 			struct snd_ymfpci_playback_bank *bank;
325*4882a593Smuzhiyun 			__le32 volume;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 			bank = &voice->bank[next_bank];
328*4882a593Smuzhiyun 			volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
329*4882a593Smuzhiyun 			bank->left_gain_end = volume;
330*4882a593Smuzhiyun 			if (ypcm->output_rear)
331*4882a593Smuzhiyun 				bank->eff2_gain_end = volume;
332*4882a593Smuzhiyun 			if (ypcm->voices[1])
333*4882a593Smuzhiyun 				bank = &ypcm->voices[1]->bank[next_bank];
334*4882a593Smuzhiyun 			volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
335*4882a593Smuzhiyun 			bank->right_gain_end = volume;
336*4882a593Smuzhiyun 			if (ypcm->output_rear)
337*4882a593Smuzhiyun 				bank->eff3_gain_end = volume;
338*4882a593Smuzhiyun 			ypcm->update_pcm_vol--;
339*4882a593Smuzhiyun 		}
340*4882a593Smuzhiyun 	}
341*4882a593Smuzhiyun 	spin_unlock(&chip->reg_lock);
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun 
snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream * substream)344*4882a593Smuzhiyun static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
345*4882a593Smuzhiyun {
346*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
347*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
348*4882a593Smuzhiyun 	struct snd_ymfpci *chip = ypcm->chip;
349*4882a593Smuzhiyun 	u32 pos, delta;
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	spin_lock(&chip->reg_lock);
352*4882a593Smuzhiyun 	if (ypcm->running) {
353*4882a593Smuzhiyun 		pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
354*4882a593Smuzhiyun 		if (pos < ypcm->last_pos)
355*4882a593Smuzhiyun 			delta = pos + (ypcm->buffer_size - ypcm->last_pos);
356*4882a593Smuzhiyun 		else
357*4882a593Smuzhiyun 			delta = pos - ypcm->last_pos;
358*4882a593Smuzhiyun 		ypcm->period_pos += delta;
359*4882a593Smuzhiyun 		ypcm->last_pos = pos;
360*4882a593Smuzhiyun 		if (ypcm->period_pos >= ypcm->period_size) {
361*4882a593Smuzhiyun 			ypcm->period_pos %= ypcm->period_size;
362*4882a593Smuzhiyun 			/*
363*4882a593Smuzhiyun 			dev_dbg(chip->card->dev,
364*4882a593Smuzhiyun 			       "done - active_bank = 0x%x, start = 0x%x\n",
365*4882a593Smuzhiyun 			       chip->active_bank,
366*4882a593Smuzhiyun 			       voice->bank[chip->active_bank].start);
367*4882a593Smuzhiyun 			*/
368*4882a593Smuzhiyun 			spin_unlock(&chip->reg_lock);
369*4882a593Smuzhiyun 			snd_pcm_period_elapsed(substream);
370*4882a593Smuzhiyun 			spin_lock(&chip->reg_lock);
371*4882a593Smuzhiyun 		}
372*4882a593Smuzhiyun 	}
373*4882a593Smuzhiyun 	spin_unlock(&chip->reg_lock);
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun 
snd_ymfpci_playback_trigger(struct snd_pcm_substream * substream,int cmd)376*4882a593Smuzhiyun static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
377*4882a593Smuzhiyun 				       int cmd)
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
380*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
381*4882a593Smuzhiyun 	struct snd_kcontrol *kctl = NULL;
382*4882a593Smuzhiyun 	int result = 0;
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	spin_lock(&chip->reg_lock);
385*4882a593Smuzhiyun 	if (ypcm->voices[0] == NULL) {
386*4882a593Smuzhiyun 		result = -EINVAL;
387*4882a593Smuzhiyun 		goto __unlock;
388*4882a593Smuzhiyun 	}
389*4882a593Smuzhiyun 	switch (cmd) {
390*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_START:
391*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
392*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_RESUME:
393*4882a593Smuzhiyun 		chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
394*4882a593Smuzhiyun 		if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
395*4882a593Smuzhiyun 			chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
396*4882a593Smuzhiyun 		ypcm->running = 1;
397*4882a593Smuzhiyun 		break;
398*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_STOP:
399*4882a593Smuzhiyun 		if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
400*4882a593Smuzhiyun 			kctl = chip->pcm_mixer[substream->number].ctl;
401*4882a593Smuzhiyun 			kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
402*4882a593Smuzhiyun 		}
403*4882a593Smuzhiyun 		fallthrough;
404*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
405*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_SUSPEND:
406*4882a593Smuzhiyun 		chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
407*4882a593Smuzhiyun 		if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
408*4882a593Smuzhiyun 			chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
409*4882a593Smuzhiyun 		ypcm->running = 0;
410*4882a593Smuzhiyun 		break;
411*4882a593Smuzhiyun 	default:
412*4882a593Smuzhiyun 		result = -EINVAL;
413*4882a593Smuzhiyun 		break;
414*4882a593Smuzhiyun 	}
415*4882a593Smuzhiyun       __unlock:
416*4882a593Smuzhiyun 	spin_unlock(&chip->reg_lock);
417*4882a593Smuzhiyun 	if (kctl)
418*4882a593Smuzhiyun 		snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
419*4882a593Smuzhiyun 	return result;
420*4882a593Smuzhiyun }
snd_ymfpci_capture_trigger(struct snd_pcm_substream * substream,int cmd)421*4882a593Smuzhiyun static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
422*4882a593Smuzhiyun 				      int cmd)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
425*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
426*4882a593Smuzhiyun 	int result = 0;
427*4882a593Smuzhiyun 	u32 tmp;
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	spin_lock(&chip->reg_lock);
430*4882a593Smuzhiyun 	switch (cmd) {
431*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_START:
432*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
433*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_RESUME:
434*4882a593Smuzhiyun 		tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
435*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
436*4882a593Smuzhiyun 		ypcm->running = 1;
437*4882a593Smuzhiyun 		break;
438*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_STOP:
439*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
440*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_SUSPEND:
441*4882a593Smuzhiyun 		tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
442*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
443*4882a593Smuzhiyun 		ypcm->running = 0;
444*4882a593Smuzhiyun 		break;
445*4882a593Smuzhiyun 	default:
446*4882a593Smuzhiyun 		result = -EINVAL;
447*4882a593Smuzhiyun 		break;
448*4882a593Smuzhiyun 	}
449*4882a593Smuzhiyun 	spin_unlock(&chip->reg_lock);
450*4882a593Smuzhiyun 	return result;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun 
snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm * ypcm,int voices)453*4882a593Smuzhiyun static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
454*4882a593Smuzhiyun {
455*4882a593Smuzhiyun 	int err;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	if (ypcm->voices[1] != NULL && voices < 2) {
458*4882a593Smuzhiyun 		snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
459*4882a593Smuzhiyun 		ypcm->voices[1] = NULL;
460*4882a593Smuzhiyun 	}
461*4882a593Smuzhiyun 	if (voices == 1 && ypcm->voices[0] != NULL)
462*4882a593Smuzhiyun 		return 0;		/* already allocated */
463*4882a593Smuzhiyun 	if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
464*4882a593Smuzhiyun 		return 0;		/* already allocated */
465*4882a593Smuzhiyun 	if (voices > 1) {
466*4882a593Smuzhiyun 		if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
467*4882a593Smuzhiyun 			snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
468*4882a593Smuzhiyun 			ypcm->voices[0] = NULL;
469*4882a593Smuzhiyun 		}
470*4882a593Smuzhiyun 	}
471*4882a593Smuzhiyun 	err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
472*4882a593Smuzhiyun 	if (err < 0)
473*4882a593Smuzhiyun 		return err;
474*4882a593Smuzhiyun 	ypcm->voices[0]->ypcm = ypcm;
475*4882a593Smuzhiyun 	ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
476*4882a593Smuzhiyun 	if (voices > 1) {
477*4882a593Smuzhiyun 		ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
478*4882a593Smuzhiyun 		ypcm->voices[1]->ypcm = ypcm;
479*4882a593Smuzhiyun 	}
480*4882a593Smuzhiyun 	return 0;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun 
snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm * ypcm,unsigned int voiceidx,struct snd_pcm_runtime * runtime,int has_pcm_volume)483*4882a593Smuzhiyun static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
484*4882a593Smuzhiyun 				      struct snd_pcm_runtime *runtime,
485*4882a593Smuzhiyun 				      int has_pcm_volume)
486*4882a593Smuzhiyun {
487*4882a593Smuzhiyun 	struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
488*4882a593Smuzhiyun 	u32 format;
489*4882a593Smuzhiyun 	u32 delta = snd_ymfpci_calc_delta(runtime->rate);
490*4882a593Smuzhiyun 	u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
491*4882a593Smuzhiyun 	u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
492*4882a593Smuzhiyun 	struct snd_ymfpci_playback_bank *bank;
493*4882a593Smuzhiyun 	unsigned int nbank;
494*4882a593Smuzhiyun 	__le32 vol_left, vol_right;
495*4882a593Smuzhiyun 	u8 use_left, use_right;
496*4882a593Smuzhiyun 	unsigned long flags;
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	if (snd_BUG_ON(!voice))
499*4882a593Smuzhiyun 		return;
500*4882a593Smuzhiyun 	if (runtime->channels == 1) {
501*4882a593Smuzhiyun 		use_left = 1;
502*4882a593Smuzhiyun 		use_right = 1;
503*4882a593Smuzhiyun 	} else {
504*4882a593Smuzhiyun 		use_left = (voiceidx & 1) == 0;
505*4882a593Smuzhiyun 		use_right = !use_left;
506*4882a593Smuzhiyun 	}
507*4882a593Smuzhiyun 	if (has_pcm_volume) {
508*4882a593Smuzhiyun 		vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
509*4882a593Smuzhiyun 				       [ypcm->substream->number].left << 15);
510*4882a593Smuzhiyun 		vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
511*4882a593Smuzhiyun 					[ypcm->substream->number].right << 15);
512*4882a593Smuzhiyun 	} else {
513*4882a593Smuzhiyun 		vol_left = cpu_to_le32(0x40000000);
514*4882a593Smuzhiyun 		vol_right = cpu_to_le32(0x40000000);
515*4882a593Smuzhiyun 	}
516*4882a593Smuzhiyun 	spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
517*4882a593Smuzhiyun 	format = runtime->channels == 2 ? 0x00010000 : 0;
518*4882a593Smuzhiyun 	if (snd_pcm_format_width(runtime->format) == 8)
519*4882a593Smuzhiyun 		format |= 0x80000000;
520*4882a593Smuzhiyun 	else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
521*4882a593Smuzhiyun 		 runtime->rate == 44100 && runtime->channels == 2 &&
522*4882a593Smuzhiyun 		 voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
523*4882a593Smuzhiyun 				   ypcm->chip->src441_used == voice->number)) {
524*4882a593Smuzhiyun 		ypcm->chip->src441_used = voice->number;
525*4882a593Smuzhiyun 		ypcm->use_441_slot = 1;
526*4882a593Smuzhiyun 		format |= 0x10000000;
527*4882a593Smuzhiyun 	}
528*4882a593Smuzhiyun 	if (ypcm->chip->src441_used == voice->number &&
529*4882a593Smuzhiyun 	    (format & 0x10000000) == 0) {
530*4882a593Smuzhiyun 		ypcm->chip->src441_used = -1;
531*4882a593Smuzhiyun 		ypcm->use_441_slot = 0;
532*4882a593Smuzhiyun 	}
533*4882a593Smuzhiyun 	if (runtime->channels == 2 && (voiceidx & 1) != 0)
534*4882a593Smuzhiyun 		format |= 1;
535*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
536*4882a593Smuzhiyun 	for (nbank = 0; nbank < 2; nbank++) {
537*4882a593Smuzhiyun 		bank = &voice->bank[nbank];
538*4882a593Smuzhiyun 		memset(bank, 0, sizeof(*bank));
539*4882a593Smuzhiyun 		bank->format = cpu_to_le32(format);
540*4882a593Smuzhiyun 		bank->base = cpu_to_le32(runtime->dma_addr);
541*4882a593Smuzhiyun 		bank->loop_end = cpu_to_le32(ypcm->buffer_size);
542*4882a593Smuzhiyun 		bank->lpfQ = cpu_to_le32(lpfQ);
543*4882a593Smuzhiyun 		bank->delta =
544*4882a593Smuzhiyun 		bank->delta_end = cpu_to_le32(delta);
545*4882a593Smuzhiyun 		bank->lpfK =
546*4882a593Smuzhiyun 		bank->lpfK_end = cpu_to_le32(lpfK);
547*4882a593Smuzhiyun 		bank->eg_gain =
548*4882a593Smuzhiyun 		bank->eg_gain_end = cpu_to_le32(0x40000000);
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 		if (ypcm->output_front) {
551*4882a593Smuzhiyun 			if (use_left) {
552*4882a593Smuzhiyun 				bank->left_gain =
553*4882a593Smuzhiyun 				bank->left_gain_end = vol_left;
554*4882a593Smuzhiyun 			}
555*4882a593Smuzhiyun 			if (use_right) {
556*4882a593Smuzhiyun 				bank->right_gain =
557*4882a593Smuzhiyun 				bank->right_gain_end = vol_right;
558*4882a593Smuzhiyun 			}
559*4882a593Smuzhiyun 		}
560*4882a593Smuzhiyun 		if (ypcm->output_rear) {
561*4882a593Smuzhiyun 		        if (!ypcm->swap_rear) {
562*4882a593Smuzhiyun         			if (use_left) {
563*4882a593Smuzhiyun         				bank->eff2_gain =
564*4882a593Smuzhiyun         				bank->eff2_gain_end = vol_left;
565*4882a593Smuzhiyun         			}
566*4882a593Smuzhiyun         			if (use_right) {
567*4882a593Smuzhiyun         				bank->eff3_gain =
568*4882a593Smuzhiyun         				bank->eff3_gain_end = vol_right;
569*4882a593Smuzhiyun         			}
570*4882a593Smuzhiyun 		        } else {
571*4882a593Smuzhiyun         			/* The SPDIF out channels seem to be swapped, so we have
572*4882a593Smuzhiyun         			 * to swap them here, too.  The rear analog out channels
573*4882a593Smuzhiyun         			 * will be wrong, but otherwise AC3 would not work.
574*4882a593Smuzhiyun         			 */
575*4882a593Smuzhiyun         			if (use_left) {
576*4882a593Smuzhiyun         				bank->eff3_gain =
577*4882a593Smuzhiyun         				bank->eff3_gain_end = vol_left;
578*4882a593Smuzhiyun         			}
579*4882a593Smuzhiyun         			if (use_right) {
580*4882a593Smuzhiyun         				bank->eff2_gain =
581*4882a593Smuzhiyun         				bank->eff2_gain_end = vol_right;
582*4882a593Smuzhiyun         			}
583*4882a593Smuzhiyun         		}
584*4882a593Smuzhiyun                 }
585*4882a593Smuzhiyun 	}
586*4882a593Smuzhiyun }
587*4882a593Smuzhiyun 
snd_ymfpci_ac3_init(struct snd_ymfpci * chip)588*4882a593Smuzhiyun static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
589*4882a593Smuzhiyun {
590*4882a593Smuzhiyun 	if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
591*4882a593Smuzhiyun 				4096, &chip->ac3_tmp_base) < 0)
592*4882a593Smuzhiyun 		return -ENOMEM;
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	chip->bank_effect[3][0]->base =
595*4882a593Smuzhiyun 	chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
596*4882a593Smuzhiyun 	chip->bank_effect[3][0]->loop_end =
597*4882a593Smuzhiyun 	chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
598*4882a593Smuzhiyun 	chip->bank_effect[4][0]->base =
599*4882a593Smuzhiyun 	chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
600*4882a593Smuzhiyun 	chip->bank_effect[4][0]->loop_end =
601*4882a593Smuzhiyun 	chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
604*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
605*4882a593Smuzhiyun 			  snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
606*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
607*4882a593Smuzhiyun 	return 0;
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun 
snd_ymfpci_ac3_done(struct snd_ymfpci * chip)610*4882a593Smuzhiyun static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
611*4882a593Smuzhiyun {
612*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
613*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
614*4882a593Smuzhiyun 			  snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
615*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
616*4882a593Smuzhiyun 	// snd_ymfpci_irq_wait(chip);
617*4882a593Smuzhiyun 	if (chip->ac3_tmp_base.area) {
618*4882a593Smuzhiyun 		snd_dma_free_pages(&chip->ac3_tmp_base);
619*4882a593Smuzhiyun 		chip->ac3_tmp_base.area = NULL;
620*4882a593Smuzhiyun 	}
621*4882a593Smuzhiyun 	return 0;
622*4882a593Smuzhiyun }
623*4882a593Smuzhiyun 
snd_ymfpci_playback_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)624*4882a593Smuzhiyun static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
625*4882a593Smuzhiyun 					 struct snd_pcm_hw_params *hw_params)
626*4882a593Smuzhiyun {
627*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
628*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
629*4882a593Smuzhiyun 	int err;
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun 	if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
632*4882a593Smuzhiyun 		return err;
633*4882a593Smuzhiyun 	return 0;
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun 
snd_ymfpci_playback_hw_free(struct snd_pcm_substream * substream)636*4882a593Smuzhiyun static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
637*4882a593Smuzhiyun {
638*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
639*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
640*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm;
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 	if (runtime->private_data == NULL)
643*4882a593Smuzhiyun 		return 0;
644*4882a593Smuzhiyun 	ypcm = runtime->private_data;
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	/* wait, until the PCI operations are not finished */
647*4882a593Smuzhiyun 	snd_ymfpci_irq_wait(chip);
648*4882a593Smuzhiyun 	if (ypcm->voices[1]) {
649*4882a593Smuzhiyun 		snd_ymfpci_voice_free(chip, ypcm->voices[1]);
650*4882a593Smuzhiyun 		ypcm->voices[1] = NULL;
651*4882a593Smuzhiyun 	}
652*4882a593Smuzhiyun 	if (ypcm->voices[0]) {
653*4882a593Smuzhiyun 		snd_ymfpci_voice_free(chip, ypcm->voices[0]);
654*4882a593Smuzhiyun 		ypcm->voices[0] = NULL;
655*4882a593Smuzhiyun 	}
656*4882a593Smuzhiyun 	return 0;
657*4882a593Smuzhiyun }
658*4882a593Smuzhiyun 
snd_ymfpci_playback_prepare(struct snd_pcm_substream * substream)659*4882a593Smuzhiyun static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
662*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
663*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
664*4882a593Smuzhiyun 	struct snd_kcontrol *kctl;
665*4882a593Smuzhiyun 	unsigned int nvoice;
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun 	ypcm->period_size = runtime->period_size;
668*4882a593Smuzhiyun 	ypcm->buffer_size = runtime->buffer_size;
669*4882a593Smuzhiyun 	ypcm->period_pos = 0;
670*4882a593Smuzhiyun 	ypcm->last_pos = 0;
671*4882a593Smuzhiyun 	for (nvoice = 0; nvoice < runtime->channels; nvoice++)
672*4882a593Smuzhiyun 		snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
673*4882a593Smuzhiyun 					  substream->pcm == chip->pcm);
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun 	if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
676*4882a593Smuzhiyun 		kctl = chip->pcm_mixer[substream->number].ctl;
677*4882a593Smuzhiyun 		kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
678*4882a593Smuzhiyun 		snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
679*4882a593Smuzhiyun 	}
680*4882a593Smuzhiyun 	return 0;
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun 
snd_ymfpci_capture_hw_free(struct snd_pcm_substream * substream)683*4882a593Smuzhiyun static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
684*4882a593Smuzhiyun {
685*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun 	/* wait, until the PCI operations are not finished */
688*4882a593Smuzhiyun 	snd_ymfpci_irq_wait(chip);
689*4882a593Smuzhiyun 	return 0;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun 
snd_ymfpci_capture_prepare(struct snd_pcm_substream * substream)692*4882a593Smuzhiyun static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
693*4882a593Smuzhiyun {
694*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
695*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
696*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
697*4882a593Smuzhiyun 	struct snd_ymfpci_capture_bank * bank;
698*4882a593Smuzhiyun 	int nbank;
699*4882a593Smuzhiyun 	u32 rate, format;
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun 	ypcm->period_size = runtime->period_size;
702*4882a593Smuzhiyun 	ypcm->buffer_size = runtime->buffer_size;
703*4882a593Smuzhiyun 	ypcm->period_pos = 0;
704*4882a593Smuzhiyun 	ypcm->last_pos = 0;
705*4882a593Smuzhiyun 	ypcm->shift = 0;
706*4882a593Smuzhiyun 	rate = ((48000 * 4096) / runtime->rate) - 1;
707*4882a593Smuzhiyun 	format = 0;
708*4882a593Smuzhiyun 	if (runtime->channels == 2) {
709*4882a593Smuzhiyun 		format |= 2;
710*4882a593Smuzhiyun 		ypcm->shift++;
711*4882a593Smuzhiyun 	}
712*4882a593Smuzhiyun 	if (snd_pcm_format_width(runtime->format) == 8)
713*4882a593Smuzhiyun 		format |= 1;
714*4882a593Smuzhiyun 	else
715*4882a593Smuzhiyun 		ypcm->shift++;
716*4882a593Smuzhiyun 	switch (ypcm->capture_bank_number) {
717*4882a593Smuzhiyun 	case 0:
718*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
719*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
720*4882a593Smuzhiyun 		break;
721*4882a593Smuzhiyun 	case 1:
722*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
723*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
724*4882a593Smuzhiyun 		break;
725*4882a593Smuzhiyun 	}
726*4882a593Smuzhiyun 	for (nbank = 0; nbank < 2; nbank++) {
727*4882a593Smuzhiyun 		bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
728*4882a593Smuzhiyun 		bank->base = cpu_to_le32(runtime->dma_addr);
729*4882a593Smuzhiyun 		bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
730*4882a593Smuzhiyun 		bank->start = 0;
731*4882a593Smuzhiyun 		bank->num_of_loops = 0;
732*4882a593Smuzhiyun 	}
733*4882a593Smuzhiyun 	return 0;
734*4882a593Smuzhiyun }
735*4882a593Smuzhiyun 
snd_ymfpci_playback_pointer(struct snd_pcm_substream * substream)736*4882a593Smuzhiyun static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
737*4882a593Smuzhiyun {
738*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
739*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
740*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
741*4882a593Smuzhiyun 	struct snd_ymfpci_voice *voice = ypcm->voices[0];
742*4882a593Smuzhiyun 
743*4882a593Smuzhiyun 	if (!(ypcm->running && voice))
744*4882a593Smuzhiyun 		return 0;
745*4882a593Smuzhiyun 	return le32_to_cpu(voice->bank[chip->active_bank].start);
746*4882a593Smuzhiyun }
747*4882a593Smuzhiyun 
snd_ymfpci_capture_pointer(struct snd_pcm_substream * substream)748*4882a593Smuzhiyun static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
749*4882a593Smuzhiyun {
750*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
751*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
752*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 	if (!ypcm->running)
755*4882a593Smuzhiyun 		return 0;
756*4882a593Smuzhiyun 	return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
757*4882a593Smuzhiyun }
758*4882a593Smuzhiyun 
snd_ymfpci_irq_wait(struct snd_ymfpci * chip)759*4882a593Smuzhiyun static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
760*4882a593Smuzhiyun {
761*4882a593Smuzhiyun 	wait_queue_entry_t wait;
762*4882a593Smuzhiyun 	int loops = 4;
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun 	while (loops-- > 0) {
765*4882a593Smuzhiyun 		if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
766*4882a593Smuzhiyun 		 	continue;
767*4882a593Smuzhiyun 		init_waitqueue_entry(&wait, current);
768*4882a593Smuzhiyun 		add_wait_queue(&chip->interrupt_sleep, &wait);
769*4882a593Smuzhiyun 		atomic_inc(&chip->interrupt_sleep_count);
770*4882a593Smuzhiyun 		schedule_timeout_uninterruptible(msecs_to_jiffies(50));
771*4882a593Smuzhiyun 		remove_wait_queue(&chip->interrupt_sleep, &wait);
772*4882a593Smuzhiyun 	}
773*4882a593Smuzhiyun }
774*4882a593Smuzhiyun 
snd_ymfpci_interrupt(int irq,void * dev_id)775*4882a593Smuzhiyun static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
776*4882a593Smuzhiyun {
777*4882a593Smuzhiyun 	struct snd_ymfpci *chip = dev_id;
778*4882a593Smuzhiyun 	u32 status, nvoice, mode;
779*4882a593Smuzhiyun 	struct snd_ymfpci_voice *voice;
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
782*4882a593Smuzhiyun 	if (status & 0x80000000) {
783*4882a593Smuzhiyun 		chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
784*4882a593Smuzhiyun 		spin_lock(&chip->voice_lock);
785*4882a593Smuzhiyun 		for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
786*4882a593Smuzhiyun 			voice = &chip->voices[nvoice];
787*4882a593Smuzhiyun 			if (voice->interrupt)
788*4882a593Smuzhiyun 				voice->interrupt(chip, voice);
789*4882a593Smuzhiyun 		}
790*4882a593Smuzhiyun 		for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
791*4882a593Smuzhiyun 			if (chip->capture_substream[nvoice])
792*4882a593Smuzhiyun 				snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
793*4882a593Smuzhiyun 		}
794*4882a593Smuzhiyun #if 0
795*4882a593Smuzhiyun 		for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
796*4882a593Smuzhiyun 			if (chip->effect_substream[nvoice])
797*4882a593Smuzhiyun 				snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
798*4882a593Smuzhiyun 		}
799*4882a593Smuzhiyun #endif
800*4882a593Smuzhiyun 		spin_unlock(&chip->voice_lock);
801*4882a593Smuzhiyun 		spin_lock(&chip->reg_lock);
802*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
803*4882a593Smuzhiyun 		mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
804*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
805*4882a593Smuzhiyun 		spin_unlock(&chip->reg_lock);
806*4882a593Smuzhiyun 
807*4882a593Smuzhiyun 		if (atomic_read(&chip->interrupt_sleep_count)) {
808*4882a593Smuzhiyun 			atomic_set(&chip->interrupt_sleep_count, 0);
809*4882a593Smuzhiyun 			wake_up(&chip->interrupt_sleep);
810*4882a593Smuzhiyun 		}
811*4882a593Smuzhiyun 	}
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun 	status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
814*4882a593Smuzhiyun 	if (status & 1) {
815*4882a593Smuzhiyun 		if (chip->timer)
816*4882a593Smuzhiyun 			snd_timer_interrupt(chip->timer, chip->timer_ticks);
817*4882a593Smuzhiyun 	}
818*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
819*4882a593Smuzhiyun 
820*4882a593Smuzhiyun 	if (chip->rawmidi)
821*4882a593Smuzhiyun 		snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
822*4882a593Smuzhiyun 	return IRQ_HANDLED;
823*4882a593Smuzhiyun }
824*4882a593Smuzhiyun 
825*4882a593Smuzhiyun static const struct snd_pcm_hardware snd_ymfpci_playback =
826*4882a593Smuzhiyun {
827*4882a593Smuzhiyun 	.info =			(SNDRV_PCM_INFO_MMAP |
828*4882a593Smuzhiyun 				 SNDRV_PCM_INFO_MMAP_VALID |
829*4882a593Smuzhiyun 				 SNDRV_PCM_INFO_INTERLEAVED |
830*4882a593Smuzhiyun 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
831*4882a593Smuzhiyun 				 SNDRV_PCM_INFO_PAUSE |
832*4882a593Smuzhiyun 				 SNDRV_PCM_INFO_RESUME),
833*4882a593Smuzhiyun 	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
834*4882a593Smuzhiyun 	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
835*4882a593Smuzhiyun 	.rate_min =		8000,
836*4882a593Smuzhiyun 	.rate_max =		48000,
837*4882a593Smuzhiyun 	.channels_min =		1,
838*4882a593Smuzhiyun 	.channels_max =		2,
839*4882a593Smuzhiyun 	.buffer_bytes_max =	256 * 1024, /* FIXME: enough? */
840*4882a593Smuzhiyun 	.period_bytes_min =	64,
841*4882a593Smuzhiyun 	.period_bytes_max =	256 * 1024, /* FIXME: enough? */
842*4882a593Smuzhiyun 	.periods_min =		3,
843*4882a593Smuzhiyun 	.periods_max =		1024,
844*4882a593Smuzhiyun 	.fifo_size =		0,
845*4882a593Smuzhiyun };
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun static const struct snd_pcm_hardware snd_ymfpci_capture =
848*4882a593Smuzhiyun {
849*4882a593Smuzhiyun 	.info =			(SNDRV_PCM_INFO_MMAP |
850*4882a593Smuzhiyun 				 SNDRV_PCM_INFO_MMAP_VALID |
851*4882a593Smuzhiyun 				 SNDRV_PCM_INFO_INTERLEAVED |
852*4882a593Smuzhiyun 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
853*4882a593Smuzhiyun 				 SNDRV_PCM_INFO_PAUSE |
854*4882a593Smuzhiyun 				 SNDRV_PCM_INFO_RESUME),
855*4882a593Smuzhiyun 	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
856*4882a593Smuzhiyun 	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
857*4882a593Smuzhiyun 	.rate_min =		8000,
858*4882a593Smuzhiyun 	.rate_max =		48000,
859*4882a593Smuzhiyun 	.channels_min =		1,
860*4882a593Smuzhiyun 	.channels_max =		2,
861*4882a593Smuzhiyun 	.buffer_bytes_max =	256 * 1024, /* FIXME: enough? */
862*4882a593Smuzhiyun 	.period_bytes_min =	64,
863*4882a593Smuzhiyun 	.period_bytes_max =	256 * 1024, /* FIXME: enough? */
864*4882a593Smuzhiyun 	.periods_min =		3,
865*4882a593Smuzhiyun 	.periods_max =		1024,
866*4882a593Smuzhiyun 	.fifo_size =		0,
867*4882a593Smuzhiyun };
868*4882a593Smuzhiyun 
snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime * runtime)869*4882a593Smuzhiyun static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
870*4882a593Smuzhiyun {
871*4882a593Smuzhiyun 	kfree(runtime->private_data);
872*4882a593Smuzhiyun }
873*4882a593Smuzhiyun 
snd_ymfpci_playback_open_1(struct snd_pcm_substream * substream)874*4882a593Smuzhiyun static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
875*4882a593Smuzhiyun {
876*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
877*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
878*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm;
879*4882a593Smuzhiyun 	int err;
880*4882a593Smuzhiyun 
881*4882a593Smuzhiyun 	runtime->hw = snd_ymfpci_playback;
882*4882a593Smuzhiyun 	/* FIXME? True value is 256/48 = 5.33333 ms */
883*4882a593Smuzhiyun 	err = snd_pcm_hw_constraint_minmax(runtime,
884*4882a593Smuzhiyun 					   SNDRV_PCM_HW_PARAM_PERIOD_TIME,
885*4882a593Smuzhiyun 					   5334, UINT_MAX);
886*4882a593Smuzhiyun 	if (err < 0)
887*4882a593Smuzhiyun 		return err;
888*4882a593Smuzhiyun 	err = snd_pcm_hw_rule_noresample(runtime, 48000);
889*4882a593Smuzhiyun 	if (err < 0)
890*4882a593Smuzhiyun 		return err;
891*4882a593Smuzhiyun 
892*4882a593Smuzhiyun 	ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
893*4882a593Smuzhiyun 	if (ypcm == NULL)
894*4882a593Smuzhiyun 		return -ENOMEM;
895*4882a593Smuzhiyun 	ypcm->chip = chip;
896*4882a593Smuzhiyun 	ypcm->type = PLAYBACK_VOICE;
897*4882a593Smuzhiyun 	ypcm->substream = substream;
898*4882a593Smuzhiyun 	runtime->private_data = ypcm;
899*4882a593Smuzhiyun 	runtime->private_free = snd_ymfpci_pcm_free_substream;
900*4882a593Smuzhiyun 	return 0;
901*4882a593Smuzhiyun }
902*4882a593Smuzhiyun 
903*4882a593Smuzhiyun /* call with spinlock held */
ymfpci_open_extension(struct snd_ymfpci * chip)904*4882a593Smuzhiyun static void ymfpci_open_extension(struct snd_ymfpci *chip)
905*4882a593Smuzhiyun {
906*4882a593Smuzhiyun 	if (! chip->rear_opened) {
907*4882a593Smuzhiyun 		if (! chip->spdif_opened) /* set AC3 */
908*4882a593Smuzhiyun 			snd_ymfpci_writel(chip, YDSXGR_MODE,
909*4882a593Smuzhiyun 					  snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
910*4882a593Smuzhiyun 		/* enable second codec (4CHEN) */
911*4882a593Smuzhiyun 		snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
912*4882a593Smuzhiyun 				  (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
913*4882a593Smuzhiyun 	}
914*4882a593Smuzhiyun }
915*4882a593Smuzhiyun 
916*4882a593Smuzhiyun /* call with spinlock held */
ymfpci_close_extension(struct snd_ymfpci * chip)917*4882a593Smuzhiyun static void ymfpci_close_extension(struct snd_ymfpci *chip)
918*4882a593Smuzhiyun {
919*4882a593Smuzhiyun 	if (! chip->rear_opened) {
920*4882a593Smuzhiyun 		if (! chip->spdif_opened)
921*4882a593Smuzhiyun 			snd_ymfpci_writel(chip, YDSXGR_MODE,
922*4882a593Smuzhiyun 					  snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
923*4882a593Smuzhiyun 		snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
924*4882a593Smuzhiyun 				  (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
925*4882a593Smuzhiyun 	}
926*4882a593Smuzhiyun }
927*4882a593Smuzhiyun 
snd_ymfpci_playback_open(struct snd_pcm_substream * substream)928*4882a593Smuzhiyun static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
929*4882a593Smuzhiyun {
930*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
931*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
932*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm;
933*4882a593Smuzhiyun 	int err;
934*4882a593Smuzhiyun 
935*4882a593Smuzhiyun 	if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
936*4882a593Smuzhiyun 		return err;
937*4882a593Smuzhiyun 	ypcm = runtime->private_data;
938*4882a593Smuzhiyun 	ypcm->output_front = 1;
939*4882a593Smuzhiyun 	ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
940*4882a593Smuzhiyun 	ypcm->swap_rear = 0;
941*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
942*4882a593Smuzhiyun 	if (ypcm->output_rear) {
943*4882a593Smuzhiyun 		ymfpci_open_extension(chip);
944*4882a593Smuzhiyun 		chip->rear_opened++;
945*4882a593Smuzhiyun 	}
946*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
947*4882a593Smuzhiyun 	return 0;
948*4882a593Smuzhiyun }
949*4882a593Smuzhiyun 
snd_ymfpci_playback_spdif_open(struct snd_pcm_substream * substream)950*4882a593Smuzhiyun static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
951*4882a593Smuzhiyun {
952*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
953*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
954*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm;
955*4882a593Smuzhiyun 	int err;
956*4882a593Smuzhiyun 
957*4882a593Smuzhiyun 	if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
958*4882a593Smuzhiyun 		return err;
959*4882a593Smuzhiyun 	ypcm = runtime->private_data;
960*4882a593Smuzhiyun 	ypcm->output_front = 0;
961*4882a593Smuzhiyun 	ypcm->output_rear = 1;
962*4882a593Smuzhiyun 	ypcm->swap_rear = 1;
963*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
964*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
965*4882a593Smuzhiyun 			  snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
966*4882a593Smuzhiyun 	ymfpci_open_extension(chip);
967*4882a593Smuzhiyun 	chip->spdif_pcm_bits = chip->spdif_bits;
968*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
969*4882a593Smuzhiyun 	chip->spdif_opened++;
970*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
971*4882a593Smuzhiyun 
972*4882a593Smuzhiyun 	chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
973*4882a593Smuzhiyun 	snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
974*4882a593Smuzhiyun 		       SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
975*4882a593Smuzhiyun 	return 0;
976*4882a593Smuzhiyun }
977*4882a593Smuzhiyun 
snd_ymfpci_playback_4ch_open(struct snd_pcm_substream * substream)978*4882a593Smuzhiyun static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
979*4882a593Smuzhiyun {
980*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
981*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
982*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm;
983*4882a593Smuzhiyun 	int err;
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun 	if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
986*4882a593Smuzhiyun 		return err;
987*4882a593Smuzhiyun 	ypcm = runtime->private_data;
988*4882a593Smuzhiyun 	ypcm->output_front = 0;
989*4882a593Smuzhiyun 	ypcm->output_rear = 1;
990*4882a593Smuzhiyun 	ypcm->swap_rear = 0;
991*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
992*4882a593Smuzhiyun 	ymfpci_open_extension(chip);
993*4882a593Smuzhiyun 	chip->rear_opened++;
994*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
995*4882a593Smuzhiyun 	return 0;
996*4882a593Smuzhiyun }
997*4882a593Smuzhiyun 
snd_ymfpci_capture_open(struct snd_pcm_substream * substream,u32 capture_bank_number)998*4882a593Smuzhiyun static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
999*4882a593Smuzhiyun 				   u32 capture_bank_number)
1000*4882a593Smuzhiyun {
1001*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1002*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
1003*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm;
1004*4882a593Smuzhiyun 	int err;
1005*4882a593Smuzhiyun 
1006*4882a593Smuzhiyun 	runtime->hw = snd_ymfpci_capture;
1007*4882a593Smuzhiyun 	/* FIXME? True value is 256/48 = 5.33333 ms */
1008*4882a593Smuzhiyun 	err = snd_pcm_hw_constraint_minmax(runtime,
1009*4882a593Smuzhiyun 					   SNDRV_PCM_HW_PARAM_PERIOD_TIME,
1010*4882a593Smuzhiyun 					   5334, UINT_MAX);
1011*4882a593Smuzhiyun 	if (err < 0)
1012*4882a593Smuzhiyun 		return err;
1013*4882a593Smuzhiyun 	err = snd_pcm_hw_rule_noresample(runtime, 48000);
1014*4882a593Smuzhiyun 	if (err < 0)
1015*4882a593Smuzhiyun 		return err;
1016*4882a593Smuzhiyun 
1017*4882a593Smuzhiyun 	ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1018*4882a593Smuzhiyun 	if (ypcm == NULL)
1019*4882a593Smuzhiyun 		return -ENOMEM;
1020*4882a593Smuzhiyun 	ypcm->chip = chip;
1021*4882a593Smuzhiyun 	ypcm->type = capture_bank_number + CAPTURE_REC;
1022*4882a593Smuzhiyun 	ypcm->substream = substream;
1023*4882a593Smuzhiyun 	ypcm->capture_bank_number = capture_bank_number;
1024*4882a593Smuzhiyun 	chip->capture_substream[capture_bank_number] = substream;
1025*4882a593Smuzhiyun 	runtime->private_data = ypcm;
1026*4882a593Smuzhiyun 	runtime->private_free = snd_ymfpci_pcm_free_substream;
1027*4882a593Smuzhiyun 	snd_ymfpci_hw_start(chip);
1028*4882a593Smuzhiyun 	return 0;
1029*4882a593Smuzhiyun }
1030*4882a593Smuzhiyun 
snd_ymfpci_capture_rec_open(struct snd_pcm_substream * substream)1031*4882a593Smuzhiyun static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1032*4882a593Smuzhiyun {
1033*4882a593Smuzhiyun 	return snd_ymfpci_capture_open(substream, 0);
1034*4882a593Smuzhiyun }
1035*4882a593Smuzhiyun 
snd_ymfpci_capture_ac97_open(struct snd_pcm_substream * substream)1036*4882a593Smuzhiyun static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1037*4882a593Smuzhiyun {
1038*4882a593Smuzhiyun 	return snd_ymfpci_capture_open(substream, 1);
1039*4882a593Smuzhiyun }
1040*4882a593Smuzhiyun 
snd_ymfpci_playback_close_1(struct snd_pcm_substream * substream)1041*4882a593Smuzhiyun static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1042*4882a593Smuzhiyun {
1043*4882a593Smuzhiyun 	return 0;
1044*4882a593Smuzhiyun }
1045*4882a593Smuzhiyun 
snd_ymfpci_playback_close(struct snd_pcm_substream * substream)1046*4882a593Smuzhiyun static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1047*4882a593Smuzhiyun {
1048*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1049*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1050*4882a593Smuzhiyun 
1051*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1052*4882a593Smuzhiyun 	if (ypcm->output_rear && chip->rear_opened > 0) {
1053*4882a593Smuzhiyun 		chip->rear_opened--;
1054*4882a593Smuzhiyun 		ymfpci_close_extension(chip);
1055*4882a593Smuzhiyun 	}
1056*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1057*4882a593Smuzhiyun 	return snd_ymfpci_playback_close_1(substream);
1058*4882a593Smuzhiyun }
1059*4882a593Smuzhiyun 
snd_ymfpci_playback_spdif_close(struct snd_pcm_substream * substream)1060*4882a593Smuzhiyun static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1061*4882a593Smuzhiyun {
1062*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1063*4882a593Smuzhiyun 
1064*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1065*4882a593Smuzhiyun 	chip->spdif_opened = 0;
1066*4882a593Smuzhiyun 	ymfpci_close_extension(chip);
1067*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1068*4882a593Smuzhiyun 			  snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1069*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1070*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1071*4882a593Smuzhiyun 	chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1072*4882a593Smuzhiyun 	snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1073*4882a593Smuzhiyun 		       SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1074*4882a593Smuzhiyun 	return snd_ymfpci_playback_close_1(substream);
1075*4882a593Smuzhiyun }
1076*4882a593Smuzhiyun 
snd_ymfpci_playback_4ch_close(struct snd_pcm_substream * substream)1077*4882a593Smuzhiyun static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1078*4882a593Smuzhiyun {
1079*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1080*4882a593Smuzhiyun 
1081*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1082*4882a593Smuzhiyun 	if (chip->rear_opened > 0) {
1083*4882a593Smuzhiyun 		chip->rear_opened--;
1084*4882a593Smuzhiyun 		ymfpci_close_extension(chip);
1085*4882a593Smuzhiyun 	}
1086*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1087*4882a593Smuzhiyun 	return snd_ymfpci_playback_close_1(substream);
1088*4882a593Smuzhiyun }
1089*4882a593Smuzhiyun 
snd_ymfpci_capture_close(struct snd_pcm_substream * substream)1090*4882a593Smuzhiyun static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1091*4882a593Smuzhiyun {
1092*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1093*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
1094*4882a593Smuzhiyun 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1095*4882a593Smuzhiyun 
1096*4882a593Smuzhiyun 	if (ypcm != NULL) {
1097*4882a593Smuzhiyun 		chip->capture_substream[ypcm->capture_bank_number] = NULL;
1098*4882a593Smuzhiyun 		snd_ymfpci_hw_stop(chip);
1099*4882a593Smuzhiyun 	}
1100*4882a593Smuzhiyun 	return 0;
1101*4882a593Smuzhiyun }
1102*4882a593Smuzhiyun 
1103*4882a593Smuzhiyun static const struct snd_pcm_ops snd_ymfpci_playback_ops = {
1104*4882a593Smuzhiyun 	.open =			snd_ymfpci_playback_open,
1105*4882a593Smuzhiyun 	.close =		snd_ymfpci_playback_close,
1106*4882a593Smuzhiyun 	.hw_params =		snd_ymfpci_playback_hw_params,
1107*4882a593Smuzhiyun 	.hw_free =		snd_ymfpci_playback_hw_free,
1108*4882a593Smuzhiyun 	.prepare =		snd_ymfpci_playback_prepare,
1109*4882a593Smuzhiyun 	.trigger =		snd_ymfpci_playback_trigger,
1110*4882a593Smuzhiyun 	.pointer =		snd_ymfpci_playback_pointer,
1111*4882a593Smuzhiyun };
1112*4882a593Smuzhiyun 
1113*4882a593Smuzhiyun static const struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1114*4882a593Smuzhiyun 	.open =			snd_ymfpci_capture_rec_open,
1115*4882a593Smuzhiyun 	.close =		snd_ymfpci_capture_close,
1116*4882a593Smuzhiyun 	.hw_free =		snd_ymfpci_capture_hw_free,
1117*4882a593Smuzhiyun 	.prepare =		snd_ymfpci_capture_prepare,
1118*4882a593Smuzhiyun 	.trigger =		snd_ymfpci_capture_trigger,
1119*4882a593Smuzhiyun 	.pointer =		snd_ymfpci_capture_pointer,
1120*4882a593Smuzhiyun };
1121*4882a593Smuzhiyun 
snd_ymfpci_pcm(struct snd_ymfpci * chip,int device)1122*4882a593Smuzhiyun int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device)
1123*4882a593Smuzhiyun {
1124*4882a593Smuzhiyun 	struct snd_pcm *pcm;
1125*4882a593Smuzhiyun 	int err;
1126*4882a593Smuzhiyun 
1127*4882a593Smuzhiyun 	if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1128*4882a593Smuzhiyun 		return err;
1129*4882a593Smuzhiyun 	pcm->private_data = chip;
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1132*4882a593Smuzhiyun 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1133*4882a593Smuzhiyun 
1134*4882a593Smuzhiyun 	/* global setup */
1135*4882a593Smuzhiyun 	pcm->info_flags = 0;
1136*4882a593Smuzhiyun 	strcpy(pcm->name, "YMFPCI");
1137*4882a593Smuzhiyun 	chip->pcm = pcm;
1138*4882a593Smuzhiyun 
1139*4882a593Smuzhiyun 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1140*4882a593Smuzhiyun 				       &chip->pci->dev, 64*1024, 256*1024);
1141*4882a593Smuzhiyun 
1142*4882a593Smuzhiyun 	return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1143*4882a593Smuzhiyun 				     snd_pcm_std_chmaps, 2, 0, NULL);
1144*4882a593Smuzhiyun }
1145*4882a593Smuzhiyun 
1146*4882a593Smuzhiyun static const struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1147*4882a593Smuzhiyun 	.open =			snd_ymfpci_capture_ac97_open,
1148*4882a593Smuzhiyun 	.close =		snd_ymfpci_capture_close,
1149*4882a593Smuzhiyun 	.hw_free =		snd_ymfpci_capture_hw_free,
1150*4882a593Smuzhiyun 	.prepare =		snd_ymfpci_capture_prepare,
1151*4882a593Smuzhiyun 	.trigger =		snd_ymfpci_capture_trigger,
1152*4882a593Smuzhiyun 	.pointer =		snd_ymfpci_capture_pointer,
1153*4882a593Smuzhiyun };
1154*4882a593Smuzhiyun 
snd_ymfpci_pcm2(struct snd_ymfpci * chip,int device)1155*4882a593Smuzhiyun int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device)
1156*4882a593Smuzhiyun {
1157*4882a593Smuzhiyun 	struct snd_pcm *pcm;
1158*4882a593Smuzhiyun 	int err;
1159*4882a593Smuzhiyun 
1160*4882a593Smuzhiyun 	if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1161*4882a593Smuzhiyun 		return err;
1162*4882a593Smuzhiyun 	pcm->private_data = chip;
1163*4882a593Smuzhiyun 
1164*4882a593Smuzhiyun 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1165*4882a593Smuzhiyun 
1166*4882a593Smuzhiyun 	/* global setup */
1167*4882a593Smuzhiyun 	pcm->info_flags = 0;
1168*4882a593Smuzhiyun 	sprintf(pcm->name, "YMFPCI - %s",
1169*4882a593Smuzhiyun 		chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1170*4882a593Smuzhiyun 	chip->pcm2 = pcm;
1171*4882a593Smuzhiyun 
1172*4882a593Smuzhiyun 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1173*4882a593Smuzhiyun 				       &chip->pci->dev, 64*1024, 256*1024);
1174*4882a593Smuzhiyun 
1175*4882a593Smuzhiyun 	return 0;
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun 
1178*4882a593Smuzhiyun static const struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1179*4882a593Smuzhiyun 	.open =			snd_ymfpci_playback_spdif_open,
1180*4882a593Smuzhiyun 	.close =		snd_ymfpci_playback_spdif_close,
1181*4882a593Smuzhiyun 	.hw_params =		snd_ymfpci_playback_hw_params,
1182*4882a593Smuzhiyun 	.hw_free =		snd_ymfpci_playback_hw_free,
1183*4882a593Smuzhiyun 	.prepare =		snd_ymfpci_playback_prepare,
1184*4882a593Smuzhiyun 	.trigger =		snd_ymfpci_playback_trigger,
1185*4882a593Smuzhiyun 	.pointer =		snd_ymfpci_playback_pointer,
1186*4882a593Smuzhiyun };
1187*4882a593Smuzhiyun 
snd_ymfpci_pcm_spdif(struct snd_ymfpci * chip,int device)1188*4882a593Smuzhiyun int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device)
1189*4882a593Smuzhiyun {
1190*4882a593Smuzhiyun 	struct snd_pcm *pcm;
1191*4882a593Smuzhiyun 	int err;
1192*4882a593Smuzhiyun 
1193*4882a593Smuzhiyun 	if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1194*4882a593Smuzhiyun 		return err;
1195*4882a593Smuzhiyun 	pcm->private_data = chip;
1196*4882a593Smuzhiyun 
1197*4882a593Smuzhiyun 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1198*4882a593Smuzhiyun 
1199*4882a593Smuzhiyun 	/* global setup */
1200*4882a593Smuzhiyun 	pcm->info_flags = 0;
1201*4882a593Smuzhiyun 	strcpy(pcm->name, "YMFPCI - IEC958");
1202*4882a593Smuzhiyun 	chip->pcm_spdif = pcm;
1203*4882a593Smuzhiyun 
1204*4882a593Smuzhiyun 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1205*4882a593Smuzhiyun 				       &chip->pci->dev, 64*1024, 256*1024);
1206*4882a593Smuzhiyun 
1207*4882a593Smuzhiyun 	return 0;
1208*4882a593Smuzhiyun }
1209*4882a593Smuzhiyun 
1210*4882a593Smuzhiyun static const struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1211*4882a593Smuzhiyun 	.open =			snd_ymfpci_playback_4ch_open,
1212*4882a593Smuzhiyun 	.close =		snd_ymfpci_playback_4ch_close,
1213*4882a593Smuzhiyun 	.hw_params =		snd_ymfpci_playback_hw_params,
1214*4882a593Smuzhiyun 	.hw_free =		snd_ymfpci_playback_hw_free,
1215*4882a593Smuzhiyun 	.prepare =		snd_ymfpci_playback_prepare,
1216*4882a593Smuzhiyun 	.trigger =		snd_ymfpci_playback_trigger,
1217*4882a593Smuzhiyun 	.pointer =		snd_ymfpci_playback_pointer,
1218*4882a593Smuzhiyun };
1219*4882a593Smuzhiyun 
1220*4882a593Smuzhiyun static const struct snd_pcm_chmap_elem surround_map[] = {
1221*4882a593Smuzhiyun 	{ .channels = 1,
1222*4882a593Smuzhiyun 	  .map = { SNDRV_CHMAP_MONO } },
1223*4882a593Smuzhiyun 	{ .channels = 2,
1224*4882a593Smuzhiyun 	  .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
1225*4882a593Smuzhiyun 	{ }
1226*4882a593Smuzhiyun };
1227*4882a593Smuzhiyun 
snd_ymfpci_pcm_4ch(struct snd_ymfpci * chip,int device)1228*4882a593Smuzhiyun int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device)
1229*4882a593Smuzhiyun {
1230*4882a593Smuzhiyun 	struct snd_pcm *pcm;
1231*4882a593Smuzhiyun 	int err;
1232*4882a593Smuzhiyun 
1233*4882a593Smuzhiyun 	if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1234*4882a593Smuzhiyun 		return err;
1235*4882a593Smuzhiyun 	pcm->private_data = chip;
1236*4882a593Smuzhiyun 
1237*4882a593Smuzhiyun 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1238*4882a593Smuzhiyun 
1239*4882a593Smuzhiyun 	/* global setup */
1240*4882a593Smuzhiyun 	pcm->info_flags = 0;
1241*4882a593Smuzhiyun 	strcpy(pcm->name, "YMFPCI - Rear PCM");
1242*4882a593Smuzhiyun 	chip->pcm_4ch = pcm;
1243*4882a593Smuzhiyun 
1244*4882a593Smuzhiyun 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1245*4882a593Smuzhiyun 				       &chip->pci->dev, 64*1024, 256*1024);
1246*4882a593Smuzhiyun 
1247*4882a593Smuzhiyun 	return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1248*4882a593Smuzhiyun 				     surround_map, 2, 0, NULL);
1249*4882a593Smuzhiyun }
1250*4882a593Smuzhiyun 
snd_ymfpci_spdif_default_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1251*4882a593Smuzhiyun static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1252*4882a593Smuzhiyun {
1253*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1254*4882a593Smuzhiyun 	uinfo->count = 1;
1255*4882a593Smuzhiyun 	return 0;
1256*4882a593Smuzhiyun }
1257*4882a593Smuzhiyun 
snd_ymfpci_spdif_default_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1258*4882a593Smuzhiyun static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1259*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
1260*4882a593Smuzhiyun {
1261*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1262*4882a593Smuzhiyun 
1263*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1264*4882a593Smuzhiyun 	ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1265*4882a593Smuzhiyun 	ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1266*4882a593Smuzhiyun 	ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1267*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1268*4882a593Smuzhiyun 	return 0;
1269*4882a593Smuzhiyun }
1270*4882a593Smuzhiyun 
snd_ymfpci_spdif_default_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1271*4882a593Smuzhiyun static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1272*4882a593Smuzhiyun 					 struct snd_ctl_elem_value *ucontrol)
1273*4882a593Smuzhiyun {
1274*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1275*4882a593Smuzhiyun 	unsigned int val;
1276*4882a593Smuzhiyun 	int change;
1277*4882a593Smuzhiyun 
1278*4882a593Smuzhiyun 	val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1279*4882a593Smuzhiyun 	      (ucontrol->value.iec958.status[1] << 8);
1280*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1281*4882a593Smuzhiyun 	change = chip->spdif_bits != val;
1282*4882a593Smuzhiyun 	chip->spdif_bits = val;
1283*4882a593Smuzhiyun 	if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1284*4882a593Smuzhiyun 		snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1285*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1286*4882a593Smuzhiyun 	return change;
1287*4882a593Smuzhiyun }
1288*4882a593Smuzhiyun 
1289*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ymfpci_spdif_default =
1290*4882a593Smuzhiyun {
1291*4882a593Smuzhiyun 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1292*4882a593Smuzhiyun 	.name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1293*4882a593Smuzhiyun 	.info =		snd_ymfpci_spdif_default_info,
1294*4882a593Smuzhiyun 	.get =		snd_ymfpci_spdif_default_get,
1295*4882a593Smuzhiyun 	.put =		snd_ymfpci_spdif_default_put
1296*4882a593Smuzhiyun };
1297*4882a593Smuzhiyun 
snd_ymfpci_spdif_mask_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1298*4882a593Smuzhiyun static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1299*4882a593Smuzhiyun {
1300*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1301*4882a593Smuzhiyun 	uinfo->count = 1;
1302*4882a593Smuzhiyun 	return 0;
1303*4882a593Smuzhiyun }
1304*4882a593Smuzhiyun 
snd_ymfpci_spdif_mask_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1305*4882a593Smuzhiyun static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1306*4882a593Smuzhiyun 				      struct snd_ctl_elem_value *ucontrol)
1307*4882a593Smuzhiyun {
1308*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1309*4882a593Smuzhiyun 
1310*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1311*4882a593Smuzhiyun 	ucontrol->value.iec958.status[0] = 0x3e;
1312*4882a593Smuzhiyun 	ucontrol->value.iec958.status[1] = 0xff;
1313*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1314*4882a593Smuzhiyun 	return 0;
1315*4882a593Smuzhiyun }
1316*4882a593Smuzhiyun 
1317*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ymfpci_spdif_mask =
1318*4882a593Smuzhiyun {
1319*4882a593Smuzhiyun 	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
1320*4882a593Smuzhiyun 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1321*4882a593Smuzhiyun 	.name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1322*4882a593Smuzhiyun 	.info =		snd_ymfpci_spdif_mask_info,
1323*4882a593Smuzhiyun 	.get =		snd_ymfpci_spdif_mask_get,
1324*4882a593Smuzhiyun };
1325*4882a593Smuzhiyun 
snd_ymfpci_spdif_stream_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1326*4882a593Smuzhiyun static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1327*4882a593Smuzhiyun {
1328*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1329*4882a593Smuzhiyun 	uinfo->count = 1;
1330*4882a593Smuzhiyun 	return 0;
1331*4882a593Smuzhiyun }
1332*4882a593Smuzhiyun 
snd_ymfpci_spdif_stream_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1333*4882a593Smuzhiyun static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1334*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
1335*4882a593Smuzhiyun {
1336*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1337*4882a593Smuzhiyun 
1338*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1339*4882a593Smuzhiyun 	ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1340*4882a593Smuzhiyun 	ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1341*4882a593Smuzhiyun 	ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1342*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1343*4882a593Smuzhiyun 	return 0;
1344*4882a593Smuzhiyun }
1345*4882a593Smuzhiyun 
snd_ymfpci_spdif_stream_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1346*4882a593Smuzhiyun static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1347*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
1348*4882a593Smuzhiyun {
1349*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1350*4882a593Smuzhiyun 	unsigned int val;
1351*4882a593Smuzhiyun 	int change;
1352*4882a593Smuzhiyun 
1353*4882a593Smuzhiyun 	val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1354*4882a593Smuzhiyun 	      (ucontrol->value.iec958.status[1] << 8);
1355*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1356*4882a593Smuzhiyun 	change = chip->spdif_pcm_bits != val;
1357*4882a593Smuzhiyun 	chip->spdif_pcm_bits = val;
1358*4882a593Smuzhiyun 	if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1359*4882a593Smuzhiyun 		snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1360*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1361*4882a593Smuzhiyun 	return change;
1362*4882a593Smuzhiyun }
1363*4882a593Smuzhiyun 
1364*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ymfpci_spdif_stream =
1365*4882a593Smuzhiyun {
1366*4882a593Smuzhiyun 	.access =	SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1367*4882a593Smuzhiyun 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1368*4882a593Smuzhiyun 	.name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1369*4882a593Smuzhiyun 	.info =		snd_ymfpci_spdif_stream_info,
1370*4882a593Smuzhiyun 	.get =		snd_ymfpci_spdif_stream_get,
1371*4882a593Smuzhiyun 	.put =		snd_ymfpci_spdif_stream_put
1372*4882a593Smuzhiyun };
1373*4882a593Smuzhiyun 
snd_ymfpci_drec_source_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * info)1374*4882a593Smuzhiyun static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1375*4882a593Smuzhiyun {
1376*4882a593Smuzhiyun 	static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"};
1377*4882a593Smuzhiyun 
1378*4882a593Smuzhiyun 	return snd_ctl_enum_info(info, 1, 3, texts);
1379*4882a593Smuzhiyun }
1380*4882a593Smuzhiyun 
snd_ymfpci_drec_source_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)1381*4882a593Smuzhiyun static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1382*4882a593Smuzhiyun {
1383*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1384*4882a593Smuzhiyun 	u16 reg;
1385*4882a593Smuzhiyun 
1386*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1387*4882a593Smuzhiyun 	reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1388*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1389*4882a593Smuzhiyun 	if (!(reg & 0x100))
1390*4882a593Smuzhiyun 		value->value.enumerated.item[0] = 0;
1391*4882a593Smuzhiyun 	else
1392*4882a593Smuzhiyun 		value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1393*4882a593Smuzhiyun 	return 0;
1394*4882a593Smuzhiyun }
1395*4882a593Smuzhiyun 
snd_ymfpci_drec_source_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)1396*4882a593Smuzhiyun static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1397*4882a593Smuzhiyun {
1398*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1399*4882a593Smuzhiyun 	u16 reg, old_reg;
1400*4882a593Smuzhiyun 
1401*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1402*4882a593Smuzhiyun 	old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1403*4882a593Smuzhiyun 	if (value->value.enumerated.item[0] == 0)
1404*4882a593Smuzhiyun 		reg = old_reg & ~0x100;
1405*4882a593Smuzhiyun 	else
1406*4882a593Smuzhiyun 		reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1407*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1408*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1409*4882a593Smuzhiyun 	return reg != old_reg;
1410*4882a593Smuzhiyun }
1411*4882a593Smuzhiyun 
1412*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ymfpci_drec_source = {
1413*4882a593Smuzhiyun 	.access =	SNDRV_CTL_ELEM_ACCESS_READWRITE,
1414*4882a593Smuzhiyun 	.iface =	SNDRV_CTL_ELEM_IFACE_MIXER,
1415*4882a593Smuzhiyun 	.name =		"Direct Recording Source",
1416*4882a593Smuzhiyun 	.info =		snd_ymfpci_drec_source_info,
1417*4882a593Smuzhiyun 	.get =		snd_ymfpci_drec_source_get,
1418*4882a593Smuzhiyun 	.put =		snd_ymfpci_drec_source_put
1419*4882a593Smuzhiyun };
1420*4882a593Smuzhiyun 
1421*4882a593Smuzhiyun /*
1422*4882a593Smuzhiyun  *  Mixer controls
1423*4882a593Smuzhiyun  */
1424*4882a593Smuzhiyun 
1425*4882a593Smuzhiyun #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1426*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1427*4882a593Smuzhiyun   .info = snd_ymfpci_info_single, \
1428*4882a593Smuzhiyun   .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1429*4882a593Smuzhiyun   .private_value = ((reg) | ((shift) << 16)) }
1430*4882a593Smuzhiyun 
1431*4882a593Smuzhiyun #define snd_ymfpci_info_single		snd_ctl_boolean_mono_info
1432*4882a593Smuzhiyun 
snd_ymfpci_get_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1433*4882a593Smuzhiyun static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1434*4882a593Smuzhiyun 				 struct snd_ctl_elem_value *ucontrol)
1435*4882a593Smuzhiyun {
1436*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1437*4882a593Smuzhiyun 	int reg = kcontrol->private_value & 0xffff;
1438*4882a593Smuzhiyun 	unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1439*4882a593Smuzhiyun 	unsigned int mask = 1;
1440*4882a593Smuzhiyun 
1441*4882a593Smuzhiyun 	switch (reg) {
1442*4882a593Smuzhiyun 	case YDSXGR_SPDIFOUTCTRL: break;
1443*4882a593Smuzhiyun 	case YDSXGR_SPDIFINCTRL: break;
1444*4882a593Smuzhiyun 	default: return -EINVAL;
1445*4882a593Smuzhiyun 	}
1446*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] =
1447*4882a593Smuzhiyun 		(snd_ymfpci_readl(chip, reg) >> shift) & mask;
1448*4882a593Smuzhiyun 	return 0;
1449*4882a593Smuzhiyun }
1450*4882a593Smuzhiyun 
snd_ymfpci_put_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1451*4882a593Smuzhiyun static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1452*4882a593Smuzhiyun 				 struct snd_ctl_elem_value *ucontrol)
1453*4882a593Smuzhiyun {
1454*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1455*4882a593Smuzhiyun 	int reg = kcontrol->private_value & 0xffff;
1456*4882a593Smuzhiyun 	unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1457*4882a593Smuzhiyun  	unsigned int mask = 1;
1458*4882a593Smuzhiyun 	int change;
1459*4882a593Smuzhiyun 	unsigned int val, oval;
1460*4882a593Smuzhiyun 
1461*4882a593Smuzhiyun 	switch (reg) {
1462*4882a593Smuzhiyun 	case YDSXGR_SPDIFOUTCTRL: break;
1463*4882a593Smuzhiyun 	case YDSXGR_SPDIFINCTRL: break;
1464*4882a593Smuzhiyun 	default: return -EINVAL;
1465*4882a593Smuzhiyun 	}
1466*4882a593Smuzhiyun 	val = (ucontrol->value.integer.value[0] & mask);
1467*4882a593Smuzhiyun 	val <<= shift;
1468*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1469*4882a593Smuzhiyun 	oval = snd_ymfpci_readl(chip, reg);
1470*4882a593Smuzhiyun 	val = (oval & ~(mask << shift)) | val;
1471*4882a593Smuzhiyun 	change = val != oval;
1472*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, reg, val);
1473*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1474*4882a593Smuzhiyun 	return change;
1475*4882a593Smuzhiyun }
1476*4882a593Smuzhiyun 
1477*4882a593Smuzhiyun static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
1478*4882a593Smuzhiyun 
1479*4882a593Smuzhiyun #define YMFPCI_DOUBLE(xname, xindex, reg) \
1480*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1481*4882a593Smuzhiyun   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1482*4882a593Smuzhiyun   .info = snd_ymfpci_info_double, \
1483*4882a593Smuzhiyun   .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1484*4882a593Smuzhiyun   .private_value = reg, \
1485*4882a593Smuzhiyun   .tlv = { .p = db_scale_native } }
1486*4882a593Smuzhiyun 
snd_ymfpci_info_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1487*4882a593Smuzhiyun static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1488*4882a593Smuzhiyun {
1489*4882a593Smuzhiyun 	unsigned int reg = kcontrol->private_value;
1490*4882a593Smuzhiyun 
1491*4882a593Smuzhiyun 	if (reg < 0x80 || reg >= 0xc0)
1492*4882a593Smuzhiyun 		return -EINVAL;
1493*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1494*4882a593Smuzhiyun 	uinfo->count = 2;
1495*4882a593Smuzhiyun 	uinfo->value.integer.min = 0;
1496*4882a593Smuzhiyun 	uinfo->value.integer.max = 16383;
1497*4882a593Smuzhiyun 	return 0;
1498*4882a593Smuzhiyun }
1499*4882a593Smuzhiyun 
snd_ymfpci_get_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1500*4882a593Smuzhiyun static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1501*4882a593Smuzhiyun {
1502*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1503*4882a593Smuzhiyun 	unsigned int reg = kcontrol->private_value;
1504*4882a593Smuzhiyun 	unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1505*4882a593Smuzhiyun 	unsigned int val;
1506*4882a593Smuzhiyun 
1507*4882a593Smuzhiyun 	if (reg < 0x80 || reg >= 0xc0)
1508*4882a593Smuzhiyun 		return -EINVAL;
1509*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1510*4882a593Smuzhiyun 	val = snd_ymfpci_readl(chip, reg);
1511*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1512*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1513*4882a593Smuzhiyun 	ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1514*4882a593Smuzhiyun 	return 0;
1515*4882a593Smuzhiyun }
1516*4882a593Smuzhiyun 
snd_ymfpci_put_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1517*4882a593Smuzhiyun static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1518*4882a593Smuzhiyun {
1519*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1520*4882a593Smuzhiyun 	unsigned int reg = kcontrol->private_value;
1521*4882a593Smuzhiyun 	unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1522*4882a593Smuzhiyun 	int change;
1523*4882a593Smuzhiyun 	unsigned int val1, val2, oval;
1524*4882a593Smuzhiyun 
1525*4882a593Smuzhiyun 	if (reg < 0x80 || reg >= 0xc0)
1526*4882a593Smuzhiyun 		return -EINVAL;
1527*4882a593Smuzhiyun 	val1 = ucontrol->value.integer.value[0] & mask;
1528*4882a593Smuzhiyun 	val2 = ucontrol->value.integer.value[1] & mask;
1529*4882a593Smuzhiyun 	val1 <<= shift_left;
1530*4882a593Smuzhiyun 	val2 <<= shift_right;
1531*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1532*4882a593Smuzhiyun 	oval = snd_ymfpci_readl(chip, reg);
1533*4882a593Smuzhiyun 	val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1534*4882a593Smuzhiyun 	change = val1 != oval;
1535*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, reg, val1);
1536*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1537*4882a593Smuzhiyun 	return change;
1538*4882a593Smuzhiyun }
1539*4882a593Smuzhiyun 
snd_ymfpci_put_nativedacvol(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1540*4882a593Smuzhiyun static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
1541*4882a593Smuzhiyun 				       struct snd_ctl_elem_value *ucontrol)
1542*4882a593Smuzhiyun {
1543*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1544*4882a593Smuzhiyun 	unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
1545*4882a593Smuzhiyun 	unsigned int reg2 = YDSXGR_BUF441OUTVOL;
1546*4882a593Smuzhiyun 	int change;
1547*4882a593Smuzhiyun 	unsigned int value, oval;
1548*4882a593Smuzhiyun 
1549*4882a593Smuzhiyun 	value = ucontrol->value.integer.value[0] & 0x3fff;
1550*4882a593Smuzhiyun 	value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
1551*4882a593Smuzhiyun 	spin_lock_irq(&chip->reg_lock);
1552*4882a593Smuzhiyun 	oval = snd_ymfpci_readl(chip, reg);
1553*4882a593Smuzhiyun 	change = value != oval;
1554*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, reg, value);
1555*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, reg2, value);
1556*4882a593Smuzhiyun 	spin_unlock_irq(&chip->reg_lock);
1557*4882a593Smuzhiyun 	return change;
1558*4882a593Smuzhiyun }
1559*4882a593Smuzhiyun 
1560*4882a593Smuzhiyun /*
1561*4882a593Smuzhiyun  * 4ch duplication
1562*4882a593Smuzhiyun  */
1563*4882a593Smuzhiyun #define snd_ymfpci_info_dup4ch		snd_ctl_boolean_mono_info
1564*4882a593Smuzhiyun 
snd_ymfpci_get_dup4ch(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1565*4882a593Smuzhiyun static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1566*4882a593Smuzhiyun {
1567*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1568*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1569*4882a593Smuzhiyun 	return 0;
1570*4882a593Smuzhiyun }
1571*4882a593Smuzhiyun 
snd_ymfpci_put_dup4ch(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1572*4882a593Smuzhiyun static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1573*4882a593Smuzhiyun {
1574*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1575*4882a593Smuzhiyun 	int change;
1576*4882a593Smuzhiyun 	change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1577*4882a593Smuzhiyun 	if (change)
1578*4882a593Smuzhiyun 		chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1579*4882a593Smuzhiyun 	return change;
1580*4882a593Smuzhiyun }
1581*4882a593Smuzhiyun 
1582*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ymfpci_dup4ch = {
1583*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1584*4882a593Smuzhiyun 	.name = "4ch Duplication",
1585*4882a593Smuzhiyun 	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1586*4882a593Smuzhiyun 	.info = snd_ymfpci_info_dup4ch,
1587*4882a593Smuzhiyun 	.get = snd_ymfpci_get_dup4ch,
1588*4882a593Smuzhiyun 	.put = snd_ymfpci_put_dup4ch,
1589*4882a593Smuzhiyun };
1590*4882a593Smuzhiyun 
1591*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ymfpci_controls[] = {
1592*4882a593Smuzhiyun {
1593*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1594*4882a593Smuzhiyun 	.name = "Wave Playback Volume",
1595*4882a593Smuzhiyun 	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1596*4882a593Smuzhiyun 		  SNDRV_CTL_ELEM_ACCESS_TLV_READ,
1597*4882a593Smuzhiyun 	.info = snd_ymfpci_info_double,
1598*4882a593Smuzhiyun 	.get = snd_ymfpci_get_double,
1599*4882a593Smuzhiyun 	.put = snd_ymfpci_put_nativedacvol,
1600*4882a593Smuzhiyun 	.private_value = YDSXGR_NATIVEDACOUTVOL,
1601*4882a593Smuzhiyun 	.tlv = { .p = db_scale_native },
1602*4882a593Smuzhiyun },
1603*4882a593Smuzhiyun YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1604*4882a593Smuzhiyun YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1605*4882a593Smuzhiyun YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1606*4882a593Smuzhiyun YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1607*4882a593Smuzhiyun YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1608*4882a593Smuzhiyun YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1609*4882a593Smuzhiyun YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1610*4882a593Smuzhiyun YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL),
1611*4882a593Smuzhiyun YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1612*4882a593Smuzhiyun YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1613*4882a593Smuzhiyun YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1614*4882a593Smuzhiyun YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1615*4882a593Smuzhiyun YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1616*4882a593Smuzhiyun YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1617*4882a593Smuzhiyun YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1618*4882a593Smuzhiyun };
1619*4882a593Smuzhiyun 
1620*4882a593Smuzhiyun 
1621*4882a593Smuzhiyun /*
1622*4882a593Smuzhiyun  * GPIO
1623*4882a593Smuzhiyun  */
1624*4882a593Smuzhiyun 
snd_ymfpci_get_gpio_out(struct snd_ymfpci * chip,int pin)1625*4882a593Smuzhiyun static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1626*4882a593Smuzhiyun {
1627*4882a593Smuzhiyun 	u16 reg, mode;
1628*4882a593Smuzhiyun 	unsigned long flags;
1629*4882a593Smuzhiyun 
1630*4882a593Smuzhiyun 	spin_lock_irqsave(&chip->reg_lock, flags);
1631*4882a593Smuzhiyun 	reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1632*4882a593Smuzhiyun 	reg &= ~(1 << (pin + 8));
1633*4882a593Smuzhiyun 	reg |= (1 << pin);
1634*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1635*4882a593Smuzhiyun 	/* set the level mode for input line */
1636*4882a593Smuzhiyun 	mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1637*4882a593Smuzhiyun 	mode &= ~(3 << (pin * 2));
1638*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1639*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1640*4882a593Smuzhiyun 	mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1641*4882a593Smuzhiyun 	spin_unlock_irqrestore(&chip->reg_lock, flags);
1642*4882a593Smuzhiyun 	return (mode >> pin) & 1;
1643*4882a593Smuzhiyun }
1644*4882a593Smuzhiyun 
snd_ymfpci_set_gpio_out(struct snd_ymfpci * chip,int pin,int enable)1645*4882a593Smuzhiyun static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1646*4882a593Smuzhiyun {
1647*4882a593Smuzhiyun 	u16 reg;
1648*4882a593Smuzhiyun 	unsigned long flags;
1649*4882a593Smuzhiyun 
1650*4882a593Smuzhiyun 	spin_lock_irqsave(&chip->reg_lock, flags);
1651*4882a593Smuzhiyun 	reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1652*4882a593Smuzhiyun 	reg &= ~(1 << pin);
1653*4882a593Smuzhiyun 	reg &= ~(1 << (pin + 8));
1654*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1655*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1656*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1657*4882a593Smuzhiyun 	spin_unlock_irqrestore(&chip->reg_lock, flags);
1658*4882a593Smuzhiyun 
1659*4882a593Smuzhiyun 	return 0;
1660*4882a593Smuzhiyun }
1661*4882a593Smuzhiyun 
1662*4882a593Smuzhiyun #define snd_ymfpci_gpio_sw_info		snd_ctl_boolean_mono_info
1663*4882a593Smuzhiyun 
snd_ymfpci_gpio_sw_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1664*4882a593Smuzhiyun static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1665*4882a593Smuzhiyun {
1666*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1667*4882a593Smuzhiyun 	int pin = (int)kcontrol->private_value;
1668*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1669*4882a593Smuzhiyun 	return 0;
1670*4882a593Smuzhiyun }
1671*4882a593Smuzhiyun 
snd_ymfpci_gpio_sw_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1672*4882a593Smuzhiyun static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1673*4882a593Smuzhiyun {
1674*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1675*4882a593Smuzhiyun 	int pin = (int)kcontrol->private_value;
1676*4882a593Smuzhiyun 
1677*4882a593Smuzhiyun 	if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1678*4882a593Smuzhiyun 		snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1679*4882a593Smuzhiyun 		ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1680*4882a593Smuzhiyun 		return 1;
1681*4882a593Smuzhiyun 	}
1682*4882a593Smuzhiyun 	return 0;
1683*4882a593Smuzhiyun }
1684*4882a593Smuzhiyun 
1685*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ymfpci_rear_shared = {
1686*4882a593Smuzhiyun 	.name = "Shared Rear/Line-In Switch",
1687*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1688*4882a593Smuzhiyun 	.info = snd_ymfpci_gpio_sw_info,
1689*4882a593Smuzhiyun 	.get = snd_ymfpci_gpio_sw_get,
1690*4882a593Smuzhiyun 	.put = snd_ymfpci_gpio_sw_put,
1691*4882a593Smuzhiyun 	.private_value = 2,
1692*4882a593Smuzhiyun };
1693*4882a593Smuzhiyun 
1694*4882a593Smuzhiyun /*
1695*4882a593Smuzhiyun  * PCM voice volume
1696*4882a593Smuzhiyun  */
1697*4882a593Smuzhiyun 
snd_ymfpci_pcm_vol_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1698*4882a593Smuzhiyun static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1699*4882a593Smuzhiyun 				   struct snd_ctl_elem_info *uinfo)
1700*4882a593Smuzhiyun {
1701*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1702*4882a593Smuzhiyun 	uinfo->count = 2;
1703*4882a593Smuzhiyun 	uinfo->value.integer.min = 0;
1704*4882a593Smuzhiyun 	uinfo->value.integer.max = 0x8000;
1705*4882a593Smuzhiyun 	return 0;
1706*4882a593Smuzhiyun }
1707*4882a593Smuzhiyun 
snd_ymfpci_pcm_vol_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1708*4882a593Smuzhiyun static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1709*4882a593Smuzhiyun 				  struct snd_ctl_elem_value *ucontrol)
1710*4882a593Smuzhiyun {
1711*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1712*4882a593Smuzhiyun 	unsigned int subs = kcontrol->id.subdevice;
1713*4882a593Smuzhiyun 
1714*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1715*4882a593Smuzhiyun 	ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1716*4882a593Smuzhiyun 	return 0;
1717*4882a593Smuzhiyun }
1718*4882a593Smuzhiyun 
snd_ymfpci_pcm_vol_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1719*4882a593Smuzhiyun static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1720*4882a593Smuzhiyun 				  struct snd_ctl_elem_value *ucontrol)
1721*4882a593Smuzhiyun {
1722*4882a593Smuzhiyun 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1723*4882a593Smuzhiyun 	unsigned int subs = kcontrol->id.subdevice;
1724*4882a593Smuzhiyun 	struct snd_pcm_substream *substream;
1725*4882a593Smuzhiyun 	unsigned long flags;
1726*4882a593Smuzhiyun 
1727*4882a593Smuzhiyun 	if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1728*4882a593Smuzhiyun 	    ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1729*4882a593Smuzhiyun 		chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1730*4882a593Smuzhiyun 		chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1731*4882a593Smuzhiyun 		if (chip->pcm_mixer[subs].left > 0x8000)
1732*4882a593Smuzhiyun 			chip->pcm_mixer[subs].left = 0x8000;
1733*4882a593Smuzhiyun 		if (chip->pcm_mixer[subs].right > 0x8000)
1734*4882a593Smuzhiyun 			chip->pcm_mixer[subs].right = 0x8000;
1735*4882a593Smuzhiyun 
1736*4882a593Smuzhiyun 		substream = (struct snd_pcm_substream *)kcontrol->private_value;
1737*4882a593Smuzhiyun 		spin_lock_irqsave(&chip->voice_lock, flags);
1738*4882a593Smuzhiyun 		if (substream->runtime && substream->runtime->private_data) {
1739*4882a593Smuzhiyun 			struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1740*4882a593Smuzhiyun 			if (!ypcm->use_441_slot)
1741*4882a593Smuzhiyun 				ypcm->update_pcm_vol = 2;
1742*4882a593Smuzhiyun 		}
1743*4882a593Smuzhiyun 		spin_unlock_irqrestore(&chip->voice_lock, flags);
1744*4882a593Smuzhiyun 		return 1;
1745*4882a593Smuzhiyun 	}
1746*4882a593Smuzhiyun 	return 0;
1747*4882a593Smuzhiyun }
1748*4882a593Smuzhiyun 
1749*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ymfpci_pcm_volume = {
1750*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
1751*4882a593Smuzhiyun 	.name = "PCM Playback Volume",
1752*4882a593Smuzhiyun 	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1753*4882a593Smuzhiyun 		SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1754*4882a593Smuzhiyun 	.info = snd_ymfpci_pcm_vol_info,
1755*4882a593Smuzhiyun 	.get = snd_ymfpci_pcm_vol_get,
1756*4882a593Smuzhiyun 	.put = snd_ymfpci_pcm_vol_put,
1757*4882a593Smuzhiyun };
1758*4882a593Smuzhiyun 
1759*4882a593Smuzhiyun 
1760*4882a593Smuzhiyun /*
1761*4882a593Smuzhiyun  *  Mixer routines
1762*4882a593Smuzhiyun  */
1763*4882a593Smuzhiyun 
snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus * bus)1764*4882a593Smuzhiyun static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1765*4882a593Smuzhiyun {
1766*4882a593Smuzhiyun 	struct snd_ymfpci *chip = bus->private_data;
1767*4882a593Smuzhiyun 	chip->ac97_bus = NULL;
1768*4882a593Smuzhiyun }
1769*4882a593Smuzhiyun 
snd_ymfpci_mixer_free_ac97(struct snd_ac97 * ac97)1770*4882a593Smuzhiyun static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1771*4882a593Smuzhiyun {
1772*4882a593Smuzhiyun 	struct snd_ymfpci *chip = ac97->private_data;
1773*4882a593Smuzhiyun 	chip->ac97 = NULL;
1774*4882a593Smuzhiyun }
1775*4882a593Smuzhiyun 
snd_ymfpci_mixer(struct snd_ymfpci * chip,int rear_switch)1776*4882a593Smuzhiyun int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
1777*4882a593Smuzhiyun {
1778*4882a593Smuzhiyun 	struct snd_ac97_template ac97;
1779*4882a593Smuzhiyun 	struct snd_kcontrol *kctl;
1780*4882a593Smuzhiyun 	struct snd_pcm_substream *substream;
1781*4882a593Smuzhiyun 	unsigned int idx;
1782*4882a593Smuzhiyun 	int err;
1783*4882a593Smuzhiyun 	static const struct snd_ac97_bus_ops ops = {
1784*4882a593Smuzhiyun 		.write = snd_ymfpci_codec_write,
1785*4882a593Smuzhiyun 		.read = snd_ymfpci_codec_read,
1786*4882a593Smuzhiyun 	};
1787*4882a593Smuzhiyun 
1788*4882a593Smuzhiyun 	if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1789*4882a593Smuzhiyun 		return err;
1790*4882a593Smuzhiyun 	chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1791*4882a593Smuzhiyun 	chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1792*4882a593Smuzhiyun 
1793*4882a593Smuzhiyun 	memset(&ac97, 0, sizeof(ac97));
1794*4882a593Smuzhiyun 	ac97.private_data = chip;
1795*4882a593Smuzhiyun 	ac97.private_free = snd_ymfpci_mixer_free_ac97;
1796*4882a593Smuzhiyun 	if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1797*4882a593Smuzhiyun 		return err;
1798*4882a593Smuzhiyun 
1799*4882a593Smuzhiyun 	/* to be sure */
1800*4882a593Smuzhiyun 	snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1801*4882a593Smuzhiyun 			     AC97_EA_VRA|AC97_EA_VRM, 0);
1802*4882a593Smuzhiyun 
1803*4882a593Smuzhiyun 	for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1804*4882a593Smuzhiyun 		if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1805*4882a593Smuzhiyun 			return err;
1806*4882a593Smuzhiyun 	}
1807*4882a593Smuzhiyun 	if (chip->ac97->ext_id & AC97_EI_SDAC) {
1808*4882a593Smuzhiyun 		kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip);
1809*4882a593Smuzhiyun 		err = snd_ctl_add(chip->card, kctl);
1810*4882a593Smuzhiyun 		if (err < 0)
1811*4882a593Smuzhiyun 			return err;
1812*4882a593Smuzhiyun 	}
1813*4882a593Smuzhiyun 
1814*4882a593Smuzhiyun 	/* add S/PDIF control */
1815*4882a593Smuzhiyun 	if (snd_BUG_ON(!chip->pcm_spdif))
1816*4882a593Smuzhiyun 		return -ENXIO;
1817*4882a593Smuzhiyun 	if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1818*4882a593Smuzhiyun 		return err;
1819*4882a593Smuzhiyun 	kctl->id.device = chip->pcm_spdif->device;
1820*4882a593Smuzhiyun 	if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1821*4882a593Smuzhiyun 		return err;
1822*4882a593Smuzhiyun 	kctl->id.device = chip->pcm_spdif->device;
1823*4882a593Smuzhiyun 	if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1824*4882a593Smuzhiyun 		return err;
1825*4882a593Smuzhiyun 	kctl->id.device = chip->pcm_spdif->device;
1826*4882a593Smuzhiyun 	chip->spdif_pcm_ctl = kctl;
1827*4882a593Smuzhiyun 
1828*4882a593Smuzhiyun 	/* direct recording source */
1829*4882a593Smuzhiyun 	if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1830*4882a593Smuzhiyun 	    (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1831*4882a593Smuzhiyun 		return err;
1832*4882a593Smuzhiyun 
1833*4882a593Smuzhiyun 	/*
1834*4882a593Smuzhiyun 	 * shared rear/line-in
1835*4882a593Smuzhiyun 	 */
1836*4882a593Smuzhiyun 	if (rear_switch) {
1837*4882a593Smuzhiyun 		if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1838*4882a593Smuzhiyun 			return err;
1839*4882a593Smuzhiyun 	}
1840*4882a593Smuzhiyun 
1841*4882a593Smuzhiyun 	/* per-voice volume */
1842*4882a593Smuzhiyun 	substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1843*4882a593Smuzhiyun 	for (idx = 0; idx < 32; ++idx) {
1844*4882a593Smuzhiyun 		kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1845*4882a593Smuzhiyun 		if (!kctl)
1846*4882a593Smuzhiyun 			return -ENOMEM;
1847*4882a593Smuzhiyun 		kctl->id.device = chip->pcm->device;
1848*4882a593Smuzhiyun 		kctl->id.subdevice = idx;
1849*4882a593Smuzhiyun 		kctl->private_value = (unsigned long)substream;
1850*4882a593Smuzhiyun 		if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1851*4882a593Smuzhiyun 			return err;
1852*4882a593Smuzhiyun 		chip->pcm_mixer[idx].left = 0x8000;
1853*4882a593Smuzhiyun 		chip->pcm_mixer[idx].right = 0x8000;
1854*4882a593Smuzhiyun 		chip->pcm_mixer[idx].ctl = kctl;
1855*4882a593Smuzhiyun 		substream = substream->next;
1856*4882a593Smuzhiyun 	}
1857*4882a593Smuzhiyun 
1858*4882a593Smuzhiyun 	return 0;
1859*4882a593Smuzhiyun }
1860*4882a593Smuzhiyun 
1861*4882a593Smuzhiyun 
1862*4882a593Smuzhiyun /*
1863*4882a593Smuzhiyun  * timer
1864*4882a593Smuzhiyun  */
1865*4882a593Smuzhiyun 
snd_ymfpci_timer_start(struct snd_timer * timer)1866*4882a593Smuzhiyun static int snd_ymfpci_timer_start(struct snd_timer *timer)
1867*4882a593Smuzhiyun {
1868*4882a593Smuzhiyun 	struct snd_ymfpci *chip;
1869*4882a593Smuzhiyun 	unsigned long flags;
1870*4882a593Smuzhiyun 	unsigned int count;
1871*4882a593Smuzhiyun 
1872*4882a593Smuzhiyun 	chip = snd_timer_chip(timer);
1873*4882a593Smuzhiyun 	spin_lock_irqsave(&chip->reg_lock, flags);
1874*4882a593Smuzhiyun 	if (timer->sticks > 1) {
1875*4882a593Smuzhiyun 		chip->timer_ticks = timer->sticks;
1876*4882a593Smuzhiyun 		count = timer->sticks - 1;
1877*4882a593Smuzhiyun 	} else {
1878*4882a593Smuzhiyun 		/*
1879*4882a593Smuzhiyun 		 * Divisor 1 is not allowed; fake it by using divisor 2 and
1880*4882a593Smuzhiyun 		 * counting two ticks for each interrupt.
1881*4882a593Smuzhiyun 		 */
1882*4882a593Smuzhiyun 		chip->timer_ticks = 2;
1883*4882a593Smuzhiyun 		count = 2 - 1;
1884*4882a593Smuzhiyun 	}
1885*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1886*4882a593Smuzhiyun 	snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1887*4882a593Smuzhiyun 	spin_unlock_irqrestore(&chip->reg_lock, flags);
1888*4882a593Smuzhiyun 	return 0;
1889*4882a593Smuzhiyun }
1890*4882a593Smuzhiyun 
snd_ymfpci_timer_stop(struct snd_timer * timer)1891*4882a593Smuzhiyun static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1892*4882a593Smuzhiyun {
1893*4882a593Smuzhiyun 	struct snd_ymfpci *chip;
1894*4882a593Smuzhiyun 	unsigned long flags;
1895*4882a593Smuzhiyun 
1896*4882a593Smuzhiyun 	chip = snd_timer_chip(timer);
1897*4882a593Smuzhiyun 	spin_lock_irqsave(&chip->reg_lock, flags);
1898*4882a593Smuzhiyun 	snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1899*4882a593Smuzhiyun 	spin_unlock_irqrestore(&chip->reg_lock, flags);
1900*4882a593Smuzhiyun 	return 0;
1901*4882a593Smuzhiyun }
1902*4882a593Smuzhiyun 
snd_ymfpci_timer_precise_resolution(struct snd_timer * timer,unsigned long * num,unsigned long * den)1903*4882a593Smuzhiyun static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1904*4882a593Smuzhiyun 					       unsigned long *num, unsigned long *den)
1905*4882a593Smuzhiyun {
1906*4882a593Smuzhiyun 	*num = 1;
1907*4882a593Smuzhiyun 	*den = 96000;
1908*4882a593Smuzhiyun 	return 0;
1909*4882a593Smuzhiyun }
1910*4882a593Smuzhiyun 
1911*4882a593Smuzhiyun static const struct snd_timer_hardware snd_ymfpci_timer_hw = {
1912*4882a593Smuzhiyun 	.flags = SNDRV_TIMER_HW_AUTO,
1913*4882a593Smuzhiyun 	.resolution = 10417, /* 1 / 96 kHz = 10.41666...us */
1914*4882a593Smuzhiyun 	.ticks = 0x10000,
1915*4882a593Smuzhiyun 	.start = snd_ymfpci_timer_start,
1916*4882a593Smuzhiyun 	.stop = snd_ymfpci_timer_stop,
1917*4882a593Smuzhiyun 	.precise_resolution = snd_ymfpci_timer_precise_resolution,
1918*4882a593Smuzhiyun };
1919*4882a593Smuzhiyun 
snd_ymfpci_timer(struct snd_ymfpci * chip,int device)1920*4882a593Smuzhiyun int snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1921*4882a593Smuzhiyun {
1922*4882a593Smuzhiyun 	struct snd_timer *timer = NULL;
1923*4882a593Smuzhiyun 	struct snd_timer_id tid;
1924*4882a593Smuzhiyun 	int err;
1925*4882a593Smuzhiyun 
1926*4882a593Smuzhiyun 	tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1927*4882a593Smuzhiyun 	tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1928*4882a593Smuzhiyun 	tid.card = chip->card->number;
1929*4882a593Smuzhiyun 	tid.device = device;
1930*4882a593Smuzhiyun 	tid.subdevice = 0;
1931*4882a593Smuzhiyun 	if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1932*4882a593Smuzhiyun 		strcpy(timer->name, "YMFPCI timer");
1933*4882a593Smuzhiyun 		timer->private_data = chip;
1934*4882a593Smuzhiyun 		timer->hw = snd_ymfpci_timer_hw;
1935*4882a593Smuzhiyun 	}
1936*4882a593Smuzhiyun 	chip->timer = timer;
1937*4882a593Smuzhiyun 	return err;
1938*4882a593Smuzhiyun }
1939*4882a593Smuzhiyun 
1940*4882a593Smuzhiyun 
1941*4882a593Smuzhiyun /*
1942*4882a593Smuzhiyun  *  proc interface
1943*4882a593Smuzhiyun  */
1944*4882a593Smuzhiyun 
snd_ymfpci_proc_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)1945*4882a593Smuzhiyun static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
1946*4882a593Smuzhiyun 				 struct snd_info_buffer *buffer)
1947*4882a593Smuzhiyun {
1948*4882a593Smuzhiyun 	struct snd_ymfpci *chip = entry->private_data;
1949*4882a593Smuzhiyun 	int i;
1950*4882a593Smuzhiyun 
1951*4882a593Smuzhiyun 	snd_iprintf(buffer, "YMFPCI\n\n");
1952*4882a593Smuzhiyun 	for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1953*4882a593Smuzhiyun 		snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1954*4882a593Smuzhiyun }
1955*4882a593Smuzhiyun 
snd_ymfpci_proc_init(struct snd_card * card,struct snd_ymfpci * chip)1956*4882a593Smuzhiyun static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
1957*4882a593Smuzhiyun {
1958*4882a593Smuzhiyun 	return snd_card_ro_proc_new(card, "ymfpci", chip, snd_ymfpci_proc_read);
1959*4882a593Smuzhiyun }
1960*4882a593Smuzhiyun 
1961*4882a593Smuzhiyun /*
1962*4882a593Smuzhiyun  *  initialization routines
1963*4882a593Smuzhiyun  */
1964*4882a593Smuzhiyun 
snd_ymfpci_aclink_reset(struct pci_dev * pci)1965*4882a593Smuzhiyun static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1966*4882a593Smuzhiyun {
1967*4882a593Smuzhiyun 	u8 cmd;
1968*4882a593Smuzhiyun 
1969*4882a593Smuzhiyun 	pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1970*4882a593Smuzhiyun #if 0 // force to reset
1971*4882a593Smuzhiyun 	if (cmd & 0x03) {
1972*4882a593Smuzhiyun #endif
1973*4882a593Smuzhiyun 		pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1974*4882a593Smuzhiyun 		pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1975*4882a593Smuzhiyun 		pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1976*4882a593Smuzhiyun 		pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1977*4882a593Smuzhiyun 		pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1978*4882a593Smuzhiyun #if 0
1979*4882a593Smuzhiyun 	}
1980*4882a593Smuzhiyun #endif
1981*4882a593Smuzhiyun }
1982*4882a593Smuzhiyun 
snd_ymfpci_enable_dsp(struct snd_ymfpci * chip)1983*4882a593Smuzhiyun static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
1984*4882a593Smuzhiyun {
1985*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
1986*4882a593Smuzhiyun }
1987*4882a593Smuzhiyun 
snd_ymfpci_disable_dsp(struct snd_ymfpci * chip)1988*4882a593Smuzhiyun static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
1989*4882a593Smuzhiyun {
1990*4882a593Smuzhiyun 	u32 val;
1991*4882a593Smuzhiyun 	int timeout = 1000;
1992*4882a593Smuzhiyun 
1993*4882a593Smuzhiyun 	val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
1994*4882a593Smuzhiyun 	if (val)
1995*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
1996*4882a593Smuzhiyun 	while (timeout-- > 0) {
1997*4882a593Smuzhiyun 		val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
1998*4882a593Smuzhiyun 		if ((val & 0x00000002) == 0)
1999*4882a593Smuzhiyun 			break;
2000*4882a593Smuzhiyun 	}
2001*4882a593Smuzhiyun }
2002*4882a593Smuzhiyun 
snd_ymfpci_request_firmware(struct snd_ymfpci * chip)2003*4882a593Smuzhiyun static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
2004*4882a593Smuzhiyun {
2005*4882a593Smuzhiyun 	int err, is_1e;
2006*4882a593Smuzhiyun 	const char *name;
2007*4882a593Smuzhiyun 
2008*4882a593Smuzhiyun 	err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
2009*4882a593Smuzhiyun 			       &chip->pci->dev);
2010*4882a593Smuzhiyun 	if (err >= 0) {
2011*4882a593Smuzhiyun 		if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) {
2012*4882a593Smuzhiyun 			dev_err(chip->card->dev,
2013*4882a593Smuzhiyun 				"DSP microcode has wrong size\n");
2014*4882a593Smuzhiyun 			err = -EINVAL;
2015*4882a593Smuzhiyun 		}
2016*4882a593Smuzhiyun 	}
2017*4882a593Smuzhiyun 	if (err < 0)
2018*4882a593Smuzhiyun 		return err;
2019*4882a593Smuzhiyun 	is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
2020*4882a593Smuzhiyun 		chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
2021*4882a593Smuzhiyun 		chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
2022*4882a593Smuzhiyun 		chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
2023*4882a593Smuzhiyun 	name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
2024*4882a593Smuzhiyun 	err = request_firmware(&chip->controller_microcode, name,
2025*4882a593Smuzhiyun 			       &chip->pci->dev);
2026*4882a593Smuzhiyun 	if (err >= 0) {
2027*4882a593Smuzhiyun 		if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) {
2028*4882a593Smuzhiyun 			dev_err(chip->card->dev,
2029*4882a593Smuzhiyun 				"controller microcode has wrong size\n");
2030*4882a593Smuzhiyun 			err = -EINVAL;
2031*4882a593Smuzhiyun 		}
2032*4882a593Smuzhiyun 	}
2033*4882a593Smuzhiyun 	if (err < 0)
2034*4882a593Smuzhiyun 		return err;
2035*4882a593Smuzhiyun 	return 0;
2036*4882a593Smuzhiyun }
2037*4882a593Smuzhiyun 
2038*4882a593Smuzhiyun MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
2039*4882a593Smuzhiyun MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
2040*4882a593Smuzhiyun MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
2041*4882a593Smuzhiyun 
snd_ymfpci_download_image(struct snd_ymfpci * chip)2042*4882a593Smuzhiyun static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
2043*4882a593Smuzhiyun {
2044*4882a593Smuzhiyun 	int i;
2045*4882a593Smuzhiyun 	u16 ctrl;
2046*4882a593Smuzhiyun 	const __le32 *inst;
2047*4882a593Smuzhiyun 
2048*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
2049*4882a593Smuzhiyun 	snd_ymfpci_disable_dsp(chip);
2050*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
2051*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
2052*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
2053*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
2054*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
2055*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
2056*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
2057*4882a593Smuzhiyun 	ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2058*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2059*4882a593Smuzhiyun 
2060*4882a593Smuzhiyun 	/* setup DSP instruction code */
2061*4882a593Smuzhiyun 	inst = (const __le32 *)chip->dsp_microcode->data;
2062*4882a593Smuzhiyun 	for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
2063*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2),
2064*4882a593Smuzhiyun 				  le32_to_cpu(inst[i]));
2065*4882a593Smuzhiyun 
2066*4882a593Smuzhiyun 	/* setup control instruction code */
2067*4882a593Smuzhiyun 	inst = (const __le32 *)chip->controller_microcode->data;
2068*4882a593Smuzhiyun 	for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
2069*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2),
2070*4882a593Smuzhiyun 				  le32_to_cpu(inst[i]));
2071*4882a593Smuzhiyun 
2072*4882a593Smuzhiyun 	snd_ymfpci_enable_dsp(chip);
2073*4882a593Smuzhiyun }
2074*4882a593Smuzhiyun 
snd_ymfpci_memalloc(struct snd_ymfpci * chip)2075*4882a593Smuzhiyun static int snd_ymfpci_memalloc(struct snd_ymfpci *chip)
2076*4882a593Smuzhiyun {
2077*4882a593Smuzhiyun 	long size, playback_ctrl_size;
2078*4882a593Smuzhiyun 	int voice, bank, reg;
2079*4882a593Smuzhiyun 	u8 *ptr;
2080*4882a593Smuzhiyun 	dma_addr_t ptr_addr;
2081*4882a593Smuzhiyun 
2082*4882a593Smuzhiyun 	playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2083*4882a593Smuzhiyun 	chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2084*4882a593Smuzhiyun 	chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2085*4882a593Smuzhiyun 	chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2086*4882a593Smuzhiyun 	chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2087*4882a593Smuzhiyun 
2088*4882a593Smuzhiyun 	size = ALIGN(playback_ctrl_size, 0x100) +
2089*4882a593Smuzhiyun 	       ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
2090*4882a593Smuzhiyun 	       ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
2091*4882a593Smuzhiyun 	       ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
2092*4882a593Smuzhiyun 	       chip->work_size;
2093*4882a593Smuzhiyun 	/* work_ptr must be aligned to 256 bytes, but it's already
2094*4882a593Smuzhiyun 	   covered with the kernel page allocation mechanism */
2095*4882a593Smuzhiyun 	if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
2096*4882a593Smuzhiyun 				size, &chip->work_ptr) < 0)
2097*4882a593Smuzhiyun 		return -ENOMEM;
2098*4882a593Smuzhiyun 	ptr = chip->work_ptr.area;
2099*4882a593Smuzhiyun 	ptr_addr = chip->work_ptr.addr;
2100*4882a593Smuzhiyun 	memset(ptr, 0, size);	/* for sure */
2101*4882a593Smuzhiyun 
2102*4882a593Smuzhiyun 	chip->bank_base_playback = ptr;
2103*4882a593Smuzhiyun 	chip->bank_base_playback_addr = ptr_addr;
2104*4882a593Smuzhiyun 	chip->ctrl_playback = (__le32 *)ptr;
2105*4882a593Smuzhiyun 	chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
2106*4882a593Smuzhiyun 	ptr += ALIGN(playback_ctrl_size, 0x100);
2107*4882a593Smuzhiyun 	ptr_addr += ALIGN(playback_ctrl_size, 0x100);
2108*4882a593Smuzhiyun 	for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2109*4882a593Smuzhiyun 		chip->voices[voice].number = voice;
2110*4882a593Smuzhiyun 		chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
2111*4882a593Smuzhiyun 		chip->voices[voice].bank_addr = ptr_addr;
2112*4882a593Smuzhiyun 		for (bank = 0; bank < 2; bank++) {
2113*4882a593Smuzhiyun 			chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
2114*4882a593Smuzhiyun 			ptr += chip->bank_size_playback;
2115*4882a593Smuzhiyun 			ptr_addr += chip->bank_size_playback;
2116*4882a593Smuzhiyun 		}
2117*4882a593Smuzhiyun 	}
2118*4882a593Smuzhiyun 	ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2119*4882a593Smuzhiyun 	ptr_addr = ALIGN(ptr_addr, 0x100);
2120*4882a593Smuzhiyun 	chip->bank_base_capture = ptr;
2121*4882a593Smuzhiyun 	chip->bank_base_capture_addr = ptr_addr;
2122*4882a593Smuzhiyun 	for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2123*4882a593Smuzhiyun 		for (bank = 0; bank < 2; bank++) {
2124*4882a593Smuzhiyun 			chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
2125*4882a593Smuzhiyun 			ptr += chip->bank_size_capture;
2126*4882a593Smuzhiyun 			ptr_addr += chip->bank_size_capture;
2127*4882a593Smuzhiyun 		}
2128*4882a593Smuzhiyun 	ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2129*4882a593Smuzhiyun 	ptr_addr = ALIGN(ptr_addr, 0x100);
2130*4882a593Smuzhiyun 	chip->bank_base_effect = ptr;
2131*4882a593Smuzhiyun 	chip->bank_base_effect_addr = ptr_addr;
2132*4882a593Smuzhiyun 	for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2133*4882a593Smuzhiyun 		for (bank = 0; bank < 2; bank++) {
2134*4882a593Smuzhiyun 			chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
2135*4882a593Smuzhiyun 			ptr += chip->bank_size_effect;
2136*4882a593Smuzhiyun 			ptr_addr += chip->bank_size_effect;
2137*4882a593Smuzhiyun 		}
2138*4882a593Smuzhiyun 	ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2139*4882a593Smuzhiyun 	ptr_addr = ALIGN(ptr_addr, 0x100);
2140*4882a593Smuzhiyun 	chip->work_base = ptr;
2141*4882a593Smuzhiyun 	chip->work_base_addr = ptr_addr;
2142*4882a593Smuzhiyun 
2143*4882a593Smuzhiyun 	snd_BUG_ON(ptr + chip->work_size !=
2144*4882a593Smuzhiyun 		   chip->work_ptr.area + chip->work_ptr.bytes);
2145*4882a593Smuzhiyun 
2146*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2147*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2148*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2149*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2150*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2151*4882a593Smuzhiyun 
2152*4882a593Smuzhiyun 	/* S/PDIF output initialization */
2153*4882a593Smuzhiyun 	chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2154*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2155*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2156*4882a593Smuzhiyun 
2157*4882a593Smuzhiyun 	/* S/PDIF input initialization */
2158*4882a593Smuzhiyun 	snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2159*4882a593Smuzhiyun 
2160*4882a593Smuzhiyun 	/* digital mixer setup */
2161*4882a593Smuzhiyun 	for (reg = 0x80; reg < 0xc0; reg += 4)
2162*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, reg, 0);
2163*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2164*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff);
2165*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2166*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2167*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2168*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2169*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2170*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2171*4882a593Smuzhiyun 
2172*4882a593Smuzhiyun 	return 0;
2173*4882a593Smuzhiyun }
2174*4882a593Smuzhiyun 
snd_ymfpci_free(struct snd_ymfpci * chip)2175*4882a593Smuzhiyun static int snd_ymfpci_free(struct snd_ymfpci *chip)
2176*4882a593Smuzhiyun {
2177*4882a593Smuzhiyun 	u16 ctrl;
2178*4882a593Smuzhiyun 
2179*4882a593Smuzhiyun 	if (snd_BUG_ON(!chip))
2180*4882a593Smuzhiyun 		return -EINVAL;
2181*4882a593Smuzhiyun 
2182*4882a593Smuzhiyun 	if (chip->res_reg_area) {	/* don't touch busy hardware */
2183*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2184*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2185*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2186*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2187*4882a593Smuzhiyun 		snd_ymfpci_disable_dsp(chip);
2188*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2189*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2190*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2191*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2192*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2193*4882a593Smuzhiyun 		ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2194*4882a593Smuzhiyun 		snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2195*4882a593Smuzhiyun 	}
2196*4882a593Smuzhiyun 
2197*4882a593Smuzhiyun 	snd_ymfpci_ac3_done(chip);
2198*4882a593Smuzhiyun 
2199*4882a593Smuzhiyun 	/* Set PCI device to D3 state */
2200*4882a593Smuzhiyun #if 0
2201*4882a593Smuzhiyun 	/* FIXME: temporarily disabled, otherwise we cannot fire up
2202*4882a593Smuzhiyun 	 * the chip again unless reboot.  ACPI bug?
2203*4882a593Smuzhiyun 	 */
2204*4882a593Smuzhiyun 	pci_set_power_state(chip->pci, PCI_D3hot);
2205*4882a593Smuzhiyun #endif
2206*4882a593Smuzhiyun 
2207*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
2208*4882a593Smuzhiyun 	kfree(chip->saved_regs);
2209*4882a593Smuzhiyun #endif
2210*4882a593Smuzhiyun 	if (chip->irq >= 0)
2211*4882a593Smuzhiyun 		free_irq(chip->irq, chip);
2212*4882a593Smuzhiyun 	release_and_free_resource(chip->mpu_res);
2213*4882a593Smuzhiyun 	release_and_free_resource(chip->fm_res);
2214*4882a593Smuzhiyun 	snd_ymfpci_free_gameport(chip);
2215*4882a593Smuzhiyun 	iounmap(chip->reg_area_virt);
2216*4882a593Smuzhiyun 	if (chip->work_ptr.area)
2217*4882a593Smuzhiyun 		snd_dma_free_pages(&chip->work_ptr);
2218*4882a593Smuzhiyun 
2219*4882a593Smuzhiyun 	release_and_free_resource(chip->res_reg_area);
2220*4882a593Smuzhiyun 
2221*4882a593Smuzhiyun 	pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2222*4882a593Smuzhiyun 
2223*4882a593Smuzhiyun 	pci_disable_device(chip->pci);
2224*4882a593Smuzhiyun 	release_firmware(chip->dsp_microcode);
2225*4882a593Smuzhiyun 	release_firmware(chip->controller_microcode);
2226*4882a593Smuzhiyun 	kfree(chip);
2227*4882a593Smuzhiyun 	return 0;
2228*4882a593Smuzhiyun }
2229*4882a593Smuzhiyun 
snd_ymfpci_dev_free(struct snd_device * device)2230*4882a593Smuzhiyun static int snd_ymfpci_dev_free(struct snd_device *device)
2231*4882a593Smuzhiyun {
2232*4882a593Smuzhiyun 	struct snd_ymfpci *chip = device->device_data;
2233*4882a593Smuzhiyun 	return snd_ymfpci_free(chip);
2234*4882a593Smuzhiyun }
2235*4882a593Smuzhiyun 
2236*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
2237*4882a593Smuzhiyun static const int saved_regs_index[] = {
2238*4882a593Smuzhiyun 	/* spdif */
2239*4882a593Smuzhiyun 	YDSXGR_SPDIFOUTCTRL,
2240*4882a593Smuzhiyun 	YDSXGR_SPDIFOUTSTATUS,
2241*4882a593Smuzhiyun 	YDSXGR_SPDIFINCTRL,
2242*4882a593Smuzhiyun 	/* volumes */
2243*4882a593Smuzhiyun 	YDSXGR_PRIADCLOOPVOL,
2244*4882a593Smuzhiyun 	YDSXGR_NATIVEDACINVOL,
2245*4882a593Smuzhiyun 	YDSXGR_NATIVEDACOUTVOL,
2246*4882a593Smuzhiyun 	YDSXGR_BUF441OUTVOL,
2247*4882a593Smuzhiyun 	YDSXGR_NATIVEADCINVOL,
2248*4882a593Smuzhiyun 	YDSXGR_SPDIFLOOPVOL,
2249*4882a593Smuzhiyun 	YDSXGR_SPDIFOUTVOL,
2250*4882a593Smuzhiyun 	YDSXGR_ZVOUTVOL,
2251*4882a593Smuzhiyun 	YDSXGR_LEGACYOUTVOL,
2252*4882a593Smuzhiyun 	/* address bases */
2253*4882a593Smuzhiyun 	YDSXGR_PLAYCTRLBASE,
2254*4882a593Smuzhiyun 	YDSXGR_RECCTRLBASE,
2255*4882a593Smuzhiyun 	YDSXGR_EFFCTRLBASE,
2256*4882a593Smuzhiyun 	YDSXGR_WORKBASE,
2257*4882a593Smuzhiyun 	/* capture set up */
2258*4882a593Smuzhiyun 	YDSXGR_MAPOFREC,
2259*4882a593Smuzhiyun 	YDSXGR_RECFORMAT,
2260*4882a593Smuzhiyun 	YDSXGR_RECSLOTSR,
2261*4882a593Smuzhiyun 	YDSXGR_ADCFORMAT,
2262*4882a593Smuzhiyun 	YDSXGR_ADCSLOTSR,
2263*4882a593Smuzhiyun };
2264*4882a593Smuzhiyun #define YDSXGR_NUM_SAVED_REGS	ARRAY_SIZE(saved_regs_index)
2265*4882a593Smuzhiyun 
snd_ymfpci_suspend(struct device * dev)2266*4882a593Smuzhiyun static int snd_ymfpci_suspend(struct device *dev)
2267*4882a593Smuzhiyun {
2268*4882a593Smuzhiyun 	struct snd_card *card = dev_get_drvdata(dev);
2269*4882a593Smuzhiyun 	struct snd_ymfpci *chip = card->private_data;
2270*4882a593Smuzhiyun 	unsigned int i;
2271*4882a593Smuzhiyun 
2272*4882a593Smuzhiyun 	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2273*4882a593Smuzhiyun 	snd_ac97_suspend(chip->ac97);
2274*4882a593Smuzhiyun 	for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2275*4882a593Smuzhiyun 		chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2276*4882a593Smuzhiyun 	chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2277*4882a593Smuzhiyun 	pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY,
2278*4882a593Smuzhiyun 			     &chip->saved_dsxg_legacy);
2279*4882a593Smuzhiyun 	pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2280*4882a593Smuzhiyun 			     &chip->saved_dsxg_elegacy);
2281*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2282*4882a593Smuzhiyun 	snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2283*4882a593Smuzhiyun 	snd_ymfpci_disable_dsp(chip);
2284*4882a593Smuzhiyun 	return 0;
2285*4882a593Smuzhiyun }
2286*4882a593Smuzhiyun 
snd_ymfpci_resume(struct device * dev)2287*4882a593Smuzhiyun static int snd_ymfpci_resume(struct device *dev)
2288*4882a593Smuzhiyun {
2289*4882a593Smuzhiyun 	struct pci_dev *pci = to_pci_dev(dev);
2290*4882a593Smuzhiyun 	struct snd_card *card = dev_get_drvdata(dev);
2291*4882a593Smuzhiyun 	struct snd_ymfpci *chip = card->private_data;
2292*4882a593Smuzhiyun 	unsigned int i;
2293*4882a593Smuzhiyun 
2294*4882a593Smuzhiyun 	snd_ymfpci_aclink_reset(pci);
2295*4882a593Smuzhiyun 	snd_ymfpci_codec_ready(chip, 0);
2296*4882a593Smuzhiyun 	snd_ymfpci_download_image(chip);
2297*4882a593Smuzhiyun 	udelay(100);
2298*4882a593Smuzhiyun 
2299*4882a593Smuzhiyun 	for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2300*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2301*4882a593Smuzhiyun 
2302*4882a593Smuzhiyun 	snd_ac97_resume(chip->ac97);
2303*4882a593Smuzhiyun 
2304*4882a593Smuzhiyun 	pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY,
2305*4882a593Smuzhiyun 			      chip->saved_dsxg_legacy);
2306*4882a593Smuzhiyun 	pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2307*4882a593Smuzhiyun 			      chip->saved_dsxg_elegacy);
2308*4882a593Smuzhiyun 
2309*4882a593Smuzhiyun 	/* start hw again */
2310*4882a593Smuzhiyun 	if (chip->start_count > 0) {
2311*4882a593Smuzhiyun 		spin_lock_irq(&chip->reg_lock);
2312*4882a593Smuzhiyun 		snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2313*4882a593Smuzhiyun 		chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2314*4882a593Smuzhiyun 		spin_unlock_irq(&chip->reg_lock);
2315*4882a593Smuzhiyun 	}
2316*4882a593Smuzhiyun 	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2317*4882a593Smuzhiyun 	return 0;
2318*4882a593Smuzhiyun }
2319*4882a593Smuzhiyun 
2320*4882a593Smuzhiyun SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume);
2321*4882a593Smuzhiyun #endif /* CONFIG_PM_SLEEP */
2322*4882a593Smuzhiyun 
snd_ymfpci_create(struct snd_card * card,struct pci_dev * pci,unsigned short old_legacy_ctrl,struct snd_ymfpci ** rchip)2323*4882a593Smuzhiyun int snd_ymfpci_create(struct snd_card *card,
2324*4882a593Smuzhiyun 		      struct pci_dev *pci,
2325*4882a593Smuzhiyun 		      unsigned short old_legacy_ctrl,
2326*4882a593Smuzhiyun 		      struct snd_ymfpci **rchip)
2327*4882a593Smuzhiyun {
2328*4882a593Smuzhiyun 	struct snd_ymfpci *chip;
2329*4882a593Smuzhiyun 	int err;
2330*4882a593Smuzhiyun 	static const struct snd_device_ops ops = {
2331*4882a593Smuzhiyun 		.dev_free =	snd_ymfpci_dev_free,
2332*4882a593Smuzhiyun 	};
2333*4882a593Smuzhiyun 
2334*4882a593Smuzhiyun 	*rchip = NULL;
2335*4882a593Smuzhiyun 
2336*4882a593Smuzhiyun 	/* enable PCI device */
2337*4882a593Smuzhiyun 	if ((err = pci_enable_device(pci)) < 0)
2338*4882a593Smuzhiyun 		return err;
2339*4882a593Smuzhiyun 
2340*4882a593Smuzhiyun 	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2341*4882a593Smuzhiyun 	if (chip == NULL) {
2342*4882a593Smuzhiyun 		pci_disable_device(pci);
2343*4882a593Smuzhiyun 		return -ENOMEM;
2344*4882a593Smuzhiyun 	}
2345*4882a593Smuzhiyun 	chip->old_legacy_ctrl = old_legacy_ctrl;
2346*4882a593Smuzhiyun 	spin_lock_init(&chip->reg_lock);
2347*4882a593Smuzhiyun 	spin_lock_init(&chip->voice_lock);
2348*4882a593Smuzhiyun 	init_waitqueue_head(&chip->interrupt_sleep);
2349*4882a593Smuzhiyun 	atomic_set(&chip->interrupt_sleep_count, 0);
2350*4882a593Smuzhiyun 	chip->card = card;
2351*4882a593Smuzhiyun 	chip->pci = pci;
2352*4882a593Smuzhiyun 	chip->irq = -1;
2353*4882a593Smuzhiyun 	chip->device_id = pci->device;
2354*4882a593Smuzhiyun 	chip->rev = pci->revision;
2355*4882a593Smuzhiyun 	chip->reg_area_phys = pci_resource_start(pci, 0);
2356*4882a593Smuzhiyun 	chip->reg_area_virt = ioremap(chip->reg_area_phys, 0x8000);
2357*4882a593Smuzhiyun 	pci_set_master(pci);
2358*4882a593Smuzhiyun 	chip->src441_used = -1;
2359*4882a593Smuzhiyun 
2360*4882a593Smuzhiyun 	if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
2361*4882a593Smuzhiyun 		dev_err(chip->card->dev,
2362*4882a593Smuzhiyun 			"unable to grab memory region 0x%lx-0x%lx\n",
2363*4882a593Smuzhiyun 			chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2364*4882a593Smuzhiyun 		err = -EBUSY;
2365*4882a593Smuzhiyun 		goto free_chip;
2366*4882a593Smuzhiyun 	}
2367*4882a593Smuzhiyun 	if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
2368*4882a593Smuzhiyun 			KBUILD_MODNAME, chip)) {
2369*4882a593Smuzhiyun 		dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq);
2370*4882a593Smuzhiyun 		err = -EBUSY;
2371*4882a593Smuzhiyun 		goto free_chip;
2372*4882a593Smuzhiyun 	}
2373*4882a593Smuzhiyun 	chip->irq = pci->irq;
2374*4882a593Smuzhiyun 	card->sync_irq = chip->irq;
2375*4882a593Smuzhiyun 
2376*4882a593Smuzhiyun 	snd_ymfpci_aclink_reset(pci);
2377*4882a593Smuzhiyun 	if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2378*4882a593Smuzhiyun 		err = -EIO;
2379*4882a593Smuzhiyun 		goto free_chip;
2380*4882a593Smuzhiyun 	}
2381*4882a593Smuzhiyun 
2382*4882a593Smuzhiyun 	err = snd_ymfpci_request_firmware(chip);
2383*4882a593Smuzhiyun 	if (err < 0) {
2384*4882a593Smuzhiyun 		dev_err(chip->card->dev, "firmware request failed: %d\n", err);
2385*4882a593Smuzhiyun 		goto free_chip;
2386*4882a593Smuzhiyun 	}
2387*4882a593Smuzhiyun 	snd_ymfpci_download_image(chip);
2388*4882a593Smuzhiyun 
2389*4882a593Smuzhiyun 	udelay(100); /* seems we need a delay after downloading image.. */
2390*4882a593Smuzhiyun 
2391*4882a593Smuzhiyun 	if (snd_ymfpci_memalloc(chip) < 0) {
2392*4882a593Smuzhiyun 		err = -EIO;
2393*4882a593Smuzhiyun 		goto free_chip;
2394*4882a593Smuzhiyun 	}
2395*4882a593Smuzhiyun 
2396*4882a593Smuzhiyun 	err = snd_ymfpci_ac3_init(chip);
2397*4882a593Smuzhiyun 	if (err < 0)
2398*4882a593Smuzhiyun 		goto free_chip;
2399*4882a593Smuzhiyun 
2400*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
2401*4882a593Smuzhiyun 	chip->saved_regs = kmalloc_array(YDSXGR_NUM_SAVED_REGS, sizeof(u32),
2402*4882a593Smuzhiyun 					 GFP_KERNEL);
2403*4882a593Smuzhiyun 	if (chip->saved_regs == NULL) {
2404*4882a593Smuzhiyun 		err = -ENOMEM;
2405*4882a593Smuzhiyun 		goto free_chip;
2406*4882a593Smuzhiyun 	}
2407*4882a593Smuzhiyun #endif
2408*4882a593Smuzhiyun 
2409*4882a593Smuzhiyun 	err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
2410*4882a593Smuzhiyun 	if (err < 0)
2411*4882a593Smuzhiyun 		goto free_chip;
2412*4882a593Smuzhiyun 
2413*4882a593Smuzhiyun 	snd_ymfpci_proc_init(card, chip);
2414*4882a593Smuzhiyun 
2415*4882a593Smuzhiyun 	*rchip = chip;
2416*4882a593Smuzhiyun 	return 0;
2417*4882a593Smuzhiyun 
2418*4882a593Smuzhiyun free_chip:
2419*4882a593Smuzhiyun 	snd_ymfpci_free(chip);
2420*4882a593Smuzhiyun 	return err;
2421*4882a593Smuzhiyun }
2422