xref: /OK3568_Linux_fs/kernel/sound/pci/oxygen/xonar_hdmi.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * helper functions for HDMI models (Xonar HDAV1.3/HDAV1.3 Slim)
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/pci.h>
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <sound/asoundef.h>
11*4882a593Smuzhiyun #include <sound/control.h>
12*4882a593Smuzhiyun #include <sound/core.h>
13*4882a593Smuzhiyun #include <sound/pcm.h>
14*4882a593Smuzhiyun #include <sound/pcm_params.h>
15*4882a593Smuzhiyun #include <sound/tlv.h>
16*4882a593Smuzhiyun #include "xonar.h"
17*4882a593Smuzhiyun 
hdmi_write_command(struct oxygen * chip,u8 command,unsigned int count,const u8 * params)18*4882a593Smuzhiyun static void hdmi_write_command(struct oxygen *chip, u8 command,
19*4882a593Smuzhiyun 			       unsigned int count, const u8 *params)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun 	unsigned int i;
22*4882a593Smuzhiyun 	u8 checksum;
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun 	oxygen_write_uart(chip, 0xfb);
25*4882a593Smuzhiyun 	oxygen_write_uart(chip, 0xef);
26*4882a593Smuzhiyun 	oxygen_write_uart(chip, command);
27*4882a593Smuzhiyun 	oxygen_write_uart(chip, count);
28*4882a593Smuzhiyun 	for (i = 0; i < count; ++i)
29*4882a593Smuzhiyun 		oxygen_write_uart(chip, params[i]);
30*4882a593Smuzhiyun 	checksum = 0xfb + 0xef + command + count;
31*4882a593Smuzhiyun 	for (i = 0; i < count; ++i)
32*4882a593Smuzhiyun 		checksum += params[i];
33*4882a593Smuzhiyun 	oxygen_write_uart(chip, checksum);
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun 
xonar_hdmi_init_commands(struct oxygen * chip,struct xonar_hdmi * hdmi)36*4882a593Smuzhiyun static void xonar_hdmi_init_commands(struct oxygen *chip,
37*4882a593Smuzhiyun 				     struct xonar_hdmi *hdmi)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun 	u8 param;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	oxygen_reset_uart(chip);
42*4882a593Smuzhiyun 	param = 0;
43*4882a593Smuzhiyun 	hdmi_write_command(chip, 0x61, 1, &param);
44*4882a593Smuzhiyun 	param = 1;
45*4882a593Smuzhiyun 	hdmi_write_command(chip, 0x74, 1, &param);
46*4882a593Smuzhiyun 	hdmi_write_command(chip, 0x54, 5, hdmi->params);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun 
xonar_hdmi_init(struct oxygen * chip,struct xonar_hdmi * hdmi)49*4882a593Smuzhiyun void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *hdmi)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	hdmi->params[1] = IEC958_AES3_CON_FS_48000;
52*4882a593Smuzhiyun 	hdmi->params[4] = 1;
53*4882a593Smuzhiyun 	xonar_hdmi_init_commands(chip, hdmi);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun 
xonar_hdmi_cleanup(struct oxygen * chip)56*4882a593Smuzhiyun void xonar_hdmi_cleanup(struct oxygen *chip)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun 	u8 param = 0;
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	hdmi_write_command(chip, 0x74, 1, &param);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun 
xonar_hdmi_resume(struct oxygen * chip,struct xonar_hdmi * hdmi)63*4882a593Smuzhiyun void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun 	xonar_hdmi_init_commands(chip, hdmi);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
xonar_hdmi_pcm_hardware_filter(unsigned int channel,struct snd_pcm_hardware * hardware)68*4882a593Smuzhiyun void xonar_hdmi_pcm_hardware_filter(unsigned int channel,
69*4882a593Smuzhiyun 				    struct snd_pcm_hardware *hardware)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun 	if (channel == PCM_MULTICH) {
72*4882a593Smuzhiyun 		hardware->rates = SNDRV_PCM_RATE_44100 |
73*4882a593Smuzhiyun 				  SNDRV_PCM_RATE_48000 |
74*4882a593Smuzhiyun 				  SNDRV_PCM_RATE_96000 |
75*4882a593Smuzhiyun 				  SNDRV_PCM_RATE_192000;
76*4882a593Smuzhiyun 		hardware->rate_min = 44100;
77*4882a593Smuzhiyun 	}
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun 
xonar_set_hdmi_params(struct oxygen * chip,struct xonar_hdmi * hdmi,struct snd_pcm_hw_params * params)80*4882a593Smuzhiyun void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi,
81*4882a593Smuzhiyun 			   struct snd_pcm_hw_params *params)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	hdmi->params[0] = 0; /* 1 = non-audio */
84*4882a593Smuzhiyun 	switch (params_rate(params)) {
85*4882a593Smuzhiyun 	case 44100:
86*4882a593Smuzhiyun 		hdmi->params[1] = IEC958_AES3_CON_FS_44100;
87*4882a593Smuzhiyun 		break;
88*4882a593Smuzhiyun 	case 48000:
89*4882a593Smuzhiyun 		hdmi->params[1] = IEC958_AES3_CON_FS_48000;
90*4882a593Smuzhiyun 		break;
91*4882a593Smuzhiyun 	default: /* 96000 */
92*4882a593Smuzhiyun 		hdmi->params[1] = IEC958_AES3_CON_FS_96000;
93*4882a593Smuzhiyun 		break;
94*4882a593Smuzhiyun 	case 192000:
95*4882a593Smuzhiyun 		hdmi->params[1] = IEC958_AES3_CON_FS_192000;
96*4882a593Smuzhiyun 		break;
97*4882a593Smuzhiyun 	}
98*4882a593Smuzhiyun 	hdmi->params[2] = params_channels(params) / 2 - 1;
99*4882a593Smuzhiyun 	if (params_format(params) == SNDRV_PCM_FORMAT_S16_LE)
100*4882a593Smuzhiyun 		hdmi->params[3] = 0;
101*4882a593Smuzhiyun 	else
102*4882a593Smuzhiyun 		hdmi->params[3] = 0xc0;
103*4882a593Smuzhiyun 	hdmi->params[4] = 1; /* ? */
104*4882a593Smuzhiyun 	hdmi_write_command(chip, 0x54, 5, hdmi->params);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun 
xonar_hdmi_uart_input(struct oxygen * chip)107*4882a593Smuzhiyun void xonar_hdmi_uart_input(struct oxygen *chip)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun 	if (chip->uart_input_count >= 2 &&
110*4882a593Smuzhiyun 	    chip->uart_input[chip->uart_input_count - 2] == 'O' &&
111*4882a593Smuzhiyun 	    chip->uart_input[chip->uart_input_count - 1] == 'K') {
112*4882a593Smuzhiyun 		dev_dbg(chip->card->dev, "message from HDMI chip received:\n");
113*4882a593Smuzhiyun 		print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
114*4882a593Smuzhiyun 				     chip->uart_input, chip->uart_input_count);
115*4882a593Smuzhiyun 		chip->uart_input_count = 0;
116*4882a593Smuzhiyun 	}
117*4882a593Smuzhiyun }
118