1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef WM8785_H_INCLUDED 3*4882a593Smuzhiyun #define WM8785_H_INCLUDED 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #define WM8785_R0 0 6*4882a593Smuzhiyun #define WM8785_R1 1 7*4882a593Smuzhiyun #define WM8785_R2 2 8*4882a593Smuzhiyun #define WM8785_R7 7 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* R0 */ 11*4882a593Smuzhiyun #define WM8785_MCR_MASK 0x007 12*4882a593Smuzhiyun #define WM8785_MCR_SLAVE 0x000 13*4882a593Smuzhiyun #define WM8785_MCR_MASTER_128 0x001 14*4882a593Smuzhiyun #define WM8785_MCR_MASTER_192 0x002 15*4882a593Smuzhiyun #define WM8785_MCR_MASTER_256 0x003 16*4882a593Smuzhiyun #define WM8785_MCR_MASTER_384 0x004 17*4882a593Smuzhiyun #define WM8785_MCR_MASTER_512 0x005 18*4882a593Smuzhiyun #define WM8785_MCR_MASTER_768 0x006 19*4882a593Smuzhiyun #define WM8785_OSR_MASK 0x018 20*4882a593Smuzhiyun #define WM8785_OSR_SINGLE 0x000 21*4882a593Smuzhiyun #define WM8785_OSR_DOUBLE 0x008 22*4882a593Smuzhiyun #define WM8785_OSR_QUAD 0x010 23*4882a593Smuzhiyun #define WM8785_FORMAT_MASK 0x060 24*4882a593Smuzhiyun #define WM8785_FORMAT_RJUST 0x000 25*4882a593Smuzhiyun #define WM8785_FORMAT_LJUST 0x020 26*4882a593Smuzhiyun #define WM8785_FORMAT_I2S 0x040 27*4882a593Smuzhiyun #define WM8785_FORMAT_DSP 0x060 28*4882a593Smuzhiyun /* R1 */ 29*4882a593Smuzhiyun #define WM8785_WL_MASK 0x003 30*4882a593Smuzhiyun #define WM8785_WL_16 0x000 31*4882a593Smuzhiyun #define WM8785_WL_20 0x001 32*4882a593Smuzhiyun #define WM8785_WL_24 0x002 33*4882a593Smuzhiyun #define WM8785_WL_32 0x003 34*4882a593Smuzhiyun #define WM8785_LRP 0x004 35*4882a593Smuzhiyun #define WM8785_BCLKINV 0x008 36*4882a593Smuzhiyun #define WM8785_LRSWAP 0x010 37*4882a593Smuzhiyun #define WM8785_DEVNO_MASK 0x0e0 38*4882a593Smuzhiyun /* R2 */ 39*4882a593Smuzhiyun #define WM8785_HPFR 0x001 40*4882a593Smuzhiyun #define WM8785_HPFL 0x002 41*4882a593Smuzhiyun #define WM8785_SDODIS 0x004 42*4882a593Smuzhiyun #define WM8785_PWRDNR 0x008 43*4882a593Smuzhiyun #define WM8785_PWRDNL 0x010 44*4882a593Smuzhiyun #define WM8785_TDM_MASK 0x1c0 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #endif 47