1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun #ifndef WM8776_H_INCLUDED 3*4882a593Smuzhiyun #define WM8776_H_INCLUDED 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /* 6*4882a593Smuzhiyun * the following register names are from: 7*4882a593Smuzhiyun * wm8776.h -- WM8776 ASoC driver 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Copyright 2009 Wolfson Microelectronics plc 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define WM8776_HPLVOL 0x00 15*4882a593Smuzhiyun #define WM8776_HPRVOL 0x01 16*4882a593Smuzhiyun #define WM8776_HPMASTER 0x02 17*4882a593Smuzhiyun #define WM8776_DACLVOL 0x03 18*4882a593Smuzhiyun #define WM8776_DACRVOL 0x04 19*4882a593Smuzhiyun #define WM8776_DACMASTER 0x05 20*4882a593Smuzhiyun #define WM8776_PHASESWAP 0x06 21*4882a593Smuzhiyun #define WM8776_DACCTRL1 0x07 22*4882a593Smuzhiyun #define WM8776_DACMUTE 0x08 23*4882a593Smuzhiyun #define WM8776_DACCTRL2 0x09 24*4882a593Smuzhiyun #define WM8776_DACIFCTRL 0x0a 25*4882a593Smuzhiyun #define WM8776_ADCIFCTRL 0x0b 26*4882a593Smuzhiyun #define WM8776_MSTRCTRL 0x0c 27*4882a593Smuzhiyun #define WM8776_PWRDOWN 0x0d 28*4882a593Smuzhiyun #define WM8776_ADCLVOL 0x0e 29*4882a593Smuzhiyun #define WM8776_ADCRVOL 0x0f 30*4882a593Smuzhiyun #define WM8776_ALCCTRL1 0x10 31*4882a593Smuzhiyun #define WM8776_ALCCTRL2 0x11 32*4882a593Smuzhiyun #define WM8776_ALCCTRL3 0x12 33*4882a593Smuzhiyun #define WM8776_NOISEGATE 0x13 34*4882a593Smuzhiyun #define WM8776_LIMITER 0x14 35*4882a593Smuzhiyun #define WM8776_ADCMUX 0x15 36*4882a593Smuzhiyun #define WM8776_OUTMUX 0x16 37*4882a593Smuzhiyun #define WM8776_RESET 0x17 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* HPLVOL/HPRVOL/HPMASTER */ 41*4882a593Smuzhiyun #define WM8776_HPATT_MASK 0x07f 42*4882a593Smuzhiyun #define WM8776_HPZCEN 0x080 43*4882a593Smuzhiyun #define WM8776_UPDATE 0x100 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* DACLVOL/DACRVOL/DACMASTER */ 46*4882a593Smuzhiyun #define WM8776_DATT_MASK 0x0ff 47*4882a593Smuzhiyun /*#define WM8776_UPDATE 0x100*/ 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* PHASESWAP */ 50*4882a593Smuzhiyun #define WM8776_PH_MASK 0x003 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* DACCTRL1 */ 53*4882a593Smuzhiyun #define WM8776_DZCEN 0x001 54*4882a593Smuzhiyun #define WM8776_ATC 0x002 55*4882a593Smuzhiyun #define WM8776_IZD 0x004 56*4882a593Smuzhiyun #define WM8776_TOD 0x008 57*4882a593Smuzhiyun #define WM8776_PL_LEFT_MASK 0x030 58*4882a593Smuzhiyun #define WM8776_PL_LEFT_MUTE 0x000 59*4882a593Smuzhiyun #define WM8776_PL_LEFT_LEFT 0x010 60*4882a593Smuzhiyun #define WM8776_PL_LEFT_RIGHT 0x020 61*4882a593Smuzhiyun #define WM8776_PL_LEFT_LRMIX 0x030 62*4882a593Smuzhiyun #define WM8776_PL_RIGHT_MASK 0x0c0 63*4882a593Smuzhiyun #define WM8776_PL_RIGHT_MUTE 0x000 64*4882a593Smuzhiyun #define WM8776_PL_RIGHT_LEFT 0x040 65*4882a593Smuzhiyun #define WM8776_PL_RIGHT_RIGHT 0x080 66*4882a593Smuzhiyun #define WM8776_PL_RIGHT_LRMIX 0x0c0 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* DACMUTE */ 69*4882a593Smuzhiyun #define WM8776_DMUTE 0x001 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* DACCTRL2 */ 72*4882a593Smuzhiyun #define WM8776_DEEMPH 0x001 73*4882a593Smuzhiyun #define WM8776_DZFM_MASK 0x006 74*4882a593Smuzhiyun #define WM8776_DZFM_NONE 0x000 75*4882a593Smuzhiyun #define WM8776_DZFM_LR 0x002 76*4882a593Smuzhiyun #define WM8776_DZFM_BOTH 0x004 77*4882a593Smuzhiyun #define WM8776_DZFM_EITHER 0x006 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun /* DACIFCTRL */ 80*4882a593Smuzhiyun #define WM8776_DACFMT_MASK 0x003 81*4882a593Smuzhiyun #define WM8776_DACFMT_RJUST 0x000 82*4882a593Smuzhiyun #define WM8776_DACFMT_LJUST 0x001 83*4882a593Smuzhiyun #define WM8776_DACFMT_I2S 0x002 84*4882a593Smuzhiyun #define WM8776_DACFMT_DSP 0x003 85*4882a593Smuzhiyun #define WM8776_DACLRP 0x004 86*4882a593Smuzhiyun #define WM8776_DACBCP 0x008 87*4882a593Smuzhiyun #define WM8776_DACWL_MASK 0x030 88*4882a593Smuzhiyun #define WM8776_DACWL_16 0x000 89*4882a593Smuzhiyun #define WM8776_DACWL_20 0x010 90*4882a593Smuzhiyun #define WM8776_DACWL_24 0x020 91*4882a593Smuzhiyun #define WM8776_DACWL_32 0x030 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* ADCIFCTRL */ 94*4882a593Smuzhiyun #define WM8776_ADCFMT_MASK 0x003 95*4882a593Smuzhiyun #define WM8776_ADCFMT_RJUST 0x000 96*4882a593Smuzhiyun #define WM8776_ADCFMT_LJUST 0x001 97*4882a593Smuzhiyun #define WM8776_ADCFMT_I2S 0x002 98*4882a593Smuzhiyun #define WM8776_ADCFMT_DSP 0x003 99*4882a593Smuzhiyun #define WM8776_ADCLRP 0x004 100*4882a593Smuzhiyun #define WM8776_ADCBCP 0x008 101*4882a593Smuzhiyun #define WM8776_ADCWL_MASK 0x030 102*4882a593Smuzhiyun #define WM8776_ADCWL_16 0x000 103*4882a593Smuzhiyun #define WM8776_ADCWL_20 0x010 104*4882a593Smuzhiyun #define WM8776_ADCWL_24 0x020 105*4882a593Smuzhiyun #define WM8776_ADCWL_32 0x030 106*4882a593Smuzhiyun #define WM8776_ADCMCLK 0x040 107*4882a593Smuzhiyun #define WM8776_ADCHPD 0x100 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun /* MSTRCTRL */ 110*4882a593Smuzhiyun #define WM8776_ADCRATE_MASK 0x007 111*4882a593Smuzhiyun #define WM8776_ADCRATE_256 0x002 112*4882a593Smuzhiyun #define WM8776_ADCRATE_384 0x003 113*4882a593Smuzhiyun #define WM8776_ADCRATE_512 0x004 114*4882a593Smuzhiyun #define WM8776_ADCRATE_768 0x005 115*4882a593Smuzhiyun #define WM8776_ADCOSR 0x008 116*4882a593Smuzhiyun #define WM8776_DACRATE_MASK 0x070 117*4882a593Smuzhiyun #define WM8776_DACRATE_128 0x000 118*4882a593Smuzhiyun #define WM8776_DACRATE_192 0x010 119*4882a593Smuzhiyun #define WM8776_DACRATE_256 0x020 120*4882a593Smuzhiyun #define WM8776_DACRATE_384 0x030 121*4882a593Smuzhiyun #define WM8776_DACRATE_512 0x040 122*4882a593Smuzhiyun #define WM8776_DACRATE_768 0x050 123*4882a593Smuzhiyun #define WM8776_DACMS 0x080 124*4882a593Smuzhiyun #define WM8776_ADCMS 0x100 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun /* PWRDOWN */ 127*4882a593Smuzhiyun #define WM8776_PDWN 0x001 128*4882a593Smuzhiyun #define WM8776_ADCPD 0x002 129*4882a593Smuzhiyun #define WM8776_DACPD 0x004 130*4882a593Smuzhiyun #define WM8776_HPPD 0x008 131*4882a593Smuzhiyun #define WM8776_AINPD 0x040 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun /* ADCLVOL/ADCRVOL */ 134*4882a593Smuzhiyun #define WM8776_AGMASK 0x0ff 135*4882a593Smuzhiyun #define WM8776_ZCA 0x100 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun /* ALCCTRL1 */ 138*4882a593Smuzhiyun #define WM8776_LCT_MASK 0x00f 139*4882a593Smuzhiyun #define WM8776_MAXGAIN_MASK 0x070 140*4882a593Smuzhiyun #define WM8776_LCSEL_MASK 0x180 141*4882a593Smuzhiyun #define WM8776_LCSEL_LIMITER 0x000 142*4882a593Smuzhiyun #define WM8776_LCSEL_ALC_RIGHT 0x080 143*4882a593Smuzhiyun #define WM8776_LCSEL_ALC_LEFT 0x100 144*4882a593Smuzhiyun #define WM8776_LCSEL_ALC_STEREO 0x180 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun /* ALCCTRL2 */ 147*4882a593Smuzhiyun #define WM8776_HLD_MASK 0x00f 148*4882a593Smuzhiyun #define WM8776_ALCZC 0x080 149*4882a593Smuzhiyun #define WM8776_LCEN 0x100 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun /* ALCCTRL3 */ 152*4882a593Smuzhiyun #define WM8776_ATK_MASK 0x00f 153*4882a593Smuzhiyun #define WM8776_DCY_MASK 0x0f0 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun /* NOISEGATE */ 156*4882a593Smuzhiyun #define WM8776_NGAT 0x001 157*4882a593Smuzhiyun #define WM8776_NGTH_MASK 0x01c 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun /* LIMITER */ 160*4882a593Smuzhiyun #define WM8776_MAXATTEN_MASK 0x00f 161*4882a593Smuzhiyun #define WM8776_TRANWIN_MASK 0x070 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun /* ADCMUX */ 164*4882a593Smuzhiyun #define WM8776_AMX_MASK 0x01f 165*4882a593Smuzhiyun #define WM8776_MUTERA 0x040 166*4882a593Smuzhiyun #define WM8776_MUTELA 0x080 167*4882a593Smuzhiyun #define WM8776_LRBOTH 0x100 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun /* OUTMUX */ 170*4882a593Smuzhiyun #define WM8776_MX_DAC 0x001 171*4882a593Smuzhiyun #define WM8776_MX_AUX 0x002 172*4882a593Smuzhiyun #define WM8776_MX_BYPASS 0x004 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun #endif 175