1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef OXYGEN_H_INCLUDED
3*4882a593Smuzhiyun #define OXYGEN_H_INCLUDED
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <linux/mutex.h>
6*4882a593Smuzhiyun #include <linux/spinlock.h>
7*4882a593Smuzhiyun #include <linux/wait.h>
8*4882a593Smuzhiyun #include <linux/workqueue.h>
9*4882a593Smuzhiyun #include "oxygen_regs.h"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun /* 1 << PCM_x == OXYGEN_CHANNEL_x */
12*4882a593Smuzhiyun #define PCM_A 0
13*4882a593Smuzhiyun #define PCM_B 1
14*4882a593Smuzhiyun #define PCM_C 2
15*4882a593Smuzhiyun #define PCM_SPDIF 3
16*4882a593Smuzhiyun #define PCM_MULTICH 4
17*4882a593Smuzhiyun #define PCM_AC97 5
18*4882a593Smuzhiyun #define PCM_COUNT 6
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define OXYGEN_MCLKS(f_single, f_double, f_quad) ((MCLK_##f_single << 0) | \
21*4882a593Smuzhiyun (MCLK_##f_double << 2) | \
22*4882a593Smuzhiyun (MCLK_##f_quad << 4))
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define OXYGEN_IO_SIZE 0x100
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define OXYGEN_EEPROM_ID 0x434d /* "CM" */
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /* model-specific configuration of outputs/inputs */
29*4882a593Smuzhiyun #define PLAYBACK_0_TO_I2S 0x0001
30*4882a593Smuzhiyun /* PLAYBACK_0_TO_AC97_0 not implemented */
31*4882a593Smuzhiyun #define PLAYBACK_1_TO_SPDIF 0x0004
32*4882a593Smuzhiyun #define PLAYBACK_2_TO_AC97_1 0x0008
33*4882a593Smuzhiyun #define CAPTURE_0_FROM_I2S_1 0x0010
34*4882a593Smuzhiyun #define CAPTURE_0_FROM_I2S_2 0x0020
35*4882a593Smuzhiyun /* CAPTURE_0_FROM_AC97_0 not implemented */
36*4882a593Smuzhiyun #define CAPTURE_1_FROM_SPDIF 0x0080
37*4882a593Smuzhiyun #define CAPTURE_2_FROM_I2S_2 0x0100
38*4882a593Smuzhiyun #define CAPTURE_2_FROM_AC97_1 0x0200
39*4882a593Smuzhiyun #define CAPTURE_3_FROM_I2S_3 0x0400
40*4882a593Smuzhiyun #define MIDI_OUTPUT 0x0800
41*4882a593Smuzhiyun #define MIDI_INPUT 0x1000
42*4882a593Smuzhiyun #define AC97_CD_INPUT 0x2000
43*4882a593Smuzhiyun #define AC97_FMIC_SWITCH 0x4000
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun enum {
46*4882a593Smuzhiyun CONTROL_SPDIF_PCM,
47*4882a593Smuzhiyun CONTROL_SPDIF_INPUT_BITS,
48*4882a593Smuzhiyun CONTROL_MIC_CAPTURE_SWITCH,
49*4882a593Smuzhiyun CONTROL_LINE_CAPTURE_SWITCH,
50*4882a593Smuzhiyun CONTROL_CD_CAPTURE_SWITCH,
51*4882a593Smuzhiyun CONTROL_AUX_CAPTURE_SWITCH,
52*4882a593Smuzhiyun CONTROL_COUNT
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #define OXYGEN_PCI_SUBID(sv, sd) \
56*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_CMEDIA, \
57*4882a593Smuzhiyun .device = 0x8788, \
58*4882a593Smuzhiyun .subvendor = sv, \
59*4882a593Smuzhiyun .subdevice = sd
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define BROKEN_EEPROM_DRIVER_DATA ((unsigned long)-1)
62*4882a593Smuzhiyun #define OXYGEN_PCI_SUBID_BROKEN_EEPROM \
63*4882a593Smuzhiyun OXYGEN_PCI_SUBID(PCI_VENDOR_ID_CMEDIA, 0x8788), \
64*4882a593Smuzhiyun .driver_data = BROKEN_EEPROM_DRIVER_DATA
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun struct pci_dev;
67*4882a593Smuzhiyun struct pci_device_id;
68*4882a593Smuzhiyun struct snd_card;
69*4882a593Smuzhiyun struct snd_pcm_substream;
70*4882a593Smuzhiyun struct snd_pcm_hardware;
71*4882a593Smuzhiyun struct snd_pcm_hw_params;
72*4882a593Smuzhiyun struct snd_kcontrol_new;
73*4882a593Smuzhiyun struct snd_rawmidi;
74*4882a593Smuzhiyun struct snd_info_buffer;
75*4882a593Smuzhiyun struct oxygen;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun struct oxygen_model {
78*4882a593Smuzhiyun const char *shortname;
79*4882a593Smuzhiyun const char *longname;
80*4882a593Smuzhiyun const char *chip;
81*4882a593Smuzhiyun void (*init)(struct oxygen *chip);
82*4882a593Smuzhiyun int (*control_filter)(struct snd_kcontrol_new *template);
83*4882a593Smuzhiyun int (*mixer_init)(struct oxygen *chip);
84*4882a593Smuzhiyun void (*cleanup)(struct oxygen *chip);
85*4882a593Smuzhiyun void (*suspend)(struct oxygen *chip);
86*4882a593Smuzhiyun void (*resume)(struct oxygen *chip);
87*4882a593Smuzhiyun void (*pcm_hardware_filter)(unsigned int channel,
88*4882a593Smuzhiyun struct snd_pcm_hardware *hardware);
89*4882a593Smuzhiyun void (*set_dac_params)(struct oxygen *chip,
90*4882a593Smuzhiyun struct snd_pcm_hw_params *params);
91*4882a593Smuzhiyun void (*set_adc_params)(struct oxygen *chip,
92*4882a593Smuzhiyun struct snd_pcm_hw_params *params);
93*4882a593Smuzhiyun void (*update_dac_volume)(struct oxygen *chip);
94*4882a593Smuzhiyun void (*update_dac_mute)(struct oxygen *chip);
95*4882a593Smuzhiyun void (*update_center_lfe_mix)(struct oxygen *chip, bool mixed);
96*4882a593Smuzhiyun unsigned int (*adjust_dac_routing)(struct oxygen *chip,
97*4882a593Smuzhiyun unsigned int play_routing);
98*4882a593Smuzhiyun void (*gpio_changed)(struct oxygen *chip);
99*4882a593Smuzhiyun void (*uart_input)(struct oxygen *chip);
100*4882a593Smuzhiyun void (*ac97_switch)(struct oxygen *chip,
101*4882a593Smuzhiyun unsigned int reg, unsigned int mute);
102*4882a593Smuzhiyun void (*dump_registers)(struct oxygen *chip,
103*4882a593Smuzhiyun struct snd_info_buffer *buffer);
104*4882a593Smuzhiyun const unsigned int *dac_tlv;
105*4882a593Smuzhiyun size_t model_data_size;
106*4882a593Smuzhiyun unsigned int device_config;
107*4882a593Smuzhiyun u8 dac_channels_pcm;
108*4882a593Smuzhiyun u8 dac_channels_mixer;
109*4882a593Smuzhiyun u8 dac_volume_min;
110*4882a593Smuzhiyun u8 dac_volume_max;
111*4882a593Smuzhiyun u8 misc_flags;
112*4882a593Smuzhiyun u8 function_flags;
113*4882a593Smuzhiyun u8 dac_mclks;
114*4882a593Smuzhiyun u8 adc_mclks;
115*4882a593Smuzhiyun u16 dac_i2s_format;
116*4882a593Smuzhiyun u16 adc_i2s_format;
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun struct oxygen {
120*4882a593Smuzhiyun unsigned long addr;
121*4882a593Smuzhiyun spinlock_t reg_lock;
122*4882a593Smuzhiyun struct mutex mutex;
123*4882a593Smuzhiyun struct snd_card *card;
124*4882a593Smuzhiyun struct pci_dev *pci;
125*4882a593Smuzhiyun struct snd_rawmidi *midi;
126*4882a593Smuzhiyun int irq;
127*4882a593Smuzhiyun void *model_data;
128*4882a593Smuzhiyun unsigned int interrupt_mask;
129*4882a593Smuzhiyun u8 dac_volume[8];
130*4882a593Smuzhiyun u8 dac_mute;
131*4882a593Smuzhiyun u8 pcm_active;
132*4882a593Smuzhiyun u8 pcm_running;
133*4882a593Smuzhiyun u8 dac_routing;
134*4882a593Smuzhiyun u8 spdif_playback_enable;
135*4882a593Smuzhiyun u8 has_ac97_0;
136*4882a593Smuzhiyun u8 has_ac97_1;
137*4882a593Smuzhiyun u32 spdif_bits;
138*4882a593Smuzhiyun u32 spdif_pcm_bits;
139*4882a593Smuzhiyun struct snd_pcm_substream *streams[PCM_COUNT];
140*4882a593Smuzhiyun struct snd_kcontrol *controls[CONTROL_COUNT];
141*4882a593Smuzhiyun struct work_struct spdif_input_bits_work;
142*4882a593Smuzhiyun struct work_struct gpio_work;
143*4882a593Smuzhiyun wait_queue_head_t ac97_waitqueue;
144*4882a593Smuzhiyun union {
145*4882a593Smuzhiyun u8 _8[OXYGEN_IO_SIZE];
146*4882a593Smuzhiyun __le16 _16[OXYGEN_IO_SIZE / 2];
147*4882a593Smuzhiyun __le32 _32[OXYGEN_IO_SIZE / 4];
148*4882a593Smuzhiyun } saved_registers;
149*4882a593Smuzhiyun u16 saved_ac97_registers[2][0x40];
150*4882a593Smuzhiyun unsigned int uart_input_count;
151*4882a593Smuzhiyun u8 uart_input[32];
152*4882a593Smuzhiyun struct oxygen_model model;
153*4882a593Smuzhiyun };
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun /* oxygen_lib.c */
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun int oxygen_pci_probe(struct pci_dev *pci, int index, char *id,
158*4882a593Smuzhiyun struct module *owner,
159*4882a593Smuzhiyun const struct pci_device_id *ids,
160*4882a593Smuzhiyun int (*get_model)(struct oxygen *chip,
161*4882a593Smuzhiyun const struct pci_device_id *id
162*4882a593Smuzhiyun )
163*4882a593Smuzhiyun );
164*4882a593Smuzhiyun void oxygen_pci_remove(struct pci_dev *pci);
165*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
166*4882a593Smuzhiyun extern const struct dev_pm_ops oxygen_pci_pm;
167*4882a593Smuzhiyun #endif
168*4882a593Smuzhiyun void oxygen_pci_shutdown(struct pci_dev *pci);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun /* oxygen_mixer.c */
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun int oxygen_mixer_init(struct oxygen *chip);
173*4882a593Smuzhiyun void oxygen_update_dac_routing(struct oxygen *chip);
174*4882a593Smuzhiyun void oxygen_update_spdif_source(struct oxygen *chip);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun /* oxygen_pcm.c */
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun int oxygen_pcm_init(struct oxygen *chip);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun /* oxygen_io.c */
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun u8 oxygen_read8(struct oxygen *chip, unsigned int reg);
183*4882a593Smuzhiyun u16 oxygen_read16(struct oxygen *chip, unsigned int reg);
184*4882a593Smuzhiyun u32 oxygen_read32(struct oxygen *chip, unsigned int reg);
185*4882a593Smuzhiyun void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value);
186*4882a593Smuzhiyun void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value);
187*4882a593Smuzhiyun void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value);
188*4882a593Smuzhiyun void oxygen_write8_masked(struct oxygen *chip, unsigned int reg,
189*4882a593Smuzhiyun u8 value, u8 mask);
190*4882a593Smuzhiyun void oxygen_write16_masked(struct oxygen *chip, unsigned int reg,
191*4882a593Smuzhiyun u16 value, u16 mask);
192*4882a593Smuzhiyun void oxygen_write32_masked(struct oxygen *chip, unsigned int reg,
193*4882a593Smuzhiyun u32 value, u32 mask);
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun u16 oxygen_read_ac97(struct oxygen *chip, unsigned int codec,
196*4882a593Smuzhiyun unsigned int index);
197*4882a593Smuzhiyun void oxygen_write_ac97(struct oxygen *chip, unsigned int codec,
198*4882a593Smuzhiyun unsigned int index, u16 data);
199*4882a593Smuzhiyun void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec,
200*4882a593Smuzhiyun unsigned int index, u16 data, u16 mask);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun int oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data);
203*4882a593Smuzhiyun void oxygen_write_i2c(struct oxygen *chip, u8 device, u8 map, u8 data);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun void oxygen_reset_uart(struct oxygen *chip);
206*4882a593Smuzhiyun void oxygen_write_uart(struct oxygen *chip, u8 data);
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun u16 oxygen_read_eeprom(struct oxygen *chip, unsigned int index);
209*4882a593Smuzhiyun void oxygen_write_eeprom(struct oxygen *chip, unsigned int index, u16 value);
210*4882a593Smuzhiyun
oxygen_set_bits8(struct oxygen * chip,unsigned int reg,u8 value)211*4882a593Smuzhiyun static inline void oxygen_set_bits8(struct oxygen *chip,
212*4882a593Smuzhiyun unsigned int reg, u8 value)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun oxygen_write8_masked(chip, reg, value, value);
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
oxygen_set_bits16(struct oxygen * chip,unsigned int reg,u16 value)217*4882a593Smuzhiyun static inline void oxygen_set_bits16(struct oxygen *chip,
218*4882a593Smuzhiyun unsigned int reg, u16 value)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun oxygen_write16_masked(chip, reg, value, value);
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
oxygen_set_bits32(struct oxygen * chip,unsigned int reg,u32 value)223*4882a593Smuzhiyun static inline void oxygen_set_bits32(struct oxygen *chip,
224*4882a593Smuzhiyun unsigned int reg, u32 value)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun oxygen_write32_masked(chip, reg, value, value);
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
oxygen_clear_bits8(struct oxygen * chip,unsigned int reg,u8 value)229*4882a593Smuzhiyun static inline void oxygen_clear_bits8(struct oxygen *chip,
230*4882a593Smuzhiyun unsigned int reg, u8 value)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun oxygen_write8_masked(chip, reg, 0, value);
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
oxygen_clear_bits16(struct oxygen * chip,unsigned int reg,u16 value)235*4882a593Smuzhiyun static inline void oxygen_clear_bits16(struct oxygen *chip,
236*4882a593Smuzhiyun unsigned int reg, u16 value)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun oxygen_write16_masked(chip, reg, 0, value);
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
oxygen_clear_bits32(struct oxygen * chip,unsigned int reg,u32 value)241*4882a593Smuzhiyun static inline void oxygen_clear_bits32(struct oxygen *chip,
242*4882a593Smuzhiyun unsigned int reg, u32 value)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun oxygen_write32_masked(chip, reg, 0, value);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
oxygen_ac97_set_bits(struct oxygen * chip,unsigned int codec,unsigned int index,u16 value)247*4882a593Smuzhiyun static inline void oxygen_ac97_set_bits(struct oxygen *chip, unsigned int codec,
248*4882a593Smuzhiyun unsigned int index, u16 value)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun oxygen_write_ac97_masked(chip, codec, index, value, value);
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
oxygen_ac97_clear_bits(struct oxygen * chip,unsigned int codec,unsigned int index,u16 value)253*4882a593Smuzhiyun static inline void oxygen_ac97_clear_bits(struct oxygen *chip,
254*4882a593Smuzhiyun unsigned int codec,
255*4882a593Smuzhiyun unsigned int index, u16 value)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun oxygen_write_ac97_masked(chip, codec, index, 0, value);
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun #endif
261