1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* register 01h */ 3*4882a593Smuzhiyun #define CS4362A_PDN 0x01 4*4882a593Smuzhiyun #define CS4362A_DAC1_DIS 0x02 5*4882a593Smuzhiyun #define CS4362A_DAC2_DIS 0x04 6*4882a593Smuzhiyun #define CS4362A_DAC3_DIS 0x08 7*4882a593Smuzhiyun #define CS4362A_MCLKDIV 0x20 8*4882a593Smuzhiyun #define CS4362A_FREEZE 0x40 9*4882a593Smuzhiyun #define CS4362A_CPEN 0x80 10*4882a593Smuzhiyun /* register 02h */ 11*4882a593Smuzhiyun #define CS4362A_DIF_MASK 0x70 12*4882a593Smuzhiyun #define CS4362A_DIF_LJUST 0x00 13*4882a593Smuzhiyun #define CS4362A_DIF_I2S 0x10 14*4882a593Smuzhiyun #define CS4362A_DIF_RJUST_16 0x20 15*4882a593Smuzhiyun #define CS4362A_DIF_RJUST_24 0x30 16*4882a593Smuzhiyun #define CS4362A_DIF_RJUST_20 0x40 17*4882a593Smuzhiyun #define CS4362A_DIF_RJUST_18 0x50 18*4882a593Smuzhiyun /* register 03h */ 19*4882a593Smuzhiyun #define CS4362A_MUTEC_MASK 0x03 20*4882a593Smuzhiyun #define CS4362A_MUTEC_6 0x00 21*4882a593Smuzhiyun #define CS4362A_MUTEC_1 0x01 22*4882a593Smuzhiyun #define CS4362A_MUTEC_3 0x03 23*4882a593Smuzhiyun #define CS4362A_AMUTE 0x04 24*4882a593Smuzhiyun #define CS4362A_MUTEC_POL 0x08 25*4882a593Smuzhiyun #define CS4362A_RMP_UP 0x10 26*4882a593Smuzhiyun #define CS4362A_SNGLVOL 0x20 27*4882a593Smuzhiyun #define CS4362A_ZERO_CROSS 0x40 28*4882a593Smuzhiyun #define CS4362A_SOFT_RAMP 0x80 29*4882a593Smuzhiyun /* register 04h */ 30*4882a593Smuzhiyun #define CS4362A_RMP_DN 0x01 31*4882a593Smuzhiyun #define CS4362A_DEM_MASK 0x06 32*4882a593Smuzhiyun #define CS4362A_DEM_NONE 0x00 33*4882a593Smuzhiyun #define CS4362A_DEM_44100 0x02 34*4882a593Smuzhiyun #define CS4362A_DEM_48000 0x04 35*4882a593Smuzhiyun #define CS4362A_DEM_32000 0x06 36*4882a593Smuzhiyun #define CS4362A_FILT_SEL 0x10 37*4882a593Smuzhiyun /* register 05h */ 38*4882a593Smuzhiyun #define CS4362A_INV_A1 0x01 39*4882a593Smuzhiyun #define CS4362A_INV_B1 0x02 40*4882a593Smuzhiyun #define CS4362A_INV_A2 0x04 41*4882a593Smuzhiyun #define CS4362A_INV_B2 0x08 42*4882a593Smuzhiyun #define CS4362A_INV_A3 0x10 43*4882a593Smuzhiyun #define CS4362A_INV_B3 0x20 44*4882a593Smuzhiyun /* register 06h */ 45*4882a593Smuzhiyun #define CS4362A_FM_MASK 0x03 46*4882a593Smuzhiyun #define CS4362A_FM_SINGLE 0x00 47*4882a593Smuzhiyun #define CS4362A_FM_DOUBLE 0x01 48*4882a593Smuzhiyun #define CS4362A_FM_QUAD 0x02 49*4882a593Smuzhiyun #define CS4362A_FM_DSD 0x03 50*4882a593Smuzhiyun #define CS4362A_ATAPI_MASK 0x7c 51*4882a593Smuzhiyun #define CS4362A_ATAPI_B_MUTE 0x00 52*4882a593Smuzhiyun #define CS4362A_ATAPI_B_R 0x04 53*4882a593Smuzhiyun #define CS4362A_ATAPI_B_L 0x08 54*4882a593Smuzhiyun #define CS4362A_ATAPI_B_LR 0x0c 55*4882a593Smuzhiyun #define CS4362A_ATAPI_A_MUTE 0x00 56*4882a593Smuzhiyun #define CS4362A_ATAPI_A_R 0x10 57*4882a593Smuzhiyun #define CS4362A_ATAPI_A_L 0x20 58*4882a593Smuzhiyun #define CS4362A_ATAPI_A_LR 0x30 59*4882a593Smuzhiyun #define CS4362A_ATAPI_MIX_LR_VOL 0x40 60*4882a593Smuzhiyun #define CS4362A_A_EQ_B 0x80 61*4882a593Smuzhiyun /* register 07h */ 62*4882a593Smuzhiyun #define CS4362A_VOL_MASK 0x7f 63*4882a593Smuzhiyun #define CS4362A_MUTE 0x80 64*4882a593Smuzhiyun /* register 08h: like 07h */ 65*4882a593Smuzhiyun /* registers 09h..0Bh: like 06h..08h */ 66*4882a593Smuzhiyun /* registers 0Ch..0Eh: like 06h..08h */ 67*4882a593Smuzhiyun /* register 12h */ 68*4882a593Smuzhiyun #define CS4362A_REV_MASK 0x07 69*4882a593Smuzhiyun #define CS4362A_PART_MASK 0xf8 70*4882a593Smuzhiyun #define CS4362A_PART_CS4362A 0x50 71