1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Driver for Digigram miXart soundcards 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * main header file 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (c) 2003 by Digigram <alsa@digigram.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __SOUND_MIXART_H 11*4882a593Smuzhiyun #define __SOUND_MIXART_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/interrupt.h> 14*4882a593Smuzhiyun #include <linux/mutex.h> 15*4882a593Smuzhiyun #include <sound/pcm.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define MIXART_DRIVER_VERSION 0x000100 /* 0.1.0 */ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun struct mixart_uid { 24*4882a593Smuzhiyun u32 object_id; 25*4882a593Smuzhiyun u32 desc; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun struct mem_area { 29*4882a593Smuzhiyun unsigned long phys; 30*4882a593Smuzhiyun void __iomem *virt; 31*4882a593Smuzhiyun struct resource *res; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun struct mixart_route { 36*4882a593Smuzhiyun unsigned char connected; 37*4882a593Smuzhiyun unsigned char phase_inv; 38*4882a593Smuzhiyun int volume; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* firmware status codes */ 43*4882a593Smuzhiyun #define MIXART_MOTHERBOARD_XLX_INDEX 0 44*4882a593Smuzhiyun #define MIXART_MOTHERBOARD_ELF_INDEX 1 45*4882a593Smuzhiyun #define MIXART_AESEBUBOARD_XLX_INDEX 2 46*4882a593Smuzhiyun #define MIXART_HARDW_FILES_MAX_INDEX 3 /* xilinx, elf, AESEBU xilinx */ 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define MIXART_MAX_CARDS 4 49*4882a593Smuzhiyun #define MSG_FIFO_SIZE 16 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define MIXART_MAX_PHYS_CONNECTORS (MIXART_MAX_CARDS * 2 * 2) /* 4 * stereo * (analog+digital) */ 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun struct mixart_mgr { 54*4882a593Smuzhiyun unsigned int num_cards; 55*4882a593Smuzhiyun struct snd_mixart *chip[MIXART_MAX_CARDS]; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun struct pci_dev *pci; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun int irq; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /* memory-maps */ 62*4882a593Smuzhiyun struct mem_area mem[2]; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /* one and only blocking message or notification may be pending */ 65*4882a593Smuzhiyun u32 pending_event; 66*4882a593Smuzhiyun wait_queue_head_t msg_sleep; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* messages fifo */ 69*4882a593Smuzhiyun u32 msg_fifo[MSG_FIFO_SIZE]; 70*4882a593Smuzhiyun int msg_fifo_readptr; 71*4882a593Smuzhiyun int msg_fifo_writeptr; 72*4882a593Smuzhiyun atomic_t msg_processed; /* number of messages to be processed in irq thread */ 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun struct mutex lock; /* interrupt lock */ 75*4882a593Smuzhiyun struct mutex msg_lock; /* mailbox lock */ 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun struct mutex setup_mutex; /* mutex used in hw_params, open and close */ 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun /* hardware interface */ 80*4882a593Smuzhiyun unsigned int dsp_loaded; /* bit flags of loaded dsp indices */ 81*4882a593Smuzhiyun unsigned int board_type; /* read from embedded once elf file is loaded, 250 = miXart8, 251 = with AES, 252 = with Cobranet */ 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun struct snd_dma_buffer flowinfo; 84*4882a593Smuzhiyun struct snd_dma_buffer bufferinfo; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun struct mixart_uid uid_console_manager; 87*4882a593Smuzhiyun int sample_rate; 88*4882a593Smuzhiyun int ref_count_rate; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun struct mutex mixer_mutex; /* mutex for mixer */ 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #define MIXART_STREAM_STATUS_FREE 0 96*4882a593Smuzhiyun #define MIXART_STREAM_STATUS_OPEN 1 97*4882a593Smuzhiyun #define MIXART_STREAM_STATUS_RUNNING 2 98*4882a593Smuzhiyun #define MIXART_STREAM_STATUS_DRAINING 3 99*4882a593Smuzhiyun #define MIXART_STREAM_STATUS_PAUSE 4 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #define MIXART_PLAYBACK_STREAMS 4 102*4882a593Smuzhiyun #define MIXART_CAPTURE_STREAMS 1 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun #define MIXART_PCM_ANALOG 0 105*4882a593Smuzhiyun #define MIXART_PCM_DIGITAL 1 106*4882a593Smuzhiyun #define MIXART_PCM_TOTAL 2 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #define MIXART_MAX_STREAM_PER_CARD (MIXART_PCM_TOTAL * (MIXART_PLAYBACK_STREAMS + MIXART_CAPTURE_STREAMS) ) 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun #define MIXART_NOTIFY_CARD_MASK 0xF000 112*4882a593Smuzhiyun #define MIXART_NOTIFY_CARD_OFFSET 12 113*4882a593Smuzhiyun #define MIXART_NOTIFY_PCM_MASK 0x0F00 114*4882a593Smuzhiyun #define MIXART_NOTIFY_PCM_OFFSET 8 115*4882a593Smuzhiyun #define MIXART_NOTIFY_CAPT_MASK 0x0080 116*4882a593Smuzhiyun #define MIXART_NOTIFY_SUBS_MASK 0x007F 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun struct mixart_stream { 120*4882a593Smuzhiyun struct snd_pcm_substream *substream; 121*4882a593Smuzhiyun struct mixart_pipe *pipe; 122*4882a593Smuzhiyun int pcm_number; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun int status; /* nothing, running, draining */ 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun u64 abs_period_elapsed; /* last absolute stream position where period_elapsed was called (multiple of runtime->period_size) */ 127*4882a593Smuzhiyun u32 buf_periods; /* periods counter in the buffer (< runtime->periods) */ 128*4882a593Smuzhiyun u32 buf_period_frag; /* defines with buf_period_pos the exact position in the buffer (< runtime->period_size) */ 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun int channels; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun enum mixart_pipe_status { 135*4882a593Smuzhiyun PIPE_UNDEFINED, 136*4882a593Smuzhiyun PIPE_STOPPED, 137*4882a593Smuzhiyun PIPE_RUNNING, 138*4882a593Smuzhiyun PIPE_CLOCK_SET 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun struct mixart_pipe { 142*4882a593Smuzhiyun struct mixart_uid group_uid; /* id of the pipe, as returned by embedded */ 143*4882a593Smuzhiyun int stream_count; 144*4882a593Smuzhiyun struct mixart_uid uid_left_connector; /* UID's for the audio connectors */ 145*4882a593Smuzhiyun struct mixart_uid uid_right_connector; 146*4882a593Smuzhiyun enum mixart_pipe_status status; 147*4882a593Smuzhiyun int references; /* number of subs openned */ 148*4882a593Smuzhiyun int monitoring; /* pipe used for monitoring issue */ 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun struct snd_mixart { 153*4882a593Smuzhiyun struct snd_card *card; 154*4882a593Smuzhiyun struct mixart_mgr *mgr; 155*4882a593Smuzhiyun int chip_idx; /* zero based */ 156*4882a593Smuzhiyun struct snd_hwdep *hwdep; /* DSP loader, only for the first card */ 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun struct snd_pcm *pcm; /* PCM analog i/o */ 159*4882a593Smuzhiyun struct snd_pcm *pcm_dig; /* PCM digital i/o */ 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun /* allocate stereo pipe for instance */ 162*4882a593Smuzhiyun struct mixart_pipe pipe_in_ana; 163*4882a593Smuzhiyun struct mixart_pipe pipe_out_ana; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun /* if AES/EBU daughter board is available, additional pipes possible on pcm_dig */ 166*4882a593Smuzhiyun struct mixart_pipe pipe_in_dig; 167*4882a593Smuzhiyun struct mixart_pipe pipe_out_dig; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun struct mixart_stream playback_stream[MIXART_PCM_TOTAL][MIXART_PLAYBACK_STREAMS]; /* 0 = pcm, 1 = pcm_dig */ 170*4882a593Smuzhiyun struct mixart_stream capture_stream[MIXART_PCM_TOTAL]; /* 0 = pcm, 1 = pcm_dig */ 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun /* UID's for the physical io's */ 173*4882a593Smuzhiyun struct mixart_uid uid_out_analog_physio; 174*4882a593Smuzhiyun struct mixart_uid uid_in_analog_physio; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun int analog_playback_active[2]; /* Mixer : Master Playback active (!mute) */ 177*4882a593Smuzhiyun int analog_playback_volume[2]; /* Mixer : Master Playback Volume */ 178*4882a593Smuzhiyun int analog_capture_volume[2]; /* Mixer : Master Capture Volume */ 179*4882a593Smuzhiyun int digital_playback_active[2*MIXART_PLAYBACK_STREAMS][2]; /* Mixer : Digital Playback Active [(analog+AES output)*streams][stereo]*/ 180*4882a593Smuzhiyun int digital_playback_volume[2*MIXART_PLAYBACK_STREAMS][2]; /* Mixer : Digital Playback Volume [(analog+AES output)*streams][stereo]*/ 181*4882a593Smuzhiyun int digital_capture_volume[2][2]; /* Mixer : Digital Capture Volume [analog+AES output][stereo] */ 182*4882a593Smuzhiyun int monitoring_active[2]; /* Mixer : Monitoring Active */ 183*4882a593Smuzhiyun int monitoring_volume[2]; /* Mixer : Monitoring Volume */ 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun struct mixart_bufferinfo 187*4882a593Smuzhiyun { 188*4882a593Smuzhiyun u32 buffer_address; 189*4882a593Smuzhiyun u32 reserved[5]; 190*4882a593Smuzhiyun u32 available_length; 191*4882a593Smuzhiyun u32 buffer_id; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun struct mixart_flowinfo 195*4882a593Smuzhiyun { 196*4882a593Smuzhiyun u32 bufferinfo_array_phy_address; 197*4882a593Smuzhiyun u32 reserved[11]; 198*4882a593Smuzhiyun u32 bufferinfo_count; 199*4882a593Smuzhiyun u32 capture; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun /* exported */ 203*4882a593Smuzhiyun int snd_mixart_create_pcm(struct snd_mixart * chip); 204*4882a593Smuzhiyun struct mixart_pipe *snd_mixart_add_ref_pipe(struct snd_mixart *chip, int pcm_number, int capture, int monitoring); 205*4882a593Smuzhiyun int snd_mixart_kill_ref_pipe(struct mixart_mgr *mgr, struct mixart_pipe *pipe, int monitoring); 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun #endif /* __SOUND_MIXART_H */ 208