1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /* -*- linux-c -*- *
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * ALSA driver for the digigram lx6464es interface
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (c) 2008, 2009 Tim Blechmann <tim@klingt.org>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/pci.h>
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <sound/initval.h>
16*4882a593Smuzhiyun #include <sound/control.h>
17*4882a593Smuzhiyun #include <sound/info.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "lx6464es.h"
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun MODULE_AUTHOR("Tim Blechmann");
22*4882a593Smuzhiyun MODULE_LICENSE("GPL");
23*4882a593Smuzhiyun MODULE_DESCRIPTION("digigram lx6464es");
24*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("{digigram lx6464es{}}");
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
28*4882a593Smuzhiyun static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
29*4882a593Smuzhiyun static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun module_param_array(index, int, NULL, 0444);
32*4882a593Smuzhiyun MODULE_PARM_DESC(index, "Index value for Digigram LX6464ES interface.");
33*4882a593Smuzhiyun module_param_array(id, charp, NULL, 0444);
34*4882a593Smuzhiyun MODULE_PARM_DESC(id, "ID string for Digigram LX6464ES interface.");
35*4882a593Smuzhiyun module_param_array(enable, bool, NULL, 0444);
36*4882a593Smuzhiyun MODULE_PARM_DESC(enable, "Enable/disable specific Digigram LX6464ES soundcards.");
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static const char card_name[] = "LX6464ES";
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #define PCI_DEVICE_ID_PLX_LX6464ES PCI_DEVICE_ID_PLX_9056
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun static const struct pci_device_id snd_lx6464es_ids[] = {
44*4882a593Smuzhiyun { PCI_DEVICE_SUB(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_LX6464ES,
45*4882a593Smuzhiyun PCI_VENDOR_ID_DIGIGRAM,
46*4882a593Smuzhiyun PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ES_SERIAL_SUBSYSTEM),
47*4882a593Smuzhiyun }, /* LX6464ES */
48*4882a593Smuzhiyun { PCI_DEVICE_SUB(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_LX6464ES,
49*4882a593Smuzhiyun PCI_VENDOR_ID_DIGIGRAM,
50*4882a593Smuzhiyun PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ES_CAE_SERIAL_SUBSYSTEM),
51*4882a593Smuzhiyun }, /* LX6464ES-CAE */
52*4882a593Smuzhiyun { PCI_DEVICE_SUB(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_LX6464ES,
53*4882a593Smuzhiyun PCI_VENDOR_ID_DIGIGRAM,
54*4882a593Smuzhiyun PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ESE_SERIAL_SUBSYSTEM),
55*4882a593Smuzhiyun }, /* LX6464ESe */
56*4882a593Smuzhiyun { PCI_DEVICE_SUB(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_LX6464ES,
57*4882a593Smuzhiyun PCI_VENDOR_ID_DIGIGRAM,
58*4882a593Smuzhiyun PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ESE_CAE_SERIAL_SUBSYSTEM),
59*4882a593Smuzhiyun }, /* LX6464ESe-CAE */
60*4882a593Smuzhiyun { 0, },
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, snd_lx6464es_ids);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* PGO pour USERo dans le registre pci_0x06/loc_0xEC */
68*4882a593Smuzhiyun #define CHIPSC_RESET_XILINX (1L<<16)
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* alsa callbacks */
72*4882a593Smuzhiyun static const struct snd_pcm_hardware lx_caps = {
73*4882a593Smuzhiyun .info = (SNDRV_PCM_INFO_MMAP |
74*4882a593Smuzhiyun SNDRV_PCM_INFO_INTERLEAVED |
75*4882a593Smuzhiyun SNDRV_PCM_INFO_MMAP_VALID |
76*4882a593Smuzhiyun SNDRV_PCM_INFO_SYNC_START),
77*4882a593Smuzhiyun .formats = (SNDRV_PCM_FMTBIT_S16_LE |
78*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S16_BE |
79*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_3LE |
80*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_3BE),
81*4882a593Smuzhiyun .rates = (SNDRV_PCM_RATE_CONTINUOUS |
82*4882a593Smuzhiyun SNDRV_PCM_RATE_8000_192000),
83*4882a593Smuzhiyun .rate_min = 8000,
84*4882a593Smuzhiyun .rate_max = 192000,
85*4882a593Smuzhiyun .channels_min = 2,
86*4882a593Smuzhiyun .channels_max = 64,
87*4882a593Smuzhiyun .buffer_bytes_max = 64*2*3*MICROBLAZE_IBL_MAX*MAX_STREAM_BUFFER,
88*4882a593Smuzhiyun .period_bytes_min = (2*2*MICROBLAZE_IBL_MIN*2),
89*4882a593Smuzhiyun .period_bytes_max = (4*64*MICROBLAZE_IBL_MAX*MAX_STREAM_BUFFER),
90*4882a593Smuzhiyun .periods_min = 2,
91*4882a593Smuzhiyun .periods_max = MAX_STREAM_BUFFER,
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun static int lx_set_granularity(struct lx6464es *chip, u32 gran);
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun
lx_hardware_open(struct lx6464es * chip,struct snd_pcm_substream * substream)97*4882a593Smuzhiyun static int lx_hardware_open(struct lx6464es *chip,
98*4882a593Smuzhiyun struct snd_pcm_substream *substream)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun int err = 0;
101*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
102*4882a593Smuzhiyun int channels = runtime->channels;
103*4882a593Smuzhiyun int is_capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun snd_pcm_uframes_t period_size = runtime->period_size;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun dev_dbg(chip->card->dev, "allocating pipe for %d channels\n", channels);
108*4882a593Smuzhiyun err = lx_pipe_allocate(chip, 0, is_capture, channels);
109*4882a593Smuzhiyun if (err < 0) {
110*4882a593Smuzhiyun dev_err(chip->card->dev, LXP "allocating pipe failed\n");
111*4882a593Smuzhiyun return err;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun err = lx_set_granularity(chip, period_size);
115*4882a593Smuzhiyun if (err < 0) {
116*4882a593Smuzhiyun dev_err(chip->card->dev, "setting granularity to %ld failed\n",
117*4882a593Smuzhiyun period_size);
118*4882a593Smuzhiyun return err;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun return 0;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
lx_hardware_start(struct lx6464es * chip,struct snd_pcm_substream * substream)124*4882a593Smuzhiyun static int lx_hardware_start(struct lx6464es *chip,
125*4882a593Smuzhiyun struct snd_pcm_substream *substream)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun int err = 0;
128*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
129*4882a593Smuzhiyun int is_capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun dev_dbg(chip->card->dev, "setting stream format\n");
132*4882a593Smuzhiyun err = lx_stream_set_format(chip, runtime, 0, is_capture);
133*4882a593Smuzhiyun if (err < 0) {
134*4882a593Smuzhiyun dev_err(chip->card->dev, "setting stream format failed\n");
135*4882a593Smuzhiyun return err;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun dev_dbg(chip->card->dev, "starting pipe\n");
139*4882a593Smuzhiyun err = lx_pipe_start(chip, 0, is_capture);
140*4882a593Smuzhiyun if (err < 0) {
141*4882a593Smuzhiyun dev_err(chip->card->dev, "starting pipe failed\n");
142*4882a593Smuzhiyun return err;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun dev_dbg(chip->card->dev, "waiting for pipe to start\n");
146*4882a593Smuzhiyun err = lx_pipe_wait_for_start(chip, 0, is_capture);
147*4882a593Smuzhiyun if (err < 0) {
148*4882a593Smuzhiyun dev_err(chip->card->dev, "waiting for pipe failed\n");
149*4882a593Smuzhiyun return err;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun return err;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun
lx_hardware_stop(struct lx6464es * chip,struct snd_pcm_substream * substream)156*4882a593Smuzhiyun static int lx_hardware_stop(struct lx6464es *chip,
157*4882a593Smuzhiyun struct snd_pcm_substream *substream)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun int err = 0;
160*4882a593Smuzhiyun int is_capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun dev_dbg(chip->card->dev, "pausing pipe\n");
163*4882a593Smuzhiyun err = lx_pipe_pause(chip, 0, is_capture);
164*4882a593Smuzhiyun if (err < 0) {
165*4882a593Smuzhiyun dev_err(chip->card->dev, "pausing pipe failed\n");
166*4882a593Smuzhiyun return err;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun dev_dbg(chip->card->dev, "waiting for pipe to become idle\n");
170*4882a593Smuzhiyun err = lx_pipe_wait_for_idle(chip, 0, is_capture);
171*4882a593Smuzhiyun if (err < 0) {
172*4882a593Smuzhiyun dev_err(chip->card->dev, "waiting for pipe failed\n");
173*4882a593Smuzhiyun return err;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun dev_dbg(chip->card->dev, "stopping pipe\n");
177*4882a593Smuzhiyun err = lx_pipe_stop(chip, 0, is_capture);
178*4882a593Smuzhiyun if (err < 0) {
179*4882a593Smuzhiyun dev_err(chip->card->dev, "stopping pipe failed\n");
180*4882a593Smuzhiyun return err;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun return err;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun
lx_hardware_close(struct lx6464es * chip,struct snd_pcm_substream * substream)187*4882a593Smuzhiyun static int lx_hardware_close(struct lx6464es *chip,
188*4882a593Smuzhiyun struct snd_pcm_substream *substream)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun int err = 0;
191*4882a593Smuzhiyun int is_capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun dev_dbg(chip->card->dev, "releasing pipe\n");
194*4882a593Smuzhiyun err = lx_pipe_release(chip, 0, is_capture);
195*4882a593Smuzhiyun if (err < 0) {
196*4882a593Smuzhiyun dev_err(chip->card->dev, "releasing pipe failed\n");
197*4882a593Smuzhiyun return err;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun return err;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun
lx_pcm_open(struct snd_pcm_substream * substream)204*4882a593Smuzhiyun static int lx_pcm_open(struct snd_pcm_substream *substream)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun struct lx6464es *chip = snd_pcm_substream_chip(substream);
207*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
208*4882a593Smuzhiyun int err = 0;
209*4882a593Smuzhiyun int board_rate;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->lx_pcm_open\n");
212*4882a593Smuzhiyun mutex_lock(&chip->setup_mutex);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun /* copy the struct snd_pcm_hardware struct */
215*4882a593Smuzhiyun runtime->hw = lx_caps;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun #if 0
218*4882a593Smuzhiyun /* buffer-size should better be multiple of period-size */
219*4882a593Smuzhiyun err = snd_pcm_hw_constraint_integer(runtime,
220*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_PERIODS);
221*4882a593Smuzhiyun if (err < 0) {
222*4882a593Smuzhiyun dev_warn(chip->card->dev, "could not constrain periods\n");
223*4882a593Smuzhiyun goto exit;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun #endif
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun /* the clock rate cannot be changed */
228*4882a593Smuzhiyun board_rate = chip->board_sample_rate;
229*4882a593Smuzhiyun err = snd_pcm_hw_constraint_single(runtime, SNDRV_PCM_HW_PARAM_RATE,
230*4882a593Smuzhiyun board_rate);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun if (err < 0) {
233*4882a593Smuzhiyun dev_warn(chip->card->dev, "could not constrain periods\n");
234*4882a593Smuzhiyun goto exit;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun /* constrain period size */
238*4882a593Smuzhiyun err = snd_pcm_hw_constraint_minmax(runtime,
239*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
240*4882a593Smuzhiyun MICROBLAZE_IBL_MIN,
241*4882a593Smuzhiyun MICROBLAZE_IBL_MAX);
242*4882a593Smuzhiyun if (err < 0) {
243*4882a593Smuzhiyun dev_warn(chip->card->dev,
244*4882a593Smuzhiyun "could not constrain period size\n");
245*4882a593Smuzhiyun goto exit;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun snd_pcm_hw_constraint_step(runtime, 0,
249*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 32);
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun snd_pcm_set_sync(substream);
252*4882a593Smuzhiyun err = 0;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun exit:
255*4882a593Smuzhiyun runtime->private_data = chip;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun mutex_unlock(&chip->setup_mutex);
258*4882a593Smuzhiyun dev_dbg(chip->card->dev, "<-lx_pcm_open, %d\n", err);
259*4882a593Smuzhiyun return err;
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun
lx_pcm_close(struct snd_pcm_substream * substream)262*4882a593Smuzhiyun static int lx_pcm_close(struct snd_pcm_substream *substream)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun dev_dbg(substream->pcm->card->dev, "->lx_pcm_close\n");
265*4882a593Smuzhiyun return 0;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
lx_pcm_stream_pointer(struct snd_pcm_substream * substream)268*4882a593Smuzhiyun static snd_pcm_uframes_t lx_pcm_stream_pointer(struct snd_pcm_substream
269*4882a593Smuzhiyun *substream)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun struct lx6464es *chip = snd_pcm_substream_chip(substream);
272*4882a593Smuzhiyun snd_pcm_uframes_t pos;
273*4882a593Smuzhiyun int is_capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun struct lx_stream *lx_stream = is_capture ? &chip->capture_stream :
276*4882a593Smuzhiyun &chip->playback_stream;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->lx_pcm_stream_pointer\n");
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun mutex_lock(&chip->lock);
281*4882a593Smuzhiyun pos = lx_stream->frame_pos * substream->runtime->period_size;
282*4882a593Smuzhiyun mutex_unlock(&chip->lock);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun dev_dbg(chip->card->dev, "stream_pointer at %ld\n", pos);
285*4882a593Smuzhiyun return pos;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
lx_pcm_prepare(struct snd_pcm_substream * substream)288*4882a593Smuzhiyun static int lx_pcm_prepare(struct snd_pcm_substream *substream)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun struct lx6464es *chip = snd_pcm_substream_chip(substream);
291*4882a593Smuzhiyun int err = 0;
292*4882a593Smuzhiyun const int is_capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->lx_pcm_prepare\n");
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun mutex_lock(&chip->setup_mutex);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun if (chip->hardware_running[is_capture]) {
299*4882a593Smuzhiyun err = lx_hardware_stop(chip, substream);
300*4882a593Smuzhiyun if (err < 0) {
301*4882a593Smuzhiyun dev_err(chip->card->dev, "failed to stop hardware. "
302*4882a593Smuzhiyun "Error code %d\n", err);
303*4882a593Smuzhiyun goto exit;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun err = lx_hardware_close(chip, substream);
307*4882a593Smuzhiyun if (err < 0) {
308*4882a593Smuzhiyun dev_err(chip->card->dev, "failed to close hardware. "
309*4882a593Smuzhiyun "Error code %d\n", err);
310*4882a593Smuzhiyun goto exit;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun dev_dbg(chip->card->dev, "opening hardware\n");
315*4882a593Smuzhiyun err = lx_hardware_open(chip, substream);
316*4882a593Smuzhiyun if (err < 0) {
317*4882a593Smuzhiyun dev_err(chip->card->dev, "failed to open hardware. "
318*4882a593Smuzhiyun "Error code %d\n", err);
319*4882a593Smuzhiyun goto exit;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun err = lx_hardware_start(chip, substream);
323*4882a593Smuzhiyun if (err < 0) {
324*4882a593Smuzhiyun dev_err(chip->card->dev, "failed to start hardware. "
325*4882a593Smuzhiyun "Error code %d\n", err);
326*4882a593Smuzhiyun goto exit;
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun chip->hardware_running[is_capture] = 1;
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun if (chip->board_sample_rate != substream->runtime->rate) {
332*4882a593Smuzhiyun if (!err)
333*4882a593Smuzhiyun chip->board_sample_rate = substream->runtime->rate;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun exit:
337*4882a593Smuzhiyun mutex_unlock(&chip->setup_mutex);
338*4882a593Smuzhiyun return err;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun
lx_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params,int is_capture)341*4882a593Smuzhiyun static int lx_pcm_hw_params(struct snd_pcm_substream *substream,
342*4882a593Smuzhiyun struct snd_pcm_hw_params *hw_params, int is_capture)
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun struct lx6464es *chip = snd_pcm_substream_chip(substream);
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->lx_pcm_hw_params\n");
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun mutex_lock(&chip->setup_mutex);
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun if (is_capture)
351*4882a593Smuzhiyun chip->capture_stream.stream = substream;
352*4882a593Smuzhiyun else
353*4882a593Smuzhiyun chip->playback_stream.stream = substream;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun mutex_unlock(&chip->setup_mutex);
356*4882a593Smuzhiyun return 0;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun
lx_pcm_hw_params_playback(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)359*4882a593Smuzhiyun static int lx_pcm_hw_params_playback(struct snd_pcm_substream *substream,
360*4882a593Smuzhiyun struct snd_pcm_hw_params *hw_params)
361*4882a593Smuzhiyun {
362*4882a593Smuzhiyun return lx_pcm_hw_params(substream, hw_params, 0);
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun
lx_pcm_hw_params_capture(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)365*4882a593Smuzhiyun static int lx_pcm_hw_params_capture(struct snd_pcm_substream *substream,
366*4882a593Smuzhiyun struct snd_pcm_hw_params *hw_params)
367*4882a593Smuzhiyun {
368*4882a593Smuzhiyun return lx_pcm_hw_params(substream, hw_params, 1);
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
lx_pcm_hw_free(struct snd_pcm_substream * substream)371*4882a593Smuzhiyun static int lx_pcm_hw_free(struct snd_pcm_substream *substream)
372*4882a593Smuzhiyun {
373*4882a593Smuzhiyun struct lx6464es *chip = snd_pcm_substream_chip(substream);
374*4882a593Smuzhiyun int err = 0;
375*4882a593Smuzhiyun int is_capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->lx_pcm_hw_free\n");
378*4882a593Smuzhiyun mutex_lock(&chip->setup_mutex);
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun if (chip->hardware_running[is_capture]) {
381*4882a593Smuzhiyun err = lx_hardware_stop(chip, substream);
382*4882a593Smuzhiyun if (err < 0) {
383*4882a593Smuzhiyun dev_err(chip->card->dev, "failed to stop hardware. "
384*4882a593Smuzhiyun "Error code %d\n", err);
385*4882a593Smuzhiyun goto exit;
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun err = lx_hardware_close(chip, substream);
389*4882a593Smuzhiyun if (err < 0) {
390*4882a593Smuzhiyun dev_err(chip->card->dev, "failed to close hardware. "
391*4882a593Smuzhiyun "Error code %d\n", err);
392*4882a593Smuzhiyun goto exit;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun chip->hardware_running[is_capture] = 0;
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun if (is_capture)
399*4882a593Smuzhiyun chip->capture_stream.stream = NULL;
400*4882a593Smuzhiyun else
401*4882a593Smuzhiyun chip->playback_stream.stream = NULL;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun exit:
404*4882a593Smuzhiyun mutex_unlock(&chip->setup_mutex);
405*4882a593Smuzhiyun return err;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun
lx_trigger_start(struct lx6464es * chip,struct lx_stream * lx_stream)408*4882a593Smuzhiyun static void lx_trigger_start(struct lx6464es *chip, struct lx_stream *lx_stream)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun struct snd_pcm_substream *substream = lx_stream->stream;
411*4882a593Smuzhiyun const unsigned int is_capture = lx_stream->is_capture;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun int err;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun const u32 channels = substream->runtime->channels;
416*4882a593Smuzhiyun const u32 bytes_per_frame = channels * 3;
417*4882a593Smuzhiyun const u32 period_size = substream->runtime->period_size;
418*4882a593Smuzhiyun const u32 periods = substream->runtime->periods;
419*4882a593Smuzhiyun const u32 period_bytes = period_size * bytes_per_frame;
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun dma_addr_t buf = substream->dma_buffer.addr;
422*4882a593Smuzhiyun int i;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun u32 needed, freed;
425*4882a593Smuzhiyun u32 size_array[5];
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun for (i = 0; i != periods; ++i) {
428*4882a593Smuzhiyun u32 buffer_index = 0;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun err = lx_buffer_ask(chip, 0, is_capture, &needed, &freed,
431*4882a593Smuzhiyun size_array);
432*4882a593Smuzhiyun dev_dbg(chip->card->dev, "starting: needed %d, freed %d\n",
433*4882a593Smuzhiyun needed, freed);
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun err = lx_buffer_give(chip, 0, is_capture, period_bytes,
436*4882a593Smuzhiyun lower_32_bits(buf), upper_32_bits(buf),
437*4882a593Smuzhiyun &buffer_index);
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun dev_dbg(chip->card->dev, "starting: buffer index %x on 0x%lx (%d bytes)\n",
440*4882a593Smuzhiyun buffer_index, (unsigned long)buf, period_bytes);
441*4882a593Smuzhiyun buf += period_bytes;
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun err = lx_buffer_ask(chip, 0, is_capture, &needed, &freed, size_array);
445*4882a593Smuzhiyun dev_dbg(chip->card->dev, "starting: needed %d, freed %d\n", needed, freed);
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun dev_dbg(chip->card->dev, "starting: starting stream\n");
448*4882a593Smuzhiyun err = lx_stream_start(chip, 0, is_capture);
449*4882a593Smuzhiyun if (err < 0)
450*4882a593Smuzhiyun dev_err(chip->card->dev, "couldn't start stream\n");
451*4882a593Smuzhiyun else
452*4882a593Smuzhiyun lx_stream->status = LX_STREAM_STATUS_RUNNING;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun lx_stream->frame_pos = 0;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
lx_trigger_stop(struct lx6464es * chip,struct lx_stream * lx_stream)457*4882a593Smuzhiyun static void lx_trigger_stop(struct lx6464es *chip, struct lx_stream *lx_stream)
458*4882a593Smuzhiyun {
459*4882a593Smuzhiyun const unsigned int is_capture = lx_stream->is_capture;
460*4882a593Smuzhiyun int err;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun dev_dbg(chip->card->dev, "stopping: stopping stream\n");
463*4882a593Smuzhiyun err = lx_stream_stop(chip, 0, is_capture);
464*4882a593Smuzhiyun if (err < 0)
465*4882a593Smuzhiyun dev_err(chip->card->dev, "couldn't stop stream\n");
466*4882a593Smuzhiyun else
467*4882a593Smuzhiyun lx_stream->status = LX_STREAM_STATUS_FREE;
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun
lx_trigger_dispatch_stream(struct lx6464es * chip,struct lx_stream * lx_stream)471*4882a593Smuzhiyun static void lx_trigger_dispatch_stream(struct lx6464es *chip,
472*4882a593Smuzhiyun struct lx_stream *lx_stream)
473*4882a593Smuzhiyun {
474*4882a593Smuzhiyun switch (lx_stream->status) {
475*4882a593Smuzhiyun case LX_STREAM_STATUS_SCHEDULE_RUN:
476*4882a593Smuzhiyun lx_trigger_start(chip, lx_stream);
477*4882a593Smuzhiyun break;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun case LX_STREAM_STATUS_SCHEDULE_STOP:
480*4882a593Smuzhiyun lx_trigger_stop(chip, lx_stream);
481*4882a593Smuzhiyun break;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun default:
484*4882a593Smuzhiyun break;
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun }
487*4882a593Smuzhiyun
lx_pcm_trigger_dispatch(struct lx6464es * chip,struct lx_stream * lx_stream,int cmd)488*4882a593Smuzhiyun static int lx_pcm_trigger_dispatch(struct lx6464es *chip,
489*4882a593Smuzhiyun struct lx_stream *lx_stream, int cmd)
490*4882a593Smuzhiyun {
491*4882a593Smuzhiyun int err = 0;
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun mutex_lock(&chip->lock);
494*4882a593Smuzhiyun switch (cmd) {
495*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_START:
496*4882a593Smuzhiyun lx_stream->status = LX_STREAM_STATUS_SCHEDULE_RUN;
497*4882a593Smuzhiyun break;
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_STOP:
500*4882a593Smuzhiyun lx_stream->status = LX_STREAM_STATUS_SCHEDULE_STOP;
501*4882a593Smuzhiyun break;
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun default:
504*4882a593Smuzhiyun err = -EINVAL;
505*4882a593Smuzhiyun goto exit;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun lx_trigger_dispatch_stream(chip, &chip->capture_stream);
509*4882a593Smuzhiyun lx_trigger_dispatch_stream(chip, &chip->playback_stream);
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun exit:
512*4882a593Smuzhiyun mutex_unlock(&chip->lock);
513*4882a593Smuzhiyun return err;
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun
lx_pcm_trigger(struct snd_pcm_substream * substream,int cmd)517*4882a593Smuzhiyun static int lx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
518*4882a593Smuzhiyun {
519*4882a593Smuzhiyun struct lx6464es *chip = snd_pcm_substream_chip(substream);
520*4882a593Smuzhiyun const int is_capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
521*4882a593Smuzhiyun struct lx_stream *stream = is_capture ? &chip->capture_stream :
522*4882a593Smuzhiyun &chip->playback_stream;
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->lx_pcm_trigger\n");
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun return lx_pcm_trigger_dispatch(chip, stream, cmd);
527*4882a593Smuzhiyun }
528*4882a593Smuzhiyun
snd_lx6464es_free(struct lx6464es * chip)529*4882a593Smuzhiyun static int snd_lx6464es_free(struct lx6464es *chip)
530*4882a593Smuzhiyun {
531*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->snd_lx6464es_free\n");
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun lx_irq_disable(chip);
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun if (chip->irq >= 0)
536*4882a593Smuzhiyun free_irq(chip->irq, chip);
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun iounmap(chip->port_dsp_bar);
539*4882a593Smuzhiyun ioport_unmap(chip->port_plx_remapped);
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun pci_release_regions(chip->pci);
542*4882a593Smuzhiyun pci_disable_device(chip->pci);
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun kfree(chip);
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun return 0;
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun
snd_lx6464es_dev_free(struct snd_device * device)549*4882a593Smuzhiyun static int snd_lx6464es_dev_free(struct snd_device *device)
550*4882a593Smuzhiyun {
551*4882a593Smuzhiyun return snd_lx6464es_free(device->device_data);
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun /* reset the dsp during initialization */
lx_init_xilinx_reset(struct lx6464es * chip)555*4882a593Smuzhiyun static int lx_init_xilinx_reset(struct lx6464es *chip)
556*4882a593Smuzhiyun {
557*4882a593Smuzhiyun int i;
558*4882a593Smuzhiyun u32 plx_reg = lx_plx_reg_read(chip, ePLX_CHIPSC);
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->lx_init_xilinx_reset\n");
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun /* activate reset of xilinx */
563*4882a593Smuzhiyun plx_reg &= ~CHIPSC_RESET_XILINX;
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun lx_plx_reg_write(chip, ePLX_CHIPSC, plx_reg);
566*4882a593Smuzhiyun msleep(1);
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun lx_plx_reg_write(chip, ePLX_MBOX3, 0);
569*4882a593Smuzhiyun msleep(1);
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun plx_reg |= CHIPSC_RESET_XILINX;
572*4882a593Smuzhiyun lx_plx_reg_write(chip, ePLX_CHIPSC, plx_reg);
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun /* deactivate reset of xilinx */
575*4882a593Smuzhiyun for (i = 0; i != 100; ++i) {
576*4882a593Smuzhiyun u32 reg_mbox3;
577*4882a593Smuzhiyun msleep(10);
578*4882a593Smuzhiyun reg_mbox3 = lx_plx_reg_read(chip, ePLX_MBOX3);
579*4882a593Smuzhiyun if (reg_mbox3) {
580*4882a593Smuzhiyun dev_dbg(chip->card->dev, "xilinx reset done\n");
581*4882a593Smuzhiyun dev_dbg(chip->card->dev, "xilinx took %d loops\n", i);
582*4882a593Smuzhiyun break;
583*4882a593Smuzhiyun }
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun /* todo: add some error handling? */
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun /* clear mr */
589*4882a593Smuzhiyun lx_dsp_reg_write(chip, eReg_CSM, 0);
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun /* le xilinx ES peut ne pas etre encore pret, on attend. */
592*4882a593Smuzhiyun msleep(600);
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun return 0;
595*4882a593Smuzhiyun }
596*4882a593Smuzhiyun
lx_init_xilinx_test(struct lx6464es * chip)597*4882a593Smuzhiyun static int lx_init_xilinx_test(struct lx6464es *chip)
598*4882a593Smuzhiyun {
599*4882a593Smuzhiyun u32 reg;
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->lx_init_xilinx_test\n");
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun /* TEST if we have access to Xilinx/MicroBlaze */
604*4882a593Smuzhiyun lx_dsp_reg_write(chip, eReg_CSM, 0);
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun reg = lx_dsp_reg_read(chip, eReg_CSM);
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun if (reg) {
609*4882a593Smuzhiyun dev_err(chip->card->dev, "Problem: Reg_CSM %x.\n", reg);
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun /* PCI9056_SPACE0_REMAP */
612*4882a593Smuzhiyun lx_plx_reg_write(chip, ePLX_PCICR, 1);
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun reg = lx_dsp_reg_read(chip, eReg_CSM);
615*4882a593Smuzhiyun if (reg) {
616*4882a593Smuzhiyun dev_err(chip->card->dev, "Error: Reg_CSM %x.\n", reg);
617*4882a593Smuzhiyun return -EAGAIN; /* seems to be appropriate */
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun }
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun dev_dbg(chip->card->dev, "Xilinx/MicroBlaze access test successful\n");
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun return 0;
624*4882a593Smuzhiyun }
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun /* initialize ethersound */
lx_init_ethersound_config(struct lx6464es * chip)627*4882a593Smuzhiyun static int lx_init_ethersound_config(struct lx6464es *chip)
628*4882a593Smuzhiyun {
629*4882a593Smuzhiyun int i;
630*4882a593Smuzhiyun u32 orig_conf_es = lx_dsp_reg_read(chip, eReg_CONFES);
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun /* configure 64 io channels */
633*4882a593Smuzhiyun u32 conf_es = (orig_conf_es & CONFES_READ_PART_MASK) |
634*4882a593Smuzhiyun (64 << IOCR_INPUTS_OFFSET) |
635*4882a593Smuzhiyun (64 << IOCR_OUTPUTS_OFFSET) |
636*4882a593Smuzhiyun (FREQ_RATIO_SINGLE_MODE << FREQ_RATIO_OFFSET);
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->lx_init_ethersound\n");
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun chip->freq_ratio = FREQ_RATIO_SINGLE_MODE;
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun /*
643*4882a593Smuzhiyun * write it to the card !
644*4882a593Smuzhiyun * this actually kicks the ES xilinx, the first time since poweron.
645*4882a593Smuzhiyun * the MAC address in the Reg_ADMACESMSB Reg_ADMACESLSB registers
646*4882a593Smuzhiyun * is not ready before this is done, and the bit 2 in Reg_CSES is set.
647*4882a593Smuzhiyun * */
648*4882a593Smuzhiyun lx_dsp_reg_write(chip, eReg_CONFES, conf_es);
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun for (i = 0; i != 1000; ++i) {
651*4882a593Smuzhiyun if (lx_dsp_reg_read(chip, eReg_CSES) & 4) {
652*4882a593Smuzhiyun dev_dbg(chip->card->dev, "ethersound initialized after %dms\n",
653*4882a593Smuzhiyun i);
654*4882a593Smuzhiyun goto ethersound_initialized;
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun msleep(1);
657*4882a593Smuzhiyun }
658*4882a593Smuzhiyun dev_warn(chip->card->dev,
659*4882a593Smuzhiyun "ethersound could not be initialized after %dms\n", i);
660*4882a593Smuzhiyun return -ETIMEDOUT;
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun ethersound_initialized:
663*4882a593Smuzhiyun dev_dbg(chip->card->dev, "ethersound initialized\n");
664*4882a593Smuzhiyun return 0;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun
lx_init_get_version_features(struct lx6464es * chip)667*4882a593Smuzhiyun static int lx_init_get_version_features(struct lx6464es *chip)
668*4882a593Smuzhiyun {
669*4882a593Smuzhiyun u32 dsp_version;
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun int err;
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->lx_init_get_version_features\n");
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun err = lx_dsp_get_version(chip, &dsp_version);
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun if (err == 0) {
678*4882a593Smuzhiyun u32 freq;
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun dev_info(chip->card->dev, "DSP version: V%02d.%02d #%d\n",
681*4882a593Smuzhiyun (dsp_version>>16) & 0xff, (dsp_version>>8) & 0xff,
682*4882a593Smuzhiyun dsp_version & 0xff);
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun /* later: what firmware version do we expect? */
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun /* retrieve Play/Rec features */
687*4882a593Smuzhiyun /* done here because we may have to handle alternate
688*4882a593Smuzhiyun * DSP files. */
689*4882a593Smuzhiyun /* later */
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun /* init the EtherSound sample rate */
692*4882a593Smuzhiyun err = lx_dsp_get_clock_frequency(chip, &freq);
693*4882a593Smuzhiyun if (err == 0)
694*4882a593Smuzhiyun chip->board_sample_rate = freq;
695*4882a593Smuzhiyun dev_dbg(chip->card->dev, "actual clock frequency %d\n", freq);
696*4882a593Smuzhiyun } else {
697*4882a593Smuzhiyun dev_err(chip->card->dev, "DSP corrupted \n");
698*4882a593Smuzhiyun err = -EAGAIN;
699*4882a593Smuzhiyun }
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun return err;
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun
lx_set_granularity(struct lx6464es * chip,u32 gran)704*4882a593Smuzhiyun static int lx_set_granularity(struct lx6464es *chip, u32 gran)
705*4882a593Smuzhiyun {
706*4882a593Smuzhiyun int err = 0;
707*4882a593Smuzhiyun u32 snapped_gran = MICROBLAZE_IBL_MIN;
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->lx_set_granularity\n");
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun /* blocksize is a power of 2 */
712*4882a593Smuzhiyun while ((snapped_gran < gran) &&
713*4882a593Smuzhiyun (snapped_gran < MICROBLAZE_IBL_MAX)) {
714*4882a593Smuzhiyun snapped_gran *= 2;
715*4882a593Smuzhiyun }
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun if (snapped_gran == chip->pcm_granularity)
718*4882a593Smuzhiyun return 0;
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun err = lx_dsp_set_granularity(chip, snapped_gran);
721*4882a593Smuzhiyun if (err < 0) {
722*4882a593Smuzhiyun dev_warn(chip->card->dev, "could not set granularity\n");
723*4882a593Smuzhiyun err = -EAGAIN;
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun if (snapped_gran != gran)
727*4882a593Smuzhiyun dev_err(chip->card->dev, "snapped blocksize to %d\n", snapped_gran);
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun dev_dbg(chip->card->dev, "set blocksize on board %d\n", snapped_gran);
730*4882a593Smuzhiyun chip->pcm_granularity = snapped_gran;
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun return err;
733*4882a593Smuzhiyun }
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun /* initialize and test the xilinx dsp chip */
lx_init_dsp(struct lx6464es * chip)736*4882a593Smuzhiyun static int lx_init_dsp(struct lx6464es *chip)
737*4882a593Smuzhiyun {
738*4882a593Smuzhiyun int err;
739*4882a593Smuzhiyun int i;
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun dev_dbg(chip->card->dev, "->lx_init_dsp\n");
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun dev_dbg(chip->card->dev, "initialize board\n");
744*4882a593Smuzhiyun err = lx_init_xilinx_reset(chip);
745*4882a593Smuzhiyun if (err)
746*4882a593Smuzhiyun return err;
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun dev_dbg(chip->card->dev, "testing board\n");
749*4882a593Smuzhiyun err = lx_init_xilinx_test(chip);
750*4882a593Smuzhiyun if (err)
751*4882a593Smuzhiyun return err;
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun dev_dbg(chip->card->dev, "initialize ethersound configuration\n");
754*4882a593Smuzhiyun err = lx_init_ethersound_config(chip);
755*4882a593Smuzhiyun if (err)
756*4882a593Smuzhiyun return err;
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun lx_irq_enable(chip);
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun /** \todo the mac address should be ready by not, but it isn't,
761*4882a593Smuzhiyun * so we wait for it */
762*4882a593Smuzhiyun for (i = 0; i != 1000; ++i) {
763*4882a593Smuzhiyun err = lx_dsp_get_mac(chip);
764*4882a593Smuzhiyun if (err)
765*4882a593Smuzhiyun return err;
766*4882a593Smuzhiyun if (chip->mac_address[0] || chip->mac_address[1] || chip->mac_address[2] ||
767*4882a593Smuzhiyun chip->mac_address[3] || chip->mac_address[4] || chip->mac_address[5])
768*4882a593Smuzhiyun goto mac_ready;
769*4882a593Smuzhiyun msleep(1);
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun return -ETIMEDOUT;
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun mac_ready:
774*4882a593Smuzhiyun dev_dbg(chip->card->dev, "mac address ready read after: %dms\n", i);
775*4882a593Smuzhiyun dev_info(chip->card->dev,
776*4882a593Smuzhiyun "mac address: %02X.%02X.%02X.%02X.%02X.%02X\n",
777*4882a593Smuzhiyun chip->mac_address[0], chip->mac_address[1], chip->mac_address[2],
778*4882a593Smuzhiyun chip->mac_address[3], chip->mac_address[4], chip->mac_address[5]);
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun err = lx_init_get_version_features(chip);
781*4882a593Smuzhiyun if (err)
782*4882a593Smuzhiyun return err;
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun lx_set_granularity(chip, MICROBLAZE_IBL_DEFAULT);
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun chip->playback_mute = 0;
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun return err;
789*4882a593Smuzhiyun }
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun static const struct snd_pcm_ops lx_ops_playback = {
792*4882a593Smuzhiyun .open = lx_pcm_open,
793*4882a593Smuzhiyun .close = lx_pcm_close,
794*4882a593Smuzhiyun .prepare = lx_pcm_prepare,
795*4882a593Smuzhiyun .hw_params = lx_pcm_hw_params_playback,
796*4882a593Smuzhiyun .hw_free = lx_pcm_hw_free,
797*4882a593Smuzhiyun .trigger = lx_pcm_trigger,
798*4882a593Smuzhiyun .pointer = lx_pcm_stream_pointer,
799*4882a593Smuzhiyun };
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun static const struct snd_pcm_ops lx_ops_capture = {
802*4882a593Smuzhiyun .open = lx_pcm_open,
803*4882a593Smuzhiyun .close = lx_pcm_close,
804*4882a593Smuzhiyun .prepare = lx_pcm_prepare,
805*4882a593Smuzhiyun .hw_params = lx_pcm_hw_params_capture,
806*4882a593Smuzhiyun .hw_free = lx_pcm_hw_free,
807*4882a593Smuzhiyun .trigger = lx_pcm_trigger,
808*4882a593Smuzhiyun .pointer = lx_pcm_stream_pointer,
809*4882a593Smuzhiyun };
810*4882a593Smuzhiyun
lx_pcm_create(struct lx6464es * chip)811*4882a593Smuzhiyun static int lx_pcm_create(struct lx6464es *chip)
812*4882a593Smuzhiyun {
813*4882a593Smuzhiyun int err;
814*4882a593Smuzhiyun struct snd_pcm *pcm;
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun u32 size = 64 * /* channels */
817*4882a593Smuzhiyun 3 * /* 24 bit samples */
818*4882a593Smuzhiyun MAX_STREAM_BUFFER * /* periods */
819*4882a593Smuzhiyun MICROBLAZE_IBL_MAX * /* frames per period */
820*4882a593Smuzhiyun 2; /* duplex */
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun size = PAGE_ALIGN(size);
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun /* hardcoded device name & channel count */
825*4882a593Smuzhiyun err = snd_pcm_new(chip->card, (char *)card_name, 0,
826*4882a593Smuzhiyun 1, 1, &pcm);
827*4882a593Smuzhiyun if (err < 0)
828*4882a593Smuzhiyun return err;
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun pcm->private_data = chip;
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &lx_ops_playback);
833*4882a593Smuzhiyun snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &lx_ops_capture);
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun pcm->info_flags = 0;
836*4882a593Smuzhiyun pcm->nonatomic = true;
837*4882a593Smuzhiyun strcpy(pcm->name, card_name);
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
840*4882a593Smuzhiyun &chip->pci->dev, size, size);
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun chip->pcm = pcm;
843*4882a593Smuzhiyun chip->capture_stream.is_capture = 1;
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun return 0;
846*4882a593Smuzhiyun }
847*4882a593Smuzhiyun
lx_control_playback_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)848*4882a593Smuzhiyun static int lx_control_playback_info(struct snd_kcontrol *kcontrol,
849*4882a593Smuzhiyun struct snd_ctl_elem_info *uinfo)
850*4882a593Smuzhiyun {
851*4882a593Smuzhiyun uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
852*4882a593Smuzhiyun uinfo->count = 1;
853*4882a593Smuzhiyun uinfo->value.integer.min = 0;
854*4882a593Smuzhiyun uinfo->value.integer.max = 1;
855*4882a593Smuzhiyun return 0;
856*4882a593Smuzhiyun }
857*4882a593Smuzhiyun
lx_control_playback_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)858*4882a593Smuzhiyun static int lx_control_playback_get(struct snd_kcontrol *kcontrol,
859*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
860*4882a593Smuzhiyun {
861*4882a593Smuzhiyun struct lx6464es *chip = snd_kcontrol_chip(kcontrol);
862*4882a593Smuzhiyun ucontrol->value.integer.value[0] = chip->playback_mute;
863*4882a593Smuzhiyun return 0;
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun
lx_control_playback_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)866*4882a593Smuzhiyun static int lx_control_playback_put(struct snd_kcontrol *kcontrol,
867*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
868*4882a593Smuzhiyun {
869*4882a593Smuzhiyun struct lx6464es *chip = snd_kcontrol_chip(kcontrol);
870*4882a593Smuzhiyun int changed = 0;
871*4882a593Smuzhiyun int current_value = chip->playback_mute;
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun if (current_value != ucontrol->value.integer.value[0]) {
874*4882a593Smuzhiyun lx_level_unmute(chip, 0, !current_value);
875*4882a593Smuzhiyun chip->playback_mute = !current_value;
876*4882a593Smuzhiyun changed = 1;
877*4882a593Smuzhiyun }
878*4882a593Smuzhiyun return changed;
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun static const struct snd_kcontrol_new lx_control_playback_switch = {
882*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
883*4882a593Smuzhiyun .name = "PCM Playback Switch",
884*4882a593Smuzhiyun .index = 0,
885*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
886*4882a593Smuzhiyun .private_value = 0,
887*4882a593Smuzhiyun .info = lx_control_playback_info,
888*4882a593Smuzhiyun .get = lx_control_playback_get,
889*4882a593Smuzhiyun .put = lx_control_playback_put
890*4882a593Smuzhiyun };
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun
lx_proc_levels_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)894*4882a593Smuzhiyun static void lx_proc_levels_read(struct snd_info_entry *entry,
895*4882a593Smuzhiyun struct snd_info_buffer *buffer)
896*4882a593Smuzhiyun {
897*4882a593Smuzhiyun u32 levels[64];
898*4882a593Smuzhiyun int err;
899*4882a593Smuzhiyun int i, j;
900*4882a593Smuzhiyun struct lx6464es *chip = entry->private_data;
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun snd_iprintf(buffer, "capture levels:\n");
903*4882a593Smuzhiyun err = lx_level_peaks(chip, 1, 64, levels);
904*4882a593Smuzhiyun if (err < 0)
905*4882a593Smuzhiyun return;
906*4882a593Smuzhiyun
907*4882a593Smuzhiyun for (i = 0; i != 8; ++i) {
908*4882a593Smuzhiyun for (j = 0; j != 8; ++j)
909*4882a593Smuzhiyun snd_iprintf(buffer, "%08x ", levels[i*8+j]);
910*4882a593Smuzhiyun snd_iprintf(buffer, "\n");
911*4882a593Smuzhiyun }
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun snd_iprintf(buffer, "\nplayback levels:\n");
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun err = lx_level_peaks(chip, 0, 64, levels);
916*4882a593Smuzhiyun if (err < 0)
917*4882a593Smuzhiyun return;
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun for (i = 0; i != 8; ++i) {
920*4882a593Smuzhiyun for (j = 0; j != 8; ++j)
921*4882a593Smuzhiyun snd_iprintf(buffer, "%08x ", levels[i*8+j]);
922*4882a593Smuzhiyun snd_iprintf(buffer, "\n");
923*4882a593Smuzhiyun }
924*4882a593Smuzhiyun
925*4882a593Smuzhiyun snd_iprintf(buffer, "\n");
926*4882a593Smuzhiyun }
927*4882a593Smuzhiyun
lx_proc_create(struct snd_card * card,struct lx6464es * chip)928*4882a593Smuzhiyun static int lx_proc_create(struct snd_card *card, struct lx6464es *chip)
929*4882a593Smuzhiyun {
930*4882a593Smuzhiyun return snd_card_ro_proc_new(card, "levels", chip, lx_proc_levels_read);
931*4882a593Smuzhiyun }
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun
snd_lx6464es_create(struct snd_card * card,struct pci_dev * pci,struct lx6464es ** rchip)934*4882a593Smuzhiyun static int snd_lx6464es_create(struct snd_card *card,
935*4882a593Smuzhiyun struct pci_dev *pci,
936*4882a593Smuzhiyun struct lx6464es **rchip)
937*4882a593Smuzhiyun {
938*4882a593Smuzhiyun struct lx6464es *chip;
939*4882a593Smuzhiyun int err;
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun static const struct snd_device_ops ops = {
942*4882a593Smuzhiyun .dev_free = snd_lx6464es_dev_free,
943*4882a593Smuzhiyun };
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun dev_dbg(card->dev, "->snd_lx6464es_create\n");
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun *rchip = NULL;
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun /* enable PCI device */
950*4882a593Smuzhiyun err = pci_enable_device(pci);
951*4882a593Smuzhiyun if (err < 0)
952*4882a593Smuzhiyun return err;
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun pci_set_master(pci);
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun /* check if we can restrict PCI DMA transfers to 32 bits */
957*4882a593Smuzhiyun err = dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
958*4882a593Smuzhiyun if (err < 0) {
959*4882a593Smuzhiyun dev_err(card->dev,
960*4882a593Smuzhiyun "architecture does not support 32bit PCI busmaster DMA\n");
961*4882a593Smuzhiyun pci_disable_device(pci);
962*4882a593Smuzhiyun return -ENXIO;
963*4882a593Smuzhiyun }
964*4882a593Smuzhiyun
965*4882a593Smuzhiyun chip = kzalloc(sizeof(*chip), GFP_KERNEL);
966*4882a593Smuzhiyun if (chip == NULL) {
967*4882a593Smuzhiyun err = -ENOMEM;
968*4882a593Smuzhiyun goto alloc_failed;
969*4882a593Smuzhiyun }
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun chip->card = card;
972*4882a593Smuzhiyun chip->pci = pci;
973*4882a593Smuzhiyun chip->irq = -1;
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun /* initialize synchronization structs */
976*4882a593Smuzhiyun mutex_init(&chip->lock);
977*4882a593Smuzhiyun mutex_init(&chip->msg_lock);
978*4882a593Smuzhiyun mutex_init(&chip->setup_mutex);
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun /* request resources */
981*4882a593Smuzhiyun err = pci_request_regions(pci, card_name);
982*4882a593Smuzhiyun if (err < 0)
983*4882a593Smuzhiyun goto request_regions_failed;
984*4882a593Smuzhiyun
985*4882a593Smuzhiyun /* plx port */
986*4882a593Smuzhiyun chip->port_plx = pci_resource_start(pci, 1);
987*4882a593Smuzhiyun chip->port_plx_remapped = ioport_map(chip->port_plx,
988*4882a593Smuzhiyun pci_resource_len(pci, 1));
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun /* dsp port */
991*4882a593Smuzhiyun chip->port_dsp_bar = pci_ioremap_bar(pci, 2);
992*4882a593Smuzhiyun if (!chip->port_dsp_bar) {
993*4882a593Smuzhiyun dev_err(card->dev, "cannot remap PCI memory region\n");
994*4882a593Smuzhiyun err = -ENOMEM;
995*4882a593Smuzhiyun goto remap_pci_failed;
996*4882a593Smuzhiyun }
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun err = request_threaded_irq(pci->irq, lx_interrupt, lx_threaded_irq,
999*4882a593Smuzhiyun IRQF_SHARED, KBUILD_MODNAME, chip);
1000*4882a593Smuzhiyun if (err) {
1001*4882a593Smuzhiyun dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1002*4882a593Smuzhiyun goto request_irq_failed;
1003*4882a593Smuzhiyun }
1004*4882a593Smuzhiyun chip->irq = pci->irq;
1005*4882a593Smuzhiyun card->sync_irq = chip->irq;
1006*4882a593Smuzhiyun
1007*4882a593Smuzhiyun err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1008*4882a593Smuzhiyun if (err < 0)
1009*4882a593Smuzhiyun goto device_new_failed;
1010*4882a593Smuzhiyun
1011*4882a593Smuzhiyun err = lx_init_dsp(chip);
1012*4882a593Smuzhiyun if (err < 0) {
1013*4882a593Smuzhiyun dev_err(card->dev, "error during DSP initialization\n");
1014*4882a593Smuzhiyun return err;
1015*4882a593Smuzhiyun }
1016*4882a593Smuzhiyun
1017*4882a593Smuzhiyun err = lx_pcm_create(chip);
1018*4882a593Smuzhiyun if (err < 0)
1019*4882a593Smuzhiyun return err;
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun err = lx_proc_create(card, chip);
1022*4882a593Smuzhiyun if (err < 0)
1023*4882a593Smuzhiyun return err;
1024*4882a593Smuzhiyun
1025*4882a593Smuzhiyun err = snd_ctl_add(card, snd_ctl_new1(&lx_control_playback_switch,
1026*4882a593Smuzhiyun chip));
1027*4882a593Smuzhiyun if (err < 0)
1028*4882a593Smuzhiyun return err;
1029*4882a593Smuzhiyun
1030*4882a593Smuzhiyun *rchip = chip;
1031*4882a593Smuzhiyun return 0;
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun device_new_failed:
1034*4882a593Smuzhiyun free_irq(pci->irq, chip);
1035*4882a593Smuzhiyun
1036*4882a593Smuzhiyun request_irq_failed:
1037*4882a593Smuzhiyun iounmap(chip->port_dsp_bar);
1038*4882a593Smuzhiyun
1039*4882a593Smuzhiyun remap_pci_failed:
1040*4882a593Smuzhiyun pci_release_regions(pci);
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun request_regions_failed:
1043*4882a593Smuzhiyun kfree(chip);
1044*4882a593Smuzhiyun
1045*4882a593Smuzhiyun alloc_failed:
1046*4882a593Smuzhiyun pci_disable_device(pci);
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun return err;
1049*4882a593Smuzhiyun }
1050*4882a593Smuzhiyun
snd_lx6464es_probe(struct pci_dev * pci,const struct pci_device_id * pci_id)1051*4882a593Smuzhiyun static int snd_lx6464es_probe(struct pci_dev *pci,
1052*4882a593Smuzhiyun const struct pci_device_id *pci_id)
1053*4882a593Smuzhiyun {
1054*4882a593Smuzhiyun static int dev;
1055*4882a593Smuzhiyun struct snd_card *card;
1056*4882a593Smuzhiyun struct lx6464es *chip;
1057*4882a593Smuzhiyun int err;
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun dev_dbg(&pci->dev, "->snd_lx6464es_probe\n");
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun if (dev >= SNDRV_CARDS)
1062*4882a593Smuzhiyun return -ENODEV;
1063*4882a593Smuzhiyun if (!enable[dev]) {
1064*4882a593Smuzhiyun dev++;
1065*4882a593Smuzhiyun return -ENOENT;
1066*4882a593Smuzhiyun }
1067*4882a593Smuzhiyun
1068*4882a593Smuzhiyun err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1069*4882a593Smuzhiyun 0, &card);
1070*4882a593Smuzhiyun if (err < 0)
1071*4882a593Smuzhiyun return err;
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun err = snd_lx6464es_create(card, pci, &chip);
1074*4882a593Smuzhiyun if (err < 0) {
1075*4882a593Smuzhiyun dev_err(card->dev, "error during snd_lx6464es_create\n");
1076*4882a593Smuzhiyun goto out_free;
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun strcpy(card->driver, "LX6464ES");
1080*4882a593Smuzhiyun sprintf(card->id, "LX6464ES_%02X%02X%02X",
1081*4882a593Smuzhiyun chip->mac_address[3], chip->mac_address[4], chip->mac_address[5]);
1082*4882a593Smuzhiyun
1083*4882a593Smuzhiyun sprintf(card->shortname, "LX6464ES %02X.%02X.%02X.%02X.%02X.%02X",
1084*4882a593Smuzhiyun chip->mac_address[0], chip->mac_address[1], chip->mac_address[2],
1085*4882a593Smuzhiyun chip->mac_address[3], chip->mac_address[4], chip->mac_address[5]);
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun sprintf(card->longname, "%s at 0x%lx, 0x%p, irq %i",
1088*4882a593Smuzhiyun card->shortname, chip->port_plx,
1089*4882a593Smuzhiyun chip->port_dsp_bar, chip->irq);
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun err = snd_card_register(card);
1092*4882a593Smuzhiyun if (err < 0)
1093*4882a593Smuzhiyun goto out_free;
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun dev_dbg(chip->card->dev, "initialization successful\n");
1096*4882a593Smuzhiyun pci_set_drvdata(pci, card);
1097*4882a593Smuzhiyun dev++;
1098*4882a593Smuzhiyun return 0;
1099*4882a593Smuzhiyun
1100*4882a593Smuzhiyun out_free:
1101*4882a593Smuzhiyun snd_card_free(card);
1102*4882a593Smuzhiyun return err;
1103*4882a593Smuzhiyun
1104*4882a593Smuzhiyun }
1105*4882a593Smuzhiyun
snd_lx6464es_remove(struct pci_dev * pci)1106*4882a593Smuzhiyun static void snd_lx6464es_remove(struct pci_dev *pci)
1107*4882a593Smuzhiyun {
1108*4882a593Smuzhiyun snd_card_free(pci_get_drvdata(pci));
1109*4882a593Smuzhiyun }
1110*4882a593Smuzhiyun
1111*4882a593Smuzhiyun
1112*4882a593Smuzhiyun static struct pci_driver lx6464es_driver = {
1113*4882a593Smuzhiyun .name = KBUILD_MODNAME,
1114*4882a593Smuzhiyun .id_table = snd_lx6464es_ids,
1115*4882a593Smuzhiyun .probe = snd_lx6464es_probe,
1116*4882a593Smuzhiyun .remove = snd_lx6464es_remove,
1117*4882a593Smuzhiyun };
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun module_pci_driver(lx6464es_driver);
1120