xref: /OK3568_Linux_fs/kernel/sound/pci/lola/lola.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Support for Digigram Lola PCI-e boards
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Copyright (c) 2011 Takashi Iwai <tiwai@suse.de>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef _LOLA_H
9*4882a593Smuzhiyun #define _LOLA_H
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #define DRVNAME	"snd-lola"
12*4882a593Smuzhiyun #define SFX	DRVNAME ": "
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /*
15*4882a593Smuzhiyun  * Lola HD Audio Registers BAR0
16*4882a593Smuzhiyun  */
17*4882a593Smuzhiyun #define LOLA_BAR0_GCAP		0x00
18*4882a593Smuzhiyun #define LOLA_BAR0_VMIN		0x02
19*4882a593Smuzhiyun #define LOLA_BAR0_VMAJ		0x03
20*4882a593Smuzhiyun #define LOLA_BAR0_OUTPAY	0x04
21*4882a593Smuzhiyun #define LOLA_BAR0_INPAY		0x06
22*4882a593Smuzhiyun #define LOLA_BAR0_GCTL		0x08
23*4882a593Smuzhiyun #define LOLA_BAR0_WAKEEN	0x0c
24*4882a593Smuzhiyun #define LOLA_BAR0_STATESTS	0x0e
25*4882a593Smuzhiyun #define LOLA_BAR0_GSTS		0x10
26*4882a593Smuzhiyun #define LOLA_BAR0_OUTSTRMPAY	0x18
27*4882a593Smuzhiyun #define LOLA_BAR0_INSTRMPAY	0x1a
28*4882a593Smuzhiyun #define LOLA_BAR0_INTCTL	0x20
29*4882a593Smuzhiyun #define LOLA_BAR0_INTSTS	0x24
30*4882a593Smuzhiyun #define LOLA_BAR0_WALCLK	0x30
31*4882a593Smuzhiyun #define LOLA_BAR0_SSYNC		0x38
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define LOLA_BAR0_CORBLBASE	0x40
34*4882a593Smuzhiyun #define LOLA_BAR0_CORBUBASE	0x44
35*4882a593Smuzhiyun #define LOLA_BAR0_CORBWP	0x48	/* no ULONG access */
36*4882a593Smuzhiyun #define LOLA_BAR0_CORBRP	0x4a	/* no ULONG access */
37*4882a593Smuzhiyun #define LOLA_BAR0_CORBCTL	0x4c	/* no ULONG access */
38*4882a593Smuzhiyun #define LOLA_BAR0_CORBSTS	0x4d	/* UCHAR access only */
39*4882a593Smuzhiyun #define LOLA_BAR0_CORBSIZE	0x4e	/* no ULONG access */
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define LOLA_BAR0_RIRBLBASE	0x50
42*4882a593Smuzhiyun #define LOLA_BAR0_RIRBUBASE	0x54
43*4882a593Smuzhiyun #define LOLA_BAR0_RIRBWP	0x58
44*4882a593Smuzhiyun #define LOLA_BAR0_RINTCNT	0x5a	/* no ULONG access */
45*4882a593Smuzhiyun #define LOLA_BAR0_RIRBCTL	0x5c
46*4882a593Smuzhiyun #define LOLA_BAR0_RIRBSTS	0x5d	/* UCHAR access only */
47*4882a593Smuzhiyun #define LOLA_BAR0_RIRBSIZE	0x5e	/* no ULONG access */
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define LOLA_BAR0_ICW		0x60
50*4882a593Smuzhiyun #define LOLA_BAR0_IRR		0x64
51*4882a593Smuzhiyun #define LOLA_BAR0_ICS		0x68
52*4882a593Smuzhiyun #define LOLA_BAR0_DPLBASE	0x70
53*4882a593Smuzhiyun #define LOLA_BAR0_DPUBASE	0x74
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun /* stream register offsets from stream base 0x80 */
56*4882a593Smuzhiyun #define LOLA_BAR0_SD0_OFFSET	0x80
57*4882a593Smuzhiyun #define LOLA_REG0_SD_CTL	0x00
58*4882a593Smuzhiyun #define LOLA_REG0_SD_STS	0x03
59*4882a593Smuzhiyun #define LOLA_REG0_SD_LPIB	0x04
60*4882a593Smuzhiyun #define LOLA_REG0_SD_CBL	0x08
61*4882a593Smuzhiyun #define LOLA_REG0_SD_LVI	0x0c
62*4882a593Smuzhiyun #define LOLA_REG0_SD_FIFOW	0x0e
63*4882a593Smuzhiyun #define LOLA_REG0_SD_FIFOSIZE	0x10
64*4882a593Smuzhiyun #define LOLA_REG0_SD_FORMAT	0x12
65*4882a593Smuzhiyun #define LOLA_REG0_SD_BDLPL	0x18
66*4882a593Smuzhiyun #define LOLA_REG0_SD_BDLPU	0x1c
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun /*
69*4882a593Smuzhiyun  * Lola Digigram Registers BAR1
70*4882a593Smuzhiyun  */
71*4882a593Smuzhiyun #define LOLA_BAR1_FPGAVER	0x00
72*4882a593Smuzhiyun #define LOLA_BAR1_DEVER		0x04
73*4882a593Smuzhiyun #define LOLA_BAR1_UCBMV		0x08
74*4882a593Smuzhiyun #define LOLA_BAR1_JTAG		0x0c
75*4882a593Smuzhiyun #define LOLA_BAR1_UARTRX	0x10
76*4882a593Smuzhiyun #define LOLA_BAR1_UARTTX	0x14
77*4882a593Smuzhiyun #define LOLA_BAR1_UARTCR	0x18
78*4882a593Smuzhiyun #define LOLA_BAR1_NVRAMVER	0x1c
79*4882a593Smuzhiyun #define LOLA_BAR1_CTRLSPI	0x20
80*4882a593Smuzhiyun #define LOLA_BAR1_DSPI		0x24
81*4882a593Smuzhiyun #define LOLA_BAR1_AISPI		0x28
82*4882a593Smuzhiyun #define LOLA_BAR1_GRAN		0x2c
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun #define LOLA_BAR1_DINTCTL	0x80
85*4882a593Smuzhiyun #define LOLA_BAR1_DIINTCTL	0x84
86*4882a593Smuzhiyun #define LOLA_BAR1_DOINTCTL	0x88
87*4882a593Smuzhiyun #define LOLA_BAR1_LRC		0x90
88*4882a593Smuzhiyun #define LOLA_BAR1_DINTSTS	0x94
89*4882a593Smuzhiyun #define LOLA_BAR1_DIINTSTS	0x98
90*4882a593Smuzhiyun #define LOLA_BAR1_DOINTSTS	0x9c
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun #define LOLA_BAR1_DSD0_OFFSET	0xa0
93*4882a593Smuzhiyun #define LOLA_BAR1_DSD_SIZE	0x18
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun #define LOLA_BAR1_DSDnSTS       0x00
96*4882a593Smuzhiyun #define LOLA_BAR1_DSDnLPIB      0x04
97*4882a593Smuzhiyun #define LOLA_BAR1_DSDnCTL       0x08
98*4882a593Smuzhiyun #define LOLA_BAR1_DSDnLVI       0x0c
99*4882a593Smuzhiyun #define LOLA_BAR1_DSDnBDPL      0x10
100*4882a593Smuzhiyun #define LOLA_BAR1_DSDnBDPU      0x14
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun #define LOLA_BAR1_SSYNC		0x03e8
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun #define LOLA_BAR1_BOARD_CTRL	0x0f00
105*4882a593Smuzhiyun #define LOLA_BAR1_BOARD_MODE	0x0f02
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun #define LOLA_BAR1_SOURCE_GAIN_ENABLE		0x1000
108*4882a593Smuzhiyun #define LOLA_BAR1_DEST00_MIX_GAIN_ENABLE	0x1004
109*4882a593Smuzhiyun #define LOLA_BAR1_DEST31_MIX_GAIN_ENABLE	0x1080
110*4882a593Smuzhiyun #define LOLA_BAR1_SOURCE00_01_GAIN		0x1084
111*4882a593Smuzhiyun #define LOLA_BAR1_SOURCE30_31_GAIN		0x10c0
112*4882a593Smuzhiyun #define LOLA_BAR1_SOURCE_GAIN(src) \
113*4882a593Smuzhiyun 	(LOLA_BAR1_SOURCE00_01_GAIN + (src) * 2)
114*4882a593Smuzhiyun #define LOLA_BAR1_DEST00_MIX00_01_GAIN		0x10c4
115*4882a593Smuzhiyun #define LOLA_BAR1_DEST00_MIX30_31_GAIN		0x1100
116*4882a593Smuzhiyun #define LOLA_BAR1_DEST01_MIX00_01_GAIN		0x1104
117*4882a593Smuzhiyun #define LOLA_BAR1_DEST01_MIX30_31_GAIN		0x1140
118*4882a593Smuzhiyun #define LOLA_BAR1_DEST31_MIX00_01_GAIN		0x1884
119*4882a593Smuzhiyun #define LOLA_BAR1_DEST31_MIX30_31_GAIN		0x18c0
120*4882a593Smuzhiyun #define LOLA_BAR1_MIX_GAIN(dest, mix) \
121*4882a593Smuzhiyun 	(LOLA_BAR1_DEST00_MIX00_01_GAIN + (dest) * 0x40 + (mix) * 2)
122*4882a593Smuzhiyun #define LOLA_BAR1_ANALOG_CLIP_IN		0x18c4
123*4882a593Smuzhiyun #define LOLA_BAR1_PEAKMETERS_SOURCE00_01	0x18c8
124*4882a593Smuzhiyun #define LOLA_BAR1_PEAKMETERS_SOURCE30_31	0x1904
125*4882a593Smuzhiyun #define LOLA_BAR1_PEAKMETERS_SOURCE(src) \
126*4882a593Smuzhiyun 	(LOLA_BAR1_PEAKMETERS_SOURCE00_01 + (src) * 2)
127*4882a593Smuzhiyun #define LOLA_BAR1_PEAKMETERS_DEST00_01		0x1908
128*4882a593Smuzhiyun #define LOLA_BAR1_PEAKMETERS_DEST30_31		0x1944
129*4882a593Smuzhiyun #define LOLA_BAR1_PEAKMETERS_DEST(dest) \
130*4882a593Smuzhiyun 	(LOLA_BAR1_PEAKMETERS_DEST00_01 + (dest) * 2)
131*4882a593Smuzhiyun #define LOLA_BAR1_PEAKMETERS_AGC00_01		0x1948
132*4882a593Smuzhiyun #define LOLA_BAR1_PEAKMETERS_AGC14_15		0x1964
133*4882a593Smuzhiyun #define LOLA_BAR1_PEAKMETERS_AGC(x) \
134*4882a593Smuzhiyun 	(LOLA_BAR1_PEAKMETERS_AGC00_01 + (x) * 2)
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun /* GCTL reset bit */
137*4882a593Smuzhiyun #define LOLA_GCTL_RESET		(1 << 0)
138*4882a593Smuzhiyun /* GCTL unsolicited response enable bit */
139*4882a593Smuzhiyun #define LOLA_GCTL_UREN		(1 << 8)
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun /* CORB/RIRB control, read/write pointer */
142*4882a593Smuzhiyun #define LOLA_RBCTL_DMA_EN	0x02	/* enable DMA */
143*4882a593Smuzhiyun #define LOLA_RBCTL_IRQ_EN	0x01	/* enable IRQ */
144*4882a593Smuzhiyun #define LOLA_RBRWP_CLR		0x8000	/* read/write pointer clear */
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun #define LOLA_RIRB_EX_UNSOL_EV	0x40000000
147*4882a593Smuzhiyun #define LOLA_RIRB_EX_ERROR	0x80000000
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun /* CORB int mask: CMEI[0] */
150*4882a593Smuzhiyun #define LOLA_CORB_INT_CMEI	0x01
151*4882a593Smuzhiyun #define LOLA_CORB_INT_MASK	LOLA_CORB_INT_CMEI
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun /* RIRB int mask: overrun[2], response[0] */
154*4882a593Smuzhiyun #define LOLA_RIRB_INT_RESPONSE	0x01
155*4882a593Smuzhiyun #define LOLA_RIRB_INT_OVERRUN	0x04
156*4882a593Smuzhiyun #define LOLA_RIRB_INT_MASK	(LOLA_RIRB_INT_RESPONSE | LOLA_RIRB_INT_OVERRUN)
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun /* DINTCTL and DINTSTS */
159*4882a593Smuzhiyun #define LOLA_DINT_GLOBAL	0x80000000 /* global interrupt enable bit */
160*4882a593Smuzhiyun #define LOLA_DINT_CTRL		0x40000000 /* controller interrupt enable bit */
161*4882a593Smuzhiyun #define LOLA_DINT_FIFOERR	0x20000000 /* global fifo error enable bit */
162*4882a593Smuzhiyun #define LOLA_DINT_MUERR		0x10000000 /* global microcontroller underrun error */
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun /* DSDnCTL bits */
165*4882a593Smuzhiyun #define LOLA_DSD_CTL_SRST	0x01	/* stream reset bit */
166*4882a593Smuzhiyun #define LOLA_DSD_CTL_SRUN	0x02	/* stream DMA start bit */
167*4882a593Smuzhiyun #define LOLA_DSD_CTL_IOCE	0x04	/* interrupt on completion enable */
168*4882a593Smuzhiyun #define LOLA_DSD_CTL_DEIE	0x10	/* descriptor error interrupt enable */
169*4882a593Smuzhiyun #define LOLA_DSD_CTL_VLRCV	0x20	/* valid LRCountValue information in bits 8..31 */
170*4882a593Smuzhiyun #define LOLA_LRC_MASK		0xffffff00
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun /* DSDnSTS */
173*4882a593Smuzhiyun #define LOLA_DSD_STS_BCIS	0x04	/* buffer completion interrupt status */
174*4882a593Smuzhiyun #define LOLA_DSD_STS_DESE	0x10	/* descriptor error interrupt */
175*4882a593Smuzhiyun #define LOLA_DSD_STS_FIFORDY	0x20	/* fifo ready */
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun #define LOLA_CORB_ENTRIES	256
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun #define MAX_STREAM_IN_COUNT	16
180*4882a593Smuzhiyun #define MAX_STREAM_OUT_COUNT	16
181*4882a593Smuzhiyun #define MAX_STREAM_COUNT	16
182*4882a593Smuzhiyun #define MAX_PINS		MAX_STREAM_COUNT
183*4882a593Smuzhiyun #define MAX_STREAM_BUFFER_COUNT	16
184*4882a593Smuzhiyun #define MAX_AUDIO_INOUT_COUNT	16
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun #define LOLA_CLOCK_TYPE_INTERNAL    0
187*4882a593Smuzhiyun #define LOLA_CLOCK_TYPE_AES         1
188*4882a593Smuzhiyun #define LOLA_CLOCK_TYPE_AES_SYNC    2
189*4882a593Smuzhiyun #define LOLA_CLOCK_TYPE_WORDCLOCK   3
190*4882a593Smuzhiyun #define LOLA_CLOCK_TYPE_ETHERSOUND  4
191*4882a593Smuzhiyun #define LOLA_CLOCK_TYPE_VIDEO       5
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun #define LOLA_CLOCK_FORMAT_NONE      0
194*4882a593Smuzhiyun #define LOLA_CLOCK_FORMAT_NTSC      1
195*4882a593Smuzhiyun #define LOLA_CLOCK_FORMAT_PAL       2
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun #define MAX_SAMPLE_CLOCK_COUNT  48
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun /* parameters used with mixer widget's mixer capabilities */
200*4882a593Smuzhiyun #define LOLA_PEAK_METER_CAN_AGC_MASK		1
201*4882a593Smuzhiyun #define LOLA_PEAK_METER_CAN_ANALOG_CLIP_MASK	2
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun struct lola_bar {
204*4882a593Smuzhiyun 	unsigned long addr;
205*4882a593Smuzhiyun 	void __iomem *remap_addr;
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun /* CORB/RIRB */
209*4882a593Smuzhiyun struct lola_rb {
210*4882a593Smuzhiyun 	__le32 *buf;		/* CORB/RIRB buffer, 8 byte per each entry */
211*4882a593Smuzhiyun 	dma_addr_t addr;	/* physical address of CORB/RIRB buffer */
212*4882a593Smuzhiyun 	unsigned short rp, wp;	/* read/write pointers */
213*4882a593Smuzhiyun 	int cmds;		/* number of pending requests */
214*4882a593Smuzhiyun };
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun /* Pin widget setup */
217*4882a593Smuzhiyun struct lola_pin {
218*4882a593Smuzhiyun 	unsigned int nid;
219*4882a593Smuzhiyun 	bool is_analog;
220*4882a593Smuzhiyun 	unsigned int amp_mute;
221*4882a593Smuzhiyun 	unsigned int amp_step_size;
222*4882a593Smuzhiyun 	unsigned int amp_num_steps;
223*4882a593Smuzhiyun 	unsigned int amp_offset;
224*4882a593Smuzhiyun 	unsigned int max_level;
225*4882a593Smuzhiyun 	unsigned int config_default_reg;
226*4882a593Smuzhiyun 	unsigned int fixed_gain_list_len;
227*4882a593Smuzhiyun 	unsigned int cur_gain_step;
228*4882a593Smuzhiyun };
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun struct lola_pin_array {
231*4882a593Smuzhiyun 	unsigned int num_pins;
232*4882a593Smuzhiyun 	unsigned int num_analog_pins;
233*4882a593Smuzhiyun 	struct lola_pin pins[MAX_PINS];
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun /* Clock widget setup */
237*4882a593Smuzhiyun struct lola_sample_clock {
238*4882a593Smuzhiyun 	unsigned int type;
239*4882a593Smuzhiyun 	unsigned int format;
240*4882a593Smuzhiyun 	unsigned int freq;
241*4882a593Smuzhiyun };
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun struct lola_clock_widget {
244*4882a593Smuzhiyun 	unsigned int nid;
245*4882a593Smuzhiyun 	unsigned int items;
246*4882a593Smuzhiyun 	unsigned int cur_index;
247*4882a593Smuzhiyun 	unsigned int cur_freq;
248*4882a593Smuzhiyun 	bool cur_valid;
249*4882a593Smuzhiyun 	struct lola_sample_clock sample_clock[MAX_SAMPLE_CLOCK_COUNT];
250*4882a593Smuzhiyun 	unsigned int idx_lookup[MAX_SAMPLE_CLOCK_COUNT];
251*4882a593Smuzhiyun };
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun #define LOLA_MIXER_DIM      32
254*4882a593Smuzhiyun struct lola_mixer_array {
255*4882a593Smuzhiyun 	u32 src_gain_enable;
256*4882a593Smuzhiyun 	u32 dest_mix_gain_enable[LOLA_MIXER_DIM];
257*4882a593Smuzhiyun 	u16 src_gain[LOLA_MIXER_DIM];
258*4882a593Smuzhiyun 	u16 dest_mix_gain[LOLA_MIXER_DIM][LOLA_MIXER_DIM];
259*4882a593Smuzhiyun };
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun /* Mixer widget setup */
262*4882a593Smuzhiyun struct lola_mixer_widget {
263*4882a593Smuzhiyun 	unsigned int nid;
264*4882a593Smuzhiyun 	unsigned int caps;
265*4882a593Smuzhiyun 	struct lola_mixer_array __iomem *array;
266*4882a593Smuzhiyun 	struct lola_mixer_array *array_saved;
267*4882a593Smuzhiyun 	unsigned int src_stream_outs;
268*4882a593Smuzhiyun 	unsigned int src_phys_ins;
269*4882a593Smuzhiyun 	unsigned int dest_stream_ins;
270*4882a593Smuzhiyun 	unsigned int dest_phys_outs;
271*4882a593Smuzhiyun 	unsigned int src_stream_out_ofs;
272*4882a593Smuzhiyun 	unsigned int dest_phys_out_ofs;
273*4882a593Smuzhiyun 	unsigned int src_mask;
274*4882a593Smuzhiyun 	unsigned int dest_mask;
275*4882a593Smuzhiyun };
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun /* Audio stream */
278*4882a593Smuzhiyun struct lola_stream {
279*4882a593Smuzhiyun 	unsigned int nid;	/* audio widget NID */
280*4882a593Smuzhiyun 	unsigned int index;	/* array index */
281*4882a593Smuzhiyun 	unsigned int dsd;	/* DSD index */
282*4882a593Smuzhiyun 	bool can_float;
283*4882a593Smuzhiyun 	struct snd_pcm_substream *substream; /* assigned PCM substream */
284*4882a593Smuzhiyun 	struct lola_stream *master;	/* master stream (for multi-channel) */
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	/* buffer setup */
287*4882a593Smuzhiyun 	unsigned int bufsize;
288*4882a593Smuzhiyun 	unsigned int period_bytes;
289*4882a593Smuzhiyun 	unsigned int frags;
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	/* format + channel setup */
292*4882a593Smuzhiyun 	unsigned int format_verb;
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	/* flags */
295*4882a593Smuzhiyun 	unsigned int opened:1;
296*4882a593Smuzhiyun 	unsigned int prepared:1;
297*4882a593Smuzhiyun 	unsigned int paused:1;
298*4882a593Smuzhiyun 	unsigned int running:1;
299*4882a593Smuzhiyun };
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun #define PLAY	SNDRV_PCM_STREAM_PLAYBACK
302*4882a593Smuzhiyun #define CAPT	SNDRV_PCM_STREAM_CAPTURE
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun struct lola_pcm {
305*4882a593Smuzhiyun 	unsigned int num_streams;
306*4882a593Smuzhiyun 	struct snd_dma_buffer bdl; /* BDL buffer */
307*4882a593Smuzhiyun 	struct lola_stream streams[MAX_STREAM_COUNT];
308*4882a593Smuzhiyun };
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun /* card instance */
311*4882a593Smuzhiyun struct lola {
312*4882a593Smuzhiyun 	struct snd_card *card;
313*4882a593Smuzhiyun 	struct pci_dev *pci;
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	/* pci resources */
316*4882a593Smuzhiyun 	struct lola_bar bar[2];
317*4882a593Smuzhiyun 	int irq;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	/* locks */
320*4882a593Smuzhiyun 	spinlock_t reg_lock;
321*4882a593Smuzhiyun 	struct mutex open_mutex;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	/* CORB/RIRB */
324*4882a593Smuzhiyun 	struct lola_rb corb;
325*4882a593Smuzhiyun 	struct lola_rb rirb;
326*4882a593Smuzhiyun 	unsigned int res, res_ex;	/* last read values */
327*4882a593Smuzhiyun 	/* last command (for debugging) */
328*4882a593Smuzhiyun 	unsigned int last_cmd_nid, last_verb, last_data, last_extdata;
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	/* CORB/RIRB buffers */
331*4882a593Smuzhiyun 	struct snd_dma_buffer rb;
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	/* unsolicited events */
334*4882a593Smuzhiyun 	unsigned int last_unsol_res;
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	/* streams */
337*4882a593Smuzhiyun 	struct lola_pcm pcm[2];
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	/* input src */
340*4882a593Smuzhiyun 	unsigned int input_src_caps_mask;
341*4882a593Smuzhiyun 	unsigned int input_src_mask;
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	/* pins */
344*4882a593Smuzhiyun 	struct lola_pin_array pin[2];
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	/* clock */
347*4882a593Smuzhiyun 	struct lola_clock_widget clock;
348*4882a593Smuzhiyun 	int ref_count_rate;
349*4882a593Smuzhiyun 	unsigned int sample_rate;
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	/* mixer */
352*4882a593Smuzhiyun 	struct lola_mixer_widget mixer;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	/* hw info */
355*4882a593Smuzhiyun 	unsigned int version;
356*4882a593Smuzhiyun 	unsigned int lola_caps;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	/* parameters */
359*4882a593Smuzhiyun 	unsigned int granularity;
360*4882a593Smuzhiyun 	unsigned int sample_rate_min;
361*4882a593Smuzhiyun 	unsigned int sample_rate_max;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	/* flags */
364*4882a593Smuzhiyun 	unsigned int initialized:1;
365*4882a593Smuzhiyun 	unsigned int cold_reset:1;
366*4882a593Smuzhiyun 	unsigned int polling_mode:1;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	/* for debugging */
369*4882a593Smuzhiyun 	unsigned int debug_res;
370*4882a593Smuzhiyun 	unsigned int debug_res_ex;
371*4882a593Smuzhiyun };
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun #define BAR0	0
374*4882a593Smuzhiyun #define BAR1	1
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun /* Helper macros */
377*4882a593Smuzhiyun #define lola_readl(chip, idx, name) \
378*4882a593Smuzhiyun 	readl((chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
379*4882a593Smuzhiyun #define lola_readw(chip, idx, name) \
380*4882a593Smuzhiyun 	readw((chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
381*4882a593Smuzhiyun #define lola_readb(chip, idx, name) \
382*4882a593Smuzhiyun 	readb((chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
383*4882a593Smuzhiyun #define lola_writel(chip, idx, name, val) \
384*4882a593Smuzhiyun 	writel((val), (chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
385*4882a593Smuzhiyun #define lola_writew(chip, idx, name, val) \
386*4882a593Smuzhiyun 	writew((val), (chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
387*4882a593Smuzhiyun #define lola_writeb(chip, idx, name, val) \
388*4882a593Smuzhiyun 	writeb((val), (chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun #define lola_dsd_read(chip, dsd, name) \
391*4882a593Smuzhiyun 	readl((chip)->bar[BAR1].remap_addr + LOLA_BAR1_DSD0_OFFSET + \
392*4882a593Smuzhiyun 	      (LOLA_BAR1_DSD_SIZE * (dsd)) + LOLA_BAR1_DSDn##name)
393*4882a593Smuzhiyun #define lola_dsd_write(chip, dsd, name, val) \
394*4882a593Smuzhiyun 	writel((val), (chip)->bar[BAR1].remap_addr + LOLA_BAR1_DSD0_OFFSET + \
395*4882a593Smuzhiyun 	       (LOLA_BAR1_DSD_SIZE * (dsd)) + LOLA_BAR1_DSDn##name)
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun /* GET verbs HDAudio */
398*4882a593Smuzhiyun #define LOLA_VERB_GET_STREAM_FORMAT		0xa00
399*4882a593Smuzhiyun #define LOLA_VERB_GET_AMP_GAIN_MUTE		0xb00
400*4882a593Smuzhiyun #define LOLA_VERB_PARAMETERS			0xf00
401*4882a593Smuzhiyun #define LOLA_VERB_GET_POWER_STATE		0xf05
402*4882a593Smuzhiyun #define LOLA_VERB_GET_CONV			0xf06
403*4882a593Smuzhiyun #define LOLA_VERB_GET_UNSOLICITED_RESPONSE	0xf08
404*4882a593Smuzhiyun #define LOLA_VERB_GET_DIGI_CONVERT_1		0xf0d
405*4882a593Smuzhiyun #define LOLA_VERB_GET_CONFIG_DEFAULT		0xf1c
406*4882a593Smuzhiyun #define LOLA_VERB_GET_SUBSYSTEM_ID		0xf20
407*4882a593Smuzhiyun /* GET verbs Digigram */
408*4882a593Smuzhiyun #define LOLA_VERB_GET_FIXED_GAIN		0xfc0
409*4882a593Smuzhiyun #define LOLA_VERB_GET_GAIN_SELECT		0xfc1
410*4882a593Smuzhiyun #define LOLA_VERB_GET_MAX_LEVEL			0xfc2
411*4882a593Smuzhiyun #define LOLA_VERB_GET_CLOCK_LIST		0xfc3
412*4882a593Smuzhiyun #define LOLA_VERB_GET_CLOCK_SELECT		0xfc4
413*4882a593Smuzhiyun #define LOLA_VERB_GET_CLOCK_STATUS		0xfc5
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun /* SET verbs HDAudio */
416*4882a593Smuzhiyun #define LOLA_VERB_SET_STREAM_FORMAT		0x200
417*4882a593Smuzhiyun #define LOLA_VERB_SET_AMP_GAIN_MUTE		0x300
418*4882a593Smuzhiyun #define LOLA_VERB_SET_POWER_STATE		0x705
419*4882a593Smuzhiyun #define LOLA_VERB_SET_CHANNEL_STREAMID		0x706
420*4882a593Smuzhiyun #define LOLA_VERB_SET_UNSOLICITED_ENABLE	0x708
421*4882a593Smuzhiyun #define LOLA_VERB_SET_DIGI_CONVERT_1		0x70d
422*4882a593Smuzhiyun /* SET verbs Digigram */
423*4882a593Smuzhiyun #define LOLA_VERB_SET_GAIN_SELECT		0xf81
424*4882a593Smuzhiyun #define LOLA_VERB_SET_CLOCK_SELECT		0xf84
425*4882a593Smuzhiyun #define LOLA_VERB_SET_GRANULARITY_STEPS		0xf86
426*4882a593Smuzhiyun #define LOLA_VERB_SET_SOURCE_GAIN		0xf87
427*4882a593Smuzhiyun #define LOLA_VERB_SET_MIX_GAIN			0xf88
428*4882a593Smuzhiyun #define LOLA_VERB_SET_DESTINATION_GAIN		0xf89
429*4882a593Smuzhiyun #define LOLA_VERB_SET_SRC			0xf8a
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun /* Parameter IDs used with LOLA_VERB_PARAMETERS */
432*4882a593Smuzhiyun #define LOLA_PAR_VENDOR_ID			0x00
433*4882a593Smuzhiyun #define LOLA_PAR_FUNCTION_TYPE			0x05
434*4882a593Smuzhiyun #define LOLA_PAR_AUDIO_WIDGET_CAP		0x09
435*4882a593Smuzhiyun #define LOLA_PAR_PCM				0x0a
436*4882a593Smuzhiyun #define LOLA_PAR_STREAM_FORMATS			0x0b
437*4882a593Smuzhiyun #define LOLA_PAR_PIN_CAP			0x0c
438*4882a593Smuzhiyun #define LOLA_PAR_AMP_IN_CAP			0x0d
439*4882a593Smuzhiyun #define LOLA_PAR_CONNLIST_LEN			0x0e
440*4882a593Smuzhiyun #define LOLA_PAR_POWER_STATE			0x0f
441*4882a593Smuzhiyun #define LOLA_PAR_GPIO_CAP			0x11
442*4882a593Smuzhiyun #define LOLA_PAR_AMP_OUT_CAP			0x12
443*4882a593Smuzhiyun #define LOLA_PAR_SPECIFIC_CAPS			0x80
444*4882a593Smuzhiyun #define LOLA_PAR_FIXED_GAIN_LIST		0x81
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun /* extract results of LOLA_PAR_SPECIFIC_CAPS */
447*4882a593Smuzhiyun #define LOLA_AFG_MIXER_WIDGET_PRESENT(res)	((res & (1 << 21)) != 0)
448*4882a593Smuzhiyun #define LOLA_AFG_CLOCK_WIDGET_PRESENT(res)	((res & (1 << 20)) != 0)
449*4882a593Smuzhiyun #define LOLA_AFG_INPUT_PIN_COUNT(res)		((res >> 10) & 0x2ff)
450*4882a593Smuzhiyun #define LOLA_AFG_OUTPUT_PIN_COUNT(res)		((res) & 0x2ff)
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun /* extract results of LOLA_PAR_AMP_IN_CAP / LOLA_PAR_AMP_OUT_CAP */
453*4882a593Smuzhiyun #define LOLA_AMP_MUTE_CAPABLE(res)		((res & (1 << 31)) != 0)
454*4882a593Smuzhiyun #define LOLA_AMP_STEP_SIZE(res)			((res >> 24) & 0x7f)
455*4882a593Smuzhiyun #define LOLA_AMP_NUM_STEPS(res)			((res >> 12) & 0x3ff)
456*4882a593Smuzhiyun #define LOLA_AMP_OFFSET(res)			((res) & 0x3ff)
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun #define LOLA_GRANULARITY_MIN		8
459*4882a593Smuzhiyun #define LOLA_GRANULARITY_MAX		32
460*4882a593Smuzhiyun #define LOLA_GRANULARITY_STEP		8
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun /* parameters used with unsolicited command/response */
463*4882a593Smuzhiyun #define LOLA_UNSOLICITED_TAG_MASK	0x3f
464*4882a593Smuzhiyun #define LOLA_UNSOLICITED_TAG		0x1a
465*4882a593Smuzhiyun #define LOLA_UNSOLICITED_ENABLE		0x80
466*4882a593Smuzhiyun #define LOLA_UNSOL_RESP_TAG_OFFSET	26
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun /* count values in the Vendor Specific Mixer Widget's Audio Widget Capabilities */
469*4882a593Smuzhiyun #define LOLA_MIXER_SRC_INPUT_PLAY_SEPARATION(res)   ((res >> 2) & 0x1f)
470*4882a593Smuzhiyun #define LOLA_MIXER_DEST_REC_OUTPUT_SEPARATION(res)  ((res >> 7) & 0x1f)
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun int lola_codec_write(struct lola *chip, unsigned int nid, unsigned int verb,
473*4882a593Smuzhiyun 		     unsigned int data, unsigned int extdata);
474*4882a593Smuzhiyun int lola_codec_read(struct lola *chip, unsigned int nid, unsigned int verb,
475*4882a593Smuzhiyun 		    unsigned int data, unsigned int extdata,
476*4882a593Smuzhiyun 		    unsigned int *val, unsigned int *extval);
477*4882a593Smuzhiyun int lola_codec_flush(struct lola *chip);
478*4882a593Smuzhiyun #define lola_read_param(chip, nid, param, val) \
479*4882a593Smuzhiyun 	lola_codec_read(chip, nid, LOLA_VERB_PARAMETERS, param, 0, val, NULL)
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun /* PCM */
482*4882a593Smuzhiyun int lola_create_pcm(struct lola *chip);
483*4882a593Smuzhiyun void lola_free_pcm(struct lola *chip);
484*4882a593Smuzhiyun int lola_init_pcm(struct lola *chip, int dir, int *nidp);
485*4882a593Smuzhiyun void lola_pcm_update(struct lola *chip, struct lola_pcm *pcm, unsigned int bits);
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun /* clock */
488*4882a593Smuzhiyun int lola_init_clock_widget(struct lola *chip, int nid);
489*4882a593Smuzhiyun int lola_set_granularity(struct lola *chip, unsigned int val, bool force);
490*4882a593Smuzhiyun int lola_enable_clock_events(struct lola *chip);
491*4882a593Smuzhiyun int lola_set_clock_index(struct lola *chip, unsigned int idx);
492*4882a593Smuzhiyun int lola_set_clock(struct lola *chip, int idx);
493*4882a593Smuzhiyun int lola_set_sample_rate(struct lola *chip, int rate);
494*4882a593Smuzhiyun bool lola_update_ext_clock_freq(struct lola *chip, unsigned int val);
495*4882a593Smuzhiyun unsigned int lola_sample_rate_convert(unsigned int coded);
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun /* mixer */
498*4882a593Smuzhiyun int lola_init_pins(struct lola *chip, int dir, int *nidp);
499*4882a593Smuzhiyun int lola_init_mixer_widget(struct lola *chip, int nid);
500*4882a593Smuzhiyun void lola_free_mixer(struct lola *chip);
501*4882a593Smuzhiyun int lola_create_mixer(struct lola *chip);
502*4882a593Smuzhiyun int lola_setup_all_analog_gains(struct lola *chip, int dir, bool mute);
503*4882a593Smuzhiyun void lola_save_mixer(struct lola *chip);
504*4882a593Smuzhiyun void lola_restore_mixer(struct lola *chip);
505*4882a593Smuzhiyun int lola_set_src_config(struct lola *chip, unsigned int src_mask, bool update);
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun /* proc */
508*4882a593Smuzhiyun #ifdef CONFIG_SND_DEBUG
509*4882a593Smuzhiyun void lola_proc_debug_new(struct lola *chip);
510*4882a593Smuzhiyun #else
511*4882a593Smuzhiyun #define lola_proc_debug_new(chip)
512*4882a593Smuzhiyun #endif
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun #endif /* _LOLA_H */
515