1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ALSA driver for VT1720/VT1724 (Envy24PT/Envy24HT)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Lowlevel functions for VT1720-based motherboards
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <sound/core.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "ice1712.h"
16*4882a593Smuzhiyun #include "envy24ht.h"
17*4882a593Smuzhiyun #include "vt1720_mobo.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun
k8x800_init(struct snd_ice1712 * ice)20*4882a593Smuzhiyun static int k8x800_init(struct snd_ice1712 *ice)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun ice->vt1720 = 1;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /* VT1616 codec */
25*4882a593Smuzhiyun ice->num_total_dacs = 6;
26*4882a593Smuzhiyun ice->num_total_adcs = 2;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /* WM8728 codec */
29*4882a593Smuzhiyun /* FIXME: TODO */
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun return 0;
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun
k8x800_add_controls(struct snd_ice1712 * ice)34*4882a593Smuzhiyun static int k8x800_add_controls(struct snd_ice1712 *ice)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun /* FIXME: needs some quirks for VT1616? */
37*4882a593Smuzhiyun return 0;
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /* EEPROM image */
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun static const unsigned char k8x800_eeprom[] = {
43*4882a593Smuzhiyun [ICE_EEP2_SYSCONF] = 0x01, /* clock 256, 1ADC, 2DACs */
44*4882a593Smuzhiyun [ICE_EEP2_ACLINK] = 0x02, /* ACLINK, packed */
45*4882a593Smuzhiyun [ICE_EEP2_I2S] = 0x00, /* - */
46*4882a593Smuzhiyun [ICE_EEP2_SPDIF] = 0x00, /* - */
47*4882a593Smuzhiyun [ICE_EEP2_GPIO_DIR] = 0xff,
48*4882a593Smuzhiyun [ICE_EEP2_GPIO_DIR1] = 0xff,
49*4882a593Smuzhiyun [ICE_EEP2_GPIO_DIR2] = 0x00, /* - */
50*4882a593Smuzhiyun [ICE_EEP2_GPIO_MASK] = 0xff,
51*4882a593Smuzhiyun [ICE_EEP2_GPIO_MASK1] = 0xff,
52*4882a593Smuzhiyun [ICE_EEP2_GPIO_MASK2] = 0x00, /* - */
53*4882a593Smuzhiyun [ICE_EEP2_GPIO_STATE] = 0x00,
54*4882a593Smuzhiyun [ICE_EEP2_GPIO_STATE1] = 0x00,
55*4882a593Smuzhiyun [ICE_EEP2_GPIO_STATE2] = 0x00, /* - */
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun static const unsigned char sn25p_eeprom[] = {
59*4882a593Smuzhiyun [ICE_EEP2_SYSCONF] = 0x01, /* clock 256, 1ADC, 2DACs */
60*4882a593Smuzhiyun [ICE_EEP2_ACLINK] = 0x02, /* ACLINK, packed */
61*4882a593Smuzhiyun [ICE_EEP2_I2S] = 0x00, /* - */
62*4882a593Smuzhiyun [ICE_EEP2_SPDIF] = 0x41, /* - */
63*4882a593Smuzhiyun [ICE_EEP2_GPIO_DIR] = 0xff,
64*4882a593Smuzhiyun [ICE_EEP2_GPIO_DIR1] = 0xff,
65*4882a593Smuzhiyun [ICE_EEP2_GPIO_DIR2] = 0x00, /* - */
66*4882a593Smuzhiyun [ICE_EEP2_GPIO_MASK] = 0xff,
67*4882a593Smuzhiyun [ICE_EEP2_GPIO_MASK1] = 0xff,
68*4882a593Smuzhiyun [ICE_EEP2_GPIO_MASK2] = 0x00, /* - */
69*4882a593Smuzhiyun [ICE_EEP2_GPIO_STATE] = 0x00,
70*4882a593Smuzhiyun [ICE_EEP2_GPIO_STATE1] = 0x00,
71*4882a593Smuzhiyun [ICE_EEP2_GPIO_STATE2] = 0x00, /* - */
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /* entry point */
76*4882a593Smuzhiyun struct snd_ice1712_card_info snd_vt1720_mobo_cards[] = {
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun .subvendor = VT1720_SUBDEVICE_K8X800,
79*4882a593Smuzhiyun .name = "Albatron K8X800 Pro II",
80*4882a593Smuzhiyun .model = "k8x800",
81*4882a593Smuzhiyun .chip_init = k8x800_init,
82*4882a593Smuzhiyun .build_controls = k8x800_add_controls,
83*4882a593Smuzhiyun .eeprom_size = sizeof(k8x800_eeprom),
84*4882a593Smuzhiyun .eeprom_data = k8x800_eeprom,
85*4882a593Smuzhiyun },
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun .subvendor = VT1720_SUBDEVICE_ZNF3_150,
88*4882a593Smuzhiyun .name = "Chaintech ZNF3-150",
89*4882a593Smuzhiyun /* identical with k8x800 */
90*4882a593Smuzhiyun .chip_init = k8x800_init,
91*4882a593Smuzhiyun .build_controls = k8x800_add_controls,
92*4882a593Smuzhiyun .eeprom_size = sizeof(k8x800_eeprom),
93*4882a593Smuzhiyun .eeprom_data = k8x800_eeprom,
94*4882a593Smuzhiyun },
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun .subvendor = VT1720_SUBDEVICE_ZNF3_250,
97*4882a593Smuzhiyun .name = "Chaintech ZNF3-250",
98*4882a593Smuzhiyun /* identical with k8x800 */
99*4882a593Smuzhiyun .chip_init = k8x800_init,
100*4882a593Smuzhiyun .build_controls = k8x800_add_controls,
101*4882a593Smuzhiyun .eeprom_size = sizeof(k8x800_eeprom),
102*4882a593Smuzhiyun .eeprom_data = k8x800_eeprom,
103*4882a593Smuzhiyun },
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun .subvendor = VT1720_SUBDEVICE_9CJS,
106*4882a593Smuzhiyun .name = "Chaintech 9CJS",
107*4882a593Smuzhiyun /* identical with k8x800 */
108*4882a593Smuzhiyun .chip_init = k8x800_init,
109*4882a593Smuzhiyun .build_controls = k8x800_add_controls,
110*4882a593Smuzhiyun .eeprom_size = sizeof(k8x800_eeprom),
111*4882a593Smuzhiyun .eeprom_data = k8x800_eeprom,
112*4882a593Smuzhiyun },
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun .subvendor = VT1720_SUBDEVICE_SN25P,
115*4882a593Smuzhiyun .name = "Shuttle SN25P",
116*4882a593Smuzhiyun .model = "sn25p",
117*4882a593Smuzhiyun .chip_init = k8x800_init,
118*4882a593Smuzhiyun .build_controls = k8x800_add_controls,
119*4882a593Smuzhiyun .eeprom_size = sizeof(k8x800_eeprom),
120*4882a593Smuzhiyun .eeprom_data = sn25p_eeprom,
121*4882a593Smuzhiyun },
122*4882a593Smuzhiyun { } /* terminator */
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
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