1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ALSA driver for ICEnsemble ICE1712 (Envy24)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Lowlevel functions for M-Audio Audiophile 192, Revolution 7.1 and 5.1
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2003 Takashi Iwai <tiwai@suse.de>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <sound/core.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include "ice1712.h"
17*4882a593Smuzhiyun #include "envy24ht.h"
18*4882a593Smuzhiyun #include "revo.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /* a non-standard I2C device for revo51 */
21*4882a593Smuzhiyun struct revo51_spec {
22*4882a593Smuzhiyun struct snd_i2c_device *dev;
23*4882a593Smuzhiyun struct snd_pt2258 *pt2258;
24*4882a593Smuzhiyun struct ak4114 *ak4114;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun
revo_i2s_mclk_changed(struct snd_ice1712 * ice)27*4882a593Smuzhiyun static void revo_i2s_mclk_changed(struct snd_ice1712 *ice)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun /* assert PRST# to converters; MT05 bit 7 */
30*4882a593Smuzhiyun outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
31*4882a593Smuzhiyun mdelay(5);
32*4882a593Smuzhiyun /* deassert PRST# */
33*4882a593Smuzhiyun outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun * change the rate of Envy24HT, AK4355 and AK4381
38*4882a593Smuzhiyun */
revo_set_rate_val(struct snd_akm4xxx * ak,unsigned int rate)39*4882a593Smuzhiyun static void revo_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun unsigned char old, tmp, dfs;
42*4882a593Smuzhiyun int reg, shift;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun if (rate == 0) /* no hint - S/PDIF input is master, simply return */
45*4882a593Smuzhiyun return;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* adjust DFS on codecs */
48*4882a593Smuzhiyun if (rate > 96000)
49*4882a593Smuzhiyun dfs = 2;
50*4882a593Smuzhiyun else if (rate > 48000)
51*4882a593Smuzhiyun dfs = 1;
52*4882a593Smuzhiyun else
53*4882a593Smuzhiyun dfs = 0;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun if (ak->type == SND_AK4355 || ak->type == SND_AK4358) {
56*4882a593Smuzhiyun reg = 2;
57*4882a593Smuzhiyun shift = 4;
58*4882a593Smuzhiyun } else {
59*4882a593Smuzhiyun reg = 1;
60*4882a593Smuzhiyun shift = 3;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun tmp = snd_akm4xxx_get(ak, 0, reg);
63*4882a593Smuzhiyun old = (tmp >> shift) & 0x03;
64*4882a593Smuzhiyun if (old == dfs)
65*4882a593Smuzhiyun return;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* reset DFS */
68*4882a593Smuzhiyun snd_akm4xxx_reset(ak, 1);
69*4882a593Smuzhiyun tmp = snd_akm4xxx_get(ak, 0, reg);
70*4882a593Smuzhiyun tmp &= ~(0x03 << shift);
71*4882a593Smuzhiyun tmp |= dfs << shift;
72*4882a593Smuzhiyun /* snd_akm4xxx_write(ak, 0, reg, tmp); */
73*4882a593Smuzhiyun snd_akm4xxx_set(ak, 0, reg, tmp); /* value is written in reset(0) */
74*4882a593Smuzhiyun snd_akm4xxx_reset(ak, 0);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /*
78*4882a593Smuzhiyun * I2C access to the PT2258 volume controller on GPIO 6/7 (Revolution 5.1)
79*4882a593Smuzhiyun */
80*4882a593Smuzhiyun
revo_i2c_start(struct snd_i2c_bus * bus)81*4882a593Smuzhiyun static void revo_i2c_start(struct snd_i2c_bus *bus)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun struct snd_ice1712 *ice = bus->private_data;
84*4882a593Smuzhiyun snd_ice1712_save_gpio_status(ice);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
revo_i2c_stop(struct snd_i2c_bus * bus)87*4882a593Smuzhiyun static void revo_i2c_stop(struct snd_i2c_bus *bus)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun struct snd_ice1712 *ice = bus->private_data;
90*4882a593Smuzhiyun snd_ice1712_restore_gpio_status(ice);
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
revo_i2c_direction(struct snd_i2c_bus * bus,int clock,int data)93*4882a593Smuzhiyun static void revo_i2c_direction(struct snd_i2c_bus *bus, int clock, int data)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun struct snd_ice1712 *ice = bus->private_data;
96*4882a593Smuzhiyun unsigned int mask, val;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun val = 0;
99*4882a593Smuzhiyun if (clock)
100*4882a593Smuzhiyun val |= VT1724_REVO_I2C_CLOCK; /* write SCL */
101*4882a593Smuzhiyun if (data)
102*4882a593Smuzhiyun val |= VT1724_REVO_I2C_DATA; /* write SDA */
103*4882a593Smuzhiyun mask = VT1724_REVO_I2C_CLOCK | VT1724_REVO_I2C_DATA;
104*4882a593Smuzhiyun ice->gpio.direction &= ~mask;
105*4882a593Smuzhiyun ice->gpio.direction |= val;
106*4882a593Smuzhiyun snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
107*4882a593Smuzhiyun snd_ice1712_gpio_set_mask(ice, ~mask);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
revo_i2c_setlines(struct snd_i2c_bus * bus,int clk,int data)110*4882a593Smuzhiyun static void revo_i2c_setlines(struct snd_i2c_bus *bus, int clk, int data)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun struct snd_ice1712 *ice = bus->private_data;
113*4882a593Smuzhiyun unsigned int val = 0;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun if (clk)
116*4882a593Smuzhiyun val |= VT1724_REVO_I2C_CLOCK;
117*4882a593Smuzhiyun if (data)
118*4882a593Smuzhiyun val |= VT1724_REVO_I2C_DATA;
119*4882a593Smuzhiyun snd_ice1712_gpio_write_bits(ice,
120*4882a593Smuzhiyun VT1724_REVO_I2C_DATA |
121*4882a593Smuzhiyun VT1724_REVO_I2C_CLOCK, val);
122*4882a593Smuzhiyun udelay(5);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
revo_i2c_getdata(struct snd_i2c_bus * bus,int ack)125*4882a593Smuzhiyun static int revo_i2c_getdata(struct snd_i2c_bus *bus, int ack)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun struct snd_ice1712 *ice = bus->private_data;
128*4882a593Smuzhiyun int bit;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun if (ack)
131*4882a593Smuzhiyun udelay(5);
132*4882a593Smuzhiyun bit = snd_ice1712_gpio_read_bits(ice, VT1724_REVO_I2C_DATA) ? 1 : 0;
133*4882a593Smuzhiyun return bit;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun static struct snd_i2c_bit_ops revo51_bit_ops = {
137*4882a593Smuzhiyun .start = revo_i2c_start,
138*4882a593Smuzhiyun .stop = revo_i2c_stop,
139*4882a593Smuzhiyun .direction = revo_i2c_direction,
140*4882a593Smuzhiyun .setlines = revo_i2c_setlines,
141*4882a593Smuzhiyun .getdata = revo_i2c_getdata,
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun
revo51_i2c_init(struct snd_ice1712 * ice,struct snd_pt2258 * pt)144*4882a593Smuzhiyun static int revo51_i2c_init(struct snd_ice1712 *ice,
145*4882a593Smuzhiyun struct snd_pt2258 *pt)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun struct revo51_spec *spec;
148*4882a593Smuzhiyun int err;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun spec = kzalloc(sizeof(*spec), GFP_KERNEL);
151*4882a593Smuzhiyun if (!spec)
152*4882a593Smuzhiyun return -ENOMEM;
153*4882a593Smuzhiyun ice->spec = spec;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun /* create the I2C bus */
156*4882a593Smuzhiyun err = snd_i2c_bus_create(ice->card, "ICE1724 GPIO6", NULL, &ice->i2c);
157*4882a593Smuzhiyun if (err < 0)
158*4882a593Smuzhiyun return err;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun ice->i2c->private_data = ice;
161*4882a593Smuzhiyun ice->i2c->hw_ops.bit = &revo51_bit_ops;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /* create the I2C device */
164*4882a593Smuzhiyun err = snd_i2c_device_create(ice->i2c, "PT2258", 0x40, &spec->dev);
165*4882a593Smuzhiyun if (err < 0)
166*4882a593Smuzhiyun return err;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun pt->card = ice->card;
169*4882a593Smuzhiyun pt->i2c_bus = ice->i2c;
170*4882a593Smuzhiyun pt->i2c_dev = spec->dev;
171*4882a593Smuzhiyun spec->pt2258 = pt;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun snd_pt2258_reset(pt);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun return 0;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun /*
179*4882a593Smuzhiyun * initialize the chips on M-Audio Revolution cards
180*4882a593Smuzhiyun */
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun #define AK_DAC(xname,xch) { .name = xname, .num_channels = xch }
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun static const struct snd_akm4xxx_dac_channel revo71_front[] = {
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun .name = "PCM Playback Volume",
187*4882a593Smuzhiyun .num_channels = 2,
188*4882a593Smuzhiyun /* front channels DAC supports muting */
189*4882a593Smuzhiyun .switch_name = "PCM Playback Switch",
190*4882a593Smuzhiyun },
191*4882a593Smuzhiyun };
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun static const struct snd_akm4xxx_dac_channel revo71_surround[] = {
194*4882a593Smuzhiyun AK_DAC("PCM Center Playback Volume", 1),
195*4882a593Smuzhiyun AK_DAC("PCM LFE Playback Volume", 1),
196*4882a593Smuzhiyun AK_DAC("PCM Side Playback Volume", 2),
197*4882a593Smuzhiyun AK_DAC("PCM Rear Playback Volume", 2),
198*4882a593Smuzhiyun };
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun static const struct snd_akm4xxx_dac_channel revo51_dac[] = {
201*4882a593Smuzhiyun AK_DAC("PCM Playback Volume", 2),
202*4882a593Smuzhiyun AK_DAC("PCM Center Playback Volume", 1),
203*4882a593Smuzhiyun AK_DAC("PCM LFE Playback Volume", 1),
204*4882a593Smuzhiyun AK_DAC("PCM Rear Playback Volume", 2),
205*4882a593Smuzhiyun AK_DAC("PCM Headphone Volume", 2),
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun static const char *revo51_adc_input_names[] = {
209*4882a593Smuzhiyun "Mic",
210*4882a593Smuzhiyun "Line",
211*4882a593Smuzhiyun "CD",
212*4882a593Smuzhiyun NULL
213*4882a593Smuzhiyun };
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun static const struct snd_akm4xxx_adc_channel revo51_adc[] = {
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun .name = "PCM Capture Volume",
218*4882a593Smuzhiyun .switch_name = "PCM Capture Switch",
219*4882a593Smuzhiyun .num_channels = 2,
220*4882a593Smuzhiyun .input_names = revo51_adc_input_names
221*4882a593Smuzhiyun },
222*4882a593Smuzhiyun };
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun static const struct snd_akm4xxx akm_revo_front = {
225*4882a593Smuzhiyun .type = SND_AK4381,
226*4882a593Smuzhiyun .num_dacs = 2,
227*4882a593Smuzhiyun .ops = {
228*4882a593Smuzhiyun .set_rate_val = revo_set_rate_val
229*4882a593Smuzhiyun },
230*4882a593Smuzhiyun .dac_info = revo71_front,
231*4882a593Smuzhiyun };
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun static const struct snd_ak4xxx_private akm_revo_front_priv = {
234*4882a593Smuzhiyun .caddr = 1,
235*4882a593Smuzhiyun .cif = 0,
236*4882a593Smuzhiyun .data_mask = VT1724_REVO_CDOUT,
237*4882a593Smuzhiyun .clk_mask = VT1724_REVO_CCLK,
238*4882a593Smuzhiyun .cs_mask = VT1724_REVO_CS0 | VT1724_REVO_CS1 | VT1724_REVO_CS2,
239*4882a593Smuzhiyun .cs_addr = VT1724_REVO_CS0 | VT1724_REVO_CS2,
240*4882a593Smuzhiyun .cs_none = VT1724_REVO_CS0 | VT1724_REVO_CS1 | VT1724_REVO_CS2,
241*4882a593Smuzhiyun .add_flags = VT1724_REVO_CCLK, /* high at init */
242*4882a593Smuzhiyun .mask_flags = 0,
243*4882a593Smuzhiyun };
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun static const struct snd_akm4xxx akm_revo_surround = {
246*4882a593Smuzhiyun .type = SND_AK4355,
247*4882a593Smuzhiyun .idx_offset = 1,
248*4882a593Smuzhiyun .num_dacs = 6,
249*4882a593Smuzhiyun .ops = {
250*4882a593Smuzhiyun .set_rate_val = revo_set_rate_val
251*4882a593Smuzhiyun },
252*4882a593Smuzhiyun .dac_info = revo71_surround,
253*4882a593Smuzhiyun };
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun static const struct snd_ak4xxx_private akm_revo_surround_priv = {
256*4882a593Smuzhiyun .caddr = 3,
257*4882a593Smuzhiyun .cif = 0,
258*4882a593Smuzhiyun .data_mask = VT1724_REVO_CDOUT,
259*4882a593Smuzhiyun .clk_mask = VT1724_REVO_CCLK,
260*4882a593Smuzhiyun .cs_mask = VT1724_REVO_CS0 | VT1724_REVO_CS1 | VT1724_REVO_CS2,
261*4882a593Smuzhiyun .cs_addr = VT1724_REVO_CS0 | VT1724_REVO_CS1,
262*4882a593Smuzhiyun .cs_none = VT1724_REVO_CS0 | VT1724_REVO_CS1 | VT1724_REVO_CS2,
263*4882a593Smuzhiyun .add_flags = VT1724_REVO_CCLK, /* high at init */
264*4882a593Smuzhiyun .mask_flags = 0,
265*4882a593Smuzhiyun };
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun static const struct snd_akm4xxx akm_revo51 = {
268*4882a593Smuzhiyun .type = SND_AK4358,
269*4882a593Smuzhiyun .num_dacs = 8,
270*4882a593Smuzhiyun .ops = {
271*4882a593Smuzhiyun .set_rate_val = revo_set_rate_val
272*4882a593Smuzhiyun },
273*4882a593Smuzhiyun .dac_info = revo51_dac,
274*4882a593Smuzhiyun };
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun static const struct snd_ak4xxx_private akm_revo51_priv = {
277*4882a593Smuzhiyun .caddr = 2,
278*4882a593Smuzhiyun .cif = 0,
279*4882a593Smuzhiyun .data_mask = VT1724_REVO_CDOUT,
280*4882a593Smuzhiyun .clk_mask = VT1724_REVO_CCLK,
281*4882a593Smuzhiyun .cs_mask = VT1724_REVO_CS0 | VT1724_REVO_CS1,
282*4882a593Smuzhiyun .cs_addr = VT1724_REVO_CS1,
283*4882a593Smuzhiyun .cs_none = VT1724_REVO_CS0 | VT1724_REVO_CS1,
284*4882a593Smuzhiyun .add_flags = VT1724_REVO_CCLK, /* high at init */
285*4882a593Smuzhiyun .mask_flags = 0,
286*4882a593Smuzhiyun };
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun static const struct snd_akm4xxx akm_revo51_adc = {
289*4882a593Smuzhiyun .type = SND_AK5365,
290*4882a593Smuzhiyun .num_adcs = 2,
291*4882a593Smuzhiyun .adc_info = revo51_adc,
292*4882a593Smuzhiyun };
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun static const struct snd_ak4xxx_private akm_revo51_adc_priv = {
295*4882a593Smuzhiyun .caddr = 2,
296*4882a593Smuzhiyun .cif = 0,
297*4882a593Smuzhiyun .data_mask = VT1724_REVO_CDOUT,
298*4882a593Smuzhiyun .clk_mask = VT1724_REVO_CCLK,
299*4882a593Smuzhiyun .cs_mask = VT1724_REVO_CS0 | VT1724_REVO_CS1,
300*4882a593Smuzhiyun .cs_addr = VT1724_REVO_CS0,
301*4882a593Smuzhiyun .cs_none = VT1724_REVO_CS0 | VT1724_REVO_CS1,
302*4882a593Smuzhiyun .add_flags = VT1724_REVO_CCLK, /* high at init */
303*4882a593Smuzhiyun .mask_flags = 0,
304*4882a593Smuzhiyun };
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun static struct snd_pt2258 ptc_revo51_volume;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun /* AK4358 for AP192 DAC, AK5385A for ADC */
ap192_set_rate_val(struct snd_akm4xxx * ak,unsigned int rate)309*4882a593Smuzhiyun static void ap192_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun struct snd_ice1712 *ice = ak->private_data[0];
312*4882a593Smuzhiyun int dfs;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun revo_set_rate_val(ak, rate);
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun /* reset CKS */
317*4882a593Smuzhiyun snd_ice1712_gpio_write_bits(ice, 1 << 8, rate > 96000 ? 1 << 8 : 0);
318*4882a593Smuzhiyun /* reset DFS pins of AK5385A for ADC, too */
319*4882a593Smuzhiyun if (rate > 96000)
320*4882a593Smuzhiyun dfs = 2;
321*4882a593Smuzhiyun else if (rate > 48000)
322*4882a593Smuzhiyun dfs = 1;
323*4882a593Smuzhiyun else
324*4882a593Smuzhiyun dfs = 0;
325*4882a593Smuzhiyun snd_ice1712_gpio_write_bits(ice, 3 << 9, dfs << 9);
326*4882a593Smuzhiyun /* reset ADC */
327*4882a593Smuzhiyun snd_ice1712_gpio_write_bits(ice, 1 << 11, 0);
328*4882a593Smuzhiyun snd_ice1712_gpio_write_bits(ice, 1 << 11, 1 << 11);
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun static const struct snd_akm4xxx_dac_channel ap192_dac[] = {
332*4882a593Smuzhiyun AK_DAC("PCM Playback Volume", 2)
333*4882a593Smuzhiyun };
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun static const struct snd_akm4xxx akm_ap192 = {
336*4882a593Smuzhiyun .type = SND_AK4358,
337*4882a593Smuzhiyun .num_dacs = 2,
338*4882a593Smuzhiyun .ops = {
339*4882a593Smuzhiyun .set_rate_val = ap192_set_rate_val
340*4882a593Smuzhiyun },
341*4882a593Smuzhiyun .dac_info = ap192_dac,
342*4882a593Smuzhiyun };
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun static const struct snd_ak4xxx_private akm_ap192_priv = {
345*4882a593Smuzhiyun .caddr = 2,
346*4882a593Smuzhiyun .cif = 0,
347*4882a593Smuzhiyun .data_mask = VT1724_REVO_CDOUT,
348*4882a593Smuzhiyun .clk_mask = VT1724_REVO_CCLK,
349*4882a593Smuzhiyun .cs_mask = VT1724_REVO_CS0 | VT1724_REVO_CS3,
350*4882a593Smuzhiyun .cs_addr = VT1724_REVO_CS3,
351*4882a593Smuzhiyun .cs_none = VT1724_REVO_CS0 | VT1724_REVO_CS3,
352*4882a593Smuzhiyun .add_flags = VT1724_REVO_CCLK, /* high at init */
353*4882a593Smuzhiyun .mask_flags = 0,
354*4882a593Smuzhiyun };
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun /* AK4114 support on Audiophile 192 */
357*4882a593Smuzhiyun /* CDTO (pin 32) -- GPIO2 pin 52
358*4882a593Smuzhiyun * CDTI (pin 33) -- GPIO3 pin 53 (shared with AK4358)
359*4882a593Smuzhiyun * CCLK (pin 34) -- GPIO1 pin 51 (shared with AK4358)
360*4882a593Smuzhiyun * CSN (pin 35) -- GPIO7 pin 59
361*4882a593Smuzhiyun */
362*4882a593Smuzhiyun #define AK4114_ADDR 0x00
363*4882a593Smuzhiyun
write_data(struct snd_ice1712 * ice,unsigned int gpio,unsigned int data,int idx)364*4882a593Smuzhiyun static void write_data(struct snd_ice1712 *ice, unsigned int gpio,
365*4882a593Smuzhiyun unsigned int data, int idx)
366*4882a593Smuzhiyun {
367*4882a593Smuzhiyun for (; idx >= 0; idx--) {
368*4882a593Smuzhiyun /* drop clock */
369*4882a593Smuzhiyun gpio &= ~VT1724_REVO_CCLK;
370*4882a593Smuzhiyun snd_ice1712_gpio_write(ice, gpio);
371*4882a593Smuzhiyun udelay(1);
372*4882a593Smuzhiyun /* set data */
373*4882a593Smuzhiyun if (data & (1 << idx))
374*4882a593Smuzhiyun gpio |= VT1724_REVO_CDOUT;
375*4882a593Smuzhiyun else
376*4882a593Smuzhiyun gpio &= ~VT1724_REVO_CDOUT;
377*4882a593Smuzhiyun snd_ice1712_gpio_write(ice, gpio);
378*4882a593Smuzhiyun udelay(1);
379*4882a593Smuzhiyun /* raise clock */
380*4882a593Smuzhiyun gpio |= VT1724_REVO_CCLK;
381*4882a593Smuzhiyun snd_ice1712_gpio_write(ice, gpio);
382*4882a593Smuzhiyun udelay(1);
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun
read_data(struct snd_ice1712 * ice,unsigned int gpio,int idx)386*4882a593Smuzhiyun static unsigned char read_data(struct snd_ice1712 *ice, unsigned int gpio,
387*4882a593Smuzhiyun int idx)
388*4882a593Smuzhiyun {
389*4882a593Smuzhiyun unsigned char data = 0;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun for (; idx >= 0; idx--) {
392*4882a593Smuzhiyun /* drop clock */
393*4882a593Smuzhiyun gpio &= ~VT1724_REVO_CCLK;
394*4882a593Smuzhiyun snd_ice1712_gpio_write(ice, gpio);
395*4882a593Smuzhiyun udelay(1);
396*4882a593Smuzhiyun /* read data */
397*4882a593Smuzhiyun if (snd_ice1712_gpio_read(ice) & VT1724_REVO_CDIN)
398*4882a593Smuzhiyun data |= (1 << idx);
399*4882a593Smuzhiyun udelay(1);
400*4882a593Smuzhiyun /* raise clock */
401*4882a593Smuzhiyun gpio |= VT1724_REVO_CCLK;
402*4882a593Smuzhiyun snd_ice1712_gpio_write(ice, gpio);
403*4882a593Smuzhiyun udelay(1);
404*4882a593Smuzhiyun }
405*4882a593Smuzhiyun return data;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun
ap192_4wire_start(struct snd_ice1712 * ice)408*4882a593Smuzhiyun static unsigned int ap192_4wire_start(struct snd_ice1712 *ice)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun unsigned int tmp;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun snd_ice1712_save_gpio_status(ice);
413*4882a593Smuzhiyun tmp = snd_ice1712_gpio_read(ice);
414*4882a593Smuzhiyun tmp |= VT1724_REVO_CCLK; /* high at init */
415*4882a593Smuzhiyun tmp |= VT1724_REVO_CS0;
416*4882a593Smuzhiyun tmp &= ~VT1724_REVO_CS3;
417*4882a593Smuzhiyun snd_ice1712_gpio_write(ice, tmp);
418*4882a593Smuzhiyun udelay(1);
419*4882a593Smuzhiyun return tmp;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
ap192_4wire_finish(struct snd_ice1712 * ice,unsigned int tmp)422*4882a593Smuzhiyun static void ap192_4wire_finish(struct snd_ice1712 *ice, unsigned int tmp)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun tmp |= VT1724_REVO_CS3;
425*4882a593Smuzhiyun tmp |= VT1724_REVO_CS0;
426*4882a593Smuzhiyun snd_ice1712_gpio_write(ice, tmp);
427*4882a593Smuzhiyun udelay(1);
428*4882a593Smuzhiyun snd_ice1712_restore_gpio_status(ice);
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun
ap192_ak4114_write(void * private_data,unsigned char addr,unsigned char data)431*4882a593Smuzhiyun static void ap192_ak4114_write(void *private_data, unsigned char addr,
432*4882a593Smuzhiyun unsigned char data)
433*4882a593Smuzhiyun {
434*4882a593Smuzhiyun struct snd_ice1712 *ice = private_data;
435*4882a593Smuzhiyun unsigned int tmp, addrdata;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun tmp = ap192_4wire_start(ice);
438*4882a593Smuzhiyun addrdata = (AK4114_ADDR << 6) | 0x20 | (addr & 0x1f);
439*4882a593Smuzhiyun addrdata = (addrdata << 8) | data;
440*4882a593Smuzhiyun write_data(ice, tmp, addrdata, 15);
441*4882a593Smuzhiyun ap192_4wire_finish(ice, tmp);
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
ap192_ak4114_read(void * private_data,unsigned char addr)444*4882a593Smuzhiyun static unsigned char ap192_ak4114_read(void *private_data, unsigned char addr)
445*4882a593Smuzhiyun {
446*4882a593Smuzhiyun struct snd_ice1712 *ice = private_data;
447*4882a593Smuzhiyun unsigned int tmp;
448*4882a593Smuzhiyun unsigned char data;
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun tmp = ap192_4wire_start(ice);
451*4882a593Smuzhiyun write_data(ice, tmp, (AK4114_ADDR << 6) | (addr & 0x1f), 7);
452*4882a593Smuzhiyun data = read_data(ice, tmp, 7);
453*4882a593Smuzhiyun ap192_4wire_finish(ice, tmp);
454*4882a593Smuzhiyun return data;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
ap192_ak4114_init(struct snd_ice1712 * ice)457*4882a593Smuzhiyun static int ap192_ak4114_init(struct snd_ice1712 *ice)
458*4882a593Smuzhiyun {
459*4882a593Smuzhiyun static const unsigned char ak4114_init_vals[] = {
460*4882a593Smuzhiyun AK4114_RST | AK4114_PWN | AK4114_OCKS0,
461*4882a593Smuzhiyun AK4114_DIF_I24I2S,
462*4882a593Smuzhiyun AK4114_TX1E,
463*4882a593Smuzhiyun AK4114_EFH_1024 | AK4114_DIT | AK4114_IPS(0),
464*4882a593Smuzhiyun 0,
465*4882a593Smuzhiyun 0
466*4882a593Smuzhiyun };
467*4882a593Smuzhiyun static const unsigned char ak4114_init_txcsb[] = {
468*4882a593Smuzhiyun 0x41, 0x02, 0x2c, 0x00, 0x00
469*4882a593Smuzhiyun };
470*4882a593Smuzhiyun int err;
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun struct revo51_spec *spec;
473*4882a593Smuzhiyun spec = kzalloc(sizeof(*spec), GFP_KERNEL);
474*4882a593Smuzhiyun if (!spec)
475*4882a593Smuzhiyun return -ENOMEM;
476*4882a593Smuzhiyun ice->spec = spec;
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun err = snd_ak4114_create(ice->card,
479*4882a593Smuzhiyun ap192_ak4114_read,
480*4882a593Smuzhiyun ap192_ak4114_write,
481*4882a593Smuzhiyun ak4114_init_vals, ak4114_init_txcsb,
482*4882a593Smuzhiyun ice, &spec->ak4114);
483*4882a593Smuzhiyun if (err < 0)
484*4882a593Smuzhiyun return err;
485*4882a593Smuzhiyun /* AK4114 in Revo cannot detect external rate correctly.
486*4882a593Smuzhiyun * No reason to stop capture stream due to incorrect checks */
487*4882a593Smuzhiyun spec->ak4114->check_flags = AK4114_CHECK_NO_RATE;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun return 0;
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun
revo_init(struct snd_ice1712 * ice)492*4882a593Smuzhiyun static int revo_init(struct snd_ice1712 *ice)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun struct snd_akm4xxx *ak;
495*4882a593Smuzhiyun int err;
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun /* determine I2C, DACs and ADCs */
498*4882a593Smuzhiyun switch (ice->eeprom.subvendor) {
499*4882a593Smuzhiyun case VT1724_SUBDEVICE_REVOLUTION71:
500*4882a593Smuzhiyun ice->num_total_dacs = 8;
501*4882a593Smuzhiyun ice->num_total_adcs = 2;
502*4882a593Smuzhiyun ice->gpio.i2s_mclk_changed = revo_i2s_mclk_changed;
503*4882a593Smuzhiyun break;
504*4882a593Smuzhiyun case VT1724_SUBDEVICE_REVOLUTION51:
505*4882a593Smuzhiyun ice->num_total_dacs = 8;
506*4882a593Smuzhiyun ice->num_total_adcs = 2;
507*4882a593Smuzhiyun break;
508*4882a593Smuzhiyun case VT1724_SUBDEVICE_AUDIOPHILE192:
509*4882a593Smuzhiyun ice->num_total_dacs = 2;
510*4882a593Smuzhiyun ice->num_total_adcs = 2;
511*4882a593Smuzhiyun break;
512*4882a593Smuzhiyun default:
513*4882a593Smuzhiyun snd_BUG();
514*4882a593Smuzhiyun return -EINVAL;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun /* second stage of initialization, analog parts and others */
518*4882a593Smuzhiyun ak = ice->akm = kcalloc(2, sizeof(struct snd_akm4xxx), GFP_KERNEL);
519*4882a593Smuzhiyun if (! ak)
520*4882a593Smuzhiyun return -ENOMEM;
521*4882a593Smuzhiyun switch (ice->eeprom.subvendor) {
522*4882a593Smuzhiyun case VT1724_SUBDEVICE_REVOLUTION71:
523*4882a593Smuzhiyun ice->akm_codecs = 2;
524*4882a593Smuzhiyun err = snd_ice1712_akm4xxx_init(ak, &akm_revo_front,
525*4882a593Smuzhiyun &akm_revo_front_priv, ice);
526*4882a593Smuzhiyun if (err < 0)
527*4882a593Smuzhiyun return err;
528*4882a593Smuzhiyun err = snd_ice1712_akm4xxx_init(ak+1, &akm_revo_surround,
529*4882a593Smuzhiyun &akm_revo_surround_priv, ice);
530*4882a593Smuzhiyun if (err < 0)
531*4882a593Smuzhiyun return err;
532*4882a593Smuzhiyun /* unmute all codecs */
533*4882a593Smuzhiyun snd_ice1712_gpio_write_bits(ice, VT1724_REVO_MUTE,
534*4882a593Smuzhiyun VT1724_REVO_MUTE);
535*4882a593Smuzhiyun break;
536*4882a593Smuzhiyun case VT1724_SUBDEVICE_REVOLUTION51:
537*4882a593Smuzhiyun ice->akm_codecs = 2;
538*4882a593Smuzhiyun err = snd_ice1712_akm4xxx_init(ak, &akm_revo51,
539*4882a593Smuzhiyun &akm_revo51_priv, ice);
540*4882a593Smuzhiyun if (err < 0)
541*4882a593Smuzhiyun return err;
542*4882a593Smuzhiyun err = snd_ice1712_akm4xxx_init(ak+1, &akm_revo51_adc,
543*4882a593Smuzhiyun &akm_revo51_adc_priv, ice);
544*4882a593Smuzhiyun if (err < 0)
545*4882a593Smuzhiyun return err;
546*4882a593Smuzhiyun err = revo51_i2c_init(ice, &ptc_revo51_volume);
547*4882a593Smuzhiyun if (err < 0)
548*4882a593Smuzhiyun return err;
549*4882a593Smuzhiyun /* unmute all codecs */
550*4882a593Smuzhiyun snd_ice1712_gpio_write_bits(ice, VT1724_REVO_MUTE,
551*4882a593Smuzhiyun VT1724_REVO_MUTE);
552*4882a593Smuzhiyun break;
553*4882a593Smuzhiyun case VT1724_SUBDEVICE_AUDIOPHILE192:
554*4882a593Smuzhiyun ice->akm_codecs = 1;
555*4882a593Smuzhiyun err = snd_ice1712_akm4xxx_init(ak, &akm_ap192, &akm_ap192_priv,
556*4882a593Smuzhiyun ice);
557*4882a593Smuzhiyun if (err < 0)
558*4882a593Smuzhiyun return err;
559*4882a593Smuzhiyun err = ap192_ak4114_init(ice);
560*4882a593Smuzhiyun if (err < 0)
561*4882a593Smuzhiyun return err;
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun /* unmute all codecs */
564*4882a593Smuzhiyun snd_ice1712_gpio_write_bits(ice, VT1724_REVO_MUTE,
565*4882a593Smuzhiyun VT1724_REVO_MUTE);
566*4882a593Smuzhiyun break;
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun return 0;
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun
revo_add_controls(struct snd_ice1712 * ice)573*4882a593Smuzhiyun static int revo_add_controls(struct snd_ice1712 *ice)
574*4882a593Smuzhiyun {
575*4882a593Smuzhiyun struct revo51_spec *spec = ice->spec;
576*4882a593Smuzhiyun int err;
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun switch (ice->eeprom.subvendor) {
579*4882a593Smuzhiyun case VT1724_SUBDEVICE_REVOLUTION71:
580*4882a593Smuzhiyun err = snd_ice1712_akm4xxx_build_controls(ice);
581*4882a593Smuzhiyun if (err < 0)
582*4882a593Smuzhiyun return err;
583*4882a593Smuzhiyun break;
584*4882a593Smuzhiyun case VT1724_SUBDEVICE_REVOLUTION51:
585*4882a593Smuzhiyun err = snd_ice1712_akm4xxx_build_controls(ice);
586*4882a593Smuzhiyun if (err < 0)
587*4882a593Smuzhiyun return err;
588*4882a593Smuzhiyun spec = ice->spec;
589*4882a593Smuzhiyun err = snd_pt2258_build_controls(spec->pt2258);
590*4882a593Smuzhiyun if (err < 0)
591*4882a593Smuzhiyun return err;
592*4882a593Smuzhiyun break;
593*4882a593Smuzhiyun case VT1724_SUBDEVICE_AUDIOPHILE192:
594*4882a593Smuzhiyun err = snd_ice1712_akm4xxx_build_controls(ice);
595*4882a593Smuzhiyun if (err < 0)
596*4882a593Smuzhiyun return err;
597*4882a593Smuzhiyun /* only capture SPDIF over AK4114 */
598*4882a593Smuzhiyun err = snd_ak4114_build(spec->ak4114, NULL,
599*4882a593Smuzhiyun ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
600*4882a593Smuzhiyun if (err < 0)
601*4882a593Smuzhiyun return err;
602*4882a593Smuzhiyun break;
603*4882a593Smuzhiyun }
604*4882a593Smuzhiyun return 0;
605*4882a593Smuzhiyun }
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun /* entry point */
608*4882a593Smuzhiyun struct snd_ice1712_card_info snd_vt1724_revo_cards[] = {
609*4882a593Smuzhiyun {
610*4882a593Smuzhiyun .subvendor = VT1724_SUBDEVICE_REVOLUTION71,
611*4882a593Smuzhiyun .name = "M Audio Revolution-7.1",
612*4882a593Smuzhiyun .model = "revo71",
613*4882a593Smuzhiyun .chip_init = revo_init,
614*4882a593Smuzhiyun .build_controls = revo_add_controls,
615*4882a593Smuzhiyun },
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun .subvendor = VT1724_SUBDEVICE_REVOLUTION51,
618*4882a593Smuzhiyun .name = "M Audio Revolution-5.1",
619*4882a593Smuzhiyun .model = "revo51",
620*4882a593Smuzhiyun .chip_init = revo_init,
621*4882a593Smuzhiyun .build_controls = revo_add_controls,
622*4882a593Smuzhiyun },
623*4882a593Smuzhiyun {
624*4882a593Smuzhiyun .subvendor = VT1724_SUBDEVICE_AUDIOPHILE192,
625*4882a593Smuzhiyun .name = "M Audio Audiophile192",
626*4882a593Smuzhiyun .model = "ap192",
627*4882a593Smuzhiyun .chip_init = revo_init,
628*4882a593Smuzhiyun .build_controls = revo_add_controls,
629*4882a593Smuzhiyun },
630*4882a593Smuzhiyun { } /* terminator */
631*4882a593Smuzhiyun };
632