1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ALSA driver for ICEnsemble VT1724 (Envy24HT)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Lowlevel functions for ESI Juli@ cards
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2004 Jaroslav Kysela <perex@perex.cz>
8*4882a593Smuzhiyun * 2008 Pavel Hofman <dustin@seznam.cz>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/string.h>
16*4882a593Smuzhiyun #include <sound/core.h>
17*4882a593Smuzhiyun #include <sound/tlv.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "ice1712.h"
20*4882a593Smuzhiyun #include "envy24ht.h"
21*4882a593Smuzhiyun #include "juli.h"
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun struct juli_spec {
24*4882a593Smuzhiyun struct ak4114 *ak4114;
25*4882a593Smuzhiyun unsigned int analog:1;
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun * chip addresses on I2C bus
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun #define AK4114_ADDR 0x20 /* S/PDIF receiver */
32*4882a593Smuzhiyun #define AK4358_ADDR 0x22 /* DAC */
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /*
35*4882a593Smuzhiyun * Juli does not use the standard ICE1724 clock scheme. Juli's ice1724 chip is
36*4882a593Smuzhiyun * supplied by external clock provided by Xilinx array and MK73-1 PLL frequency
37*4882a593Smuzhiyun * multiplier. Actual frequency is set by ice1724 GPIOs hooked to the Xilinx.
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun * The clock circuitry is supplied by the two ice1724 crystals. This
40*4882a593Smuzhiyun * arrangement allows to generate independent clock signal for AK4114's input
41*4882a593Smuzhiyun * rate detection circuit. As a result, Juli, unlike most other
42*4882a593Smuzhiyun * ice1724+ak4114-based cards, detects spdif input rate correctly.
43*4882a593Smuzhiyun * This fact is applied in the driver, allowing to modify PCM stream rate
44*4882a593Smuzhiyun * parameter according to the actual input rate.
45*4882a593Smuzhiyun *
46*4882a593Smuzhiyun * Juli uses the remaining three stereo-channels of its DAC to optionally
47*4882a593Smuzhiyun * monitor analog input, digital input, and digital output. The corresponding
48*4882a593Smuzhiyun * I2S signals are routed by Xilinx, controlled by GPIOs.
49*4882a593Smuzhiyun *
50*4882a593Smuzhiyun * The master mute is implemented using output muting transistors (GPIO) in
51*4882a593Smuzhiyun * combination with smuting the DAC.
52*4882a593Smuzhiyun *
53*4882a593Smuzhiyun * The card itself has no HW master volume control, implemented using the
54*4882a593Smuzhiyun * vmaster control.
55*4882a593Smuzhiyun *
56*4882a593Smuzhiyun * TODO:
57*4882a593Smuzhiyun * researching and fixing the input monitors
58*4882a593Smuzhiyun */
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /*
61*4882a593Smuzhiyun * GPIO pins
62*4882a593Smuzhiyun */
63*4882a593Smuzhiyun #define GPIO_FREQ_MASK (3<<0)
64*4882a593Smuzhiyun #define GPIO_FREQ_32KHZ (0<<0)
65*4882a593Smuzhiyun #define GPIO_FREQ_44KHZ (1<<0)
66*4882a593Smuzhiyun #define GPIO_FREQ_48KHZ (2<<0)
67*4882a593Smuzhiyun #define GPIO_MULTI_MASK (3<<2)
68*4882a593Smuzhiyun #define GPIO_MULTI_4X (0<<2)
69*4882a593Smuzhiyun #define GPIO_MULTI_2X (1<<2)
70*4882a593Smuzhiyun #define GPIO_MULTI_1X (2<<2) /* also external */
71*4882a593Smuzhiyun #define GPIO_MULTI_HALF (3<<2)
72*4882a593Smuzhiyun #define GPIO_INTERNAL_CLOCK (1<<4) /* 0 = external, 1 = internal */
73*4882a593Smuzhiyun #define GPIO_CLOCK_MASK (1<<4)
74*4882a593Smuzhiyun #define GPIO_ANALOG_PRESENT (1<<5) /* RO only: 0 = present */
75*4882a593Smuzhiyun #define GPIO_RXMCLK_SEL (1<<7) /* must be 0 */
76*4882a593Smuzhiyun #define GPIO_AK5385A_CKS0 (1<<8)
77*4882a593Smuzhiyun #define GPIO_AK5385A_DFS1 (1<<9)
78*4882a593Smuzhiyun #define GPIO_AK5385A_DFS0 (1<<10)
79*4882a593Smuzhiyun #define GPIO_DIGOUT_MONITOR (1<<11) /* 1 = active */
80*4882a593Smuzhiyun #define GPIO_DIGIN_MONITOR (1<<12) /* 1 = active */
81*4882a593Smuzhiyun #define GPIO_ANAIN_MONITOR (1<<13) /* 1 = active */
82*4882a593Smuzhiyun #define GPIO_AK5385A_CKS1 (1<<14) /* must be 0 */
83*4882a593Smuzhiyun #define GPIO_MUTE_CONTROL (1<<15) /* output mute, 1 = muted */
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #define GPIO_RATE_MASK (GPIO_FREQ_MASK | GPIO_MULTI_MASK | \
86*4882a593Smuzhiyun GPIO_CLOCK_MASK)
87*4882a593Smuzhiyun #define GPIO_AK5385A_MASK (GPIO_AK5385A_CKS0 | GPIO_AK5385A_DFS0 | \
88*4882a593Smuzhiyun GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS1)
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #define JULI_PCM_RATE (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
91*4882a593Smuzhiyun SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
92*4882a593Smuzhiyun SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
93*4882a593Smuzhiyun SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
94*4882a593Smuzhiyun SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun #define GPIO_RATE_16000 (GPIO_FREQ_32KHZ | GPIO_MULTI_HALF | \
97*4882a593Smuzhiyun GPIO_INTERNAL_CLOCK)
98*4882a593Smuzhiyun #define GPIO_RATE_22050 (GPIO_FREQ_44KHZ | GPIO_MULTI_HALF | \
99*4882a593Smuzhiyun GPIO_INTERNAL_CLOCK)
100*4882a593Smuzhiyun #define GPIO_RATE_24000 (GPIO_FREQ_48KHZ | GPIO_MULTI_HALF | \
101*4882a593Smuzhiyun GPIO_INTERNAL_CLOCK)
102*4882a593Smuzhiyun #define GPIO_RATE_32000 (GPIO_FREQ_32KHZ | GPIO_MULTI_1X | \
103*4882a593Smuzhiyun GPIO_INTERNAL_CLOCK)
104*4882a593Smuzhiyun #define GPIO_RATE_44100 (GPIO_FREQ_44KHZ | GPIO_MULTI_1X | \
105*4882a593Smuzhiyun GPIO_INTERNAL_CLOCK)
106*4882a593Smuzhiyun #define GPIO_RATE_48000 (GPIO_FREQ_48KHZ | GPIO_MULTI_1X | \
107*4882a593Smuzhiyun GPIO_INTERNAL_CLOCK)
108*4882a593Smuzhiyun #define GPIO_RATE_64000 (GPIO_FREQ_32KHZ | GPIO_MULTI_2X | \
109*4882a593Smuzhiyun GPIO_INTERNAL_CLOCK)
110*4882a593Smuzhiyun #define GPIO_RATE_88200 (GPIO_FREQ_44KHZ | GPIO_MULTI_2X | \
111*4882a593Smuzhiyun GPIO_INTERNAL_CLOCK)
112*4882a593Smuzhiyun #define GPIO_RATE_96000 (GPIO_FREQ_48KHZ | GPIO_MULTI_2X | \
113*4882a593Smuzhiyun GPIO_INTERNAL_CLOCK)
114*4882a593Smuzhiyun #define GPIO_RATE_176400 (GPIO_FREQ_44KHZ | GPIO_MULTI_4X | \
115*4882a593Smuzhiyun GPIO_INTERNAL_CLOCK)
116*4882a593Smuzhiyun #define GPIO_RATE_192000 (GPIO_FREQ_48KHZ | GPIO_MULTI_4X | \
117*4882a593Smuzhiyun GPIO_INTERNAL_CLOCK)
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /*
120*4882a593Smuzhiyun * Initial setup of the conversion array GPIO <-> rate
121*4882a593Smuzhiyun */
122*4882a593Smuzhiyun static const unsigned int juli_rates[] = {
123*4882a593Smuzhiyun 16000, 22050, 24000, 32000,
124*4882a593Smuzhiyun 44100, 48000, 64000, 88200,
125*4882a593Smuzhiyun 96000, 176400, 192000,
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun static const unsigned int gpio_vals[] = {
129*4882a593Smuzhiyun GPIO_RATE_16000, GPIO_RATE_22050, GPIO_RATE_24000, GPIO_RATE_32000,
130*4882a593Smuzhiyun GPIO_RATE_44100, GPIO_RATE_48000, GPIO_RATE_64000, GPIO_RATE_88200,
131*4882a593Smuzhiyun GPIO_RATE_96000, GPIO_RATE_176400, GPIO_RATE_192000,
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list juli_rates_info = {
135*4882a593Smuzhiyun .count = ARRAY_SIZE(juli_rates),
136*4882a593Smuzhiyun .list = juli_rates,
137*4882a593Smuzhiyun .mask = 0,
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun
get_gpio_val(int rate)140*4882a593Smuzhiyun static int get_gpio_val(int rate)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun int i;
143*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(juli_rates); i++)
144*4882a593Smuzhiyun if (juli_rates[i] == rate)
145*4882a593Smuzhiyun return gpio_vals[i];
146*4882a593Smuzhiyun return 0;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
juli_ak4114_write(void * private_data,unsigned char reg,unsigned char val)149*4882a593Smuzhiyun static void juli_ak4114_write(void *private_data, unsigned char reg,
150*4882a593Smuzhiyun unsigned char val)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun snd_vt1724_write_i2c((struct snd_ice1712 *)private_data, AK4114_ADDR,
153*4882a593Smuzhiyun reg, val);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
juli_ak4114_read(void * private_data,unsigned char reg)156*4882a593Smuzhiyun static unsigned char juli_ak4114_read(void *private_data, unsigned char reg)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun return snd_vt1724_read_i2c((struct snd_ice1712 *)private_data,
159*4882a593Smuzhiyun AK4114_ADDR, reg);
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun /*
163*4882a593Smuzhiyun * If SPDIF capture and slaved to SPDIF-IN, setting runtime rate
164*4882a593Smuzhiyun * to the external rate
165*4882a593Smuzhiyun */
juli_spdif_in_open(struct snd_ice1712 * ice,struct snd_pcm_substream * substream)166*4882a593Smuzhiyun static void juli_spdif_in_open(struct snd_ice1712 *ice,
167*4882a593Smuzhiyun struct snd_pcm_substream *substream)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun struct juli_spec *spec = ice->spec;
170*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
171*4882a593Smuzhiyun int rate;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
174*4882a593Smuzhiyun !ice->is_spdif_master(ice))
175*4882a593Smuzhiyun return;
176*4882a593Smuzhiyun rate = snd_ak4114_external_rate(spec->ak4114);
177*4882a593Smuzhiyun if (rate >= runtime->hw.rate_min && rate <= runtime->hw.rate_max) {
178*4882a593Smuzhiyun runtime->hw.rate_min = rate;
179*4882a593Smuzhiyun runtime->hw.rate_max = rate;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /*
184*4882a593Smuzhiyun * AK4358 section
185*4882a593Smuzhiyun */
186*4882a593Smuzhiyun
juli_akm_lock(struct snd_akm4xxx * ak,int chip)187*4882a593Smuzhiyun static void juli_akm_lock(struct snd_akm4xxx *ak, int chip)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
juli_akm_unlock(struct snd_akm4xxx * ak,int chip)191*4882a593Smuzhiyun static void juli_akm_unlock(struct snd_akm4xxx *ak, int chip)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
juli_akm_write(struct snd_akm4xxx * ak,int chip,unsigned char addr,unsigned char data)195*4882a593Smuzhiyun static void juli_akm_write(struct snd_akm4xxx *ak, int chip,
196*4882a593Smuzhiyun unsigned char addr, unsigned char data)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun struct snd_ice1712 *ice = ak->private_data[0];
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun if (snd_BUG_ON(chip))
201*4882a593Smuzhiyun return;
202*4882a593Smuzhiyun snd_vt1724_write_i2c(ice, AK4358_ADDR, addr, data);
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun /*
206*4882a593Smuzhiyun * change the rate of envy24HT, AK4358, AK5385
207*4882a593Smuzhiyun */
juli_akm_set_rate_val(struct snd_akm4xxx * ak,unsigned int rate)208*4882a593Smuzhiyun static void juli_akm_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun unsigned char old, tmp, ak4358_dfs;
211*4882a593Smuzhiyun unsigned int ak5385_pins, old_gpio, new_gpio;
212*4882a593Smuzhiyun struct snd_ice1712 *ice = ak->private_data[0];
213*4882a593Smuzhiyun struct juli_spec *spec = ice->spec;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun if (rate == 0) /* no hint - S/PDIF input is master or the new spdif
216*4882a593Smuzhiyun input rate undetected, simply return */
217*4882a593Smuzhiyun return;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /* adjust DFS on codecs */
220*4882a593Smuzhiyun if (rate > 96000) {
221*4882a593Smuzhiyun ak4358_dfs = 2;
222*4882a593Smuzhiyun ak5385_pins = GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS0;
223*4882a593Smuzhiyun } else if (rate > 48000) {
224*4882a593Smuzhiyun ak4358_dfs = 1;
225*4882a593Smuzhiyun ak5385_pins = GPIO_AK5385A_DFS0;
226*4882a593Smuzhiyun } else {
227*4882a593Smuzhiyun ak4358_dfs = 0;
228*4882a593Smuzhiyun ak5385_pins = 0;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun /* AK5385 first, since it requires cold reset affecting both codecs */
231*4882a593Smuzhiyun old_gpio = ice->gpio.get_data(ice);
232*4882a593Smuzhiyun new_gpio = (old_gpio & ~GPIO_AK5385A_MASK) | ak5385_pins;
233*4882a593Smuzhiyun /* dev_dbg(ice->card->dev, "JULI - ak5385 set_rate_val: new gpio 0x%x\n",
234*4882a593Smuzhiyun new_gpio); */
235*4882a593Smuzhiyun ice->gpio.set_data(ice, new_gpio);
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun /* cold reset */
238*4882a593Smuzhiyun old = inb(ICEMT1724(ice, AC97_CMD));
239*4882a593Smuzhiyun outb(old | VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
240*4882a593Smuzhiyun udelay(1);
241*4882a593Smuzhiyun outb(old & ~VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun /* AK4358 */
244*4882a593Smuzhiyun /* set new value, reset DFS */
245*4882a593Smuzhiyun tmp = snd_akm4xxx_get(ak, 0, 2);
246*4882a593Smuzhiyun snd_akm4xxx_reset(ak, 1);
247*4882a593Smuzhiyun tmp = snd_akm4xxx_get(ak, 0, 2);
248*4882a593Smuzhiyun tmp &= ~(0x03 << 4);
249*4882a593Smuzhiyun tmp |= ak4358_dfs << 4;
250*4882a593Smuzhiyun snd_akm4xxx_set(ak, 0, 2, tmp);
251*4882a593Smuzhiyun snd_akm4xxx_reset(ak, 0);
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun /* reinit ak4114 */
254*4882a593Smuzhiyun snd_ak4114_reinit(spec->ak4114);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun #define AK_DAC(xname, xch) { .name = xname, .num_channels = xch }
258*4882a593Smuzhiyun #define PCM_VOLUME "PCM Playback Volume"
259*4882a593Smuzhiyun #define MONITOR_AN_IN_VOLUME "Monitor Analog In Volume"
260*4882a593Smuzhiyun #define MONITOR_DIG_IN_VOLUME "Monitor Digital In Volume"
261*4882a593Smuzhiyun #define MONITOR_DIG_OUT_VOLUME "Monitor Digital Out Volume"
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun static const struct snd_akm4xxx_dac_channel juli_dac[] = {
264*4882a593Smuzhiyun AK_DAC(PCM_VOLUME, 2),
265*4882a593Smuzhiyun AK_DAC(MONITOR_AN_IN_VOLUME, 2),
266*4882a593Smuzhiyun AK_DAC(MONITOR_DIG_OUT_VOLUME, 2),
267*4882a593Smuzhiyun AK_DAC(MONITOR_DIG_IN_VOLUME, 2),
268*4882a593Smuzhiyun };
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun static const struct snd_akm4xxx akm_juli_dac = {
272*4882a593Smuzhiyun .type = SND_AK4358,
273*4882a593Smuzhiyun .num_dacs = 8, /* DAC1 - analog out
274*4882a593Smuzhiyun DAC2 - analog in monitor
275*4882a593Smuzhiyun DAC3 - digital out monitor
276*4882a593Smuzhiyun DAC4 - digital in monitor
277*4882a593Smuzhiyun */
278*4882a593Smuzhiyun .ops = {
279*4882a593Smuzhiyun .lock = juli_akm_lock,
280*4882a593Smuzhiyun .unlock = juli_akm_unlock,
281*4882a593Smuzhiyun .write = juli_akm_write,
282*4882a593Smuzhiyun .set_rate_val = juli_akm_set_rate_val
283*4882a593Smuzhiyun },
284*4882a593Smuzhiyun .dac_info = juli_dac,
285*4882a593Smuzhiyun };
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun #define juli_mute_info snd_ctl_boolean_mono_info
288*4882a593Smuzhiyun
juli_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)289*4882a593Smuzhiyun static int juli_mute_get(struct snd_kcontrol *kcontrol,
290*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
293*4882a593Smuzhiyun unsigned int val;
294*4882a593Smuzhiyun val = ice->gpio.get_data(ice) & (unsigned int) kcontrol->private_value;
295*4882a593Smuzhiyun if (kcontrol->private_value == GPIO_MUTE_CONTROL)
296*4882a593Smuzhiyun /* val 0 = signal on */
297*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val) ? 0 : 1;
298*4882a593Smuzhiyun else
299*4882a593Smuzhiyun /* val 1 = signal on */
300*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val) ? 1 : 0;
301*4882a593Smuzhiyun return 0;
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
juli_mute_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)304*4882a593Smuzhiyun static int juli_mute_put(struct snd_kcontrol *kcontrol,
305*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
308*4882a593Smuzhiyun unsigned int old_gpio, new_gpio;
309*4882a593Smuzhiyun old_gpio = ice->gpio.get_data(ice);
310*4882a593Smuzhiyun if (ucontrol->value.integer.value[0]) {
311*4882a593Smuzhiyun /* unmute */
312*4882a593Smuzhiyun if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
313*4882a593Smuzhiyun /* 0 = signal on */
314*4882a593Smuzhiyun new_gpio = old_gpio & ~GPIO_MUTE_CONTROL;
315*4882a593Smuzhiyun /* un-smuting DAC */
316*4882a593Smuzhiyun snd_akm4xxx_write(ice->akm, 0, 0x01, 0x01);
317*4882a593Smuzhiyun } else
318*4882a593Smuzhiyun /* 1 = signal on */
319*4882a593Smuzhiyun new_gpio = old_gpio |
320*4882a593Smuzhiyun (unsigned int) kcontrol->private_value;
321*4882a593Smuzhiyun } else {
322*4882a593Smuzhiyun /* mute */
323*4882a593Smuzhiyun if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
324*4882a593Smuzhiyun /* 1 = signal off */
325*4882a593Smuzhiyun new_gpio = old_gpio | GPIO_MUTE_CONTROL;
326*4882a593Smuzhiyun /* smuting DAC */
327*4882a593Smuzhiyun snd_akm4xxx_write(ice->akm, 0, 0x01, 0x03);
328*4882a593Smuzhiyun } else
329*4882a593Smuzhiyun /* 0 = signal off */
330*4882a593Smuzhiyun new_gpio = old_gpio &
331*4882a593Smuzhiyun ~((unsigned int) kcontrol->private_value);
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun /* dev_dbg(ice->card->dev,
334*4882a593Smuzhiyun "JULI - mute/unmute: control_value: 0x%x, old_gpio: 0x%x, "
335*4882a593Smuzhiyun "new_gpio 0x%x\n",
336*4882a593Smuzhiyun (unsigned int)ucontrol->value.integer.value[0], old_gpio,
337*4882a593Smuzhiyun new_gpio); */
338*4882a593Smuzhiyun if (old_gpio != new_gpio) {
339*4882a593Smuzhiyun ice->gpio.set_data(ice, new_gpio);
340*4882a593Smuzhiyun return 1;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun /* no change */
343*4882a593Smuzhiyun return 0;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun static const struct snd_kcontrol_new juli_mute_controls[] = {
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
349*4882a593Smuzhiyun .name = "Master Playback Switch",
350*4882a593Smuzhiyun .info = juli_mute_info,
351*4882a593Smuzhiyun .get = juli_mute_get,
352*4882a593Smuzhiyun .put = juli_mute_put,
353*4882a593Smuzhiyun .private_value = GPIO_MUTE_CONTROL,
354*4882a593Smuzhiyun },
355*4882a593Smuzhiyun /* Although the following functionality respects the succint NDA'd
356*4882a593Smuzhiyun * documentation from the card manufacturer, and the same way of
357*4882a593Smuzhiyun * operation is coded in OSS Juli driver, only Digital Out monitor
358*4882a593Smuzhiyun * seems to work. Surprisingly, Analog input monitor outputs Digital
359*4882a593Smuzhiyun * output data. The two are independent, as enabling both doubles
360*4882a593Smuzhiyun * volume of the monitor sound.
361*4882a593Smuzhiyun *
362*4882a593Smuzhiyun * Checking traces on the board suggests the functionality described
363*4882a593Smuzhiyun * by the manufacturer is correct - I2S from ADC and AK4114
364*4882a593Smuzhiyun * go to ICE as well as to Xilinx, I2S inputs of DAC2,3,4 (the monitor
365*4882a593Smuzhiyun * inputs) are fed from Xilinx.
366*4882a593Smuzhiyun *
367*4882a593Smuzhiyun * I even checked traces on board and coded a support in driver for
368*4882a593Smuzhiyun * an alternative possibility - the unused I2S ICE output channels
369*4882a593Smuzhiyun * switched to HW-IN/SPDIF-IN and providing the monitoring signal to
370*4882a593Smuzhiyun * the DAC - to no avail. The I2S outputs seem to be unconnected.
371*4882a593Smuzhiyun *
372*4882a593Smuzhiyun * The windows driver supports the monitoring correctly.
373*4882a593Smuzhiyun */
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
376*4882a593Smuzhiyun .name = "Monitor Analog In Switch",
377*4882a593Smuzhiyun .info = juli_mute_info,
378*4882a593Smuzhiyun .get = juli_mute_get,
379*4882a593Smuzhiyun .put = juli_mute_put,
380*4882a593Smuzhiyun .private_value = GPIO_ANAIN_MONITOR,
381*4882a593Smuzhiyun },
382*4882a593Smuzhiyun {
383*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
384*4882a593Smuzhiyun .name = "Monitor Digital Out Switch",
385*4882a593Smuzhiyun .info = juli_mute_info,
386*4882a593Smuzhiyun .get = juli_mute_get,
387*4882a593Smuzhiyun .put = juli_mute_put,
388*4882a593Smuzhiyun .private_value = GPIO_DIGOUT_MONITOR,
389*4882a593Smuzhiyun },
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
392*4882a593Smuzhiyun .name = "Monitor Digital In Switch",
393*4882a593Smuzhiyun .info = juli_mute_info,
394*4882a593Smuzhiyun .get = juli_mute_get,
395*4882a593Smuzhiyun .put = juli_mute_put,
396*4882a593Smuzhiyun .private_value = GPIO_DIGIN_MONITOR,
397*4882a593Smuzhiyun },
398*4882a593Smuzhiyun };
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun static const char * const follower_vols[] = {
401*4882a593Smuzhiyun PCM_VOLUME,
402*4882a593Smuzhiyun MONITOR_AN_IN_VOLUME,
403*4882a593Smuzhiyun MONITOR_DIG_IN_VOLUME,
404*4882a593Smuzhiyun MONITOR_DIG_OUT_VOLUME,
405*4882a593Smuzhiyun NULL
406*4882a593Smuzhiyun };
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun static
409*4882a593Smuzhiyun DECLARE_TLV_DB_SCALE(juli_master_db_scale, -6350, 50, 1);
410*4882a593Smuzhiyun
ctl_find(struct snd_card * card,const char * name)411*4882a593Smuzhiyun static struct snd_kcontrol *ctl_find(struct snd_card *card,
412*4882a593Smuzhiyun const char *name)
413*4882a593Smuzhiyun {
414*4882a593Smuzhiyun struct snd_ctl_elem_id sid = {0};
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun strlcpy(sid.name, name, sizeof(sid.name));
417*4882a593Smuzhiyun sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
418*4882a593Smuzhiyun return snd_ctl_find_id(card, &sid);
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
add_followers(struct snd_card * card,struct snd_kcontrol * master,const char * const * list)421*4882a593Smuzhiyun static void add_followers(struct snd_card *card,
422*4882a593Smuzhiyun struct snd_kcontrol *master,
423*4882a593Smuzhiyun const char * const *list)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun for (; *list; list++) {
426*4882a593Smuzhiyun struct snd_kcontrol *follower = ctl_find(card, *list);
427*4882a593Smuzhiyun /* dev_dbg(card->dev, "add_followers - %s\n", *list); */
428*4882a593Smuzhiyun if (follower) {
429*4882a593Smuzhiyun /* dev_dbg(card->dev, "follower %s found\n", *list); */
430*4882a593Smuzhiyun snd_ctl_add_follower(master, follower);
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun
juli_add_controls(struct snd_ice1712 * ice)435*4882a593Smuzhiyun static int juli_add_controls(struct snd_ice1712 *ice)
436*4882a593Smuzhiyun {
437*4882a593Smuzhiyun struct juli_spec *spec = ice->spec;
438*4882a593Smuzhiyun int err;
439*4882a593Smuzhiyun unsigned int i;
440*4882a593Smuzhiyun struct snd_kcontrol *vmaster;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun err = snd_ice1712_akm4xxx_build_controls(ice);
443*4882a593Smuzhiyun if (err < 0)
444*4882a593Smuzhiyun return err;
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(juli_mute_controls); i++) {
447*4882a593Smuzhiyun err = snd_ctl_add(ice->card,
448*4882a593Smuzhiyun snd_ctl_new1(&juli_mute_controls[i], ice));
449*4882a593Smuzhiyun if (err < 0)
450*4882a593Smuzhiyun return err;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun /* Create virtual master control */
453*4882a593Smuzhiyun vmaster = snd_ctl_make_virtual_master("Master Playback Volume",
454*4882a593Smuzhiyun juli_master_db_scale);
455*4882a593Smuzhiyun if (!vmaster)
456*4882a593Smuzhiyun return -ENOMEM;
457*4882a593Smuzhiyun add_followers(ice->card, vmaster, follower_vols);
458*4882a593Smuzhiyun err = snd_ctl_add(ice->card, vmaster);
459*4882a593Smuzhiyun if (err < 0)
460*4882a593Smuzhiyun return err;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun /* only capture SPDIF over AK4114 */
463*4882a593Smuzhiyun return snd_ak4114_build(spec->ak4114, NULL,
464*4882a593Smuzhiyun ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun /*
468*4882a593Smuzhiyun * suspend/resume
469*4882a593Smuzhiyun * */
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
juli_resume(struct snd_ice1712 * ice)472*4882a593Smuzhiyun static int juli_resume(struct snd_ice1712 *ice)
473*4882a593Smuzhiyun {
474*4882a593Smuzhiyun struct snd_akm4xxx *ak = ice->akm;
475*4882a593Smuzhiyun struct juli_spec *spec = ice->spec;
476*4882a593Smuzhiyun /* akm4358 un-reset, un-mute */
477*4882a593Smuzhiyun snd_akm4xxx_reset(ak, 0);
478*4882a593Smuzhiyun /* reinit ak4114 */
479*4882a593Smuzhiyun snd_ak4114_resume(spec->ak4114);
480*4882a593Smuzhiyun return 0;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
juli_suspend(struct snd_ice1712 * ice)483*4882a593Smuzhiyun static int juli_suspend(struct snd_ice1712 *ice)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun struct snd_akm4xxx *ak = ice->akm;
486*4882a593Smuzhiyun struct juli_spec *spec = ice->spec;
487*4882a593Smuzhiyun /* akm4358 reset and soft-mute */
488*4882a593Smuzhiyun snd_akm4xxx_reset(ak, 1);
489*4882a593Smuzhiyun snd_ak4114_suspend(spec->ak4114);
490*4882a593Smuzhiyun return 0;
491*4882a593Smuzhiyun }
492*4882a593Smuzhiyun #endif
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun /*
495*4882a593Smuzhiyun * initialize the chip
496*4882a593Smuzhiyun */
497*4882a593Smuzhiyun
juli_is_spdif_master(struct snd_ice1712 * ice)498*4882a593Smuzhiyun static inline int juli_is_spdif_master(struct snd_ice1712 *ice)
499*4882a593Smuzhiyun {
500*4882a593Smuzhiyun return (ice->gpio.get_data(ice) & GPIO_INTERNAL_CLOCK) ? 0 : 1;
501*4882a593Smuzhiyun }
502*4882a593Smuzhiyun
juli_get_rate(struct snd_ice1712 * ice)503*4882a593Smuzhiyun static unsigned int juli_get_rate(struct snd_ice1712 *ice)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun int i;
506*4882a593Smuzhiyun unsigned char result;
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun result = ice->gpio.get_data(ice) & GPIO_RATE_MASK;
509*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(gpio_vals); i++)
510*4882a593Smuzhiyun if (gpio_vals[i] == result)
511*4882a593Smuzhiyun return juli_rates[i];
512*4882a593Smuzhiyun return 0;
513*4882a593Smuzhiyun }
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun /* setting new rate */
juli_set_rate(struct snd_ice1712 * ice,unsigned int rate)516*4882a593Smuzhiyun static void juli_set_rate(struct snd_ice1712 *ice, unsigned int rate)
517*4882a593Smuzhiyun {
518*4882a593Smuzhiyun unsigned int old, new;
519*4882a593Smuzhiyun unsigned char val;
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun old = ice->gpio.get_data(ice);
522*4882a593Smuzhiyun new = (old & ~GPIO_RATE_MASK) | get_gpio_val(rate);
523*4882a593Smuzhiyun /* dev_dbg(ice->card->dev, "JULI - set_rate: old %x, new %x\n",
524*4882a593Smuzhiyun old & GPIO_RATE_MASK,
525*4882a593Smuzhiyun new & GPIO_RATE_MASK); */
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun ice->gpio.set_data(ice, new);
528*4882a593Smuzhiyun /* switching to external clock - supplied by external circuits */
529*4882a593Smuzhiyun val = inb(ICEMT1724(ice, RATE));
530*4882a593Smuzhiyun outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
531*4882a593Smuzhiyun }
532*4882a593Smuzhiyun
juli_set_mclk(struct snd_ice1712 * ice,unsigned int rate)533*4882a593Smuzhiyun static inline unsigned char juli_set_mclk(struct snd_ice1712 *ice,
534*4882a593Smuzhiyun unsigned int rate)
535*4882a593Smuzhiyun {
536*4882a593Smuzhiyun /* no change in master clock */
537*4882a593Smuzhiyun return 0;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun /* setting clock to external - SPDIF */
juli_set_spdif_clock(struct snd_ice1712 * ice,int type)541*4882a593Smuzhiyun static int juli_set_spdif_clock(struct snd_ice1712 *ice, int type)
542*4882a593Smuzhiyun {
543*4882a593Smuzhiyun unsigned int old;
544*4882a593Smuzhiyun old = ice->gpio.get_data(ice);
545*4882a593Smuzhiyun /* external clock (= 0), multiply 1x, 48kHz */
546*4882a593Smuzhiyun ice->gpio.set_data(ice, (old & ~GPIO_RATE_MASK) | GPIO_MULTI_1X |
547*4882a593Smuzhiyun GPIO_FREQ_48KHZ);
548*4882a593Smuzhiyun return 0;
549*4882a593Smuzhiyun }
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun /* Called when ak4114 detects change in the input SPDIF stream */
juli_ak4114_change(struct ak4114 * ak4114,unsigned char c0,unsigned char c1)552*4882a593Smuzhiyun static void juli_ak4114_change(struct ak4114 *ak4114, unsigned char c0,
553*4882a593Smuzhiyun unsigned char c1)
554*4882a593Smuzhiyun {
555*4882a593Smuzhiyun struct snd_ice1712 *ice = ak4114->change_callback_private;
556*4882a593Smuzhiyun int rate;
557*4882a593Smuzhiyun if (ice->is_spdif_master(ice) && c1) {
558*4882a593Smuzhiyun /* only for SPDIF master mode, rate was changed */
559*4882a593Smuzhiyun rate = snd_ak4114_external_rate(ak4114);
560*4882a593Smuzhiyun /* dev_dbg(ice->card->dev, "ak4114 - input rate changed to %d\n",
561*4882a593Smuzhiyun rate); */
562*4882a593Smuzhiyun juli_akm_set_rate_val(ice->akm, rate);
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun
juli_init(struct snd_ice1712 * ice)566*4882a593Smuzhiyun static int juli_init(struct snd_ice1712 *ice)
567*4882a593Smuzhiyun {
568*4882a593Smuzhiyun static const unsigned char ak4114_init_vals[] = {
569*4882a593Smuzhiyun /* AK4117_REG_PWRDN */ AK4114_RST | AK4114_PWN |
570*4882a593Smuzhiyun AK4114_OCKS0 | AK4114_OCKS1,
571*4882a593Smuzhiyun /* AK4114_REQ_FORMAT */ AK4114_DIF_I24I2S,
572*4882a593Smuzhiyun /* AK4114_REG_IO0 */ AK4114_TX1E,
573*4882a593Smuzhiyun /* AK4114_REG_IO1 */ AK4114_EFH_1024 | AK4114_DIT |
574*4882a593Smuzhiyun AK4114_IPS(1),
575*4882a593Smuzhiyun /* AK4114_REG_INT0_MASK */ 0,
576*4882a593Smuzhiyun /* AK4114_REG_INT1_MASK */ 0
577*4882a593Smuzhiyun };
578*4882a593Smuzhiyun static const unsigned char ak4114_init_txcsb[] = {
579*4882a593Smuzhiyun 0x41, 0x02, 0x2c, 0x00, 0x00
580*4882a593Smuzhiyun };
581*4882a593Smuzhiyun int err;
582*4882a593Smuzhiyun struct juli_spec *spec;
583*4882a593Smuzhiyun struct snd_akm4xxx *ak;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun spec = kzalloc(sizeof(*spec), GFP_KERNEL);
586*4882a593Smuzhiyun if (!spec)
587*4882a593Smuzhiyun return -ENOMEM;
588*4882a593Smuzhiyun ice->spec = spec;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun err = snd_ak4114_create(ice->card,
591*4882a593Smuzhiyun juli_ak4114_read,
592*4882a593Smuzhiyun juli_ak4114_write,
593*4882a593Smuzhiyun ak4114_init_vals, ak4114_init_txcsb,
594*4882a593Smuzhiyun ice, &spec->ak4114);
595*4882a593Smuzhiyun if (err < 0)
596*4882a593Smuzhiyun return err;
597*4882a593Smuzhiyun /* callback for codecs rate setting */
598*4882a593Smuzhiyun spec->ak4114->change_callback = juli_ak4114_change;
599*4882a593Smuzhiyun spec->ak4114->change_callback_private = ice;
600*4882a593Smuzhiyun /* AK4114 in Juli can detect external rate correctly */
601*4882a593Smuzhiyun spec->ak4114->check_flags = 0;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun #if 0
604*4882a593Smuzhiyun /*
605*4882a593Smuzhiyun * it seems that the analog doughter board detection does not work reliably, so
606*4882a593Smuzhiyun * force the analog flag; it should be very rare (if ever) to come at Juli@
607*4882a593Smuzhiyun * used without the analog daughter board
608*4882a593Smuzhiyun */
609*4882a593Smuzhiyun spec->analog = (ice->gpio.get_data(ice) & GPIO_ANALOG_PRESENT) ? 0 : 1;
610*4882a593Smuzhiyun #else
611*4882a593Smuzhiyun spec->analog = 1;
612*4882a593Smuzhiyun #endif
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun if (spec->analog) {
615*4882a593Smuzhiyun dev_info(ice->card->dev, "juli@: analog I/O detected\n");
616*4882a593Smuzhiyun ice->num_total_dacs = 2;
617*4882a593Smuzhiyun ice->num_total_adcs = 2;
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
620*4882a593Smuzhiyun ak = ice->akm;
621*4882a593Smuzhiyun if (!ak)
622*4882a593Smuzhiyun return -ENOMEM;
623*4882a593Smuzhiyun ice->akm_codecs = 1;
624*4882a593Smuzhiyun err = snd_ice1712_akm4xxx_init(ak, &akm_juli_dac, NULL, ice);
625*4882a593Smuzhiyun if (err < 0)
626*4882a593Smuzhiyun return err;
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun /* juli is clocked by Xilinx array */
630*4882a593Smuzhiyun ice->hw_rates = &juli_rates_info;
631*4882a593Smuzhiyun ice->is_spdif_master = juli_is_spdif_master;
632*4882a593Smuzhiyun ice->get_rate = juli_get_rate;
633*4882a593Smuzhiyun ice->set_rate = juli_set_rate;
634*4882a593Smuzhiyun ice->set_mclk = juli_set_mclk;
635*4882a593Smuzhiyun ice->set_spdif_clock = juli_set_spdif_clock;
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun ice->spdif.ops.open = juli_spdif_in_open;
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
640*4882a593Smuzhiyun ice->pm_resume = juli_resume;
641*4882a593Smuzhiyun ice->pm_suspend = juli_suspend;
642*4882a593Smuzhiyun ice->pm_suspend_enabled = 1;
643*4882a593Smuzhiyun #endif
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun return 0;
646*4882a593Smuzhiyun }
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun /*
650*4882a593Smuzhiyun * Juli@ boards don't provide the EEPROM data except for the vendor IDs.
651*4882a593Smuzhiyun * hence the driver needs to sets up it properly.
652*4882a593Smuzhiyun */
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun static const unsigned char juli_eeprom[] = {
655*4882a593Smuzhiyun [ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, 1xADC, 1xDACs,
656*4882a593Smuzhiyun SPDIF in */
657*4882a593Smuzhiyun [ICE_EEP2_ACLINK] = 0x80, /* I2S */
658*4882a593Smuzhiyun [ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
659*4882a593Smuzhiyun [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
660*4882a593Smuzhiyun [ICE_EEP2_GPIO_DIR] = 0x9f, /* 5, 6:inputs; 7, 4-0 outputs*/
661*4882a593Smuzhiyun [ICE_EEP2_GPIO_DIR1] = 0xff,
662*4882a593Smuzhiyun [ICE_EEP2_GPIO_DIR2] = 0x7f,
663*4882a593Smuzhiyun [ICE_EEP2_GPIO_MASK] = 0x60, /* 5, 6: locked; 7, 4-0 writable */
664*4882a593Smuzhiyun [ICE_EEP2_GPIO_MASK1] = 0x00, /* 0-7 writable */
665*4882a593Smuzhiyun [ICE_EEP2_GPIO_MASK2] = 0x7f,
666*4882a593Smuzhiyun [ICE_EEP2_GPIO_STATE] = GPIO_FREQ_48KHZ | GPIO_MULTI_1X |
667*4882a593Smuzhiyun GPIO_INTERNAL_CLOCK, /* internal clock, multiple 1x, 48kHz*/
668*4882a593Smuzhiyun [ICE_EEP2_GPIO_STATE1] = 0x00, /* unmuted */
669*4882a593Smuzhiyun [ICE_EEP2_GPIO_STATE2] = 0x00,
670*4882a593Smuzhiyun };
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun /* entry point */
673*4882a593Smuzhiyun struct snd_ice1712_card_info snd_vt1724_juli_cards[] = {
674*4882a593Smuzhiyun {
675*4882a593Smuzhiyun .subvendor = VT1724_SUBDEVICE_JULI,
676*4882a593Smuzhiyun .name = "ESI Juli@",
677*4882a593Smuzhiyun .model = "juli",
678*4882a593Smuzhiyun .chip_init = juli_init,
679*4882a593Smuzhiyun .build_controls = juli_add_controls,
680*4882a593Smuzhiyun .eeprom_size = sizeof(juli_eeprom),
681*4882a593Smuzhiyun .eeprom_data = juli_eeprom,
682*4882a593Smuzhiyun },
683*4882a593Smuzhiyun { } /* terminator */
684*4882a593Smuzhiyun };
685