1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ALSA driver for ICEnsemble ICE1712 (Envy24)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Lowlevel functions for Hoontech STDSP24
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/mutex.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <sound/core.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include "ice1712.h"
19*4882a593Smuzhiyun #include "hoontech.h"
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun /* Hoontech-specific setting */
22*4882a593Smuzhiyun struct hoontech_spec {
23*4882a593Smuzhiyun unsigned char boxbits[4];
24*4882a593Smuzhiyun unsigned int config;
25*4882a593Smuzhiyun unsigned short boxconfig[4];
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun
snd_ice1712_stdsp24_gpio_write(struct snd_ice1712 * ice,unsigned char byte)28*4882a593Smuzhiyun static void snd_ice1712_stdsp24_gpio_write(struct snd_ice1712 *ice, unsigned char byte)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun byte |= ICE1712_STDSP24_CLOCK_BIT;
31*4882a593Smuzhiyun udelay(100);
32*4882a593Smuzhiyun snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
33*4882a593Smuzhiyun byte &= ~ICE1712_STDSP24_CLOCK_BIT;
34*4882a593Smuzhiyun udelay(100);
35*4882a593Smuzhiyun snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
36*4882a593Smuzhiyun byte |= ICE1712_STDSP24_CLOCK_BIT;
37*4882a593Smuzhiyun udelay(100);
38*4882a593Smuzhiyun snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
snd_ice1712_stdsp24_darear(struct snd_ice1712 * ice,int activate)41*4882a593Smuzhiyun static void snd_ice1712_stdsp24_darear(struct snd_ice1712 *ice, int activate)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun struct hoontech_spec *spec = ice->spec;
44*4882a593Smuzhiyun mutex_lock(&ice->gpio_mutex);
45*4882a593Smuzhiyun ICE1712_STDSP24_0_DAREAR(spec->boxbits, activate);
46*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
47*4882a593Smuzhiyun mutex_unlock(&ice->gpio_mutex);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
snd_ice1712_stdsp24_mute(struct snd_ice1712 * ice,int activate)50*4882a593Smuzhiyun static void snd_ice1712_stdsp24_mute(struct snd_ice1712 *ice, int activate)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun struct hoontech_spec *spec = ice->spec;
53*4882a593Smuzhiyun mutex_lock(&ice->gpio_mutex);
54*4882a593Smuzhiyun ICE1712_STDSP24_3_MUTE(spec->boxbits, activate);
55*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
56*4882a593Smuzhiyun mutex_unlock(&ice->gpio_mutex);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
snd_ice1712_stdsp24_insel(struct snd_ice1712 * ice,int activate)59*4882a593Smuzhiyun static void snd_ice1712_stdsp24_insel(struct snd_ice1712 *ice, int activate)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun struct hoontech_spec *spec = ice->spec;
62*4882a593Smuzhiyun mutex_lock(&ice->gpio_mutex);
63*4882a593Smuzhiyun ICE1712_STDSP24_3_INSEL(spec->boxbits, activate);
64*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
65*4882a593Smuzhiyun mutex_unlock(&ice->gpio_mutex);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
snd_ice1712_stdsp24_box_channel(struct snd_ice1712 * ice,int box,int chn,int activate)68*4882a593Smuzhiyun static void snd_ice1712_stdsp24_box_channel(struct snd_ice1712 *ice, int box, int chn, int activate)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun struct hoontech_spec *spec = ice->spec;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun mutex_lock(&ice->gpio_mutex);
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* select box */
75*4882a593Smuzhiyun ICE1712_STDSP24_0_BOX(spec->boxbits, box);
76*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /* prepare for write */
79*4882a593Smuzhiyun if (chn == 3)
80*4882a593Smuzhiyun ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
81*4882a593Smuzhiyun ICE1712_STDSP24_2_MIDI1(spec->boxbits, activate);
82*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
83*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
86*4882a593Smuzhiyun ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
87*4882a593Smuzhiyun ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
88*4882a593Smuzhiyun ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
89*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
90*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
91*4882a593Smuzhiyun udelay(100);
92*4882a593Smuzhiyun if (chn == 3) {
93*4882a593Smuzhiyun ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
94*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
95*4882a593Smuzhiyun } else {
96*4882a593Smuzhiyun switch (chn) {
97*4882a593Smuzhiyun case 0: ICE1712_STDSP24_1_CHN1(spec->boxbits, 0); break;
98*4882a593Smuzhiyun case 1: ICE1712_STDSP24_1_CHN2(spec->boxbits, 0); break;
99*4882a593Smuzhiyun case 2: ICE1712_STDSP24_1_CHN3(spec->boxbits, 0); break;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun udelay(100);
104*4882a593Smuzhiyun ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
105*4882a593Smuzhiyun ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
106*4882a593Smuzhiyun ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
107*4882a593Smuzhiyun ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
108*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
109*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
110*4882a593Smuzhiyun udelay(100);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
113*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun mutex_unlock(&ice->gpio_mutex);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
snd_ice1712_stdsp24_box_midi(struct snd_ice1712 * ice,int box,int master)118*4882a593Smuzhiyun static void snd_ice1712_stdsp24_box_midi(struct snd_ice1712 *ice, int box, int master)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun struct hoontech_spec *spec = ice->spec;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun mutex_lock(&ice->gpio_mutex);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* select box */
125*4882a593Smuzhiyun ICE1712_STDSP24_0_BOX(spec->boxbits, box);
126*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
129*4882a593Smuzhiyun ICE1712_STDSP24_2_MIDI1(spec->boxbits, master);
130*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
131*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun udelay(100);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 0);
136*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun mdelay(10);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
141*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun mutex_unlock(&ice->gpio_mutex);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
snd_ice1712_stdsp24_midi2(struct snd_ice1712 * ice,int activate)146*4882a593Smuzhiyun static void snd_ice1712_stdsp24_midi2(struct snd_ice1712 *ice, int activate)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun struct hoontech_spec *spec = ice->spec;
149*4882a593Smuzhiyun mutex_lock(&ice->gpio_mutex);
150*4882a593Smuzhiyun ICE1712_STDSP24_3_MIDI2(spec->boxbits, activate);
151*4882a593Smuzhiyun snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
152*4882a593Smuzhiyun mutex_unlock(&ice->gpio_mutex);
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
hoontech_init(struct snd_ice1712 * ice,bool staudio)155*4882a593Smuzhiyun static int hoontech_init(struct snd_ice1712 *ice, bool staudio)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun struct hoontech_spec *spec;
158*4882a593Smuzhiyun int box, chn;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun ice->num_total_dacs = 8;
161*4882a593Smuzhiyun ice->num_total_adcs = 8;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun spec = kzalloc(sizeof(*spec), GFP_KERNEL);
164*4882a593Smuzhiyun if (!spec)
165*4882a593Smuzhiyun return -ENOMEM;
166*4882a593Smuzhiyun ice->spec = spec;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun ICE1712_STDSP24_SET_ADDR(spec->boxbits, 0);
169*4882a593Smuzhiyun ICE1712_STDSP24_CLOCK(spec->boxbits, 0, 1);
170*4882a593Smuzhiyun ICE1712_STDSP24_0_BOX(spec->boxbits, 0);
171*4882a593Smuzhiyun ICE1712_STDSP24_0_DAREAR(spec->boxbits, 0);
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun ICE1712_STDSP24_SET_ADDR(spec->boxbits, 1);
174*4882a593Smuzhiyun ICE1712_STDSP24_CLOCK(spec->boxbits, 1, 1);
175*4882a593Smuzhiyun ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
176*4882a593Smuzhiyun ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
177*4882a593Smuzhiyun ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun ICE1712_STDSP24_SET_ADDR(spec->boxbits, 2);
180*4882a593Smuzhiyun ICE1712_STDSP24_CLOCK(spec->boxbits, 2, 1);
181*4882a593Smuzhiyun ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
182*4882a593Smuzhiyun ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
183*4882a593Smuzhiyun ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun ICE1712_STDSP24_SET_ADDR(spec->boxbits, 3);
186*4882a593Smuzhiyun ICE1712_STDSP24_CLOCK(spec->boxbits, 3, 1);
187*4882a593Smuzhiyun ICE1712_STDSP24_3_MIDI2(spec->boxbits, 0);
188*4882a593Smuzhiyun ICE1712_STDSP24_3_MUTE(spec->boxbits, 1);
189*4882a593Smuzhiyun ICE1712_STDSP24_3_INSEL(spec->boxbits, 0);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /* let's go - activate only functions in first box */
192*4882a593Smuzhiyun if (staudio)
193*4882a593Smuzhiyun spec->config = ICE1712_STDSP24_MUTE;
194*4882a593Smuzhiyun else
195*4882a593Smuzhiyun spec->config = 0;
196*4882a593Smuzhiyun /* ICE1712_STDSP24_MUTE |
197*4882a593Smuzhiyun ICE1712_STDSP24_INSEL |
198*4882a593Smuzhiyun ICE1712_STDSP24_DAREAR; */
199*4882a593Smuzhiyun /* These boxconfigs have caused problems in the past.
200*4882a593Smuzhiyun * The code is not optimal, but should now enable a working config to
201*4882a593Smuzhiyun * be achieved.
202*4882a593Smuzhiyun * ** MIDI IN can only be configured on one box **
203*4882a593Smuzhiyun * ICE1712_STDSP24_BOX_MIDI1 needs to be set for that box.
204*4882a593Smuzhiyun * Tests on a ADAC2000 box suggest the box config flags do not
205*4882a593Smuzhiyun * work as would be expected, and the inputs are crossed.
206*4882a593Smuzhiyun * Setting ICE1712_STDSP24_BOX_MIDI1 and ICE1712_STDSP24_BOX_MIDI2
207*4882a593Smuzhiyun * on the same box connects MIDI-In to both 401 uarts; both outputs
208*4882a593Smuzhiyun * are then active on all boxes.
209*4882a593Smuzhiyun * The default config here sets up everything on the first box.
210*4882a593Smuzhiyun * Alan Horstmann 5.2.2008
211*4882a593Smuzhiyun */
212*4882a593Smuzhiyun spec->boxconfig[0] = ICE1712_STDSP24_BOX_CHN1 |
213*4882a593Smuzhiyun ICE1712_STDSP24_BOX_CHN2 |
214*4882a593Smuzhiyun ICE1712_STDSP24_BOX_CHN3 |
215*4882a593Smuzhiyun ICE1712_STDSP24_BOX_CHN4 |
216*4882a593Smuzhiyun ICE1712_STDSP24_BOX_MIDI1 |
217*4882a593Smuzhiyun ICE1712_STDSP24_BOX_MIDI2;
218*4882a593Smuzhiyun if (staudio) {
219*4882a593Smuzhiyun spec->boxconfig[1] =
220*4882a593Smuzhiyun spec->boxconfig[2] =
221*4882a593Smuzhiyun spec->boxconfig[3] = spec->boxconfig[0];
222*4882a593Smuzhiyun } else {
223*4882a593Smuzhiyun spec->boxconfig[1] =
224*4882a593Smuzhiyun spec->boxconfig[2] =
225*4882a593Smuzhiyun spec->boxconfig[3] = 0;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun snd_ice1712_stdsp24_darear(ice,
229*4882a593Smuzhiyun (spec->config & ICE1712_STDSP24_DAREAR) ? 1 : 0);
230*4882a593Smuzhiyun snd_ice1712_stdsp24_mute(ice,
231*4882a593Smuzhiyun (spec->config & ICE1712_STDSP24_MUTE) ? 1 : 0);
232*4882a593Smuzhiyun snd_ice1712_stdsp24_insel(ice,
233*4882a593Smuzhiyun (spec->config & ICE1712_STDSP24_INSEL) ? 1 : 0);
234*4882a593Smuzhiyun for (box = 0; box < 4; box++) {
235*4882a593Smuzhiyun if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI2)
236*4882a593Smuzhiyun snd_ice1712_stdsp24_midi2(ice, 1);
237*4882a593Smuzhiyun for (chn = 0; chn < 4; chn++)
238*4882a593Smuzhiyun snd_ice1712_stdsp24_box_channel(ice, box, chn,
239*4882a593Smuzhiyun (spec->boxconfig[box] & (1 << chn)) ? 1 : 0);
240*4882a593Smuzhiyun if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI1)
241*4882a593Smuzhiyun snd_ice1712_stdsp24_box_midi(ice, box, 1);
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun return 0;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
snd_ice1712_hoontech_init(struct snd_ice1712 * ice)247*4882a593Smuzhiyun static int snd_ice1712_hoontech_init(struct snd_ice1712 *ice)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun return hoontech_init(ice, false);
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun
snd_ice1712_staudio_init(struct snd_ice1712 * ice)252*4882a593Smuzhiyun static int snd_ice1712_staudio_init(struct snd_ice1712 *ice)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun return hoontech_init(ice, true);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun /*
258*4882a593Smuzhiyun * AK4524 access
259*4882a593Smuzhiyun */
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun /* start callback for STDSP24 with modified hardware */
stdsp24_ak4524_lock(struct snd_akm4xxx * ak,int chip)262*4882a593Smuzhiyun static void stdsp24_ak4524_lock(struct snd_akm4xxx *ak, int chip)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun struct snd_ice1712 *ice = ak->private_data[0];
265*4882a593Smuzhiyun unsigned char tmp;
266*4882a593Smuzhiyun snd_ice1712_save_gpio_status(ice);
267*4882a593Smuzhiyun tmp = ICE1712_STDSP24_SERIAL_DATA |
268*4882a593Smuzhiyun ICE1712_STDSP24_SERIAL_CLOCK |
269*4882a593Smuzhiyun ICE1712_STDSP24_AK4524_CS;
270*4882a593Smuzhiyun snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
271*4882a593Smuzhiyun ice->gpio.direction | tmp);
272*4882a593Smuzhiyun snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
snd_ice1712_value_init(struct snd_ice1712 * ice)275*4882a593Smuzhiyun static int snd_ice1712_value_init(struct snd_ice1712 *ice)
276*4882a593Smuzhiyun {
277*4882a593Smuzhiyun /* Hoontech STDSP24 with modified hardware */
278*4882a593Smuzhiyun static const struct snd_akm4xxx akm_stdsp24_mv = {
279*4882a593Smuzhiyun .num_adcs = 2,
280*4882a593Smuzhiyun .num_dacs = 2,
281*4882a593Smuzhiyun .type = SND_AK4524,
282*4882a593Smuzhiyun .ops = {
283*4882a593Smuzhiyun .lock = stdsp24_ak4524_lock
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun };
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun static const struct snd_ak4xxx_private akm_stdsp24_mv_priv = {
288*4882a593Smuzhiyun .caddr = 2,
289*4882a593Smuzhiyun .cif = 1, /* CIF high */
290*4882a593Smuzhiyun .data_mask = ICE1712_STDSP24_SERIAL_DATA,
291*4882a593Smuzhiyun .clk_mask = ICE1712_STDSP24_SERIAL_CLOCK,
292*4882a593Smuzhiyun .cs_mask = ICE1712_STDSP24_AK4524_CS,
293*4882a593Smuzhiyun .cs_addr = ICE1712_STDSP24_AK4524_CS,
294*4882a593Smuzhiyun .cs_none = 0,
295*4882a593Smuzhiyun .add_flags = 0,
296*4882a593Smuzhiyun };
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun int err;
299*4882a593Smuzhiyun struct snd_akm4xxx *ak;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun /* set the analog DACs */
302*4882a593Smuzhiyun ice->num_total_dacs = 2;
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun /* set the analog ADCs */
305*4882a593Smuzhiyun ice->num_total_adcs = 2;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun /* analog section */
308*4882a593Smuzhiyun ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
309*4882a593Smuzhiyun if (! ak)
310*4882a593Smuzhiyun return -ENOMEM;
311*4882a593Smuzhiyun ice->akm_codecs = 1;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun err = snd_ice1712_akm4xxx_init(ak, &akm_stdsp24_mv, &akm_stdsp24_mv_priv, ice);
314*4882a593Smuzhiyun if (err < 0)
315*4882a593Smuzhiyun return err;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun /* ak4524 controls */
318*4882a593Smuzhiyun return snd_ice1712_akm4xxx_build_controls(ice);
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
snd_ice1712_ez8_init(struct snd_ice1712 * ice)321*4882a593Smuzhiyun static int snd_ice1712_ez8_init(struct snd_ice1712 *ice)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun ice->gpio.write_mask = ice->eeprom.gpiomask;
324*4882a593Smuzhiyun ice->gpio.direction = ice->eeprom.gpiodir;
325*4882a593Smuzhiyun snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ice->eeprom.gpiomask);
326*4882a593Smuzhiyun snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->eeprom.gpiodir);
327*4882a593Smuzhiyun snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ice->eeprom.gpiostate);
328*4882a593Smuzhiyun return 0;
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun /* entry point */
333*4882a593Smuzhiyun struct snd_ice1712_card_info snd_ice1712_hoontech_cards[] = {
334*4882a593Smuzhiyun {
335*4882a593Smuzhiyun .subvendor = ICE1712_SUBDEVICE_STDSP24,
336*4882a593Smuzhiyun .name = "Hoontech SoundTrack Audio DSP24",
337*4882a593Smuzhiyun .model = "dsp24",
338*4882a593Smuzhiyun .chip_init = snd_ice1712_hoontech_init,
339*4882a593Smuzhiyun .mpu401_1_name = "MIDI-1 Hoontech/STA DSP24",
340*4882a593Smuzhiyun .mpu401_2_name = "MIDI-2 Hoontech/STA DSP24",
341*4882a593Smuzhiyun },
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun .subvendor = ICE1712_SUBDEVICE_STDSP24_VALUE, /* a dummy id */
344*4882a593Smuzhiyun .name = "Hoontech SoundTrack Audio DSP24 Value",
345*4882a593Smuzhiyun .model = "dsp24_value",
346*4882a593Smuzhiyun .chip_init = snd_ice1712_value_init,
347*4882a593Smuzhiyun },
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun .subvendor = ICE1712_SUBDEVICE_STDSP24_MEDIA7_1,
350*4882a593Smuzhiyun .name = "Hoontech STA DSP24 Media 7.1",
351*4882a593Smuzhiyun .model = "dsp24_71",
352*4882a593Smuzhiyun .chip_init = snd_ice1712_hoontech_init,
353*4882a593Smuzhiyun },
354*4882a593Smuzhiyun {
355*4882a593Smuzhiyun .subvendor = ICE1712_SUBDEVICE_EVENT_EZ8, /* a dummy id */
356*4882a593Smuzhiyun .name = "Event Electronics EZ8",
357*4882a593Smuzhiyun .model = "ez8",
358*4882a593Smuzhiyun .chip_init = snd_ice1712_ez8_init,
359*4882a593Smuzhiyun },
360*4882a593Smuzhiyun {
361*4882a593Smuzhiyun /* STAudio ADCIII has the same SSID as Hoontech StA DSP24,
362*4882a593Smuzhiyun * thus identified only via the explicit model option
363*4882a593Smuzhiyun */
364*4882a593Smuzhiyun .subvendor = ICE1712_SUBDEVICE_STAUDIO_ADCIII, /* a dummy id */
365*4882a593Smuzhiyun .name = "STAudio ADCIII",
366*4882a593Smuzhiyun .model = "staudio",
367*4882a593Smuzhiyun .chip_init = snd_ice1712_staudio_init,
368*4882a593Smuzhiyun },
369*4882a593Smuzhiyun { } /* terminator */
370*4882a593Smuzhiyun };
371