xref: /OK3568_Linux_fs/kernel/sound/pci/ice1712/ews.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *   ALSA driver for ICEnsemble ICE1712 (Envy24)
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *   Lowlevel functions for Terratec EWS88MT/D, EWX24/96, DMX 6Fire
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  *	Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
8*4882a593Smuzhiyun  *                    2002 Takashi Iwai <tiwai@suse.de>
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <sound/core.h>
16*4882a593Smuzhiyun #include <sound/cs8427.h>
17*4882a593Smuzhiyun #include <sound/asoundef.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include "ice1712.h"
20*4882a593Smuzhiyun #include "ews.h"
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define SND_CS8404
23*4882a593Smuzhiyun #include <sound/cs8403.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun enum {
26*4882a593Smuzhiyun 	EWS_I2C_CS8404 = 0, EWS_I2C_PCF1, EWS_I2C_PCF2,
27*4882a593Smuzhiyun 	EWS_I2C_88D = 0,
28*4882a593Smuzhiyun 	EWS_I2C_6FIRE = 0
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /* additional i2c devices for EWS boards */
33*4882a593Smuzhiyun struct ews_spec {
34*4882a593Smuzhiyun 	struct snd_i2c_device *i2cdevs[3];
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun  * access via i2c mode (for EWX 24/96, EWS 88MT&D)
39*4882a593Smuzhiyun  */
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* send SDA and SCL */
ewx_i2c_setlines(struct snd_i2c_bus * bus,int clk,int data)42*4882a593Smuzhiyun static void ewx_i2c_setlines(struct snd_i2c_bus *bus, int clk, int data)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun 	struct snd_ice1712 *ice = bus->private_data;
45*4882a593Smuzhiyun 	unsigned char tmp = 0;
46*4882a593Smuzhiyun 	if (clk)
47*4882a593Smuzhiyun 		tmp |= ICE1712_EWX2496_SERIAL_CLOCK;
48*4882a593Smuzhiyun 	if (data)
49*4882a593Smuzhiyun 		tmp |= ICE1712_EWX2496_SERIAL_DATA;
50*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
51*4882a593Smuzhiyun 	udelay(5);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
ewx_i2c_getclock(struct snd_i2c_bus * bus)54*4882a593Smuzhiyun static int ewx_i2c_getclock(struct snd_i2c_bus *bus)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun 	struct snd_ice1712 *ice = bus->private_data;
57*4882a593Smuzhiyun 	return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_EWX2496_SERIAL_CLOCK ? 1 : 0;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
ewx_i2c_getdata(struct snd_i2c_bus * bus,int ack)60*4882a593Smuzhiyun static int ewx_i2c_getdata(struct snd_i2c_bus *bus, int ack)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	struct snd_ice1712 *ice = bus->private_data;
63*4882a593Smuzhiyun 	int bit;
64*4882a593Smuzhiyun 	/* set RW pin to low */
65*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~ICE1712_EWX2496_RW);
66*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 0);
67*4882a593Smuzhiyun 	if (ack)
68*4882a593Smuzhiyun 		udelay(5);
69*4882a593Smuzhiyun 	bit = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_EWX2496_SERIAL_DATA ? 1 : 0;
70*4882a593Smuzhiyun 	/* set RW pin to high */
71*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ICE1712_EWX2496_RW);
72*4882a593Smuzhiyun 	/* reset write mask */
73*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~ICE1712_EWX2496_SERIAL_CLOCK);
74*4882a593Smuzhiyun 	return bit;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun 
ewx_i2c_start(struct snd_i2c_bus * bus)77*4882a593Smuzhiyun static void ewx_i2c_start(struct snd_i2c_bus *bus)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	struct snd_ice1712 *ice = bus->private_data;
80*4882a593Smuzhiyun 	unsigned char mask;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	snd_ice1712_save_gpio_status(ice);
83*4882a593Smuzhiyun 	/* set RW high */
84*4882a593Smuzhiyun 	mask = ICE1712_EWX2496_RW;
85*4882a593Smuzhiyun 	switch (ice->eeprom.subvendor) {
86*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWX2496:
87*4882a593Smuzhiyun 		mask |= ICE1712_EWX2496_AK4524_CS; /* CS high also */
88*4882a593Smuzhiyun 		break;
89*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_DMX6FIRE:
90*4882a593Smuzhiyun 		mask |= ICE1712_6FIRE_AK4524_CS_MASK; /* CS high also */
91*4882a593Smuzhiyun 		break;
92*4882a593Smuzhiyun 	}
93*4882a593Smuzhiyun 	snd_ice1712_gpio_write_bits(ice, mask, mask);
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun 
ewx_i2c_stop(struct snd_i2c_bus * bus)96*4882a593Smuzhiyun static void ewx_i2c_stop(struct snd_i2c_bus *bus)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun 	struct snd_ice1712 *ice = bus->private_data;
99*4882a593Smuzhiyun 	snd_ice1712_restore_gpio_status(ice);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
ewx_i2c_direction(struct snd_i2c_bus * bus,int clock,int data)102*4882a593Smuzhiyun static void ewx_i2c_direction(struct snd_i2c_bus *bus, int clock, int data)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun 	struct snd_ice1712 *ice = bus->private_data;
105*4882a593Smuzhiyun 	unsigned char mask = 0;
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	if (clock)
108*4882a593Smuzhiyun 		mask |= ICE1712_EWX2496_SERIAL_CLOCK; /* write SCL */
109*4882a593Smuzhiyun 	if (data)
110*4882a593Smuzhiyun 		mask |= ICE1712_EWX2496_SERIAL_DATA; /* write SDA */
111*4882a593Smuzhiyun 	ice->gpio.direction &= ~(ICE1712_EWX2496_SERIAL_CLOCK|ICE1712_EWX2496_SERIAL_DATA);
112*4882a593Smuzhiyun 	ice->gpio.direction |= mask;
113*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->gpio.direction);
114*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~mask);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun static struct snd_i2c_bit_ops snd_ice1712_ewx_cs8427_bit_ops = {
118*4882a593Smuzhiyun 	.start = ewx_i2c_start,
119*4882a593Smuzhiyun 	.stop = ewx_i2c_stop,
120*4882a593Smuzhiyun 	.direction = ewx_i2c_direction,
121*4882a593Smuzhiyun 	.setlines = ewx_i2c_setlines,
122*4882a593Smuzhiyun 	.getclock = ewx_i2c_getclock,
123*4882a593Smuzhiyun 	.getdata = ewx_i2c_getdata,
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun /*
128*4882a593Smuzhiyun  * AK4524 access
129*4882a593Smuzhiyun  */
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /* AK4524 chip select; address 0x48 bit 0-3 */
snd_ice1712_ews88mt_chip_select(struct snd_ice1712 * ice,int chip_mask)132*4882a593Smuzhiyun static int snd_ice1712_ews88mt_chip_select(struct snd_ice1712 *ice, int chip_mask)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	struct ews_spec *spec = ice->spec;
135*4882a593Smuzhiyun 	unsigned char data, ndata;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	if (snd_BUG_ON(chip_mask < 0 || chip_mask > 0x0f))
138*4882a593Smuzhiyun 		return -EINVAL;
139*4882a593Smuzhiyun 	snd_i2c_lock(ice->i2c);
140*4882a593Smuzhiyun 	if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_PCF2], &data, 1) != 1)
141*4882a593Smuzhiyun 		goto __error;
142*4882a593Smuzhiyun 	ndata = (data & 0xf0) | chip_mask;
143*4882a593Smuzhiyun 	if (ndata != data)
144*4882a593Smuzhiyun 		if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_PCF2], &ndata, 1)
145*4882a593Smuzhiyun 		    != 1)
146*4882a593Smuzhiyun 			goto __error;
147*4882a593Smuzhiyun 	snd_i2c_unlock(ice->i2c);
148*4882a593Smuzhiyun 	return 0;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun      __error:
151*4882a593Smuzhiyun 	snd_i2c_unlock(ice->i2c);
152*4882a593Smuzhiyun 	dev_err(ice->card->dev,
153*4882a593Smuzhiyun 		"AK4524 chip select failed, check cable to the front module\n");
154*4882a593Smuzhiyun 	return -EIO;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun /* start callback for EWS88MT, needs to select a certain chip mask */
ews88mt_ak4524_lock(struct snd_akm4xxx * ak,int chip)158*4882a593Smuzhiyun static void ews88mt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun 	struct snd_ice1712 *ice = ak->private_data[0];
161*4882a593Smuzhiyun 	unsigned char tmp;
162*4882a593Smuzhiyun 	/* assert AK4524 CS */
163*4882a593Smuzhiyun 	if (snd_ice1712_ews88mt_chip_select(ice, ~(1 << chip) & 0x0f) < 0)
164*4882a593Smuzhiyun 		dev_err(ice->card->dev, "fatal error (ews88mt chip select)\n");
165*4882a593Smuzhiyun 	snd_ice1712_save_gpio_status(ice);
166*4882a593Smuzhiyun 	tmp = ICE1712_EWS88_SERIAL_DATA |
167*4882a593Smuzhiyun 		ICE1712_EWS88_SERIAL_CLOCK |
168*4882a593Smuzhiyun 		ICE1712_EWS88_RW;
169*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
170*4882a593Smuzhiyun 			  ice->gpio.direction | tmp);
171*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun /* stop callback for EWS88MT, needs to deselect chip mask */
ews88mt_ak4524_unlock(struct snd_akm4xxx * ak,int chip)175*4882a593Smuzhiyun static void ews88mt_ak4524_unlock(struct snd_akm4xxx *ak, int chip)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	struct snd_ice1712 *ice = ak->private_data[0];
178*4882a593Smuzhiyun 	snd_ice1712_restore_gpio_status(ice);
179*4882a593Smuzhiyun 	udelay(1);
180*4882a593Smuzhiyun 	snd_ice1712_ews88mt_chip_select(ice, 0x0f);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun /* start callback for EWX24/96 */
ewx2496_ak4524_lock(struct snd_akm4xxx * ak,int chip)184*4882a593Smuzhiyun static void ewx2496_ak4524_lock(struct snd_akm4xxx *ak, int chip)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun 	struct snd_ice1712 *ice = ak->private_data[0];
187*4882a593Smuzhiyun 	unsigned char tmp;
188*4882a593Smuzhiyun 	snd_ice1712_save_gpio_status(ice);
189*4882a593Smuzhiyun 	tmp =  ICE1712_EWX2496_SERIAL_DATA |
190*4882a593Smuzhiyun 		ICE1712_EWX2496_SERIAL_CLOCK |
191*4882a593Smuzhiyun 		ICE1712_EWX2496_AK4524_CS |
192*4882a593Smuzhiyun 		ICE1712_EWX2496_RW;
193*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
194*4882a593Smuzhiyun 			  ice->gpio.direction | tmp);
195*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun /* start callback for DMX 6fire */
dmx6fire_ak4524_lock(struct snd_akm4xxx * ak,int chip)199*4882a593Smuzhiyun static void dmx6fire_ak4524_lock(struct snd_akm4xxx *ak, int chip)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun 	struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
202*4882a593Smuzhiyun 	struct snd_ice1712 *ice = ak->private_data[0];
203*4882a593Smuzhiyun 	unsigned char tmp;
204*4882a593Smuzhiyun 	snd_ice1712_save_gpio_status(ice);
205*4882a593Smuzhiyun 	tmp = priv->cs_mask = priv->cs_addr = (1 << chip) & ICE1712_6FIRE_AK4524_CS_MASK;
206*4882a593Smuzhiyun 	tmp |= ICE1712_6FIRE_SERIAL_DATA |
207*4882a593Smuzhiyun 		ICE1712_6FIRE_SERIAL_CLOCK |
208*4882a593Smuzhiyun 		ICE1712_6FIRE_RW;
209*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
210*4882a593Smuzhiyun 			  ice->gpio.direction | tmp);
211*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun /*
215*4882a593Smuzhiyun  * CS8404 interface on EWS88MT/D
216*4882a593Smuzhiyun  */
217*4882a593Smuzhiyun 
snd_ice1712_ews_cs8404_spdif_write(struct snd_ice1712 * ice,unsigned char bits)218*4882a593Smuzhiyun static void snd_ice1712_ews_cs8404_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun 	struct ews_spec *spec = ice->spec;
221*4882a593Smuzhiyun 	unsigned char bytes[2];
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	snd_i2c_lock(ice->i2c);
224*4882a593Smuzhiyun 	switch (ice->eeprom.subvendor) {
225*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT:
226*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT_NEW:
227*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_PHASE88:
228*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_TS88:
229*4882a593Smuzhiyun 		if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_CS8404], &bits, 1)
230*4882a593Smuzhiyun 		    != 1)
231*4882a593Smuzhiyun 			goto _error;
232*4882a593Smuzhiyun 		break;
233*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88D:
234*4882a593Smuzhiyun 		if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_88D], bytes, 2)
235*4882a593Smuzhiyun 		    != 2)
236*4882a593Smuzhiyun 			goto _error;
237*4882a593Smuzhiyun 		if (bits != bytes[1]) {
238*4882a593Smuzhiyun 			bytes[1] = bits;
239*4882a593Smuzhiyun 			if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_88D],
240*4882a593Smuzhiyun 					      bytes, 2) != 2)
241*4882a593Smuzhiyun 				goto _error;
242*4882a593Smuzhiyun 		}
243*4882a593Smuzhiyun 		break;
244*4882a593Smuzhiyun 	}
245*4882a593Smuzhiyun  _error:
246*4882a593Smuzhiyun 	snd_i2c_unlock(ice->i2c);
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun /*
250*4882a593Smuzhiyun  */
251*4882a593Smuzhiyun 
ews88_spdif_default_get(struct snd_ice1712 * ice,struct snd_ctl_elem_value * ucontrol)252*4882a593Smuzhiyun static void ews88_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun 	snd_cs8404_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun 
ews88_spdif_default_put(struct snd_ice1712 * ice,struct snd_ctl_elem_value * ucontrol)257*4882a593Smuzhiyun static int ews88_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun 	unsigned int val;
260*4882a593Smuzhiyun 	int change;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	val = snd_cs8404_encode_spdif_bits(&ucontrol->value.iec958);
263*4882a593Smuzhiyun 	spin_lock_irq(&ice->reg_lock);
264*4882a593Smuzhiyun 	change = ice->spdif.cs8403_bits != val;
265*4882a593Smuzhiyun 	ice->spdif.cs8403_bits = val;
266*4882a593Smuzhiyun 	if (change && ice->playback_pro_substream == NULL) {
267*4882a593Smuzhiyun 		spin_unlock_irq(&ice->reg_lock);
268*4882a593Smuzhiyun 		snd_ice1712_ews_cs8404_spdif_write(ice, val);
269*4882a593Smuzhiyun 	} else {
270*4882a593Smuzhiyun 		spin_unlock_irq(&ice->reg_lock);
271*4882a593Smuzhiyun 	}
272*4882a593Smuzhiyun 	return change;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun 
ews88_spdif_stream_get(struct snd_ice1712 * ice,struct snd_ctl_elem_value * ucontrol)275*4882a593Smuzhiyun static void ews88_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
276*4882a593Smuzhiyun {
277*4882a593Smuzhiyun 	snd_cs8404_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun 
ews88_spdif_stream_put(struct snd_ice1712 * ice,struct snd_ctl_elem_value * ucontrol)280*4882a593Smuzhiyun static int ews88_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
281*4882a593Smuzhiyun {
282*4882a593Smuzhiyun 	unsigned int val;
283*4882a593Smuzhiyun 	int change;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	val = snd_cs8404_encode_spdif_bits(&ucontrol->value.iec958);
286*4882a593Smuzhiyun 	spin_lock_irq(&ice->reg_lock);
287*4882a593Smuzhiyun 	change = ice->spdif.cs8403_stream_bits != val;
288*4882a593Smuzhiyun 	ice->spdif.cs8403_stream_bits = val;
289*4882a593Smuzhiyun 	if (change && ice->playback_pro_substream != NULL) {
290*4882a593Smuzhiyun 		spin_unlock_irq(&ice->reg_lock);
291*4882a593Smuzhiyun 		snd_ice1712_ews_cs8404_spdif_write(ice, val);
292*4882a593Smuzhiyun 	} else {
293*4882a593Smuzhiyun 		spin_unlock_irq(&ice->reg_lock);
294*4882a593Smuzhiyun 	}
295*4882a593Smuzhiyun 	return change;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun /* open callback */
ews88_open_spdif(struct snd_ice1712 * ice,struct snd_pcm_substream * substream)300*4882a593Smuzhiyun static void ews88_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun 	ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun /* set up SPDIF for EWS88MT / EWS88D */
ews88_setup_spdif(struct snd_ice1712 * ice,int rate)306*4882a593Smuzhiyun static void ews88_setup_spdif(struct snd_ice1712 *ice, int rate)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun 	unsigned long flags;
309*4882a593Smuzhiyun 	unsigned char tmp;
310*4882a593Smuzhiyun 	int change;
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	spin_lock_irqsave(&ice->reg_lock, flags);
313*4882a593Smuzhiyun 	tmp = ice->spdif.cs8403_stream_bits;
314*4882a593Smuzhiyun 	if (tmp & 0x10)		/* consumer */
315*4882a593Smuzhiyun 		tmp &= (tmp & 0x01) ? ~0x06 : ~0x60;
316*4882a593Smuzhiyun 	switch (rate) {
317*4882a593Smuzhiyun 	case 32000: tmp |= (tmp & 0x01) ? 0x02 : 0x00; break;
318*4882a593Smuzhiyun 	case 44100: tmp |= (tmp & 0x01) ? 0x06 : 0x40; break;
319*4882a593Smuzhiyun 	case 48000: tmp |= (tmp & 0x01) ? 0x04 : 0x20; break;
320*4882a593Smuzhiyun 	default: tmp |= (tmp & 0x01) ? 0x06 : 0x40; break;
321*4882a593Smuzhiyun 	}
322*4882a593Smuzhiyun 	change = ice->spdif.cs8403_stream_bits != tmp;
323*4882a593Smuzhiyun 	ice->spdif.cs8403_stream_bits = tmp;
324*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ice->reg_lock, flags);
325*4882a593Smuzhiyun 	if (change)
326*4882a593Smuzhiyun 		snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
327*4882a593Smuzhiyun 	snd_ice1712_ews_cs8404_spdif_write(ice, tmp);
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun /*
332*4882a593Smuzhiyun  */
333*4882a593Smuzhiyun static const struct snd_akm4xxx akm_ews88mt = {
334*4882a593Smuzhiyun 	.num_adcs = 8,
335*4882a593Smuzhiyun 	.num_dacs = 8,
336*4882a593Smuzhiyun 	.type = SND_AK4524,
337*4882a593Smuzhiyun 	.ops = {
338*4882a593Smuzhiyun 		.lock = ews88mt_ak4524_lock,
339*4882a593Smuzhiyun 		.unlock = ews88mt_ak4524_unlock
340*4882a593Smuzhiyun 	}
341*4882a593Smuzhiyun };
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun static const struct snd_ak4xxx_private akm_ews88mt_priv = {
344*4882a593Smuzhiyun 	.caddr = 2,
345*4882a593Smuzhiyun 	.cif = 1, /* CIF high */
346*4882a593Smuzhiyun 	.data_mask = ICE1712_EWS88_SERIAL_DATA,
347*4882a593Smuzhiyun 	.clk_mask = ICE1712_EWS88_SERIAL_CLOCK,
348*4882a593Smuzhiyun 	.cs_mask = 0,
349*4882a593Smuzhiyun 	.cs_addr = 0,
350*4882a593Smuzhiyun 	.cs_none = 0, /* no chip select on gpio */
351*4882a593Smuzhiyun 	.add_flags = ICE1712_EWS88_RW, /* set rw bit high */
352*4882a593Smuzhiyun 	.mask_flags = 0,
353*4882a593Smuzhiyun };
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun static const struct snd_akm4xxx akm_ewx2496 = {
356*4882a593Smuzhiyun 	.num_adcs = 2,
357*4882a593Smuzhiyun 	.num_dacs = 2,
358*4882a593Smuzhiyun 	.type = SND_AK4524,
359*4882a593Smuzhiyun 	.ops = {
360*4882a593Smuzhiyun 		.lock = ewx2496_ak4524_lock
361*4882a593Smuzhiyun 	}
362*4882a593Smuzhiyun };
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun static const struct snd_ak4xxx_private akm_ewx2496_priv = {
365*4882a593Smuzhiyun 	.caddr = 2,
366*4882a593Smuzhiyun 	.cif = 1, /* CIF high */
367*4882a593Smuzhiyun 	.data_mask = ICE1712_EWS88_SERIAL_DATA,
368*4882a593Smuzhiyun 	.clk_mask = ICE1712_EWS88_SERIAL_CLOCK,
369*4882a593Smuzhiyun 	.cs_mask = ICE1712_EWX2496_AK4524_CS,
370*4882a593Smuzhiyun 	.cs_addr = ICE1712_EWX2496_AK4524_CS,
371*4882a593Smuzhiyun 	.cs_none = 0,
372*4882a593Smuzhiyun 	.add_flags = ICE1712_EWS88_RW, /* set rw bit high */
373*4882a593Smuzhiyun 	.mask_flags = 0,
374*4882a593Smuzhiyun };
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun static const struct snd_akm4xxx akm_6fire = {
377*4882a593Smuzhiyun 	.num_adcs = 6,
378*4882a593Smuzhiyun 	.num_dacs = 6,
379*4882a593Smuzhiyun 	.type = SND_AK4524,
380*4882a593Smuzhiyun 	.ops = {
381*4882a593Smuzhiyun 		.lock = dmx6fire_ak4524_lock
382*4882a593Smuzhiyun 	}
383*4882a593Smuzhiyun };
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun static const struct snd_ak4xxx_private akm_6fire_priv = {
386*4882a593Smuzhiyun 	.caddr = 2,
387*4882a593Smuzhiyun 	.cif = 1, /* CIF high */
388*4882a593Smuzhiyun 	.data_mask = ICE1712_6FIRE_SERIAL_DATA,
389*4882a593Smuzhiyun 	.clk_mask = ICE1712_6FIRE_SERIAL_CLOCK,
390*4882a593Smuzhiyun 	.cs_mask = 0,
391*4882a593Smuzhiyun 	.cs_addr = 0, /* set later */
392*4882a593Smuzhiyun 	.cs_none = 0,
393*4882a593Smuzhiyun 	.add_flags = ICE1712_6FIRE_RW, /* set rw bit high */
394*4882a593Smuzhiyun 	.mask_flags = 0,
395*4882a593Smuzhiyun };
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun /*
398*4882a593Smuzhiyun  * initialize the chip
399*4882a593Smuzhiyun  */
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun /* 6fire specific */
402*4882a593Smuzhiyun #define PCF9554_REG_INPUT      0
403*4882a593Smuzhiyun #define PCF9554_REG_OUTPUT     1
404*4882a593Smuzhiyun #define PCF9554_REG_POLARITY   2
405*4882a593Smuzhiyun #define PCF9554_REG_CONFIG     3
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun static int snd_ice1712_6fire_write_pca(struct snd_ice1712 *ice, unsigned char reg, unsigned char data);
408*4882a593Smuzhiyun 
snd_ice1712_ews_init(struct snd_ice1712 * ice)409*4882a593Smuzhiyun static int snd_ice1712_ews_init(struct snd_ice1712 *ice)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun 	int err;
412*4882a593Smuzhiyun 	struct snd_akm4xxx *ak;
413*4882a593Smuzhiyun 	struct ews_spec *spec;
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	/* set the analog DACs */
416*4882a593Smuzhiyun 	switch (ice->eeprom.subvendor) {
417*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWX2496:
418*4882a593Smuzhiyun 		ice->num_total_dacs = 2;
419*4882a593Smuzhiyun 		ice->num_total_adcs = 2;
420*4882a593Smuzhiyun 		break;
421*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT:
422*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT_NEW:
423*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_PHASE88:
424*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_TS88:
425*4882a593Smuzhiyun 		ice->num_total_dacs = 8;
426*4882a593Smuzhiyun 		ice->num_total_adcs = 8;
427*4882a593Smuzhiyun 		break;
428*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88D:
429*4882a593Smuzhiyun 		/* Note: not analog but ADAT I/O */
430*4882a593Smuzhiyun 		ice->num_total_dacs = 8;
431*4882a593Smuzhiyun 		ice->num_total_adcs = 8;
432*4882a593Smuzhiyun 		break;
433*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_DMX6FIRE:
434*4882a593Smuzhiyun 		ice->num_total_dacs = 6;
435*4882a593Smuzhiyun 		ice->num_total_adcs = 6;
436*4882a593Smuzhiyun 		break;
437*4882a593Smuzhiyun 	}
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	spec = kzalloc(sizeof(*spec), GFP_KERNEL);
440*4882a593Smuzhiyun 	if (!spec)
441*4882a593Smuzhiyun 		return -ENOMEM;
442*4882a593Smuzhiyun 	ice->spec = spec;
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 	/* create i2c */
445*4882a593Smuzhiyun 	if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) {
446*4882a593Smuzhiyun 		dev_err(ice->card->dev, "unable to create I2C bus\n");
447*4882a593Smuzhiyun 		return err;
448*4882a593Smuzhiyun 	}
449*4882a593Smuzhiyun 	ice->i2c->private_data = ice;
450*4882a593Smuzhiyun 	ice->i2c->hw_ops.bit = &snd_ice1712_ewx_cs8427_bit_ops;
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	/* create i2c devices */
453*4882a593Smuzhiyun 	switch (ice->eeprom.subvendor) {
454*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_DMX6FIRE:
455*4882a593Smuzhiyun 		err = snd_i2c_device_create(ice->i2c, "PCF9554",
456*4882a593Smuzhiyun 					    ICE1712_6FIRE_PCF9554_ADDR,
457*4882a593Smuzhiyun 					    &spec->i2cdevs[EWS_I2C_6FIRE]);
458*4882a593Smuzhiyun 		if (err < 0) {
459*4882a593Smuzhiyun 			dev_err(ice->card->dev,
460*4882a593Smuzhiyun 				"PCF9554 initialization failed\n");
461*4882a593Smuzhiyun 			return err;
462*4882a593Smuzhiyun 		}
463*4882a593Smuzhiyun 		snd_ice1712_6fire_write_pca(ice, PCF9554_REG_CONFIG, 0x80);
464*4882a593Smuzhiyun 		break;
465*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT:
466*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT_NEW:
467*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_PHASE88:
468*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_TS88:
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 		err = snd_i2c_device_create(ice->i2c, "CS8404",
471*4882a593Smuzhiyun 					    ICE1712_EWS88MT_CS8404_ADDR,
472*4882a593Smuzhiyun 					    &spec->i2cdevs[EWS_I2C_CS8404]);
473*4882a593Smuzhiyun 		if (err < 0)
474*4882a593Smuzhiyun 			return err;
475*4882a593Smuzhiyun 		err = snd_i2c_device_create(ice->i2c, "PCF8574 (1st)",
476*4882a593Smuzhiyun 					    ICE1712_EWS88MT_INPUT_ADDR,
477*4882a593Smuzhiyun 					    &spec->i2cdevs[EWS_I2C_PCF1]);
478*4882a593Smuzhiyun 		if (err < 0)
479*4882a593Smuzhiyun 			return err;
480*4882a593Smuzhiyun 		err = snd_i2c_device_create(ice->i2c, "PCF8574 (2nd)",
481*4882a593Smuzhiyun 					    ICE1712_EWS88MT_OUTPUT_ADDR,
482*4882a593Smuzhiyun 					    &spec->i2cdevs[EWS_I2C_PCF2]);
483*4882a593Smuzhiyun 		if (err < 0)
484*4882a593Smuzhiyun 			return err;
485*4882a593Smuzhiyun 		/* Check if the front module is connected */
486*4882a593Smuzhiyun 		if ((err = snd_ice1712_ews88mt_chip_select(ice, 0x0f)) < 0)
487*4882a593Smuzhiyun 			return err;
488*4882a593Smuzhiyun 		break;
489*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88D:
490*4882a593Smuzhiyun 		err = snd_i2c_device_create(ice->i2c, "PCF8575",
491*4882a593Smuzhiyun 					    ICE1712_EWS88D_PCF_ADDR,
492*4882a593Smuzhiyun 					    &spec->i2cdevs[EWS_I2C_88D]);
493*4882a593Smuzhiyun 		if (err < 0)
494*4882a593Smuzhiyun 			return err;
495*4882a593Smuzhiyun 		break;
496*4882a593Smuzhiyun 	}
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	/* set up SPDIF interface */
499*4882a593Smuzhiyun 	switch (ice->eeprom.subvendor) {
500*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWX2496:
501*4882a593Smuzhiyun 		if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0)
502*4882a593Smuzhiyun 			return err;
503*4882a593Smuzhiyun 		snd_cs8427_reg_write(ice->cs8427, CS8427_REG_RECVERRMASK, CS8427_UNLOCK | CS8427_CONF | CS8427_BIP | CS8427_PAR);
504*4882a593Smuzhiyun 		break;
505*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_DMX6FIRE:
506*4882a593Smuzhiyun 		if ((err = snd_ice1712_init_cs8427(ice, ICE1712_6FIRE_CS8427_ADDR)) < 0)
507*4882a593Smuzhiyun 			return err;
508*4882a593Smuzhiyun 		snd_cs8427_reg_write(ice->cs8427, CS8427_REG_RECVERRMASK, CS8427_UNLOCK | CS8427_CONF | CS8427_BIP | CS8427_PAR);
509*4882a593Smuzhiyun 		break;
510*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT:
511*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT_NEW:
512*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_PHASE88:
513*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_TS88:
514*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88D:
515*4882a593Smuzhiyun 		/* set up CS8404 */
516*4882a593Smuzhiyun 		ice->spdif.ops.open = ews88_open_spdif;
517*4882a593Smuzhiyun 		ice->spdif.ops.setup_rate = ews88_setup_spdif;
518*4882a593Smuzhiyun 		ice->spdif.ops.default_get = ews88_spdif_default_get;
519*4882a593Smuzhiyun 		ice->spdif.ops.default_put = ews88_spdif_default_put;
520*4882a593Smuzhiyun 		ice->spdif.ops.stream_get = ews88_spdif_stream_get;
521*4882a593Smuzhiyun 		ice->spdif.ops.stream_put = ews88_spdif_stream_put;
522*4882a593Smuzhiyun 		/* Set spdif defaults */
523*4882a593Smuzhiyun 		snd_ice1712_ews_cs8404_spdif_write(ice, ice->spdif.cs8403_bits);
524*4882a593Smuzhiyun 		break;
525*4882a593Smuzhiyun 	}
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	/* no analog? */
528*4882a593Smuzhiyun 	switch (ice->eeprom.subvendor) {
529*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88D:
530*4882a593Smuzhiyun 		return 0;
531*4882a593Smuzhiyun 	}
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	/* analog section */
534*4882a593Smuzhiyun 	ak = ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
535*4882a593Smuzhiyun 	if (! ak)
536*4882a593Smuzhiyun 		return -ENOMEM;
537*4882a593Smuzhiyun 	ice->akm_codecs = 1;
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	switch (ice->eeprom.subvendor) {
540*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT:
541*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT_NEW:
542*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_PHASE88:
543*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_TS88:
544*4882a593Smuzhiyun 		err = snd_ice1712_akm4xxx_init(ak, &akm_ews88mt, &akm_ews88mt_priv, ice);
545*4882a593Smuzhiyun 		break;
546*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWX2496:
547*4882a593Smuzhiyun 		err = snd_ice1712_akm4xxx_init(ak, &akm_ewx2496, &akm_ewx2496_priv, ice);
548*4882a593Smuzhiyun 		break;
549*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_DMX6FIRE:
550*4882a593Smuzhiyun 		err = snd_ice1712_akm4xxx_init(ak, &akm_6fire, &akm_6fire_priv, ice);
551*4882a593Smuzhiyun 		break;
552*4882a593Smuzhiyun 	default:
553*4882a593Smuzhiyun 		err = 0;
554*4882a593Smuzhiyun 	}
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	return err;
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun /*
560*4882a593Smuzhiyun  * EWX 24/96 specific controls
561*4882a593Smuzhiyun  */
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun /* i/o sensitivity - this callback is shared among other devices, too */
snd_ice1712_ewx_io_sense_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)564*4882a593Smuzhiyun static int snd_ice1712_ewx_io_sense_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo){
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 	static const char * const texts[2] = {
567*4882a593Smuzhiyun 		"+4dBu", "-10dBV",
568*4882a593Smuzhiyun 	};
569*4882a593Smuzhiyun 	return snd_ctl_enum_info(uinfo, 1, 2, texts);
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun 
snd_ice1712_ewx_io_sense_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)572*4882a593Smuzhiyun static int snd_ice1712_ewx_io_sense_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
573*4882a593Smuzhiyun {
574*4882a593Smuzhiyun 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
575*4882a593Smuzhiyun 	unsigned char mask = kcontrol->private_value & 0xff;
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 	snd_ice1712_save_gpio_status(ice);
578*4882a593Smuzhiyun 	ucontrol->value.enumerated.item[0] = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & mask ? 1 : 0;
579*4882a593Smuzhiyun 	snd_ice1712_restore_gpio_status(ice);
580*4882a593Smuzhiyun 	return 0;
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun 
snd_ice1712_ewx_io_sense_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)583*4882a593Smuzhiyun static int snd_ice1712_ewx_io_sense_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
584*4882a593Smuzhiyun {
585*4882a593Smuzhiyun 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
586*4882a593Smuzhiyun 	unsigned char mask = kcontrol->private_value & 0xff;
587*4882a593Smuzhiyun 	int val, nval;
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	if (kcontrol->private_value & (1 << 31))
590*4882a593Smuzhiyun 		return -EPERM;
591*4882a593Smuzhiyun 	nval = ucontrol->value.enumerated.item[0] ? mask : 0;
592*4882a593Smuzhiyun 	snd_ice1712_save_gpio_status(ice);
593*4882a593Smuzhiyun 	val = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
594*4882a593Smuzhiyun 	nval |= val & ~mask;
595*4882a593Smuzhiyun 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, nval);
596*4882a593Smuzhiyun 	snd_ice1712_restore_gpio_status(ice);
597*4882a593Smuzhiyun 	return val != nval;
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ice1712_ewx2496_controls[] = {
601*4882a593Smuzhiyun 	{
602*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
603*4882a593Smuzhiyun 		.name = "Input Sensitivity Switch",
604*4882a593Smuzhiyun 		.info = snd_ice1712_ewx_io_sense_info,
605*4882a593Smuzhiyun 		.get = snd_ice1712_ewx_io_sense_get,
606*4882a593Smuzhiyun 		.put = snd_ice1712_ewx_io_sense_put,
607*4882a593Smuzhiyun 		.private_value = ICE1712_EWX2496_AIN_SEL,
608*4882a593Smuzhiyun 	},
609*4882a593Smuzhiyun 	{
610*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
611*4882a593Smuzhiyun 		.name = "Output Sensitivity Switch",
612*4882a593Smuzhiyun 		.info = snd_ice1712_ewx_io_sense_info,
613*4882a593Smuzhiyun 		.get = snd_ice1712_ewx_io_sense_get,
614*4882a593Smuzhiyun 		.put = snd_ice1712_ewx_io_sense_put,
615*4882a593Smuzhiyun 		.private_value = ICE1712_EWX2496_AOUT_SEL,
616*4882a593Smuzhiyun 	},
617*4882a593Smuzhiyun };
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun /*
621*4882a593Smuzhiyun  * EWS88MT specific controls
622*4882a593Smuzhiyun  */
623*4882a593Smuzhiyun /* analog output sensitivity;; address 0x48 bit 6 */
snd_ice1712_ews88mt_output_sense_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)624*4882a593Smuzhiyun static int snd_ice1712_ews88mt_output_sense_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
625*4882a593Smuzhiyun {
626*4882a593Smuzhiyun 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
627*4882a593Smuzhiyun 	struct ews_spec *spec = ice->spec;
628*4882a593Smuzhiyun 	unsigned char data;
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	snd_i2c_lock(ice->i2c);
631*4882a593Smuzhiyun 	if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_PCF2], &data, 1) != 1) {
632*4882a593Smuzhiyun 		snd_i2c_unlock(ice->i2c);
633*4882a593Smuzhiyun 		return -EIO;
634*4882a593Smuzhiyun 	}
635*4882a593Smuzhiyun 	snd_i2c_unlock(ice->i2c);
636*4882a593Smuzhiyun 	ucontrol->value.enumerated.item[0] = data & ICE1712_EWS88MT_OUTPUT_SENSE ? 1 : 0; /* high = -10dBV, low = +4dBu */
637*4882a593Smuzhiyun 	return 0;
638*4882a593Smuzhiyun }
639*4882a593Smuzhiyun 
640*4882a593Smuzhiyun /* analog output sensitivity;; address 0x48 bit 6 */
snd_ice1712_ews88mt_output_sense_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)641*4882a593Smuzhiyun static int snd_ice1712_ews88mt_output_sense_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
642*4882a593Smuzhiyun {
643*4882a593Smuzhiyun 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
644*4882a593Smuzhiyun 	struct ews_spec *spec = ice->spec;
645*4882a593Smuzhiyun 	unsigned char data, ndata;
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun 	snd_i2c_lock(ice->i2c);
648*4882a593Smuzhiyun 	if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_PCF2], &data, 1) != 1) {
649*4882a593Smuzhiyun 		snd_i2c_unlock(ice->i2c);
650*4882a593Smuzhiyun 		return -EIO;
651*4882a593Smuzhiyun 	}
652*4882a593Smuzhiyun 	ndata = (data & ~ICE1712_EWS88MT_OUTPUT_SENSE) | (ucontrol->value.enumerated.item[0] ? ICE1712_EWS88MT_OUTPUT_SENSE : 0);
653*4882a593Smuzhiyun 	if (ndata != data && snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_PCF2],
654*4882a593Smuzhiyun 					       &ndata, 1) != 1) {
655*4882a593Smuzhiyun 		snd_i2c_unlock(ice->i2c);
656*4882a593Smuzhiyun 		return -EIO;
657*4882a593Smuzhiyun 	}
658*4882a593Smuzhiyun 	snd_i2c_unlock(ice->i2c);
659*4882a593Smuzhiyun 	return ndata != data;
660*4882a593Smuzhiyun }
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun /* analog input sensitivity; address 0x46 */
snd_ice1712_ews88mt_input_sense_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)663*4882a593Smuzhiyun static int snd_ice1712_ews88mt_input_sense_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
664*4882a593Smuzhiyun {
665*4882a593Smuzhiyun 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
666*4882a593Smuzhiyun 	struct ews_spec *spec = ice->spec;
667*4882a593Smuzhiyun 	int channel = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
668*4882a593Smuzhiyun 	unsigned char data;
669*4882a593Smuzhiyun 
670*4882a593Smuzhiyun 	if (snd_BUG_ON(channel < 0 || channel > 7))
671*4882a593Smuzhiyun 		return 0;
672*4882a593Smuzhiyun 	snd_i2c_lock(ice->i2c);
673*4882a593Smuzhiyun 	if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_PCF1], &data, 1) != 1) {
674*4882a593Smuzhiyun 		snd_i2c_unlock(ice->i2c);
675*4882a593Smuzhiyun 		return -EIO;
676*4882a593Smuzhiyun 	}
677*4882a593Smuzhiyun 	/* reversed; high = +4dBu, low = -10dBV */
678*4882a593Smuzhiyun 	ucontrol->value.enumerated.item[0] = data & (1 << channel) ? 0 : 1;
679*4882a593Smuzhiyun 	snd_i2c_unlock(ice->i2c);
680*4882a593Smuzhiyun 	return 0;
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun /* analog output sensitivity; address 0x46 */
snd_ice1712_ews88mt_input_sense_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)684*4882a593Smuzhiyun static int snd_ice1712_ews88mt_input_sense_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
685*4882a593Smuzhiyun {
686*4882a593Smuzhiyun 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
687*4882a593Smuzhiyun 	struct ews_spec *spec = ice->spec;
688*4882a593Smuzhiyun 	int channel = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
689*4882a593Smuzhiyun 	unsigned char data, ndata;
690*4882a593Smuzhiyun 
691*4882a593Smuzhiyun 	if (snd_BUG_ON(channel < 0 || channel > 7))
692*4882a593Smuzhiyun 		return 0;
693*4882a593Smuzhiyun 	snd_i2c_lock(ice->i2c);
694*4882a593Smuzhiyun 	if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_PCF1], &data, 1) != 1) {
695*4882a593Smuzhiyun 		snd_i2c_unlock(ice->i2c);
696*4882a593Smuzhiyun 		return -EIO;
697*4882a593Smuzhiyun 	}
698*4882a593Smuzhiyun 	ndata = (data & ~(1 << channel)) | (ucontrol->value.enumerated.item[0] ? 0 : (1 << channel));
699*4882a593Smuzhiyun 	if (ndata != data && snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_PCF1],
700*4882a593Smuzhiyun 					       &ndata, 1) != 1) {
701*4882a593Smuzhiyun 		snd_i2c_unlock(ice->i2c);
702*4882a593Smuzhiyun 		return -EIO;
703*4882a593Smuzhiyun 	}
704*4882a593Smuzhiyun 	snd_i2c_unlock(ice->i2c);
705*4882a593Smuzhiyun 	return ndata != data;
706*4882a593Smuzhiyun }
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ice1712_ews88mt_input_sense = {
709*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
710*4882a593Smuzhiyun 	.name = "Input Sensitivity Switch",
711*4882a593Smuzhiyun 	.info = snd_ice1712_ewx_io_sense_info,
712*4882a593Smuzhiyun 	.get = snd_ice1712_ews88mt_input_sense_get,
713*4882a593Smuzhiyun 	.put = snd_ice1712_ews88mt_input_sense_put,
714*4882a593Smuzhiyun 	.count = 8,
715*4882a593Smuzhiyun };
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ice1712_ews88mt_output_sense = {
718*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
719*4882a593Smuzhiyun 	.name = "Output Sensitivity Switch",
720*4882a593Smuzhiyun 	.info = snd_ice1712_ewx_io_sense_info,
721*4882a593Smuzhiyun 	.get = snd_ice1712_ews88mt_output_sense_get,
722*4882a593Smuzhiyun 	.put = snd_ice1712_ews88mt_output_sense_put,
723*4882a593Smuzhiyun };
724*4882a593Smuzhiyun 
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun /*
727*4882a593Smuzhiyun  * EWS88D specific controls
728*4882a593Smuzhiyun  */
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun #define snd_ice1712_ews88d_control_info		snd_ctl_boolean_mono_info
731*4882a593Smuzhiyun 
snd_ice1712_ews88d_control_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)732*4882a593Smuzhiyun static int snd_ice1712_ews88d_control_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
733*4882a593Smuzhiyun {
734*4882a593Smuzhiyun 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
735*4882a593Smuzhiyun 	struct ews_spec *spec = ice->spec;
736*4882a593Smuzhiyun 	int shift = kcontrol->private_value & 0xff;
737*4882a593Smuzhiyun 	int invert = (kcontrol->private_value >> 8) & 1;
738*4882a593Smuzhiyun 	unsigned char data[2];
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun 	snd_i2c_lock(ice->i2c);
741*4882a593Smuzhiyun 	if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_88D], data, 2) != 2) {
742*4882a593Smuzhiyun 		snd_i2c_unlock(ice->i2c);
743*4882a593Smuzhiyun 		return -EIO;
744*4882a593Smuzhiyun 	}
745*4882a593Smuzhiyun 	snd_i2c_unlock(ice->i2c);
746*4882a593Smuzhiyun 	data[0] = (data[shift >> 3] >> (shift & 7)) & 0x01;
747*4882a593Smuzhiyun 	if (invert)
748*4882a593Smuzhiyun 		data[0] ^= 0x01;
749*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = data[0];
750*4882a593Smuzhiyun 	return 0;
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun 
snd_ice1712_ews88d_control_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)753*4882a593Smuzhiyun static int snd_ice1712_ews88d_control_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
754*4882a593Smuzhiyun {
755*4882a593Smuzhiyun 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
756*4882a593Smuzhiyun 	struct ews_spec *spec = ice->spec;
757*4882a593Smuzhiyun 	int shift = kcontrol->private_value & 0xff;
758*4882a593Smuzhiyun 	int invert = (kcontrol->private_value >> 8) & 1;
759*4882a593Smuzhiyun 	unsigned char data[2], ndata[2];
760*4882a593Smuzhiyun 	int change;
761*4882a593Smuzhiyun 
762*4882a593Smuzhiyun 	snd_i2c_lock(ice->i2c);
763*4882a593Smuzhiyun 	if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_88D], data, 2) != 2) {
764*4882a593Smuzhiyun 		snd_i2c_unlock(ice->i2c);
765*4882a593Smuzhiyun 		return -EIO;
766*4882a593Smuzhiyun 	}
767*4882a593Smuzhiyun 	ndata[shift >> 3] = data[shift >> 3] & ~(1 << (shift & 7));
768*4882a593Smuzhiyun 	if (invert) {
769*4882a593Smuzhiyun 		if (! ucontrol->value.integer.value[0])
770*4882a593Smuzhiyun 			ndata[shift >> 3] |= (1 << (shift & 7));
771*4882a593Smuzhiyun 	} else {
772*4882a593Smuzhiyun 		if (ucontrol->value.integer.value[0])
773*4882a593Smuzhiyun 			ndata[shift >> 3] |= (1 << (shift & 7));
774*4882a593Smuzhiyun 	}
775*4882a593Smuzhiyun 	change = (data[shift >> 3] != ndata[shift >> 3]);
776*4882a593Smuzhiyun 	if (change &&
777*4882a593Smuzhiyun 	    snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_88D], data, 2) != 2) {
778*4882a593Smuzhiyun 		snd_i2c_unlock(ice->i2c);
779*4882a593Smuzhiyun 		return -EIO;
780*4882a593Smuzhiyun 	}
781*4882a593Smuzhiyun 	snd_i2c_unlock(ice->i2c);
782*4882a593Smuzhiyun 	return change;
783*4882a593Smuzhiyun }
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun #define EWS88D_CONTROL(xiface, xname, xshift, xinvert, xaccess) \
786*4882a593Smuzhiyun { .iface = xiface,\
787*4882a593Smuzhiyun   .name = xname,\
788*4882a593Smuzhiyun   .access = xaccess,\
789*4882a593Smuzhiyun   .info = snd_ice1712_ews88d_control_info,\
790*4882a593Smuzhiyun   .get = snd_ice1712_ews88d_control_get,\
791*4882a593Smuzhiyun   .put = snd_ice1712_ews88d_control_put,\
792*4882a593Smuzhiyun   .private_value = xshift | (xinvert << 8),\
793*4882a593Smuzhiyun }
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ice1712_ews88d_controls[] = {
796*4882a593Smuzhiyun 	EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, 1, 0), /* inverted */
797*4882a593Smuzhiyun 	EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "ADAT Output Optical", 1, 0, 0),
798*4882a593Smuzhiyun 	EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "ADAT External Master Clock", 2, 0, 0),
799*4882a593Smuzhiyun 	EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "Enable ADAT", 3, 0, 0),
800*4882a593Smuzhiyun 	EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "ADAT Through", 4, 1, 0),
801*4882a593Smuzhiyun };
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun /*
805*4882a593Smuzhiyun  * DMX 6Fire specific controls
806*4882a593Smuzhiyun  */
807*4882a593Smuzhiyun 
snd_ice1712_6fire_read_pca(struct snd_ice1712 * ice,unsigned char reg)808*4882a593Smuzhiyun static int snd_ice1712_6fire_read_pca(struct snd_ice1712 *ice, unsigned char reg)
809*4882a593Smuzhiyun {
810*4882a593Smuzhiyun 	unsigned char byte;
811*4882a593Smuzhiyun 	struct ews_spec *spec = ice->spec;
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun 	snd_i2c_lock(ice->i2c);
814*4882a593Smuzhiyun 	byte = reg;
815*4882a593Smuzhiyun 	if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_6FIRE], &byte, 1) != 1) {
816*4882a593Smuzhiyun 		snd_i2c_unlock(ice->i2c);
817*4882a593Smuzhiyun 		dev_err(ice->card->dev, "cannot send pca\n");
818*4882a593Smuzhiyun 		return -EIO;
819*4882a593Smuzhiyun 	}
820*4882a593Smuzhiyun 
821*4882a593Smuzhiyun 	byte = 0;
822*4882a593Smuzhiyun 	if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_6FIRE], &byte, 1) != 1) {
823*4882a593Smuzhiyun 		snd_i2c_unlock(ice->i2c);
824*4882a593Smuzhiyun 		dev_err(ice->card->dev, "cannot read pca\n");
825*4882a593Smuzhiyun 		return -EIO;
826*4882a593Smuzhiyun 	}
827*4882a593Smuzhiyun 	snd_i2c_unlock(ice->i2c);
828*4882a593Smuzhiyun 	return byte;
829*4882a593Smuzhiyun }
830*4882a593Smuzhiyun 
snd_ice1712_6fire_write_pca(struct snd_ice1712 * ice,unsigned char reg,unsigned char data)831*4882a593Smuzhiyun static int snd_ice1712_6fire_write_pca(struct snd_ice1712 *ice, unsigned char reg, unsigned char data)
832*4882a593Smuzhiyun {
833*4882a593Smuzhiyun 	unsigned char bytes[2];
834*4882a593Smuzhiyun 	struct ews_spec *spec = ice->spec;
835*4882a593Smuzhiyun 
836*4882a593Smuzhiyun 	snd_i2c_lock(ice->i2c);
837*4882a593Smuzhiyun 	bytes[0] = reg;
838*4882a593Smuzhiyun 	bytes[1] = data;
839*4882a593Smuzhiyun 	if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_6FIRE], bytes, 2) != 2) {
840*4882a593Smuzhiyun 		snd_i2c_unlock(ice->i2c);
841*4882a593Smuzhiyun 		return -EIO;
842*4882a593Smuzhiyun 	}
843*4882a593Smuzhiyun 	snd_i2c_unlock(ice->i2c);
844*4882a593Smuzhiyun 	return 0;
845*4882a593Smuzhiyun }
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun #define snd_ice1712_6fire_control_info		snd_ctl_boolean_mono_info
848*4882a593Smuzhiyun 
snd_ice1712_6fire_control_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)849*4882a593Smuzhiyun static int snd_ice1712_6fire_control_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
850*4882a593Smuzhiyun {
851*4882a593Smuzhiyun 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
852*4882a593Smuzhiyun 	int shift = kcontrol->private_value & 0xff;
853*4882a593Smuzhiyun 	int invert = (kcontrol->private_value >> 8) & 1;
854*4882a593Smuzhiyun 	int data;
855*4882a593Smuzhiyun 
856*4882a593Smuzhiyun 	if ((data = snd_ice1712_6fire_read_pca(ice, PCF9554_REG_OUTPUT)) < 0)
857*4882a593Smuzhiyun 		return data;
858*4882a593Smuzhiyun 	data = (data >> shift) & 1;
859*4882a593Smuzhiyun 	if (invert)
860*4882a593Smuzhiyun 		data ^= 1;
861*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = data;
862*4882a593Smuzhiyun 	return 0;
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun 
snd_ice1712_6fire_control_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)865*4882a593Smuzhiyun static int snd_ice1712_6fire_control_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
866*4882a593Smuzhiyun {
867*4882a593Smuzhiyun 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
868*4882a593Smuzhiyun 	int shift = kcontrol->private_value & 0xff;
869*4882a593Smuzhiyun 	int invert = (kcontrol->private_value >> 8) & 1;
870*4882a593Smuzhiyun 	int data, ndata;
871*4882a593Smuzhiyun 
872*4882a593Smuzhiyun 	if ((data = snd_ice1712_6fire_read_pca(ice, PCF9554_REG_OUTPUT)) < 0)
873*4882a593Smuzhiyun 		return data;
874*4882a593Smuzhiyun 	ndata = data & ~(1 << shift);
875*4882a593Smuzhiyun 	if (ucontrol->value.integer.value[0])
876*4882a593Smuzhiyun 		ndata |= (1 << shift);
877*4882a593Smuzhiyun 	if (invert)
878*4882a593Smuzhiyun 		ndata ^= (1 << shift);
879*4882a593Smuzhiyun 	if (data != ndata) {
880*4882a593Smuzhiyun 		snd_ice1712_6fire_write_pca(ice, PCF9554_REG_OUTPUT, (unsigned char)ndata);
881*4882a593Smuzhiyun 		return 1;
882*4882a593Smuzhiyun 	}
883*4882a593Smuzhiyun 	return 0;
884*4882a593Smuzhiyun }
885*4882a593Smuzhiyun 
snd_ice1712_6fire_select_input_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)886*4882a593Smuzhiyun static int snd_ice1712_6fire_select_input_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
887*4882a593Smuzhiyun {
888*4882a593Smuzhiyun 	static const char * const texts[4] = {
889*4882a593Smuzhiyun 		"Internal", "Front Input", "Rear Input", "Wave Table"
890*4882a593Smuzhiyun 	};
891*4882a593Smuzhiyun 	return snd_ctl_enum_info(uinfo, 1, 4, texts);
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun 
snd_ice1712_6fire_select_input_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)894*4882a593Smuzhiyun static int snd_ice1712_6fire_select_input_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
895*4882a593Smuzhiyun {
896*4882a593Smuzhiyun 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
897*4882a593Smuzhiyun 	int data;
898*4882a593Smuzhiyun 
899*4882a593Smuzhiyun 	if ((data = snd_ice1712_6fire_read_pca(ice, PCF9554_REG_OUTPUT)) < 0)
900*4882a593Smuzhiyun 		return data;
901*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = data & 3;
902*4882a593Smuzhiyun 	return 0;
903*4882a593Smuzhiyun }
904*4882a593Smuzhiyun 
snd_ice1712_6fire_select_input_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)905*4882a593Smuzhiyun static int snd_ice1712_6fire_select_input_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
906*4882a593Smuzhiyun {
907*4882a593Smuzhiyun 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
908*4882a593Smuzhiyun 	int data, ndata;
909*4882a593Smuzhiyun 
910*4882a593Smuzhiyun 	if ((data = snd_ice1712_6fire_read_pca(ice, PCF9554_REG_OUTPUT)) < 0)
911*4882a593Smuzhiyun 		return data;
912*4882a593Smuzhiyun 	ndata = data & ~3;
913*4882a593Smuzhiyun 	ndata |= (ucontrol->value.integer.value[0] & 3);
914*4882a593Smuzhiyun 	if (data != ndata) {
915*4882a593Smuzhiyun 		snd_ice1712_6fire_write_pca(ice, PCF9554_REG_OUTPUT, (unsigned char)ndata);
916*4882a593Smuzhiyun 		return 1;
917*4882a593Smuzhiyun 	}
918*4882a593Smuzhiyun 	return 0;
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun 
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun #define DMX6FIRE_CONTROL(xname, xshift, xinvert) \
923*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER,\
924*4882a593Smuzhiyun   .name = xname,\
925*4882a593Smuzhiyun   .info = snd_ice1712_6fire_control_info,\
926*4882a593Smuzhiyun   .get = snd_ice1712_6fire_control_get,\
927*4882a593Smuzhiyun   .put = snd_ice1712_6fire_control_put,\
928*4882a593Smuzhiyun   .private_value = xshift | (xinvert << 8),\
929*4882a593Smuzhiyun }
930*4882a593Smuzhiyun 
931*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ice1712_6fire_controls[] = {
932*4882a593Smuzhiyun 	{
933*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
934*4882a593Smuzhiyun 		.name = "Analog Input Select",
935*4882a593Smuzhiyun 		.info = snd_ice1712_6fire_select_input_info,
936*4882a593Smuzhiyun 		.get = snd_ice1712_6fire_select_input_get,
937*4882a593Smuzhiyun 		.put = snd_ice1712_6fire_select_input_put,
938*4882a593Smuzhiyun 	},
939*4882a593Smuzhiyun 	DMX6FIRE_CONTROL("Front Digital Input Switch", 2, 1),
940*4882a593Smuzhiyun 	// DMX6FIRE_CONTROL("Master Clock Select", 3, 0),
941*4882a593Smuzhiyun 	DMX6FIRE_CONTROL("Optical Digital Input Switch", 4, 0),
942*4882a593Smuzhiyun 	DMX6FIRE_CONTROL("Phono Analog Input Switch", 5, 0),
943*4882a593Smuzhiyun 	DMX6FIRE_CONTROL("Breakbox LED", 6, 0),
944*4882a593Smuzhiyun };
945*4882a593Smuzhiyun 
946*4882a593Smuzhiyun 
snd_ice1712_ews_add_controls(struct snd_ice1712 * ice)947*4882a593Smuzhiyun static int snd_ice1712_ews_add_controls(struct snd_ice1712 *ice)
948*4882a593Smuzhiyun {
949*4882a593Smuzhiyun 	unsigned int idx;
950*4882a593Smuzhiyun 	int err;
951*4882a593Smuzhiyun 
952*4882a593Smuzhiyun 	/* all terratec cards have spdif, but cs8427 module builds it's own controls */
953*4882a593Smuzhiyun 	if (ice->cs8427 == NULL) {
954*4882a593Smuzhiyun 		err = snd_ice1712_spdif_build_controls(ice);
955*4882a593Smuzhiyun 		if (err < 0)
956*4882a593Smuzhiyun 			return err;
957*4882a593Smuzhiyun 	}
958*4882a593Smuzhiyun 
959*4882a593Smuzhiyun 	/* ak4524 controls */
960*4882a593Smuzhiyun 	switch (ice->eeprom.subvendor) {
961*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWX2496:
962*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT:
963*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT_NEW:
964*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_PHASE88:
965*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_TS88:
966*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_DMX6FIRE:
967*4882a593Smuzhiyun 		err = snd_ice1712_akm4xxx_build_controls(ice);
968*4882a593Smuzhiyun 		if (err < 0)
969*4882a593Smuzhiyun 			return err;
970*4882a593Smuzhiyun 		break;
971*4882a593Smuzhiyun 	}
972*4882a593Smuzhiyun 
973*4882a593Smuzhiyun 	/* card specific controls */
974*4882a593Smuzhiyun 	switch (ice->eeprom.subvendor) {
975*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWX2496:
976*4882a593Smuzhiyun 		for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_ewx2496_controls); idx++) {
977*4882a593Smuzhiyun 			err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ewx2496_controls[idx], ice));
978*4882a593Smuzhiyun 			if (err < 0)
979*4882a593Smuzhiyun 				return err;
980*4882a593Smuzhiyun 		}
981*4882a593Smuzhiyun 		break;
982*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT:
983*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88MT_NEW:
984*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_PHASE88:
985*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_TS88:
986*4882a593Smuzhiyun 		err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88mt_input_sense, ice));
987*4882a593Smuzhiyun 		if (err < 0)
988*4882a593Smuzhiyun 			return err;
989*4882a593Smuzhiyun 		err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88mt_output_sense, ice));
990*4882a593Smuzhiyun 		if (err < 0)
991*4882a593Smuzhiyun 			return err;
992*4882a593Smuzhiyun 		break;
993*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_EWS88D:
994*4882a593Smuzhiyun 		for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_ews88d_controls); idx++) {
995*4882a593Smuzhiyun 			err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88d_controls[idx], ice));
996*4882a593Smuzhiyun 			if (err < 0)
997*4882a593Smuzhiyun 				return err;
998*4882a593Smuzhiyun 		}
999*4882a593Smuzhiyun 		break;
1000*4882a593Smuzhiyun 	case ICE1712_SUBDEVICE_DMX6FIRE:
1001*4882a593Smuzhiyun 		for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_6fire_controls); idx++) {
1002*4882a593Smuzhiyun 			err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_6fire_controls[idx], ice));
1003*4882a593Smuzhiyun 			if (err < 0)
1004*4882a593Smuzhiyun 				return err;
1005*4882a593Smuzhiyun 		}
1006*4882a593Smuzhiyun 		break;
1007*4882a593Smuzhiyun 	}
1008*4882a593Smuzhiyun 	return 0;
1009*4882a593Smuzhiyun }
1010*4882a593Smuzhiyun 
1011*4882a593Smuzhiyun 
1012*4882a593Smuzhiyun /* entry point */
1013*4882a593Smuzhiyun struct snd_ice1712_card_info snd_ice1712_ews_cards[] = {
1014*4882a593Smuzhiyun 	{
1015*4882a593Smuzhiyun 		.subvendor = ICE1712_SUBDEVICE_EWX2496,
1016*4882a593Smuzhiyun 		.name = "TerraTec EWX24/96",
1017*4882a593Smuzhiyun 		.model = "ewx2496",
1018*4882a593Smuzhiyun 		.chip_init = snd_ice1712_ews_init,
1019*4882a593Smuzhiyun 		.build_controls = snd_ice1712_ews_add_controls,
1020*4882a593Smuzhiyun 	},
1021*4882a593Smuzhiyun 	{
1022*4882a593Smuzhiyun 		.subvendor = ICE1712_SUBDEVICE_EWS88MT,
1023*4882a593Smuzhiyun 		.name = "TerraTec EWS88MT",
1024*4882a593Smuzhiyun 		.model = "ews88mt",
1025*4882a593Smuzhiyun 		.chip_init = snd_ice1712_ews_init,
1026*4882a593Smuzhiyun 		.build_controls = snd_ice1712_ews_add_controls,
1027*4882a593Smuzhiyun 	},
1028*4882a593Smuzhiyun 	{
1029*4882a593Smuzhiyun 		.subvendor = ICE1712_SUBDEVICE_EWS88MT_NEW,
1030*4882a593Smuzhiyun 		.name = "TerraTec EWS88MT",
1031*4882a593Smuzhiyun 		.model = "ews88mt_new",
1032*4882a593Smuzhiyun 		.chip_init = snd_ice1712_ews_init,
1033*4882a593Smuzhiyun 		.build_controls = snd_ice1712_ews_add_controls,
1034*4882a593Smuzhiyun 	},
1035*4882a593Smuzhiyun 	{
1036*4882a593Smuzhiyun 		.subvendor = ICE1712_SUBDEVICE_PHASE88,
1037*4882a593Smuzhiyun 		.name = "TerraTec Phase88",
1038*4882a593Smuzhiyun 		.model = "phase88",
1039*4882a593Smuzhiyun 		.chip_init = snd_ice1712_ews_init,
1040*4882a593Smuzhiyun 		.build_controls = snd_ice1712_ews_add_controls,
1041*4882a593Smuzhiyun 	},
1042*4882a593Smuzhiyun 	{
1043*4882a593Smuzhiyun 		.subvendor = ICE1712_SUBDEVICE_TS88,
1044*4882a593Smuzhiyun 		.name = "terrasoniq TS88",
1045*4882a593Smuzhiyun 		.model = "phase88",
1046*4882a593Smuzhiyun 		.chip_init = snd_ice1712_ews_init,
1047*4882a593Smuzhiyun 		.build_controls = snd_ice1712_ews_add_controls,
1048*4882a593Smuzhiyun 	},
1049*4882a593Smuzhiyun 	{
1050*4882a593Smuzhiyun 		.subvendor = ICE1712_SUBDEVICE_EWS88D,
1051*4882a593Smuzhiyun 		.name = "TerraTec EWS88D",
1052*4882a593Smuzhiyun 		.model = "ews88d",
1053*4882a593Smuzhiyun 		.chip_init = snd_ice1712_ews_init,
1054*4882a593Smuzhiyun 		.build_controls = snd_ice1712_ews_add_controls,
1055*4882a593Smuzhiyun 	},
1056*4882a593Smuzhiyun 	{
1057*4882a593Smuzhiyun 		.subvendor = ICE1712_SUBDEVICE_DMX6FIRE,
1058*4882a593Smuzhiyun 		.name = "TerraTec DMX6Fire",
1059*4882a593Smuzhiyun 		.model = "dmx6fire",
1060*4882a593Smuzhiyun 		.chip_init = snd_ice1712_ews_init,
1061*4882a593Smuzhiyun 		.build_controls = snd_ice1712_ews_add_controls,
1062*4882a593Smuzhiyun 		.mpu401_1_name = "MIDI-Front DMX6fire",
1063*4882a593Smuzhiyun 		.mpu401_2_name = "Wavetable DMX6fire",
1064*4882a593Smuzhiyun 		.mpu401_2_info_flags = MPU401_INFO_OUTPUT,
1065*4882a593Smuzhiyun 	},
1066*4882a593Smuzhiyun 	{ } /* terminator */
1067*4882a593Smuzhiyun };
1068