xref: /OK3568_Linux_fs/kernel/sound/pci/hda/patch_cirrus.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * HD audio interface patch for Cirrus Logic CS420x chip
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/init.h>
9*4882a593Smuzhiyun #include <linux/slab.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <sound/core.h>
12*4882a593Smuzhiyun #include <sound/tlv.h>
13*4882a593Smuzhiyun #include <sound/hda_codec.h>
14*4882a593Smuzhiyun #include "hda_local.h"
15*4882a593Smuzhiyun #include "hda_auto_parser.h"
16*4882a593Smuzhiyun #include "hda_jack.h"
17*4882a593Smuzhiyun #include "hda_generic.h"
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun /*
20*4882a593Smuzhiyun  */
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun struct cs_spec {
23*4882a593Smuzhiyun 	struct hda_gen_spec gen;
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun 	unsigned int gpio_mask;
26*4882a593Smuzhiyun 	unsigned int gpio_dir;
27*4882a593Smuzhiyun 	unsigned int gpio_data;
28*4882a593Smuzhiyun 	unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
29*4882a593Smuzhiyun 	unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 	/* CS421x */
32*4882a593Smuzhiyun 	unsigned int spdif_detect:1;
33*4882a593Smuzhiyun 	unsigned int spdif_present:1;
34*4882a593Smuzhiyun 	unsigned int sense_b:1;
35*4882a593Smuzhiyun 	hda_nid_t vendor_nid;
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	/* for MBP SPDIF control */
38*4882a593Smuzhiyun 	int (*spdif_sw_put)(struct snd_kcontrol *kcontrol,
39*4882a593Smuzhiyun 			    struct snd_ctl_elem_value *ucontrol);
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun /* available models with CS420x */
43*4882a593Smuzhiyun enum {
44*4882a593Smuzhiyun 	CS420X_MBP53,
45*4882a593Smuzhiyun 	CS420X_MBP55,
46*4882a593Smuzhiyun 	CS420X_IMAC27,
47*4882a593Smuzhiyun 	CS420X_GPIO_13,
48*4882a593Smuzhiyun 	CS420X_GPIO_23,
49*4882a593Smuzhiyun 	CS420X_MBP101,
50*4882a593Smuzhiyun 	CS420X_MBP81,
51*4882a593Smuzhiyun 	CS420X_MBA42,
52*4882a593Smuzhiyun 	CS420X_AUTO,
53*4882a593Smuzhiyun 	/* aliases */
54*4882a593Smuzhiyun 	CS420X_IMAC27_122 = CS420X_GPIO_23,
55*4882a593Smuzhiyun 	CS420X_APPLE = CS420X_GPIO_13,
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun /* CS421x boards */
59*4882a593Smuzhiyun enum {
60*4882a593Smuzhiyun 	CS421X_CDB4210,
61*4882a593Smuzhiyun 	CS421X_SENSE_B,
62*4882a593Smuzhiyun 	CS421X_STUMPY,
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun /* Vendor-specific processing widget */
66*4882a593Smuzhiyun #define CS420X_VENDOR_NID	0x11
67*4882a593Smuzhiyun #define CS_DIG_OUT1_PIN_NID	0x10
68*4882a593Smuzhiyun #define CS_DIG_OUT2_PIN_NID	0x15
69*4882a593Smuzhiyun #define CS_DMIC1_PIN_NID	0x0e
70*4882a593Smuzhiyun #define CS_DMIC2_PIN_NID	0x12
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun /* coef indices */
73*4882a593Smuzhiyun #define IDX_SPDIF_STAT		0x0000
74*4882a593Smuzhiyun #define IDX_SPDIF_CTL		0x0001
75*4882a593Smuzhiyun #define IDX_ADC_CFG		0x0002
76*4882a593Smuzhiyun /* SZC bitmask, 4 modes below:
77*4882a593Smuzhiyun  * 0 = immediate,
78*4882a593Smuzhiyun  * 1 = digital immediate, analog zero-cross
79*4882a593Smuzhiyun  * 2 = digtail & analog soft-ramp
80*4882a593Smuzhiyun  * 3 = digital soft-ramp, analog zero-cross
81*4882a593Smuzhiyun  */
82*4882a593Smuzhiyun #define   CS_COEF_ADC_SZC_MASK		(3 << 0)
83*4882a593Smuzhiyun #define   CS_COEF_ADC_MIC_SZC_MODE	(3 << 0) /* SZC setup for mic */
84*4882a593Smuzhiyun #define   CS_COEF_ADC_LI_SZC_MODE	(3 << 0) /* SZC setup for line-in */
85*4882a593Smuzhiyun /* PGA mode: 0 = differential, 1 = signle-ended */
86*4882a593Smuzhiyun #define   CS_COEF_ADC_MIC_PGA_MODE	(1 << 5) /* PGA setup for mic */
87*4882a593Smuzhiyun #define   CS_COEF_ADC_LI_PGA_MODE	(1 << 6) /* PGA setup for line-in */
88*4882a593Smuzhiyun #define IDX_DAC_CFG		0x0003
89*4882a593Smuzhiyun /* SZC bitmask, 4 modes below:
90*4882a593Smuzhiyun  * 0 = Immediate
91*4882a593Smuzhiyun  * 1 = zero-cross
92*4882a593Smuzhiyun  * 2 = soft-ramp
93*4882a593Smuzhiyun  * 3 = soft-ramp on zero-cross
94*4882a593Smuzhiyun  */
95*4882a593Smuzhiyun #define   CS_COEF_DAC_HP_SZC_MODE	(3 << 0) /* nid 0x02 */
96*4882a593Smuzhiyun #define   CS_COEF_DAC_LO_SZC_MODE	(3 << 2) /* nid 0x03 */
97*4882a593Smuzhiyun #define   CS_COEF_DAC_SPK_SZC_MODE	(3 << 4) /* nid 0x04 */
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun #define IDX_BEEP_CFG		0x0004
100*4882a593Smuzhiyun /* 0x0008 - test reg key */
101*4882a593Smuzhiyun /* 0x0009 - 0x0014 -> 12 test regs */
102*4882a593Smuzhiyun /* 0x0015 - visibility reg */
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun /* Cirrus Logic CS4208 */
105*4882a593Smuzhiyun #define CS4208_VENDOR_NID	0x24
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun /*
108*4882a593Smuzhiyun  * Cirrus Logic CS4210
109*4882a593Smuzhiyun  *
110*4882a593Smuzhiyun  * 1 DAC => HP(sense) / Speakers,
111*4882a593Smuzhiyun  * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
112*4882a593Smuzhiyun  * 1 SPDIF OUT => SPDIF Trasmitter(sense)
113*4882a593Smuzhiyun */
114*4882a593Smuzhiyun #define CS4210_DAC_NID		0x02
115*4882a593Smuzhiyun #define CS4210_ADC_NID		0x03
116*4882a593Smuzhiyun #define CS4210_VENDOR_NID	0x0B
117*4882a593Smuzhiyun #define CS421X_DMIC_PIN_NID	0x09 /* Port E */
118*4882a593Smuzhiyun #define CS421X_SPDIF_PIN_NID	0x0A /* Port H */
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun #define CS421X_IDX_DEV_CFG	0x01
121*4882a593Smuzhiyun #define CS421X_IDX_ADC_CFG	0x02
122*4882a593Smuzhiyun #define CS421X_IDX_DAC_CFG	0x03
123*4882a593Smuzhiyun #define CS421X_IDX_SPK_CTL	0x04
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun /* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
126*4882a593Smuzhiyun #define CS4213_VENDOR_NID	0x09
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 
cs_vendor_coef_get(struct hda_codec * codec,unsigned int idx)129*4882a593Smuzhiyun static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
132*4882a593Smuzhiyun 	snd_hda_codec_write(codec, spec->vendor_nid, 0,
133*4882a593Smuzhiyun 			    AC_VERB_SET_COEF_INDEX, idx);
134*4882a593Smuzhiyun 	return snd_hda_codec_read(codec, spec->vendor_nid, 0,
135*4882a593Smuzhiyun 				  AC_VERB_GET_PROC_COEF, 0);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
cs_vendor_coef_set(struct hda_codec * codec,unsigned int idx,unsigned int coef)138*4882a593Smuzhiyun static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
139*4882a593Smuzhiyun 				      unsigned int coef)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
142*4882a593Smuzhiyun 	snd_hda_codec_write(codec, spec->vendor_nid, 0,
143*4882a593Smuzhiyun 			    AC_VERB_SET_COEF_INDEX, idx);
144*4882a593Smuzhiyun 	snd_hda_codec_write(codec, spec->vendor_nid, 0,
145*4882a593Smuzhiyun 			    AC_VERB_SET_PROC_COEF, coef);
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun /*
149*4882a593Smuzhiyun  * auto-mute and auto-mic switching
150*4882a593Smuzhiyun  * CS421x auto-output redirecting
151*4882a593Smuzhiyun  * HP/SPK/SPDIF
152*4882a593Smuzhiyun  */
153*4882a593Smuzhiyun 
cs_automute(struct hda_codec * codec)154*4882a593Smuzhiyun static void cs_automute(struct hda_codec *codec)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	/* mute HPs if spdif jack (SENSE_B) is present */
159*4882a593Smuzhiyun 	spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	snd_hda_gen_update_outputs(codec);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) {
164*4882a593Smuzhiyun 		if (spec->gen.automute_speaker)
165*4882a593Smuzhiyun 			spec->gpio_data = spec->gen.hp_jack_present ?
166*4882a593Smuzhiyun 				spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
167*4882a593Smuzhiyun 		else
168*4882a593Smuzhiyun 			spec->gpio_data =
169*4882a593Smuzhiyun 				spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
170*4882a593Smuzhiyun 		snd_hda_codec_write(codec, 0x01, 0,
171*4882a593Smuzhiyun 				    AC_VERB_SET_GPIO_DATA, spec->gpio_data);
172*4882a593Smuzhiyun 	}
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun 
is_active_pin(struct hda_codec * codec,hda_nid_t nid)175*4882a593Smuzhiyun static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	unsigned int val;
178*4882a593Smuzhiyun 	val = snd_hda_codec_get_pincfg(codec, nid);
179*4882a593Smuzhiyun 	return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun 
init_input_coef(struct hda_codec * codec)182*4882a593Smuzhiyun static void init_input_coef(struct hda_codec *codec)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
185*4882a593Smuzhiyun 	unsigned int coef;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	/* CS420x has multiple ADC, CS421x has single ADC */
188*4882a593Smuzhiyun 	if (spec->vendor_nid == CS420X_VENDOR_NID) {
189*4882a593Smuzhiyun 		coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
190*4882a593Smuzhiyun 		if (is_active_pin(codec, CS_DMIC2_PIN_NID))
191*4882a593Smuzhiyun 			coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
192*4882a593Smuzhiyun 		if (is_active_pin(codec, CS_DMIC1_PIN_NID))
193*4882a593Smuzhiyun 			coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
194*4882a593Smuzhiyun 					 * No effect if SPDIF_OUT2 is
195*4882a593Smuzhiyun 					 * selected in IDX_SPDIF_CTL.
196*4882a593Smuzhiyun 					*/
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 		cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
199*4882a593Smuzhiyun 	}
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun static const struct hda_verb cs_coef_init_verbs[] = {
203*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_PROC_STATE, 1},
204*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
205*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_PROC_COEF,
206*4882a593Smuzhiyun 	 (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
207*4882a593Smuzhiyun 	  | 0x0040 /* Mute DACs on FIFO error */
208*4882a593Smuzhiyun 	  | 0x1000 /* Enable DACs High Pass Filter */
209*4882a593Smuzhiyun 	  | 0x0400 /* Disable Coefficient Auto increment */
210*4882a593Smuzhiyun 	  )},
211*4882a593Smuzhiyun 	/* ADC1/2 - Digital and Analog Soft Ramp */
212*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
213*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_PROC_COEF, 0x000a},
214*4882a593Smuzhiyun 	/* Beep */
215*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
216*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	{} /* terminator */
219*4882a593Smuzhiyun };
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun static const struct hda_verb cs4208_coef_init_verbs[] = {
222*4882a593Smuzhiyun 	{0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
223*4882a593Smuzhiyun 	{0x24, AC_VERB_SET_PROC_STATE, 0x01},  /* VPW: processing on */
224*4882a593Smuzhiyun 	{0x24, AC_VERB_SET_COEF_INDEX, 0x0033},
225*4882a593Smuzhiyun 	{0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */
226*4882a593Smuzhiyun 	{0x24, AC_VERB_SET_COEF_INDEX, 0x0034},
227*4882a593Smuzhiyun 	{0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */
228*4882a593Smuzhiyun 	{} /* terminator */
229*4882a593Smuzhiyun };
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun /* Errata: CS4207 rev C0/C1/C2 Silicon
232*4882a593Smuzhiyun  *
233*4882a593Smuzhiyun  * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
234*4882a593Smuzhiyun  *
235*4882a593Smuzhiyun  * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
236*4882a593Smuzhiyun  * may be excessive (up to an additional 200 μA), which is most easily
237*4882a593Smuzhiyun  * observed while the part is being held in reset (RESET# active low).
238*4882a593Smuzhiyun  *
239*4882a593Smuzhiyun  * Root Cause: At initial powerup of the device, the logic that drives
240*4882a593Smuzhiyun  * the clock and write enable to the S/PDIF SRC RAMs is not properly
241*4882a593Smuzhiyun  * initialized.
242*4882a593Smuzhiyun  * Certain random patterns will cause a steady leakage current in those
243*4882a593Smuzhiyun  * RAM cells. The issue will resolve once the SRCs are used (turned on).
244*4882a593Smuzhiyun  *
245*4882a593Smuzhiyun  * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
246*4882a593Smuzhiyun  * blocks, which will alleviate the issue.
247*4882a593Smuzhiyun  */
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun static const struct hda_verb cs_errata_init_verbs[] = {
250*4882a593Smuzhiyun 	{0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
251*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_PROC_STATE, 0x01},  /* VPW: processing on */
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
254*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_PROC_COEF, 0x9999},
255*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
256*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_PROC_COEF, 0xa412},
257*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
258*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_PROC_COEF, 0x0009},
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	{0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
261*4882a593Smuzhiyun 	{0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
264*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_PROC_COEF, 0x2412},
265*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
266*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_PROC_COEF, 0x0000},
267*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
268*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_PROC_COEF, 0x0008},
269*4882a593Smuzhiyun 	{0x11, AC_VERB_SET_PROC_STATE, 0x00},
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun #if 0 /* Don't to set to D3 as we are in power-up sequence */
272*4882a593Smuzhiyun 	{0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
273*4882a593Smuzhiyun 	{0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
274*4882a593Smuzhiyun 	/*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
275*4882a593Smuzhiyun #endif
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	{} /* terminator */
278*4882a593Smuzhiyun };
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun /* SPDIF setup */
init_digital_coef(struct hda_codec * codec)281*4882a593Smuzhiyun static void init_digital_coef(struct hda_codec *codec)
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun 	unsigned int coef;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
286*4882a593Smuzhiyun 	coef |= 0x0008; /* Replace with mute on error */
287*4882a593Smuzhiyun 	if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
288*4882a593Smuzhiyun 		coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
289*4882a593Smuzhiyun 				 * SPDIF_OUT2 is shared with GPIO1 and
290*4882a593Smuzhiyun 				 * DMIC_SDA2.
291*4882a593Smuzhiyun 				 */
292*4882a593Smuzhiyun 	cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun 
cs_init(struct hda_codec * codec)295*4882a593Smuzhiyun static int cs_init(struct hda_codec *codec)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	if (spec->vendor_nid == CS420X_VENDOR_NID) {
300*4882a593Smuzhiyun 		/* init_verb sequence for C0/C1/C2 errata*/
301*4882a593Smuzhiyun 		snd_hda_sequence_write(codec, cs_errata_init_verbs);
302*4882a593Smuzhiyun 		snd_hda_sequence_write(codec, cs_coef_init_verbs);
303*4882a593Smuzhiyun 	} else if (spec->vendor_nid == CS4208_VENDOR_NID) {
304*4882a593Smuzhiyun 		snd_hda_sequence_write(codec, cs4208_coef_init_verbs);
305*4882a593Smuzhiyun 	}
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	snd_hda_gen_init(codec);
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	if (spec->gpio_mask) {
310*4882a593Smuzhiyun 		snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
311*4882a593Smuzhiyun 				    spec->gpio_mask);
312*4882a593Smuzhiyun 		snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
313*4882a593Smuzhiyun 				    spec->gpio_dir);
314*4882a593Smuzhiyun 		snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
315*4882a593Smuzhiyun 				    spec->gpio_data);
316*4882a593Smuzhiyun 	}
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	if (spec->vendor_nid == CS420X_VENDOR_NID) {
319*4882a593Smuzhiyun 		init_input_coef(codec);
320*4882a593Smuzhiyun 		init_digital_coef(codec);
321*4882a593Smuzhiyun 	}
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	return 0;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun 
cs_build_controls(struct hda_codec * codec)326*4882a593Smuzhiyun static int cs_build_controls(struct hda_codec *codec)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun 	int err;
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	err = snd_hda_gen_build_controls(codec);
331*4882a593Smuzhiyun 	if (err < 0)
332*4882a593Smuzhiyun 		return err;
333*4882a593Smuzhiyun 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_BUILD);
334*4882a593Smuzhiyun 	return 0;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun #define cs_free		snd_hda_gen_free
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun static const struct hda_codec_ops cs_patch_ops = {
340*4882a593Smuzhiyun 	.build_controls = cs_build_controls,
341*4882a593Smuzhiyun 	.build_pcms = snd_hda_gen_build_pcms,
342*4882a593Smuzhiyun 	.init = cs_init,
343*4882a593Smuzhiyun 	.free = cs_free,
344*4882a593Smuzhiyun 	.unsol_event = snd_hda_jack_unsol_event,
345*4882a593Smuzhiyun };
346*4882a593Smuzhiyun 
cs_parse_auto_config(struct hda_codec * codec)347*4882a593Smuzhiyun static int cs_parse_auto_config(struct hda_codec *codec)
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
350*4882a593Smuzhiyun 	int err;
351*4882a593Smuzhiyun 	int i;
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
354*4882a593Smuzhiyun 	if (err < 0)
355*4882a593Smuzhiyun 		return err;
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
358*4882a593Smuzhiyun 	if (err < 0)
359*4882a593Smuzhiyun 		return err;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	/* keep the ADCs powered up when it's dynamically switchable */
362*4882a593Smuzhiyun 	if (spec->gen.dyn_adc_switch) {
363*4882a593Smuzhiyun 		unsigned int done = 0;
364*4882a593Smuzhiyun 		for (i = 0; i < spec->gen.input_mux.num_items; i++) {
365*4882a593Smuzhiyun 			int idx = spec->gen.dyn_adc_idx[i];
366*4882a593Smuzhiyun 			if (done & (1 << idx))
367*4882a593Smuzhiyun 				continue;
368*4882a593Smuzhiyun 			snd_hda_gen_fix_pin_power(codec,
369*4882a593Smuzhiyun 						  spec->gen.adc_nids[idx]);
370*4882a593Smuzhiyun 			done |= 1 << idx;
371*4882a593Smuzhiyun 		}
372*4882a593Smuzhiyun 	}
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	return 0;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun static const struct hda_model_fixup cs420x_models[] = {
378*4882a593Smuzhiyun 	{ .id = CS420X_MBP53, .name = "mbp53" },
379*4882a593Smuzhiyun 	{ .id = CS420X_MBP55, .name = "mbp55" },
380*4882a593Smuzhiyun 	{ .id = CS420X_IMAC27, .name = "imac27" },
381*4882a593Smuzhiyun 	{ .id = CS420X_IMAC27_122, .name = "imac27_122" },
382*4882a593Smuzhiyun 	{ .id = CS420X_APPLE, .name = "apple" },
383*4882a593Smuzhiyun 	{ .id = CS420X_MBP101, .name = "mbp101" },
384*4882a593Smuzhiyun 	{ .id = CS420X_MBP81, .name = "mbp81" },
385*4882a593Smuzhiyun 	{ .id = CS420X_MBA42, .name = "mba42" },
386*4882a593Smuzhiyun 	{}
387*4882a593Smuzhiyun };
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
390*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
391*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
392*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
393*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
394*4882a593Smuzhiyun 	/* this conflicts with too many other models */
395*4882a593Smuzhiyun 	/*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	/* codec SSID */
398*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x106b, 0x0600, "iMac 14,1", CS420X_IMAC27_122),
399*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x106b, 0x0900, "iMac 12,1", CS420X_IMAC27_122),
400*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
401*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
402*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
403*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x106b, 0x5600, "MacBookAir 5,2", CS420X_MBP81),
404*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
405*4882a593Smuzhiyun 	SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
406*4882a593Smuzhiyun 	{} /* terminator */
407*4882a593Smuzhiyun };
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun static const struct hda_pintbl mbp53_pincfgs[] = {
410*4882a593Smuzhiyun 	{ 0x09, 0x012b4050 },
411*4882a593Smuzhiyun 	{ 0x0a, 0x90100141 },
412*4882a593Smuzhiyun 	{ 0x0b, 0x90100140 },
413*4882a593Smuzhiyun 	{ 0x0c, 0x018b3020 },
414*4882a593Smuzhiyun 	{ 0x0d, 0x90a00110 },
415*4882a593Smuzhiyun 	{ 0x0e, 0x400000f0 },
416*4882a593Smuzhiyun 	{ 0x0f, 0x01cbe030 },
417*4882a593Smuzhiyun 	{ 0x10, 0x014be060 },
418*4882a593Smuzhiyun 	{ 0x12, 0x400000f0 },
419*4882a593Smuzhiyun 	{ 0x15, 0x400000f0 },
420*4882a593Smuzhiyun 	{} /* terminator */
421*4882a593Smuzhiyun };
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun static const struct hda_pintbl mbp55_pincfgs[] = {
424*4882a593Smuzhiyun 	{ 0x09, 0x012b4030 },
425*4882a593Smuzhiyun 	{ 0x0a, 0x90100121 },
426*4882a593Smuzhiyun 	{ 0x0b, 0x90100120 },
427*4882a593Smuzhiyun 	{ 0x0c, 0x400000f0 },
428*4882a593Smuzhiyun 	{ 0x0d, 0x90a00110 },
429*4882a593Smuzhiyun 	{ 0x0e, 0x400000f0 },
430*4882a593Smuzhiyun 	{ 0x0f, 0x400000f0 },
431*4882a593Smuzhiyun 	{ 0x10, 0x014be040 },
432*4882a593Smuzhiyun 	{ 0x12, 0x400000f0 },
433*4882a593Smuzhiyun 	{ 0x15, 0x400000f0 },
434*4882a593Smuzhiyun 	{} /* terminator */
435*4882a593Smuzhiyun };
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun static const struct hda_pintbl imac27_pincfgs[] = {
438*4882a593Smuzhiyun 	{ 0x09, 0x012b4050 },
439*4882a593Smuzhiyun 	{ 0x0a, 0x90100140 },
440*4882a593Smuzhiyun 	{ 0x0b, 0x90100142 },
441*4882a593Smuzhiyun 	{ 0x0c, 0x018b3020 },
442*4882a593Smuzhiyun 	{ 0x0d, 0x90a00110 },
443*4882a593Smuzhiyun 	{ 0x0e, 0x400000f0 },
444*4882a593Smuzhiyun 	{ 0x0f, 0x01cbe030 },
445*4882a593Smuzhiyun 	{ 0x10, 0x014be060 },
446*4882a593Smuzhiyun 	{ 0x12, 0x01ab9070 },
447*4882a593Smuzhiyun 	{ 0x15, 0x400000f0 },
448*4882a593Smuzhiyun 	{} /* terminator */
449*4882a593Smuzhiyun };
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun static const struct hda_pintbl mbp101_pincfgs[] = {
452*4882a593Smuzhiyun 	{ 0x0d, 0x40ab90f0 },
453*4882a593Smuzhiyun 	{ 0x0e, 0x90a600f0 },
454*4882a593Smuzhiyun 	{ 0x12, 0x50a600f0 },
455*4882a593Smuzhiyun 	{} /* terminator */
456*4882a593Smuzhiyun };
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun static const struct hda_pintbl mba42_pincfgs[] = {
459*4882a593Smuzhiyun 	{ 0x09, 0x012b4030 }, /* HP */
460*4882a593Smuzhiyun 	{ 0x0a, 0x400000f0 },
461*4882a593Smuzhiyun 	{ 0x0b, 0x90100120 }, /* speaker */
462*4882a593Smuzhiyun 	{ 0x0c, 0x400000f0 },
463*4882a593Smuzhiyun 	{ 0x0d, 0x90a00110 }, /* mic */
464*4882a593Smuzhiyun 	{ 0x0e, 0x400000f0 },
465*4882a593Smuzhiyun 	{ 0x0f, 0x400000f0 },
466*4882a593Smuzhiyun 	{ 0x10, 0x400000f0 },
467*4882a593Smuzhiyun 	{ 0x12, 0x400000f0 },
468*4882a593Smuzhiyun 	{ 0x15, 0x400000f0 },
469*4882a593Smuzhiyun 	{} /* terminator */
470*4882a593Smuzhiyun };
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun static const struct hda_pintbl mba6_pincfgs[] = {
473*4882a593Smuzhiyun 	{ 0x10, 0x032120f0 }, /* HP */
474*4882a593Smuzhiyun 	{ 0x11, 0x500000f0 },
475*4882a593Smuzhiyun 	{ 0x12, 0x90100010 }, /* Speaker */
476*4882a593Smuzhiyun 	{ 0x13, 0x500000f0 },
477*4882a593Smuzhiyun 	{ 0x14, 0x500000f0 },
478*4882a593Smuzhiyun 	{ 0x15, 0x770000f0 },
479*4882a593Smuzhiyun 	{ 0x16, 0x770000f0 },
480*4882a593Smuzhiyun 	{ 0x17, 0x430000f0 },
481*4882a593Smuzhiyun 	{ 0x18, 0x43ab9030 }, /* Mic */
482*4882a593Smuzhiyun 	{ 0x19, 0x770000f0 },
483*4882a593Smuzhiyun 	{ 0x1a, 0x770000f0 },
484*4882a593Smuzhiyun 	{ 0x1b, 0x770000f0 },
485*4882a593Smuzhiyun 	{ 0x1c, 0x90a00090 },
486*4882a593Smuzhiyun 	{ 0x1d, 0x500000f0 },
487*4882a593Smuzhiyun 	{ 0x1e, 0x500000f0 },
488*4882a593Smuzhiyun 	{ 0x1f, 0x500000f0 },
489*4882a593Smuzhiyun 	{ 0x20, 0x500000f0 },
490*4882a593Smuzhiyun 	{ 0x21, 0x430000f0 },
491*4882a593Smuzhiyun 	{ 0x22, 0x430000f0 },
492*4882a593Smuzhiyun 	{} /* terminator */
493*4882a593Smuzhiyun };
494*4882a593Smuzhiyun 
cs420x_fixup_gpio_13(struct hda_codec * codec,const struct hda_fixup * fix,int action)495*4882a593Smuzhiyun static void cs420x_fixup_gpio_13(struct hda_codec *codec,
496*4882a593Smuzhiyun 				 const struct hda_fixup *fix, int action)
497*4882a593Smuzhiyun {
498*4882a593Smuzhiyun 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
499*4882a593Smuzhiyun 		struct cs_spec *spec = codec->spec;
500*4882a593Smuzhiyun 		spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
501*4882a593Smuzhiyun 		spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
502*4882a593Smuzhiyun 		spec->gpio_mask = spec->gpio_dir =
503*4882a593Smuzhiyun 			spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
504*4882a593Smuzhiyun 	}
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun 
cs420x_fixup_gpio_23(struct hda_codec * codec,const struct hda_fixup * fix,int action)507*4882a593Smuzhiyun static void cs420x_fixup_gpio_23(struct hda_codec *codec,
508*4882a593Smuzhiyun 				 const struct hda_fixup *fix, int action)
509*4882a593Smuzhiyun {
510*4882a593Smuzhiyun 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
511*4882a593Smuzhiyun 		struct cs_spec *spec = codec->spec;
512*4882a593Smuzhiyun 		spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
513*4882a593Smuzhiyun 		spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
514*4882a593Smuzhiyun 		spec->gpio_mask = spec->gpio_dir =
515*4882a593Smuzhiyun 			spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
516*4882a593Smuzhiyun 	}
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun static const struct hda_fixup cs420x_fixups[] = {
520*4882a593Smuzhiyun 	[CS420X_MBP53] = {
521*4882a593Smuzhiyun 		.type = HDA_FIXUP_PINS,
522*4882a593Smuzhiyun 		.v.pins = mbp53_pincfgs,
523*4882a593Smuzhiyun 		.chained = true,
524*4882a593Smuzhiyun 		.chain_id = CS420X_APPLE,
525*4882a593Smuzhiyun 	},
526*4882a593Smuzhiyun 	[CS420X_MBP55] = {
527*4882a593Smuzhiyun 		.type = HDA_FIXUP_PINS,
528*4882a593Smuzhiyun 		.v.pins = mbp55_pincfgs,
529*4882a593Smuzhiyun 		.chained = true,
530*4882a593Smuzhiyun 		.chain_id = CS420X_GPIO_13,
531*4882a593Smuzhiyun 	},
532*4882a593Smuzhiyun 	[CS420X_IMAC27] = {
533*4882a593Smuzhiyun 		.type = HDA_FIXUP_PINS,
534*4882a593Smuzhiyun 		.v.pins = imac27_pincfgs,
535*4882a593Smuzhiyun 		.chained = true,
536*4882a593Smuzhiyun 		.chain_id = CS420X_GPIO_13,
537*4882a593Smuzhiyun 	},
538*4882a593Smuzhiyun 	[CS420X_GPIO_13] = {
539*4882a593Smuzhiyun 		.type = HDA_FIXUP_FUNC,
540*4882a593Smuzhiyun 		.v.func = cs420x_fixup_gpio_13,
541*4882a593Smuzhiyun 	},
542*4882a593Smuzhiyun 	[CS420X_GPIO_23] = {
543*4882a593Smuzhiyun 		.type = HDA_FIXUP_FUNC,
544*4882a593Smuzhiyun 		.v.func = cs420x_fixup_gpio_23,
545*4882a593Smuzhiyun 	},
546*4882a593Smuzhiyun 	[CS420X_MBP101] = {
547*4882a593Smuzhiyun 		.type = HDA_FIXUP_PINS,
548*4882a593Smuzhiyun 		.v.pins = mbp101_pincfgs,
549*4882a593Smuzhiyun 		.chained = true,
550*4882a593Smuzhiyun 		.chain_id = CS420X_GPIO_13,
551*4882a593Smuzhiyun 	},
552*4882a593Smuzhiyun 	[CS420X_MBP81] = {
553*4882a593Smuzhiyun 		.type = HDA_FIXUP_VERBS,
554*4882a593Smuzhiyun 		.v.verbs = (const struct hda_verb[]) {
555*4882a593Smuzhiyun 			/* internal mic ADC2: right only, single ended */
556*4882a593Smuzhiyun 			{0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
557*4882a593Smuzhiyun 			{0x11, AC_VERB_SET_PROC_COEF, 0x102a},
558*4882a593Smuzhiyun 			{}
559*4882a593Smuzhiyun 		},
560*4882a593Smuzhiyun 		.chained = true,
561*4882a593Smuzhiyun 		.chain_id = CS420X_GPIO_13,
562*4882a593Smuzhiyun 	},
563*4882a593Smuzhiyun 	[CS420X_MBA42] = {
564*4882a593Smuzhiyun 		.type = HDA_FIXUP_PINS,
565*4882a593Smuzhiyun 		.v.pins = mba42_pincfgs,
566*4882a593Smuzhiyun 		.chained = true,
567*4882a593Smuzhiyun 		.chain_id = CS420X_GPIO_13,
568*4882a593Smuzhiyun 	},
569*4882a593Smuzhiyun };
570*4882a593Smuzhiyun 
cs_alloc_spec(struct hda_codec * codec,int vendor_nid)571*4882a593Smuzhiyun static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
572*4882a593Smuzhiyun {
573*4882a593Smuzhiyun 	struct cs_spec *spec;
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun 	spec = kzalloc(sizeof(*spec), GFP_KERNEL);
576*4882a593Smuzhiyun 	if (!spec)
577*4882a593Smuzhiyun 		return NULL;
578*4882a593Smuzhiyun 	codec->spec = spec;
579*4882a593Smuzhiyun 	spec->vendor_nid = vendor_nid;
580*4882a593Smuzhiyun 	codec->power_save_node = 1;
581*4882a593Smuzhiyun 	snd_hda_gen_spec_init(&spec->gen);
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 	return spec;
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun 
patch_cs420x(struct hda_codec * codec)586*4882a593Smuzhiyun static int patch_cs420x(struct hda_codec *codec)
587*4882a593Smuzhiyun {
588*4882a593Smuzhiyun 	struct cs_spec *spec;
589*4882a593Smuzhiyun 	int err;
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
592*4882a593Smuzhiyun 	if (!spec)
593*4882a593Smuzhiyun 		return -ENOMEM;
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 	codec->patch_ops = cs_patch_ops;
596*4882a593Smuzhiyun 	spec->gen.automute_hook = cs_automute;
597*4882a593Smuzhiyun 	codec->single_adc_amp = 1;
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 	snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
600*4882a593Smuzhiyun 			   cs420x_fixups);
601*4882a593Smuzhiyun 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun 	err = cs_parse_auto_config(codec);
604*4882a593Smuzhiyun 	if (err < 0)
605*4882a593Smuzhiyun 		goto error;
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 	return 0;
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun  error:
612*4882a593Smuzhiyun 	cs_free(codec);
613*4882a593Smuzhiyun 	return err;
614*4882a593Smuzhiyun }
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun /*
617*4882a593Smuzhiyun  * CS4208 support:
618*4882a593Smuzhiyun  * Its layout is no longer compatible with CS4206/CS4207
619*4882a593Smuzhiyun  */
620*4882a593Smuzhiyun enum {
621*4882a593Smuzhiyun 	CS4208_MAC_AUTO,
622*4882a593Smuzhiyun 	CS4208_MBA6,
623*4882a593Smuzhiyun 	CS4208_MBP11,
624*4882a593Smuzhiyun 	CS4208_MACMINI,
625*4882a593Smuzhiyun 	CS4208_GPIO0,
626*4882a593Smuzhiyun };
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun static const struct hda_model_fixup cs4208_models[] = {
629*4882a593Smuzhiyun 	{ .id = CS4208_GPIO0, .name = "gpio0" },
630*4882a593Smuzhiyun 	{ .id = CS4208_MBA6, .name = "mba6" },
631*4882a593Smuzhiyun 	{ .id = CS4208_MBP11, .name = "mbp11" },
632*4882a593Smuzhiyun 	{ .id = CS4208_MACMINI, .name = "macmini" },
633*4882a593Smuzhiyun 	{}
634*4882a593Smuzhiyun };
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun static const struct snd_pci_quirk cs4208_fixup_tbl[] = {
637*4882a593Smuzhiyun 	SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO),
638*4882a593Smuzhiyun 	{} /* terminator */
639*4882a593Smuzhiyun };
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun /* codec SSID matching */
642*4882a593Smuzhiyun static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = {
643*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11),
644*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x106b, 0x6c00, "MacMini 7,1", CS4208_MACMINI),
645*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6),
646*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6),
647*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x106b, 0x7b00, "MacBookPro 12,1", CS4208_MBP11),
648*4882a593Smuzhiyun 	{} /* terminator */
649*4882a593Smuzhiyun };
650*4882a593Smuzhiyun 
cs4208_fixup_gpio0(struct hda_codec * codec,const struct hda_fixup * fix,int action)651*4882a593Smuzhiyun static void cs4208_fixup_gpio0(struct hda_codec *codec,
652*4882a593Smuzhiyun 			       const struct hda_fixup *fix, int action)
653*4882a593Smuzhiyun {
654*4882a593Smuzhiyun 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
655*4882a593Smuzhiyun 		struct cs_spec *spec = codec->spec;
656*4882a593Smuzhiyun 		spec->gpio_eapd_hp = 0;
657*4882a593Smuzhiyun 		spec->gpio_eapd_speaker = 1;
658*4882a593Smuzhiyun 		spec->gpio_mask = spec->gpio_dir =
659*4882a593Smuzhiyun 			spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
660*4882a593Smuzhiyun 	}
661*4882a593Smuzhiyun }
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun static const struct hda_fixup cs4208_fixups[];
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun /* remap the fixup from codec SSID and apply it */
cs4208_fixup_mac(struct hda_codec * codec,const struct hda_fixup * fix,int action)666*4882a593Smuzhiyun static void cs4208_fixup_mac(struct hda_codec *codec,
667*4882a593Smuzhiyun 			     const struct hda_fixup *fix, int action)
668*4882a593Smuzhiyun {
669*4882a593Smuzhiyun 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
670*4882a593Smuzhiyun 		return;
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
673*4882a593Smuzhiyun 	snd_hda_pick_fixup(codec, NULL, cs4208_mac_fixup_tbl, cs4208_fixups);
674*4882a593Smuzhiyun 	if (codec->fixup_id == HDA_FIXUP_ID_NOT_SET)
675*4882a593Smuzhiyun 		codec->fixup_id = CS4208_GPIO0; /* default fixup */
676*4882a593Smuzhiyun 	snd_hda_apply_fixup(codec, action);
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun /* MacMini 7,1 has the inverted jack detection */
cs4208_fixup_macmini(struct hda_codec * codec,const struct hda_fixup * fix,int action)680*4882a593Smuzhiyun static void cs4208_fixup_macmini(struct hda_codec *codec,
681*4882a593Smuzhiyun 				 const struct hda_fixup *fix, int action)
682*4882a593Smuzhiyun {
683*4882a593Smuzhiyun 	static const struct hda_pintbl pincfgs[] = {
684*4882a593Smuzhiyun 		{ 0x18, 0x00ab9150 }, /* mic (audio-in) jack: disable detect */
685*4882a593Smuzhiyun 		{ 0x21, 0x004be140 }, /* SPDIF: disable detect */
686*4882a593Smuzhiyun 		{ }
687*4882a593Smuzhiyun 	};
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
690*4882a593Smuzhiyun 		/* HP pin (0x10) has an inverted detection */
691*4882a593Smuzhiyun 		codec->inv_jack_detect = 1;
692*4882a593Smuzhiyun 		/* disable the bogus Mic and SPDIF jack detections */
693*4882a593Smuzhiyun 		snd_hda_apply_pincfgs(codec, pincfgs);
694*4882a593Smuzhiyun 	}
695*4882a593Smuzhiyun }
696*4882a593Smuzhiyun 
cs4208_spdif_sw_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)697*4882a593Smuzhiyun static int cs4208_spdif_sw_put(struct snd_kcontrol *kcontrol,
698*4882a593Smuzhiyun 			       struct snd_ctl_elem_value *ucontrol)
699*4882a593Smuzhiyun {
700*4882a593Smuzhiyun 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
701*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
702*4882a593Smuzhiyun 	hda_nid_t pin = spec->gen.autocfg.dig_out_pins[0];
703*4882a593Smuzhiyun 	int pinctl = ucontrol->value.integer.value[0] ? PIN_OUT : 0;
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 	snd_hda_set_pin_ctl_cache(codec, pin, pinctl);
706*4882a593Smuzhiyun 	return spec->spdif_sw_put(kcontrol, ucontrol);
707*4882a593Smuzhiyun }
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun /* hook the SPDIF switch */
cs4208_fixup_spdif_switch(struct hda_codec * codec,const struct hda_fixup * fix,int action)710*4882a593Smuzhiyun static void cs4208_fixup_spdif_switch(struct hda_codec *codec,
711*4882a593Smuzhiyun 				      const struct hda_fixup *fix, int action)
712*4882a593Smuzhiyun {
713*4882a593Smuzhiyun 	if (action == HDA_FIXUP_ACT_BUILD) {
714*4882a593Smuzhiyun 		struct cs_spec *spec = codec->spec;
715*4882a593Smuzhiyun 		struct snd_kcontrol *kctl;
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun 		if (!spec->gen.autocfg.dig_out_pins[0])
718*4882a593Smuzhiyun 			return;
719*4882a593Smuzhiyun 		kctl = snd_hda_find_mixer_ctl(codec, "IEC958 Playback Switch");
720*4882a593Smuzhiyun 		if (!kctl)
721*4882a593Smuzhiyun 			return;
722*4882a593Smuzhiyun 		spec->spdif_sw_put = kctl->put;
723*4882a593Smuzhiyun 		kctl->put = cs4208_spdif_sw_put;
724*4882a593Smuzhiyun 	}
725*4882a593Smuzhiyun }
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun static const struct hda_fixup cs4208_fixups[] = {
728*4882a593Smuzhiyun 	[CS4208_MBA6] = {
729*4882a593Smuzhiyun 		.type = HDA_FIXUP_PINS,
730*4882a593Smuzhiyun 		.v.pins = mba6_pincfgs,
731*4882a593Smuzhiyun 		.chained = true,
732*4882a593Smuzhiyun 		.chain_id = CS4208_GPIO0,
733*4882a593Smuzhiyun 	},
734*4882a593Smuzhiyun 	[CS4208_MBP11] = {
735*4882a593Smuzhiyun 		.type = HDA_FIXUP_FUNC,
736*4882a593Smuzhiyun 		.v.func = cs4208_fixup_spdif_switch,
737*4882a593Smuzhiyun 		.chained = true,
738*4882a593Smuzhiyun 		.chain_id = CS4208_GPIO0,
739*4882a593Smuzhiyun 	},
740*4882a593Smuzhiyun 	[CS4208_MACMINI] = {
741*4882a593Smuzhiyun 		.type = HDA_FIXUP_FUNC,
742*4882a593Smuzhiyun 		.v.func = cs4208_fixup_macmini,
743*4882a593Smuzhiyun 		.chained = true,
744*4882a593Smuzhiyun 		.chain_id = CS4208_GPIO0,
745*4882a593Smuzhiyun 	},
746*4882a593Smuzhiyun 	[CS4208_GPIO0] = {
747*4882a593Smuzhiyun 		.type = HDA_FIXUP_FUNC,
748*4882a593Smuzhiyun 		.v.func = cs4208_fixup_gpio0,
749*4882a593Smuzhiyun 	},
750*4882a593Smuzhiyun 	[CS4208_MAC_AUTO] = {
751*4882a593Smuzhiyun 		.type = HDA_FIXUP_FUNC,
752*4882a593Smuzhiyun 		.v.func = cs4208_fixup_mac,
753*4882a593Smuzhiyun 	},
754*4882a593Smuzhiyun };
755*4882a593Smuzhiyun 
756*4882a593Smuzhiyun /* correct the 0dB offset of input pins */
cs4208_fix_amp_caps(struct hda_codec * codec,hda_nid_t adc)757*4882a593Smuzhiyun static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun 	unsigned int caps;
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 	caps = query_amp_caps(codec, adc, HDA_INPUT);
762*4882a593Smuzhiyun 	caps &= ~(AC_AMPCAP_OFFSET);
763*4882a593Smuzhiyun 	caps |= 0x02;
764*4882a593Smuzhiyun 	snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps);
765*4882a593Smuzhiyun }
766*4882a593Smuzhiyun 
patch_cs4208(struct hda_codec * codec)767*4882a593Smuzhiyun static int patch_cs4208(struct hda_codec *codec)
768*4882a593Smuzhiyun {
769*4882a593Smuzhiyun 	struct cs_spec *spec;
770*4882a593Smuzhiyun 	int err;
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun 	spec = cs_alloc_spec(codec, CS4208_VENDOR_NID);
773*4882a593Smuzhiyun 	if (!spec)
774*4882a593Smuzhiyun 		return -ENOMEM;
775*4882a593Smuzhiyun 
776*4882a593Smuzhiyun 	codec->patch_ops = cs_patch_ops;
777*4882a593Smuzhiyun 	spec->gen.automute_hook = cs_automute;
778*4882a593Smuzhiyun 	/* exclude NID 0x10 (HP) from output volumes due to different steps */
779*4882a593Smuzhiyun 	spec->gen.out_vol_mask = 1ULL << 0x10;
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl,
782*4882a593Smuzhiyun 			   cs4208_fixups);
783*4882a593Smuzhiyun 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun 	snd_hda_override_wcaps(codec, 0x18,
786*4882a593Smuzhiyun 			       get_wcaps(codec, 0x18) | AC_WCAP_STEREO);
787*4882a593Smuzhiyun 	cs4208_fix_amp_caps(codec, 0x18);
788*4882a593Smuzhiyun 	cs4208_fix_amp_caps(codec, 0x1b);
789*4882a593Smuzhiyun 	cs4208_fix_amp_caps(codec, 0x1c);
790*4882a593Smuzhiyun 
791*4882a593Smuzhiyun 	err = cs_parse_auto_config(codec);
792*4882a593Smuzhiyun 	if (err < 0)
793*4882a593Smuzhiyun 		goto error;
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
796*4882a593Smuzhiyun 
797*4882a593Smuzhiyun 	return 0;
798*4882a593Smuzhiyun 
799*4882a593Smuzhiyun  error:
800*4882a593Smuzhiyun 	cs_free(codec);
801*4882a593Smuzhiyun 	return err;
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun /*
805*4882a593Smuzhiyun  * Cirrus Logic CS4210
806*4882a593Smuzhiyun  *
807*4882a593Smuzhiyun  * 1 DAC => HP(sense) / Speakers,
808*4882a593Smuzhiyun  * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
809*4882a593Smuzhiyun  * 1 SPDIF OUT => SPDIF Trasmitter(sense)
810*4882a593Smuzhiyun */
811*4882a593Smuzhiyun 
812*4882a593Smuzhiyun /* CS4210 board names */
813*4882a593Smuzhiyun static const struct hda_model_fixup cs421x_models[] = {
814*4882a593Smuzhiyun 	{ .id = CS421X_CDB4210, .name = "cdb4210" },
815*4882a593Smuzhiyun 	{ .id = CS421X_STUMPY, .name = "stumpy" },
816*4882a593Smuzhiyun 	{}
817*4882a593Smuzhiyun };
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
820*4882a593Smuzhiyun 	/* Test Intel board + CDB2410  */
821*4882a593Smuzhiyun 	SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
822*4882a593Smuzhiyun 	{} /* terminator */
823*4882a593Smuzhiyun };
824*4882a593Smuzhiyun 
825*4882a593Smuzhiyun /* CS4210 board pinconfigs */
826*4882a593Smuzhiyun /* Default CS4210 (CDB4210)*/
827*4882a593Smuzhiyun static const struct hda_pintbl cdb4210_pincfgs[] = {
828*4882a593Smuzhiyun 	{ 0x05, 0x0321401f },
829*4882a593Smuzhiyun 	{ 0x06, 0x90170010 },
830*4882a593Smuzhiyun 	{ 0x07, 0x03813031 },
831*4882a593Smuzhiyun 	{ 0x08, 0xb7a70037 },
832*4882a593Smuzhiyun 	{ 0x09, 0xb7a6003e },
833*4882a593Smuzhiyun 	{ 0x0a, 0x034510f0 },
834*4882a593Smuzhiyun 	{} /* terminator */
835*4882a593Smuzhiyun };
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun /* Stumpy ChromeBox */
838*4882a593Smuzhiyun static const struct hda_pintbl stumpy_pincfgs[] = {
839*4882a593Smuzhiyun 	{ 0x05, 0x022120f0 },
840*4882a593Smuzhiyun 	{ 0x06, 0x901700f0 },
841*4882a593Smuzhiyun 	{ 0x07, 0x02a120f0 },
842*4882a593Smuzhiyun 	{ 0x08, 0x77a70037 },
843*4882a593Smuzhiyun 	{ 0x09, 0x77a6003e },
844*4882a593Smuzhiyun 	{ 0x0a, 0x434510f0 },
845*4882a593Smuzhiyun 	{} /* terminator */
846*4882a593Smuzhiyun };
847*4882a593Smuzhiyun 
848*4882a593Smuzhiyun /* Setup GPIO/SENSE for each board (if used) */
cs421x_fixup_sense_b(struct hda_codec * codec,const struct hda_fixup * fix,int action)849*4882a593Smuzhiyun static void cs421x_fixup_sense_b(struct hda_codec *codec,
850*4882a593Smuzhiyun 				 const struct hda_fixup *fix, int action)
851*4882a593Smuzhiyun {
852*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
853*4882a593Smuzhiyun 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
854*4882a593Smuzhiyun 		spec->sense_b = 1;
855*4882a593Smuzhiyun }
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun static const struct hda_fixup cs421x_fixups[] = {
858*4882a593Smuzhiyun 	[CS421X_CDB4210] = {
859*4882a593Smuzhiyun 		.type = HDA_FIXUP_PINS,
860*4882a593Smuzhiyun 		.v.pins = cdb4210_pincfgs,
861*4882a593Smuzhiyun 		.chained = true,
862*4882a593Smuzhiyun 		.chain_id = CS421X_SENSE_B,
863*4882a593Smuzhiyun 	},
864*4882a593Smuzhiyun 	[CS421X_SENSE_B] = {
865*4882a593Smuzhiyun 		.type = HDA_FIXUP_FUNC,
866*4882a593Smuzhiyun 		.v.func = cs421x_fixup_sense_b,
867*4882a593Smuzhiyun 	},
868*4882a593Smuzhiyun 	[CS421X_STUMPY] = {
869*4882a593Smuzhiyun 		.type = HDA_FIXUP_PINS,
870*4882a593Smuzhiyun 		.v.pins = stumpy_pincfgs,
871*4882a593Smuzhiyun 	},
872*4882a593Smuzhiyun };
873*4882a593Smuzhiyun 
874*4882a593Smuzhiyun static const struct hda_verb cs421x_coef_init_verbs[] = {
875*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_PROC_STATE, 1},
876*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
877*4882a593Smuzhiyun 	/*
878*4882a593Smuzhiyun 	    Disable Coefficient Index Auto-Increment(DAI)=1,
879*4882a593Smuzhiyun 	    PDREF=0
880*4882a593Smuzhiyun 	*/
881*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
882*4882a593Smuzhiyun 
883*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
884*4882a593Smuzhiyun 	/* ADC SZCMode = Digital Soft Ramp */
885*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
886*4882a593Smuzhiyun 
887*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
888*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_PROC_COEF,
889*4882a593Smuzhiyun 	 (0x0002 /* DAC SZCMode = Digital Soft Ramp */
890*4882a593Smuzhiyun 	  | 0x0004 /* Mute DAC on FIFO error */
891*4882a593Smuzhiyun 	  | 0x0008 /* Enable DAC High Pass Filter */
892*4882a593Smuzhiyun 	  )},
893*4882a593Smuzhiyun 	{} /* terminator */
894*4882a593Smuzhiyun };
895*4882a593Smuzhiyun 
896*4882a593Smuzhiyun /* Errata: CS4210 rev A1 Silicon
897*4882a593Smuzhiyun  *
898*4882a593Smuzhiyun  * http://www.cirrus.com/en/pubs/errata/
899*4882a593Smuzhiyun  *
900*4882a593Smuzhiyun  * Description:
901*4882a593Smuzhiyun  * 1. Performance degredation is present in the ADC.
902*4882a593Smuzhiyun  * 2. Speaker output is not completely muted upon HP detect.
903*4882a593Smuzhiyun  * 3. Noise is present when clipping occurs on the amplified
904*4882a593Smuzhiyun  *    speaker outputs.
905*4882a593Smuzhiyun  *
906*4882a593Smuzhiyun  * Workaround:
907*4882a593Smuzhiyun  * The following verb sequence written to the registers during
908*4882a593Smuzhiyun  * initialization will correct the issues listed above.
909*4882a593Smuzhiyun  */
910*4882a593Smuzhiyun 
911*4882a593Smuzhiyun static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
912*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_PROC_STATE, 0x01},  /* VPW: processing on */
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
915*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
916*4882a593Smuzhiyun 
917*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
918*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
919*4882a593Smuzhiyun 
920*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
921*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
922*4882a593Smuzhiyun 
923*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
924*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
925*4882a593Smuzhiyun 
926*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
927*4882a593Smuzhiyun 	{0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
928*4882a593Smuzhiyun 
929*4882a593Smuzhiyun 	{} /* terminator */
930*4882a593Smuzhiyun };
931*4882a593Smuzhiyun 
932*4882a593Smuzhiyun /* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
933*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
934*4882a593Smuzhiyun 
cs421x_boost_vol_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)935*4882a593Smuzhiyun static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
936*4882a593Smuzhiyun 				struct snd_ctl_elem_info *uinfo)
937*4882a593Smuzhiyun {
938*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
939*4882a593Smuzhiyun 	uinfo->count = 1;
940*4882a593Smuzhiyun 	uinfo->value.integer.min = 0;
941*4882a593Smuzhiyun 	uinfo->value.integer.max = 3;
942*4882a593Smuzhiyun 	return 0;
943*4882a593Smuzhiyun }
944*4882a593Smuzhiyun 
cs421x_boost_vol_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)945*4882a593Smuzhiyun static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
946*4882a593Smuzhiyun 				struct snd_ctl_elem_value *ucontrol)
947*4882a593Smuzhiyun {
948*4882a593Smuzhiyun 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] =
951*4882a593Smuzhiyun 		cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
952*4882a593Smuzhiyun 	return 0;
953*4882a593Smuzhiyun }
954*4882a593Smuzhiyun 
cs421x_boost_vol_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)955*4882a593Smuzhiyun static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
956*4882a593Smuzhiyun 				struct snd_ctl_elem_value *ucontrol)
957*4882a593Smuzhiyun {
958*4882a593Smuzhiyun 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
959*4882a593Smuzhiyun 
960*4882a593Smuzhiyun 	unsigned int vol = ucontrol->value.integer.value[0];
961*4882a593Smuzhiyun 	unsigned int coef =
962*4882a593Smuzhiyun 		cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
963*4882a593Smuzhiyun 	unsigned int original_coef = coef;
964*4882a593Smuzhiyun 
965*4882a593Smuzhiyun 	coef &= ~0x0003;
966*4882a593Smuzhiyun 	coef |= (vol & 0x0003);
967*4882a593Smuzhiyun 	if (original_coef == coef)
968*4882a593Smuzhiyun 		return 0;
969*4882a593Smuzhiyun 	else {
970*4882a593Smuzhiyun 		cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
971*4882a593Smuzhiyun 		return 1;
972*4882a593Smuzhiyun 	}
973*4882a593Smuzhiyun }
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
976*4882a593Smuzhiyun 
977*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
978*4882a593Smuzhiyun 	.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
979*4882a593Smuzhiyun 			SNDRV_CTL_ELEM_ACCESS_TLV_READ),
980*4882a593Smuzhiyun 	.name = "Speaker Boost Playback Volume",
981*4882a593Smuzhiyun 	.info = cs421x_boost_vol_info,
982*4882a593Smuzhiyun 	.get = cs421x_boost_vol_get,
983*4882a593Smuzhiyun 	.put = cs421x_boost_vol_put,
984*4882a593Smuzhiyun 	.tlv = { .p = cs421x_speaker_boost_db_scale },
985*4882a593Smuzhiyun };
986*4882a593Smuzhiyun 
cs4210_pinmux_init(struct hda_codec * codec)987*4882a593Smuzhiyun static void cs4210_pinmux_init(struct hda_codec *codec)
988*4882a593Smuzhiyun {
989*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
990*4882a593Smuzhiyun 	unsigned int def_conf, coef;
991*4882a593Smuzhiyun 
992*4882a593Smuzhiyun 	/* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
993*4882a593Smuzhiyun 	coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun 	if (spec->gpio_mask)
996*4882a593Smuzhiyun 		coef |= 0x0008; /* B1,B2 are GPIOs */
997*4882a593Smuzhiyun 	else
998*4882a593Smuzhiyun 		coef &= ~0x0008;
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 	if (spec->sense_b)
1001*4882a593Smuzhiyun 		coef |= 0x0010; /* B2 is SENSE_B, not inverted  */
1002*4882a593Smuzhiyun 	else
1003*4882a593Smuzhiyun 		coef &= ~0x0010;
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun 	cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
1006*4882a593Smuzhiyun 
1007*4882a593Smuzhiyun 	if ((spec->gpio_mask || spec->sense_b) &&
1008*4882a593Smuzhiyun 	    is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
1009*4882a593Smuzhiyun 
1010*4882a593Smuzhiyun 		/*
1011*4882a593Smuzhiyun 		    GPIO or SENSE_B forced - disconnect the DMIC pin.
1012*4882a593Smuzhiyun 		*/
1013*4882a593Smuzhiyun 		def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
1014*4882a593Smuzhiyun 		def_conf &= ~AC_DEFCFG_PORT_CONN;
1015*4882a593Smuzhiyun 		def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
1016*4882a593Smuzhiyun 		snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
1017*4882a593Smuzhiyun 	}
1018*4882a593Smuzhiyun }
1019*4882a593Smuzhiyun 
cs4210_spdif_automute(struct hda_codec * codec,struct hda_jack_callback * tbl)1020*4882a593Smuzhiyun static void cs4210_spdif_automute(struct hda_codec *codec,
1021*4882a593Smuzhiyun 				  struct hda_jack_callback *tbl)
1022*4882a593Smuzhiyun {
1023*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
1024*4882a593Smuzhiyun 	bool spdif_present = false;
1025*4882a593Smuzhiyun 	hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
1026*4882a593Smuzhiyun 
1027*4882a593Smuzhiyun 	/* detect on spdif is specific to CS4210 */
1028*4882a593Smuzhiyun 	if (!spec->spdif_detect ||
1029*4882a593Smuzhiyun 	    spec->vendor_nid != CS4210_VENDOR_NID)
1030*4882a593Smuzhiyun 		return;
1031*4882a593Smuzhiyun 
1032*4882a593Smuzhiyun 	spdif_present = snd_hda_jack_detect(codec, spdif_pin);
1033*4882a593Smuzhiyun 	if (spdif_present == spec->spdif_present)
1034*4882a593Smuzhiyun 		return;
1035*4882a593Smuzhiyun 
1036*4882a593Smuzhiyun 	spec->spdif_present = spdif_present;
1037*4882a593Smuzhiyun 	/* SPDIF TX on/off */
1038*4882a593Smuzhiyun 	snd_hda_set_pin_ctl(codec, spdif_pin, spdif_present ? PIN_OUT : 0);
1039*4882a593Smuzhiyun 
1040*4882a593Smuzhiyun 	cs_automute(codec);
1041*4882a593Smuzhiyun }
1042*4882a593Smuzhiyun 
parse_cs421x_digital(struct hda_codec * codec)1043*4882a593Smuzhiyun static void parse_cs421x_digital(struct hda_codec *codec)
1044*4882a593Smuzhiyun {
1045*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
1046*4882a593Smuzhiyun 	struct auto_pin_cfg *cfg = &spec->gen.autocfg;
1047*4882a593Smuzhiyun 	int i;
1048*4882a593Smuzhiyun 
1049*4882a593Smuzhiyun 	for (i = 0; i < cfg->dig_outs; i++) {
1050*4882a593Smuzhiyun 		hda_nid_t nid = cfg->dig_out_pins[i];
1051*4882a593Smuzhiyun 		if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
1052*4882a593Smuzhiyun 			spec->spdif_detect = 1;
1053*4882a593Smuzhiyun 			snd_hda_jack_detect_enable_callback(codec, nid,
1054*4882a593Smuzhiyun 							    cs4210_spdif_automute);
1055*4882a593Smuzhiyun 		}
1056*4882a593Smuzhiyun 	}
1057*4882a593Smuzhiyun }
1058*4882a593Smuzhiyun 
cs421x_init(struct hda_codec * codec)1059*4882a593Smuzhiyun static int cs421x_init(struct hda_codec *codec)
1060*4882a593Smuzhiyun {
1061*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
1062*4882a593Smuzhiyun 
1063*4882a593Smuzhiyun 	if (spec->vendor_nid == CS4210_VENDOR_NID) {
1064*4882a593Smuzhiyun 		snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
1065*4882a593Smuzhiyun 		snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
1066*4882a593Smuzhiyun 		cs4210_pinmux_init(codec);
1067*4882a593Smuzhiyun 	}
1068*4882a593Smuzhiyun 
1069*4882a593Smuzhiyun 	snd_hda_gen_init(codec);
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun 	if (spec->gpio_mask) {
1072*4882a593Smuzhiyun 		snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
1073*4882a593Smuzhiyun 				    spec->gpio_mask);
1074*4882a593Smuzhiyun 		snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
1075*4882a593Smuzhiyun 				    spec->gpio_dir);
1076*4882a593Smuzhiyun 		snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
1077*4882a593Smuzhiyun 				    spec->gpio_data);
1078*4882a593Smuzhiyun 	}
1079*4882a593Smuzhiyun 
1080*4882a593Smuzhiyun 	init_input_coef(codec);
1081*4882a593Smuzhiyun 
1082*4882a593Smuzhiyun 	cs4210_spdif_automute(codec, NULL);
1083*4882a593Smuzhiyun 
1084*4882a593Smuzhiyun 	return 0;
1085*4882a593Smuzhiyun }
1086*4882a593Smuzhiyun 
fix_volume_caps(struct hda_codec * codec,hda_nid_t dac)1087*4882a593Smuzhiyun static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
1088*4882a593Smuzhiyun {
1089*4882a593Smuzhiyun 	unsigned int caps;
1090*4882a593Smuzhiyun 
1091*4882a593Smuzhiyun 	/* set the upper-limit for mixer amp to 0dB */
1092*4882a593Smuzhiyun 	caps = query_amp_caps(codec, dac, HDA_OUTPUT);
1093*4882a593Smuzhiyun 	caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
1094*4882a593Smuzhiyun 	caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
1095*4882a593Smuzhiyun 		<< AC_AMPCAP_NUM_STEPS_SHIFT;
1096*4882a593Smuzhiyun 	snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
1097*4882a593Smuzhiyun }
1098*4882a593Smuzhiyun 
cs421x_parse_auto_config(struct hda_codec * codec)1099*4882a593Smuzhiyun static int cs421x_parse_auto_config(struct hda_codec *codec)
1100*4882a593Smuzhiyun {
1101*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
1102*4882a593Smuzhiyun 	hda_nid_t dac = CS4210_DAC_NID;
1103*4882a593Smuzhiyun 	int err;
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun 	fix_volume_caps(codec, dac);
1106*4882a593Smuzhiyun 
1107*4882a593Smuzhiyun 	err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
1108*4882a593Smuzhiyun 	if (err < 0)
1109*4882a593Smuzhiyun 		return err;
1110*4882a593Smuzhiyun 
1111*4882a593Smuzhiyun 	err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
1112*4882a593Smuzhiyun 	if (err < 0)
1113*4882a593Smuzhiyun 		return err;
1114*4882a593Smuzhiyun 
1115*4882a593Smuzhiyun 	parse_cs421x_digital(codec);
1116*4882a593Smuzhiyun 
1117*4882a593Smuzhiyun 	if (spec->gen.autocfg.speaker_outs &&
1118*4882a593Smuzhiyun 	    spec->vendor_nid == CS4210_VENDOR_NID) {
1119*4882a593Smuzhiyun 		if (!snd_hda_gen_add_kctl(&spec->gen, NULL,
1120*4882a593Smuzhiyun 					  &cs421x_speaker_boost_ctl))
1121*4882a593Smuzhiyun 			return -ENOMEM;
1122*4882a593Smuzhiyun 	}
1123*4882a593Smuzhiyun 
1124*4882a593Smuzhiyun 	return 0;
1125*4882a593Smuzhiyun }
1126*4882a593Smuzhiyun 
1127*4882a593Smuzhiyun #ifdef CONFIG_PM
1128*4882a593Smuzhiyun /*
1129*4882a593Smuzhiyun 	Manage PDREF, when transitioning to D3hot
1130*4882a593Smuzhiyun 	(DAC,ADC) -> D3, PDREF=1, AFG->D3
1131*4882a593Smuzhiyun */
cs421x_suspend(struct hda_codec * codec)1132*4882a593Smuzhiyun static int cs421x_suspend(struct hda_codec *codec)
1133*4882a593Smuzhiyun {
1134*4882a593Smuzhiyun 	struct cs_spec *spec = codec->spec;
1135*4882a593Smuzhiyun 	unsigned int coef;
1136*4882a593Smuzhiyun 
1137*4882a593Smuzhiyun 	snd_hda_shutup_pins(codec);
1138*4882a593Smuzhiyun 
1139*4882a593Smuzhiyun 	snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
1140*4882a593Smuzhiyun 			    AC_VERB_SET_POWER_STATE,  AC_PWRST_D3);
1141*4882a593Smuzhiyun 	snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
1142*4882a593Smuzhiyun 			    AC_VERB_SET_POWER_STATE,  AC_PWRST_D3);
1143*4882a593Smuzhiyun 
1144*4882a593Smuzhiyun 	if (spec->vendor_nid == CS4210_VENDOR_NID) {
1145*4882a593Smuzhiyun 		coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
1146*4882a593Smuzhiyun 		coef |= 0x0004; /* PDREF */
1147*4882a593Smuzhiyun 		cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
1148*4882a593Smuzhiyun 	}
1149*4882a593Smuzhiyun 
1150*4882a593Smuzhiyun 	return 0;
1151*4882a593Smuzhiyun }
1152*4882a593Smuzhiyun #endif
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun static const struct hda_codec_ops cs421x_patch_ops = {
1155*4882a593Smuzhiyun 	.build_controls = snd_hda_gen_build_controls,
1156*4882a593Smuzhiyun 	.build_pcms = snd_hda_gen_build_pcms,
1157*4882a593Smuzhiyun 	.init = cs421x_init,
1158*4882a593Smuzhiyun 	.free = cs_free,
1159*4882a593Smuzhiyun 	.unsol_event = snd_hda_jack_unsol_event,
1160*4882a593Smuzhiyun #ifdef CONFIG_PM
1161*4882a593Smuzhiyun 	.suspend = cs421x_suspend,
1162*4882a593Smuzhiyun #endif
1163*4882a593Smuzhiyun };
1164*4882a593Smuzhiyun 
patch_cs4210(struct hda_codec * codec)1165*4882a593Smuzhiyun static int patch_cs4210(struct hda_codec *codec)
1166*4882a593Smuzhiyun {
1167*4882a593Smuzhiyun 	struct cs_spec *spec;
1168*4882a593Smuzhiyun 	int err;
1169*4882a593Smuzhiyun 
1170*4882a593Smuzhiyun 	spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
1171*4882a593Smuzhiyun 	if (!spec)
1172*4882a593Smuzhiyun 		return -ENOMEM;
1173*4882a593Smuzhiyun 
1174*4882a593Smuzhiyun 	codec->patch_ops = cs421x_patch_ops;
1175*4882a593Smuzhiyun 	spec->gen.automute_hook = cs_automute;
1176*4882a593Smuzhiyun 
1177*4882a593Smuzhiyun 	snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
1178*4882a593Smuzhiyun 			   cs421x_fixups);
1179*4882a593Smuzhiyun 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
1180*4882a593Smuzhiyun 
1181*4882a593Smuzhiyun 	/*
1182*4882a593Smuzhiyun 	    Update the GPIO/DMIC/SENSE_B pinmux before the configuration
1183*4882a593Smuzhiyun 	    is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
1184*4882a593Smuzhiyun 	    is disabled.
1185*4882a593Smuzhiyun 	*/
1186*4882a593Smuzhiyun 	cs4210_pinmux_init(codec);
1187*4882a593Smuzhiyun 
1188*4882a593Smuzhiyun 	err = cs421x_parse_auto_config(codec);
1189*4882a593Smuzhiyun 	if (err < 0)
1190*4882a593Smuzhiyun 		goto error;
1191*4882a593Smuzhiyun 
1192*4882a593Smuzhiyun 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
1193*4882a593Smuzhiyun 
1194*4882a593Smuzhiyun 	return 0;
1195*4882a593Smuzhiyun 
1196*4882a593Smuzhiyun  error:
1197*4882a593Smuzhiyun 	cs_free(codec);
1198*4882a593Smuzhiyun 	return err;
1199*4882a593Smuzhiyun }
1200*4882a593Smuzhiyun 
patch_cs4213(struct hda_codec * codec)1201*4882a593Smuzhiyun static int patch_cs4213(struct hda_codec *codec)
1202*4882a593Smuzhiyun {
1203*4882a593Smuzhiyun 	struct cs_spec *spec;
1204*4882a593Smuzhiyun 	int err;
1205*4882a593Smuzhiyun 
1206*4882a593Smuzhiyun 	spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
1207*4882a593Smuzhiyun 	if (!spec)
1208*4882a593Smuzhiyun 		return -ENOMEM;
1209*4882a593Smuzhiyun 
1210*4882a593Smuzhiyun 	codec->patch_ops = cs421x_patch_ops;
1211*4882a593Smuzhiyun 
1212*4882a593Smuzhiyun 	err = cs421x_parse_auto_config(codec);
1213*4882a593Smuzhiyun 	if (err < 0)
1214*4882a593Smuzhiyun 		goto error;
1215*4882a593Smuzhiyun 
1216*4882a593Smuzhiyun 	return 0;
1217*4882a593Smuzhiyun 
1218*4882a593Smuzhiyun  error:
1219*4882a593Smuzhiyun 	cs_free(codec);
1220*4882a593Smuzhiyun 	return err;
1221*4882a593Smuzhiyun }
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun 
1224*4882a593Smuzhiyun /*
1225*4882a593Smuzhiyun  * patch entries
1226*4882a593Smuzhiyun  */
1227*4882a593Smuzhiyun static const struct hda_device_id snd_hda_id_cirrus[] = {
1228*4882a593Smuzhiyun 	HDA_CODEC_ENTRY(0x10134206, "CS4206", patch_cs420x),
1229*4882a593Smuzhiyun 	HDA_CODEC_ENTRY(0x10134207, "CS4207", patch_cs420x),
1230*4882a593Smuzhiyun 	HDA_CODEC_ENTRY(0x10134208, "CS4208", patch_cs4208),
1231*4882a593Smuzhiyun 	HDA_CODEC_ENTRY(0x10134210, "CS4210", patch_cs4210),
1232*4882a593Smuzhiyun 	HDA_CODEC_ENTRY(0x10134213, "CS4213", patch_cs4213),
1233*4882a593Smuzhiyun 	{} /* terminator */
1234*4882a593Smuzhiyun };
1235*4882a593Smuzhiyun MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_cirrus);
1236*4882a593Smuzhiyun 
1237*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1238*4882a593Smuzhiyun MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
1239*4882a593Smuzhiyun 
1240*4882a593Smuzhiyun static struct hda_codec_driver cirrus_driver = {
1241*4882a593Smuzhiyun 	.id = snd_hda_id_cirrus,
1242*4882a593Smuzhiyun };
1243*4882a593Smuzhiyun 
1244*4882a593Smuzhiyun module_hda_codec_driver(cirrus_driver);
1245