xref: /OK3568_Linux_fs/kernel/sound/pci/emu10k1/irq.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4*4882a593Smuzhiyun  *                   Creative Labs, Inc.
5*4882a593Smuzhiyun  *  Routines for IRQ control of EMU10K1 chips
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  *  BUGS:
8*4882a593Smuzhiyun  *    --
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  *  TODO:
11*4882a593Smuzhiyun  *    --
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/time.h>
15*4882a593Smuzhiyun #include <sound/core.h>
16*4882a593Smuzhiyun #include <sound/emu10k1.h>
17*4882a593Smuzhiyun 
snd_emu10k1_interrupt(int irq,void * dev_id)18*4882a593Smuzhiyun irqreturn_t snd_emu10k1_interrupt(int irq, void *dev_id)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun 	struct snd_emu10k1 *emu = dev_id;
21*4882a593Smuzhiyun 	unsigned int status, status2, orig_status, orig_status2;
22*4882a593Smuzhiyun 	int handled = 0;
23*4882a593Smuzhiyun 	int timeout = 0;
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun 	while (((status = inl(emu->port + IPR)) != 0) && (timeout < 1000)) {
26*4882a593Smuzhiyun 		timeout++;
27*4882a593Smuzhiyun 		orig_status = status;
28*4882a593Smuzhiyun 		handled = 1;
29*4882a593Smuzhiyun 		if ((status & 0xffffffff) == 0xffffffff) {
30*4882a593Smuzhiyun 			dev_info(emu->card->dev,
31*4882a593Smuzhiyun 				 "Suspected sound card removal\n");
32*4882a593Smuzhiyun 			break;
33*4882a593Smuzhiyun 		}
34*4882a593Smuzhiyun 		if (status & IPR_PCIERROR) {
35*4882a593Smuzhiyun 			dev_err(emu->card->dev, "interrupt: PCI error\n");
36*4882a593Smuzhiyun 			snd_emu10k1_intr_disable(emu, INTE_PCIERRORENABLE);
37*4882a593Smuzhiyun 			status &= ~IPR_PCIERROR;
38*4882a593Smuzhiyun 		}
39*4882a593Smuzhiyun 		if (status & (IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE)) {
40*4882a593Smuzhiyun 			if (emu->hwvol_interrupt)
41*4882a593Smuzhiyun 				emu->hwvol_interrupt(emu, status);
42*4882a593Smuzhiyun 			else
43*4882a593Smuzhiyun 				snd_emu10k1_intr_disable(emu, INTE_VOLINCRENABLE|INTE_VOLDECRENABLE|INTE_MUTEENABLE);
44*4882a593Smuzhiyun 			status &= ~(IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE);
45*4882a593Smuzhiyun 		}
46*4882a593Smuzhiyun 		if (status & IPR_CHANNELLOOP) {
47*4882a593Smuzhiyun 			int voice;
48*4882a593Smuzhiyun 			int voice_max = status & IPR_CHANNELNUMBERMASK;
49*4882a593Smuzhiyun 			u32 val;
50*4882a593Smuzhiyun 			struct snd_emu10k1_voice *pvoice = emu->voices;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 			val = snd_emu10k1_ptr_read(emu, CLIPL, 0);
53*4882a593Smuzhiyun 			for (voice = 0; voice <= voice_max; voice++) {
54*4882a593Smuzhiyun 				if (voice == 0x20)
55*4882a593Smuzhiyun 					val = snd_emu10k1_ptr_read(emu, CLIPH, 0);
56*4882a593Smuzhiyun 				if (val & 1) {
57*4882a593Smuzhiyun 					if (pvoice->use && pvoice->interrupt != NULL) {
58*4882a593Smuzhiyun 						pvoice->interrupt(emu, pvoice);
59*4882a593Smuzhiyun 						snd_emu10k1_voice_intr_ack(emu, voice);
60*4882a593Smuzhiyun 					} else {
61*4882a593Smuzhiyun 						snd_emu10k1_voice_intr_disable(emu, voice);
62*4882a593Smuzhiyun 					}
63*4882a593Smuzhiyun 				}
64*4882a593Smuzhiyun 				val >>= 1;
65*4882a593Smuzhiyun 				pvoice++;
66*4882a593Smuzhiyun 			}
67*4882a593Smuzhiyun 			val = snd_emu10k1_ptr_read(emu, HLIPL, 0);
68*4882a593Smuzhiyun 			for (voice = 0; voice <= voice_max; voice++) {
69*4882a593Smuzhiyun 				if (voice == 0x20)
70*4882a593Smuzhiyun 					val = snd_emu10k1_ptr_read(emu, HLIPH, 0);
71*4882a593Smuzhiyun 				if (val & 1) {
72*4882a593Smuzhiyun 					if (pvoice->use && pvoice->interrupt != NULL) {
73*4882a593Smuzhiyun 						pvoice->interrupt(emu, pvoice);
74*4882a593Smuzhiyun 						snd_emu10k1_voice_half_loop_intr_ack(emu, voice);
75*4882a593Smuzhiyun 					} else {
76*4882a593Smuzhiyun 						snd_emu10k1_voice_half_loop_intr_disable(emu, voice);
77*4882a593Smuzhiyun 					}
78*4882a593Smuzhiyun 				}
79*4882a593Smuzhiyun 				val >>= 1;
80*4882a593Smuzhiyun 				pvoice++;
81*4882a593Smuzhiyun 			}
82*4882a593Smuzhiyun 			status &= ~IPR_CHANNELLOOP;
83*4882a593Smuzhiyun 		}
84*4882a593Smuzhiyun 		status &= ~IPR_CHANNELNUMBERMASK;
85*4882a593Smuzhiyun 		if (status & (IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL)) {
86*4882a593Smuzhiyun 			if (emu->capture_interrupt)
87*4882a593Smuzhiyun 				emu->capture_interrupt(emu, status);
88*4882a593Smuzhiyun 			else
89*4882a593Smuzhiyun 				snd_emu10k1_intr_disable(emu, INTE_ADCBUFENABLE);
90*4882a593Smuzhiyun 			status &= ~(IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL);
91*4882a593Smuzhiyun 		}
92*4882a593Smuzhiyun 		if (status & (IPR_MICBUFFULL|IPR_MICBUFHALFFULL)) {
93*4882a593Smuzhiyun 			if (emu->capture_mic_interrupt)
94*4882a593Smuzhiyun 				emu->capture_mic_interrupt(emu, status);
95*4882a593Smuzhiyun 			else
96*4882a593Smuzhiyun 				snd_emu10k1_intr_disable(emu, INTE_MICBUFENABLE);
97*4882a593Smuzhiyun 			status &= ~(IPR_MICBUFFULL|IPR_MICBUFHALFFULL);
98*4882a593Smuzhiyun 		}
99*4882a593Smuzhiyun 		if (status & (IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL)) {
100*4882a593Smuzhiyun 			if (emu->capture_efx_interrupt)
101*4882a593Smuzhiyun 				emu->capture_efx_interrupt(emu, status);
102*4882a593Smuzhiyun 			else
103*4882a593Smuzhiyun 				snd_emu10k1_intr_disable(emu, INTE_EFXBUFENABLE);
104*4882a593Smuzhiyun 			status &= ~(IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL);
105*4882a593Smuzhiyun 		}
106*4882a593Smuzhiyun 		if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
107*4882a593Smuzhiyun 			if (emu->midi.interrupt)
108*4882a593Smuzhiyun 				emu->midi.interrupt(emu, status);
109*4882a593Smuzhiyun 			else
110*4882a593Smuzhiyun 				snd_emu10k1_intr_disable(emu, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
111*4882a593Smuzhiyun 			status &= ~(IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY);
112*4882a593Smuzhiyun 		}
113*4882a593Smuzhiyun 		if (status & (IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2)) {
114*4882a593Smuzhiyun 			if (emu->midi2.interrupt)
115*4882a593Smuzhiyun 				emu->midi2.interrupt(emu, status);
116*4882a593Smuzhiyun 			else
117*4882a593Smuzhiyun 				snd_emu10k1_intr_disable(emu, INTE_A_MIDITXENABLE2|INTE_A_MIDIRXENABLE2);
118*4882a593Smuzhiyun 			status &= ~(IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2);
119*4882a593Smuzhiyun 		}
120*4882a593Smuzhiyun 		if (status & IPR_INTERVALTIMER) {
121*4882a593Smuzhiyun 			if (emu->timer)
122*4882a593Smuzhiyun 				snd_timer_interrupt(emu->timer, emu->timer->sticks);
123*4882a593Smuzhiyun 			else
124*4882a593Smuzhiyun 				snd_emu10k1_intr_disable(emu, INTE_INTERVALTIMERENB);
125*4882a593Smuzhiyun 			status &= ~IPR_INTERVALTIMER;
126*4882a593Smuzhiyun 		}
127*4882a593Smuzhiyun 		if (status & (IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE)) {
128*4882a593Smuzhiyun 			if (emu->spdif_interrupt)
129*4882a593Smuzhiyun 				emu->spdif_interrupt(emu, status);
130*4882a593Smuzhiyun 			else
131*4882a593Smuzhiyun 				snd_emu10k1_intr_disable(emu, INTE_GPSPDIFENABLE|INTE_CDSPDIFENABLE);
132*4882a593Smuzhiyun 			status &= ~(IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE);
133*4882a593Smuzhiyun 		}
134*4882a593Smuzhiyun 		if (status & IPR_FXDSP) {
135*4882a593Smuzhiyun 			if (emu->dsp_interrupt)
136*4882a593Smuzhiyun 				emu->dsp_interrupt(emu);
137*4882a593Smuzhiyun 			else
138*4882a593Smuzhiyun 				snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
139*4882a593Smuzhiyun 			status &= ~IPR_FXDSP;
140*4882a593Smuzhiyun 		}
141*4882a593Smuzhiyun 		if (status & IPR_P16V) {
142*4882a593Smuzhiyun 			while ((status2 = inl(emu->port + IPR2)) != 0) {
143*4882a593Smuzhiyun 				u32 mask = INTE2_PLAYBACK_CH_0_LOOP;  /* Full Loop */
144*4882a593Smuzhiyun 				struct snd_emu10k1_voice *pvoice = &(emu->p16v_voices[0]);
145*4882a593Smuzhiyun 				struct snd_emu10k1_voice *cvoice = &(emu->p16v_capture_voice);
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 				/* dev_dbg(emu->card->dev, "status2=0x%x\n", status2); */
148*4882a593Smuzhiyun 				orig_status2 = status2;
149*4882a593Smuzhiyun 				if(status2 & mask) {
150*4882a593Smuzhiyun 					if(pvoice->use) {
151*4882a593Smuzhiyun 						snd_pcm_period_elapsed(pvoice->epcm->substream);
152*4882a593Smuzhiyun 					} else {
153*4882a593Smuzhiyun 						dev_err(emu->card->dev,
154*4882a593Smuzhiyun 							"p16v: status: 0x%08x, mask=0x%08x, pvoice=%p, use=%d\n",
155*4882a593Smuzhiyun 							status2, mask, pvoice,
156*4882a593Smuzhiyun 							pvoice->use);
157*4882a593Smuzhiyun 					}
158*4882a593Smuzhiyun 				}
159*4882a593Smuzhiyun 				if(status2 & 0x110000) {
160*4882a593Smuzhiyun 					/* dev_info(emu->card->dev, "capture int found\n"); */
161*4882a593Smuzhiyun 					if(cvoice->use) {
162*4882a593Smuzhiyun 						/* dev_info(emu->card->dev, "capture period_elapsed\n"); */
163*4882a593Smuzhiyun 						snd_pcm_period_elapsed(cvoice->epcm->substream);
164*4882a593Smuzhiyun 					}
165*4882a593Smuzhiyun 				}
166*4882a593Smuzhiyun 				outl(orig_status2, emu->port + IPR2); /* ack all */
167*4882a593Smuzhiyun 			}
168*4882a593Smuzhiyun 			status &= ~IPR_P16V;
169*4882a593Smuzhiyun 		}
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 		if (status) {
172*4882a593Smuzhiyun 			unsigned int bits;
173*4882a593Smuzhiyun 			dev_err(emu->card->dev,
174*4882a593Smuzhiyun 				"unhandled interrupt: 0x%08x\n", status);
175*4882a593Smuzhiyun 			//make sure any interrupts we don't handle are disabled:
176*4882a593Smuzhiyun 			bits = INTE_FXDSPENABLE |
177*4882a593Smuzhiyun 				INTE_PCIERRORENABLE |
178*4882a593Smuzhiyun 				INTE_VOLINCRENABLE |
179*4882a593Smuzhiyun 				INTE_VOLDECRENABLE |
180*4882a593Smuzhiyun 				INTE_MUTEENABLE |
181*4882a593Smuzhiyun 				INTE_MICBUFENABLE |
182*4882a593Smuzhiyun 				INTE_ADCBUFENABLE |
183*4882a593Smuzhiyun 				INTE_EFXBUFENABLE |
184*4882a593Smuzhiyun 				INTE_GPSPDIFENABLE |
185*4882a593Smuzhiyun 				INTE_CDSPDIFENABLE |
186*4882a593Smuzhiyun 				INTE_INTERVALTIMERENB |
187*4882a593Smuzhiyun 				INTE_MIDITXENABLE |
188*4882a593Smuzhiyun 				INTE_MIDIRXENABLE;
189*4882a593Smuzhiyun 			if (emu->audigy)
190*4882a593Smuzhiyun 				bits |= INTE_A_MIDITXENABLE2 | INTE_A_MIDIRXENABLE2;
191*4882a593Smuzhiyun 			snd_emu10k1_intr_disable(emu, bits);
192*4882a593Smuzhiyun 		}
193*4882a593Smuzhiyun 		outl(orig_status, emu->port + IPR); /* ack all */
194*4882a593Smuzhiyun 	}
195*4882a593Smuzhiyun 	if (timeout == 1000)
196*4882a593Smuzhiyun 		dev_info(emu->card->dev, "emu10k1 irq routine failure\n");
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	return IRQ_RETVAL(handled);
199*4882a593Smuzhiyun }
200