1*4882a593Smuzhiyun /****************************************************************************
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun Copyright Echo Digital Audio Corporation (c) 1998 - 2004
4*4882a593Smuzhiyun All rights reserved
5*4882a593Smuzhiyun www.echoaudio.com
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun This file is part of Echo Digital Audio's generic driver library.
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun Echo Digital Audio's generic driver library is free software;
10*4882a593Smuzhiyun you can redistribute it and/or modify it under the terms of
11*4882a593Smuzhiyun the GNU General Public License as published by the Free Software
12*4882a593Smuzhiyun Foundation.
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun This program is distributed in the hope that it will be useful,
15*4882a593Smuzhiyun but WITHOUT ANY WARRANTY; without even the implied warranty of
16*4882a593Smuzhiyun MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17*4882a593Smuzhiyun GNU General Public License for more details.
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun You should have received a copy of the GNU General Public License
20*4882a593Smuzhiyun along with this program; if not, write to the Free Software
21*4882a593Smuzhiyun Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22*4882a593Smuzhiyun MA 02111-1307, USA.
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun *************************************************************************
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun Translation from C++ and adaptation for use in ALSA-Driver
27*4882a593Smuzhiyun were made by Giuliano Pochini <pochini@shiny.it>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun ****************************************************************************/
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun static int read_dsp(struct echoaudio *chip, u32 *data);
33*4882a593Smuzhiyun static int set_professional_spdif(struct echoaudio *chip, char prof);
34*4882a593Smuzhiyun static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic);
35*4882a593Smuzhiyun static int check_asic_status(struct echoaudio *chip);
36*4882a593Smuzhiyun static int update_flags(struct echoaudio *chip);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun
init_hw(struct echoaudio * chip,u16 device_id,u16 subdevice_id)39*4882a593Smuzhiyun static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun int err;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun if (snd_BUG_ON((subdevice_id & 0xfff0) != LAYLA20))
44*4882a593Smuzhiyun return -ENODEV;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun if ((err = init_dsp_comm_page(chip))) {
47*4882a593Smuzhiyun dev_err(chip->card->dev,
48*4882a593Smuzhiyun "init_hw - could not initialize DSP comm page\n");
49*4882a593Smuzhiyun return err;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun chip->device_id = device_id;
53*4882a593Smuzhiyun chip->subdevice_id = subdevice_id;
54*4882a593Smuzhiyun chip->bad_board = true;
55*4882a593Smuzhiyun chip->has_midi = true;
56*4882a593Smuzhiyun chip->dsp_code_to_load = FW_LAYLA20_DSP;
57*4882a593Smuzhiyun chip->input_clock_types =
58*4882a593Smuzhiyun ECHO_CLOCK_BIT_INTERNAL | ECHO_CLOCK_BIT_SPDIF |
59*4882a593Smuzhiyun ECHO_CLOCK_BIT_WORD | ECHO_CLOCK_BIT_SUPER;
60*4882a593Smuzhiyun chip->output_clock_types =
61*4882a593Smuzhiyun ECHO_CLOCK_BIT_WORD | ECHO_CLOCK_BIT_SUPER;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun if ((err = load_firmware(chip)) < 0)
64*4882a593Smuzhiyun return err;
65*4882a593Smuzhiyun chip->bad_board = false;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun return err;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun
set_mixer_defaults(struct echoaudio * chip)72*4882a593Smuzhiyun static int set_mixer_defaults(struct echoaudio *chip)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun chip->professional_spdif = false;
75*4882a593Smuzhiyun return init_line_levels(chip);
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun
detect_input_clocks(const struct echoaudio * chip)80*4882a593Smuzhiyun static u32 detect_input_clocks(const struct echoaudio *chip)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun u32 clocks_from_dsp, clock_bits;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* Map the DSP clock detect bits to the generic driver clock detect bits */
85*4882a593Smuzhiyun clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun clock_bits = ECHO_CLOCK_BIT_INTERNAL;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_SPDIF)
90*4882a593Smuzhiyun clock_bits |= ECHO_CLOCK_BIT_SPDIF;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_WORD) {
93*4882a593Smuzhiyun if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_SUPER)
94*4882a593Smuzhiyun clock_bits |= ECHO_CLOCK_BIT_SUPER;
95*4882a593Smuzhiyun else
96*4882a593Smuzhiyun clock_bits |= ECHO_CLOCK_BIT_WORD;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun return clock_bits;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /* ASIC status check - some cards have one or two ASICs that need to be
105*4882a593Smuzhiyun loaded. Once that load is complete, this function is called to see if
106*4882a593Smuzhiyun the load was successful.
107*4882a593Smuzhiyun If this load fails, it does not necessarily mean that the hardware is
108*4882a593Smuzhiyun defective - the external box may be disconnected or turned off.
109*4882a593Smuzhiyun This routine sometimes fails for Layla20; for Layla20, the loop runs
110*4882a593Smuzhiyun 5 times and succeeds if it wins on three of the loops. */
check_asic_status(struct echoaudio * chip)111*4882a593Smuzhiyun static int check_asic_status(struct echoaudio *chip)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun u32 asic_status;
114*4882a593Smuzhiyun int goodcnt, i;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun chip->asic_loaded = false;
117*4882a593Smuzhiyun for (i = goodcnt = 0; i < 5; i++) {
118*4882a593Smuzhiyun send_vector(chip, DSP_VC_TEST_ASIC);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /* The DSP will return a value to indicate whether or not
121*4882a593Smuzhiyun the ASIC is currently loaded */
122*4882a593Smuzhiyun if (read_dsp(chip, &asic_status) < 0) {
123*4882a593Smuzhiyun dev_err(chip->card->dev,
124*4882a593Smuzhiyun "check_asic_status: failed on read_dsp\n");
125*4882a593Smuzhiyun return -EIO;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun if (asic_status == ASIC_ALREADY_LOADED) {
129*4882a593Smuzhiyun if (++goodcnt == 3) {
130*4882a593Smuzhiyun chip->asic_loaded = true;
131*4882a593Smuzhiyun return 0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun return -EIO;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* Layla20 has an ASIC in the external box */
load_asic(struct echoaudio * chip)141*4882a593Smuzhiyun static int load_asic(struct echoaudio *chip)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun int err;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun if (chip->asic_loaded)
146*4882a593Smuzhiyun return 0;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA_ASIC,
149*4882a593Smuzhiyun FW_LAYLA20_ASIC);
150*4882a593Smuzhiyun if (err < 0)
151*4882a593Smuzhiyun return err;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun /* Check if ASIC is alive and well. */
154*4882a593Smuzhiyun return check_asic_status(chip);
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun
set_sample_rate(struct echoaudio * chip,u32 rate)159*4882a593Smuzhiyun static int set_sample_rate(struct echoaudio *chip, u32 rate)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun if (snd_BUG_ON(rate < 8000 || rate > 50000))
162*4882a593Smuzhiyun return -EINVAL;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun /* Only set the clock for internal mode. Do not return failure,
165*4882a593Smuzhiyun simply treat it as a non-event. */
166*4882a593Smuzhiyun if (chip->input_clock != ECHO_CLOCK_INTERNAL) {
167*4882a593Smuzhiyun dev_warn(chip->card->dev,
168*4882a593Smuzhiyun "Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");
169*4882a593Smuzhiyun chip->comm_page->sample_rate = cpu_to_le32(rate);
170*4882a593Smuzhiyun chip->sample_rate = rate;
171*4882a593Smuzhiyun return 0;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun if (wait_handshake(chip))
175*4882a593Smuzhiyun return -EIO;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun dev_dbg(chip->card->dev, "set_sample_rate(%d)\n", rate);
178*4882a593Smuzhiyun chip->sample_rate = rate;
179*4882a593Smuzhiyun chip->comm_page->sample_rate = cpu_to_le32(rate);
180*4882a593Smuzhiyun clear_handshake(chip);
181*4882a593Smuzhiyun return send_vector(chip, DSP_VC_SET_LAYLA_SAMPLE_RATE);
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun
set_input_clock(struct echoaudio * chip,u16 clock_source)186*4882a593Smuzhiyun static int set_input_clock(struct echoaudio *chip, u16 clock_source)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun u16 clock;
189*4882a593Smuzhiyun u32 rate;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun rate = 0;
192*4882a593Smuzhiyun switch (clock_source) {
193*4882a593Smuzhiyun case ECHO_CLOCK_INTERNAL:
194*4882a593Smuzhiyun rate = chip->sample_rate;
195*4882a593Smuzhiyun clock = LAYLA20_CLOCK_INTERNAL;
196*4882a593Smuzhiyun break;
197*4882a593Smuzhiyun case ECHO_CLOCK_SPDIF:
198*4882a593Smuzhiyun clock = LAYLA20_CLOCK_SPDIF;
199*4882a593Smuzhiyun break;
200*4882a593Smuzhiyun case ECHO_CLOCK_WORD:
201*4882a593Smuzhiyun clock = LAYLA20_CLOCK_WORD;
202*4882a593Smuzhiyun break;
203*4882a593Smuzhiyun case ECHO_CLOCK_SUPER:
204*4882a593Smuzhiyun clock = LAYLA20_CLOCK_SUPER;
205*4882a593Smuzhiyun break;
206*4882a593Smuzhiyun default:
207*4882a593Smuzhiyun dev_err(chip->card->dev,
208*4882a593Smuzhiyun "Input clock 0x%x not supported for Layla24\n",
209*4882a593Smuzhiyun clock_source);
210*4882a593Smuzhiyun return -EINVAL;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun chip->input_clock = clock_source;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun chip->comm_page->input_clock = cpu_to_le16(clock);
215*4882a593Smuzhiyun clear_handshake(chip);
216*4882a593Smuzhiyun send_vector(chip, DSP_VC_UPDATE_CLOCKS);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun if (rate)
219*4882a593Smuzhiyun set_sample_rate(chip, rate);
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun return 0;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun
set_output_clock(struct echoaudio * chip,u16 clock)226*4882a593Smuzhiyun static int set_output_clock(struct echoaudio *chip, u16 clock)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun switch (clock) {
229*4882a593Smuzhiyun case ECHO_CLOCK_SUPER:
230*4882a593Smuzhiyun clock = LAYLA20_OUTPUT_CLOCK_SUPER;
231*4882a593Smuzhiyun break;
232*4882a593Smuzhiyun case ECHO_CLOCK_WORD:
233*4882a593Smuzhiyun clock = LAYLA20_OUTPUT_CLOCK_WORD;
234*4882a593Smuzhiyun break;
235*4882a593Smuzhiyun default:
236*4882a593Smuzhiyun dev_err(chip->card->dev, "set_output_clock wrong clock\n");
237*4882a593Smuzhiyun return -EINVAL;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun if (wait_handshake(chip))
241*4882a593Smuzhiyun return -EIO;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun chip->comm_page->output_clock = cpu_to_le16(clock);
244*4882a593Smuzhiyun chip->output_clock = clock;
245*4882a593Smuzhiyun clear_handshake(chip);
246*4882a593Smuzhiyun return send_vector(chip, DSP_VC_UPDATE_CLOCKS);
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun /* Set input bus gain (one unit is 0.5dB !) */
set_input_gain(struct echoaudio * chip,u16 input,int gain)252*4882a593Smuzhiyun static int set_input_gain(struct echoaudio *chip, u16 input, int gain)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun if (snd_BUG_ON(input >= num_busses_in(chip)))
255*4882a593Smuzhiyun return -EINVAL;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun if (wait_handshake(chip))
258*4882a593Smuzhiyun return -EIO;
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun chip->input_gain[input] = gain;
261*4882a593Smuzhiyun gain += GL20_INPUT_GAIN_MAGIC_NUMBER;
262*4882a593Smuzhiyun chip->comm_page->line_in_level[input] = gain;
263*4882a593Smuzhiyun return 0;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun /* Tell the DSP to reread the flags from the comm page */
update_flags(struct echoaudio * chip)269*4882a593Smuzhiyun static int update_flags(struct echoaudio *chip)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun if (wait_handshake(chip))
272*4882a593Smuzhiyun return -EIO;
273*4882a593Smuzhiyun clear_handshake(chip);
274*4882a593Smuzhiyun return send_vector(chip, DSP_VC_UPDATE_FLAGS);
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun
set_professional_spdif(struct echoaudio * chip,char prof)279*4882a593Smuzhiyun static int set_professional_spdif(struct echoaudio *chip, char prof)
280*4882a593Smuzhiyun {
281*4882a593Smuzhiyun if (prof)
282*4882a593Smuzhiyun chip->comm_page->flags |=
283*4882a593Smuzhiyun cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
284*4882a593Smuzhiyun else
285*4882a593Smuzhiyun chip->comm_page->flags &=
286*4882a593Smuzhiyun ~cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
287*4882a593Smuzhiyun chip->professional_spdif = prof;
288*4882a593Smuzhiyun return update_flags(chip);
289*4882a593Smuzhiyun }
290