1*4882a593Smuzhiyun /****************************************************************************
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun Copyright Echo Digital Audio Corporation (c) 1998 - 2004
4*4882a593Smuzhiyun All rights reserved
5*4882a593Smuzhiyun www.echoaudio.com
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun This file is part of Echo Digital Audio's generic driver library.
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun Echo Digital Audio's generic driver library is free software;
10*4882a593Smuzhiyun you can redistribute it and/or modify it under the terms of
11*4882a593Smuzhiyun the GNU General Public License as published by the Free Software
12*4882a593Smuzhiyun Foundation.
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun This program is distributed in the hope that it will be useful,
15*4882a593Smuzhiyun but WITHOUT ANY WARRANTY; without even the implied warranty of
16*4882a593Smuzhiyun MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17*4882a593Smuzhiyun GNU General Public License for more details.
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun You should have received a copy of the GNU General Public License
20*4882a593Smuzhiyun along with this program; if not, write to the Free Software
21*4882a593Smuzhiyun Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22*4882a593Smuzhiyun MA 02111-1307, USA.
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun *************************************************************************
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun Translation from C++ and adaptation for use in ALSA-Driver
27*4882a593Smuzhiyun were made by Giuliano Pochini <pochini@shiny.it>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun ****************************************************************************/
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun static int set_professional_spdif(struct echoaudio *chip, char prof);
33*4882a593Smuzhiyun static int update_flags(struct echoaudio *chip);
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun
init_hw(struct echoaudio * chip,u16 device_id,u16 subdevice_id)36*4882a593Smuzhiyun static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun int err;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun if (snd_BUG_ON((subdevice_id & 0xfff0) != GINA20))
41*4882a593Smuzhiyun return -ENODEV;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun if ((err = init_dsp_comm_page(chip))) {
44*4882a593Smuzhiyun dev_err(chip->card->dev,
45*4882a593Smuzhiyun "init_hw - could not initialize DSP comm page\n");
46*4882a593Smuzhiyun return err;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun chip->device_id = device_id;
50*4882a593Smuzhiyun chip->subdevice_id = subdevice_id;
51*4882a593Smuzhiyun chip->bad_board = true;
52*4882a593Smuzhiyun chip->dsp_code_to_load = FW_GINA20_DSP;
53*4882a593Smuzhiyun chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
54*4882a593Smuzhiyun chip->clock_state = GD_CLOCK_UNDEF;
55*4882a593Smuzhiyun /* Since this card has no ASIC, mark it as loaded so everything
56*4882a593Smuzhiyun works OK */
57*4882a593Smuzhiyun chip->asic_loaded = true;
58*4882a593Smuzhiyun chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
59*4882a593Smuzhiyun ECHO_CLOCK_BIT_SPDIF;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun if ((err = load_firmware(chip)) < 0)
62*4882a593Smuzhiyun return err;
63*4882a593Smuzhiyun chip->bad_board = false;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun return err;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun
set_mixer_defaults(struct echoaudio * chip)70*4882a593Smuzhiyun static int set_mixer_defaults(struct echoaudio *chip)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun chip->professional_spdif = false;
73*4882a593Smuzhiyun return init_line_levels(chip);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun
detect_input_clocks(const struct echoaudio * chip)78*4882a593Smuzhiyun static u32 detect_input_clocks(const struct echoaudio *chip)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun u32 clocks_from_dsp, clock_bits;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /* Map the DSP clock detect bits to the generic driver clock
83*4882a593Smuzhiyun detect bits */
84*4882a593Smuzhiyun clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun clock_bits = ECHO_CLOCK_BIT_INTERNAL;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_SPDIF)
89*4882a593Smuzhiyun clock_bits |= ECHO_CLOCK_BIT_SPDIF;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun return clock_bits;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun /* The Gina20 has no ASIC. Just do nothing */
load_asic(struct echoaudio * chip)97*4882a593Smuzhiyun static int load_asic(struct echoaudio *chip)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun return 0;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun
set_sample_rate(struct echoaudio * chip,u32 rate)104*4882a593Smuzhiyun static int set_sample_rate(struct echoaudio *chip, u32 rate)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun u8 clock_state, spdif_status;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun if (wait_handshake(chip))
109*4882a593Smuzhiyun return -EIO;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun switch (rate) {
112*4882a593Smuzhiyun case 44100:
113*4882a593Smuzhiyun clock_state = GD_CLOCK_44;
114*4882a593Smuzhiyun spdif_status = GD_SPDIF_STATUS_44;
115*4882a593Smuzhiyun break;
116*4882a593Smuzhiyun case 48000:
117*4882a593Smuzhiyun clock_state = GD_CLOCK_48;
118*4882a593Smuzhiyun spdif_status = GD_SPDIF_STATUS_48;
119*4882a593Smuzhiyun break;
120*4882a593Smuzhiyun default:
121*4882a593Smuzhiyun clock_state = GD_CLOCK_NOCHANGE;
122*4882a593Smuzhiyun spdif_status = GD_SPDIF_STATUS_NOCHANGE;
123*4882a593Smuzhiyun break;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (chip->clock_state == clock_state)
127*4882a593Smuzhiyun clock_state = GD_CLOCK_NOCHANGE;
128*4882a593Smuzhiyun if (spdif_status == chip->spdif_status)
129*4882a593Smuzhiyun spdif_status = GD_SPDIF_STATUS_NOCHANGE;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun chip->comm_page->sample_rate = cpu_to_le32(rate);
132*4882a593Smuzhiyun chip->comm_page->gd_clock_state = clock_state;
133*4882a593Smuzhiyun chip->comm_page->gd_spdif_status = spdif_status;
134*4882a593Smuzhiyun chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /* Save the new audio state if it changed */
137*4882a593Smuzhiyun if (clock_state != GD_CLOCK_NOCHANGE)
138*4882a593Smuzhiyun chip->clock_state = clock_state;
139*4882a593Smuzhiyun if (spdif_status != GD_SPDIF_STATUS_NOCHANGE)
140*4882a593Smuzhiyun chip->spdif_status = spdif_status;
141*4882a593Smuzhiyun chip->sample_rate = rate;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun clear_handshake(chip);
144*4882a593Smuzhiyun return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun
set_input_clock(struct echoaudio * chip,u16 clock)149*4882a593Smuzhiyun static int set_input_clock(struct echoaudio *chip, u16 clock)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun switch (clock) {
153*4882a593Smuzhiyun case ECHO_CLOCK_INTERNAL:
154*4882a593Smuzhiyun /* Reset the audio state to unknown (just in case) */
155*4882a593Smuzhiyun chip->clock_state = GD_CLOCK_UNDEF;
156*4882a593Smuzhiyun chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
157*4882a593Smuzhiyun set_sample_rate(chip, chip->sample_rate);
158*4882a593Smuzhiyun chip->input_clock = clock;
159*4882a593Smuzhiyun break;
160*4882a593Smuzhiyun case ECHO_CLOCK_SPDIF:
161*4882a593Smuzhiyun chip->comm_page->gd_clock_state = GD_CLOCK_SPDIFIN;
162*4882a593Smuzhiyun chip->comm_page->gd_spdif_status = GD_SPDIF_STATUS_NOCHANGE;
163*4882a593Smuzhiyun clear_handshake(chip);
164*4882a593Smuzhiyun send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
165*4882a593Smuzhiyun chip->clock_state = GD_CLOCK_SPDIFIN;
166*4882a593Smuzhiyun chip->input_clock = clock;
167*4882a593Smuzhiyun break;
168*4882a593Smuzhiyun default:
169*4882a593Smuzhiyun return -EINVAL;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun return 0;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun /* Set input bus gain (one unit is 0.5dB !) */
set_input_gain(struct echoaudio * chip,u16 input,int gain)178*4882a593Smuzhiyun static int set_input_gain(struct echoaudio *chip, u16 input, int gain)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun if (snd_BUG_ON(input >= num_busses_in(chip)))
181*4882a593Smuzhiyun return -EINVAL;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun if (wait_handshake(chip))
184*4882a593Smuzhiyun return -EIO;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun chip->input_gain[input] = gain;
187*4882a593Smuzhiyun gain += GL20_INPUT_GAIN_MAGIC_NUMBER;
188*4882a593Smuzhiyun chip->comm_page->line_in_level[input] = gain;
189*4882a593Smuzhiyun return 0;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun /* Tell the DSP to reread the flags from the comm page */
update_flags(struct echoaudio * chip)195*4882a593Smuzhiyun static int update_flags(struct echoaudio *chip)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun if (wait_handshake(chip))
198*4882a593Smuzhiyun return -EIO;
199*4882a593Smuzhiyun clear_handshake(chip);
200*4882a593Smuzhiyun return send_vector(chip, DSP_VC_UPDATE_FLAGS);
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun
set_professional_spdif(struct echoaudio * chip,char prof)205*4882a593Smuzhiyun static int set_professional_spdif(struct echoaudio *chip, char prof)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun if (prof)
208*4882a593Smuzhiyun chip->comm_page->flags |=
209*4882a593Smuzhiyun cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
210*4882a593Smuzhiyun else
211*4882a593Smuzhiyun chip->comm_page->flags &=
212*4882a593Smuzhiyun ~cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
213*4882a593Smuzhiyun chip->professional_spdif = prof;
214*4882a593Smuzhiyun return update_flags(chip);
215*4882a593Smuzhiyun }
216