1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
4*4882a593Smuzhiyun * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #ifndef __CS46XX_LIB_H__
8*4882a593Smuzhiyun #define __CS46XX_LIB_H__
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun /*
11*4882a593Smuzhiyun * constants
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define CS46XX_BA0_SIZE 0x1000
15*4882a593Smuzhiyun #define CS46XX_BA1_DATA0_SIZE 0x3000
16*4882a593Smuzhiyun #define CS46XX_BA1_DATA1_SIZE 0x3800
17*4882a593Smuzhiyun #define CS46XX_BA1_PRG_SIZE 0x7000
18*4882a593Smuzhiyun #define CS46XX_BA1_REG_SIZE 0x0100
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #ifdef CONFIG_SND_CS46XX_NEW_DSP
23*4882a593Smuzhiyun #define CS46XX_MIN_PERIOD_SIZE 64
24*4882a593Smuzhiyun #define CS46XX_MAX_PERIOD_SIZE 1024*1024
25*4882a593Smuzhiyun #else
26*4882a593Smuzhiyun #define CS46XX_MIN_PERIOD_SIZE 2048
27*4882a593Smuzhiyun #define CS46XX_MAX_PERIOD_SIZE 2048
28*4882a593Smuzhiyun #endif
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define CS46XX_FRAGS 2
31*4882a593Smuzhiyun /* #define CS46XX_BUFFER_SIZE CS46XX_MAX_PERIOD_SIZE * CS46XX_FRAGS */
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define SCB_NO_PARENT 0
34*4882a593Smuzhiyun #define SCB_ON_PARENT_NEXT_SCB 1
35*4882a593Smuzhiyun #define SCB_ON_PARENT_SUBLIST_SCB 2
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /* 3*1024 parameter, 3.5*1024 sample, 2*3.5*1024 code */
38*4882a593Smuzhiyun #define BA1_DWORD_SIZE (13 * 1024 + 512)
39*4882a593Smuzhiyun #define BA1_MEMORY_COUNT 3
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /*
42*4882a593Smuzhiyun * common I/O routines
43*4882a593Smuzhiyun */
44*4882a593Smuzhiyun
snd_cs46xx_poke(struct snd_cs46xx * chip,unsigned long reg,unsigned int val)45*4882a593Smuzhiyun static inline void snd_cs46xx_poke(struct snd_cs46xx *chip, unsigned long reg, unsigned int val)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun unsigned int bank = reg >> 16;
48*4882a593Smuzhiyun unsigned int offset = reg & 0xffff;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun if (bank == 0)
52*4882a593Smuzhiyun printk(KERN_DEBUG "snd_cs46xx_poke: %04X - %08X\n",
53*4882a593Smuzhiyun reg >> 2,val);
54*4882a593Smuzhiyun */
55*4882a593Smuzhiyun writel(val, chip->region.idx[bank+1].remap_addr + offset);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
snd_cs46xx_peek(struct snd_cs46xx * chip,unsigned long reg)58*4882a593Smuzhiyun static inline unsigned int snd_cs46xx_peek(struct snd_cs46xx *chip, unsigned long reg)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun unsigned int bank = reg >> 16;
61*4882a593Smuzhiyun unsigned int offset = reg & 0xffff;
62*4882a593Smuzhiyun return readl(chip->region.idx[bank+1].remap_addr + offset);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
snd_cs46xx_pokeBA0(struct snd_cs46xx * chip,unsigned long offset,unsigned int val)65*4882a593Smuzhiyun static inline void snd_cs46xx_pokeBA0(struct snd_cs46xx *chip, unsigned long offset, unsigned int val)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun writel(val, chip->region.name.ba0.remap_addr + offset);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
snd_cs46xx_peekBA0(struct snd_cs46xx * chip,unsigned long offset)70*4882a593Smuzhiyun static inline unsigned int snd_cs46xx_peekBA0(struct snd_cs46xx *chip, unsigned long offset)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun return readl(chip->region.name.ba0.remap_addr + offset);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip);
76*4882a593Smuzhiyun void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip);
77*4882a593Smuzhiyun int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module);
78*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
79*4882a593Smuzhiyun int cs46xx_dsp_resume(struct snd_cs46xx * chip);
80*4882a593Smuzhiyun #endif
81*4882a593Smuzhiyun struct dsp_symbol_entry *cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name,
82*4882a593Smuzhiyun int symbol_type);
83*4882a593Smuzhiyun #ifdef CONFIG_SND_PROC_FS
84*4882a593Smuzhiyun int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip);
85*4882a593Smuzhiyun int cs46xx_dsp_proc_done (struct snd_cs46xx *chip);
86*4882a593Smuzhiyun #else
87*4882a593Smuzhiyun #define cs46xx_dsp_proc_init(card, chip)
88*4882a593Smuzhiyun #define cs46xx_dsp_proc_done(chip)
89*4882a593Smuzhiyun #endif
90*4882a593Smuzhiyun int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip);
91*4882a593Smuzhiyun int snd_cs46xx_download (struct snd_cs46xx *chip, u32 *src, unsigned long offset,
92*4882a593Smuzhiyun unsigned long len);
93*4882a593Smuzhiyun int snd_cs46xx_clear_BA1(struct snd_cs46xx *chip, unsigned long offset, unsigned long len);
94*4882a593Smuzhiyun int cs46xx_dsp_enable_spdif_out (struct snd_cs46xx *chip);
95*4882a593Smuzhiyun int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip);
96*4882a593Smuzhiyun int cs46xx_dsp_disable_spdif_out (struct snd_cs46xx *chip);
97*4882a593Smuzhiyun int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip);
98*4882a593Smuzhiyun int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip);
99*4882a593Smuzhiyun int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip);
100*4882a593Smuzhiyun int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip);
101*4882a593Smuzhiyun int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip);
102*4882a593Smuzhiyun int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip);
103*4882a593Smuzhiyun int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data);
104*4882a593Smuzhiyun struct dsp_scb_descriptor * cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name,
105*4882a593Smuzhiyun u32 * scb_data, u32 dest);
106*4882a593Smuzhiyun #ifdef CONFIG_SND_PROC_FS
107*4882a593Smuzhiyun void cs46xx_dsp_proc_free_scb_desc (struct dsp_scb_descriptor * scb);
108*4882a593Smuzhiyun void cs46xx_dsp_proc_register_scb_desc (struct snd_cs46xx *chip,
109*4882a593Smuzhiyun struct dsp_scb_descriptor * scb);
110*4882a593Smuzhiyun #else
111*4882a593Smuzhiyun #define cs46xx_dsp_proc_free_scb_desc(scb)
112*4882a593Smuzhiyun #define cs46xx_dsp_proc_register_scb_desc(chip, scb)
113*4882a593Smuzhiyun #endif
114*4882a593Smuzhiyun struct dsp_scb_descriptor * cs46xx_dsp_create_timing_master_scb (struct snd_cs46xx *chip);
115*4882a593Smuzhiyun struct dsp_scb_descriptor *
116*4882a593Smuzhiyun cs46xx_dsp_create_codec_out_scb(struct snd_cs46xx * chip,
117*4882a593Smuzhiyun char * codec_name, u16 channel_disp, u16 fifo_addr,
118*4882a593Smuzhiyun u16 child_scb_addr, u32 dest,
119*4882a593Smuzhiyun struct dsp_scb_descriptor * parent_scb,
120*4882a593Smuzhiyun int scb_child_type);
121*4882a593Smuzhiyun struct dsp_scb_descriptor *
122*4882a593Smuzhiyun cs46xx_dsp_create_codec_in_scb(struct snd_cs46xx * chip, char * codec_name,
123*4882a593Smuzhiyun u16 channel_disp, u16 fifo_addr,
124*4882a593Smuzhiyun u16 sample_buffer_addr, u32 dest,
125*4882a593Smuzhiyun struct dsp_scb_descriptor * parent_scb,
126*4882a593Smuzhiyun int scb_child_type);
127*4882a593Smuzhiyun void cs46xx_dsp_remove_scb (struct snd_cs46xx *chip,
128*4882a593Smuzhiyun struct dsp_scb_descriptor * scb);
129*4882a593Smuzhiyun struct dsp_scb_descriptor *
130*4882a593Smuzhiyun cs46xx_dsp_create_codec_in_scb(struct snd_cs46xx * chip, char * codec_name,
131*4882a593Smuzhiyun u16 channel_disp, u16 fifo_addr,
132*4882a593Smuzhiyun u16 sample_buffer_addr, u32 dest,
133*4882a593Smuzhiyun struct dsp_scb_descriptor * parent_scb,
134*4882a593Smuzhiyun int scb_child_type);
135*4882a593Smuzhiyun struct dsp_scb_descriptor *
136*4882a593Smuzhiyun cs46xx_dsp_create_src_task_scb(struct snd_cs46xx * chip, char * scb_name,
137*4882a593Smuzhiyun int sample_rate, u16 src_buffer_addr,
138*4882a593Smuzhiyun u16 src_delay_buffer_addr, u32 dest,
139*4882a593Smuzhiyun struct dsp_scb_descriptor * parent_scb,
140*4882a593Smuzhiyun int scb_child_type, int pass_through);
141*4882a593Smuzhiyun struct dsp_scb_descriptor *
142*4882a593Smuzhiyun cs46xx_dsp_create_mix_only_scb(struct snd_cs46xx * chip, char * scb_name,
143*4882a593Smuzhiyun u16 mix_buffer_addr, u32 dest,
144*4882a593Smuzhiyun struct dsp_scb_descriptor * parent_scb,
145*4882a593Smuzhiyun int scb_child_type);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun struct dsp_scb_descriptor *
148*4882a593Smuzhiyun cs46xx_dsp_create_vari_decimate_scb(struct snd_cs46xx * chip, char * scb_name,
149*4882a593Smuzhiyun u16 vari_buffer_addr0, u16 vari_buffer_addr1, u32 dest,
150*4882a593Smuzhiyun struct dsp_scb_descriptor * parent_scb,
151*4882a593Smuzhiyun int scb_child_type);
152*4882a593Smuzhiyun struct dsp_scb_descriptor *
153*4882a593Smuzhiyun cs46xx_dsp_create_asynch_fg_rx_scb(struct snd_cs46xx * chip, char * scb_name,
154*4882a593Smuzhiyun u32 dest, u16 hfg_scb_address, u16 asynch_buffer_address,
155*4882a593Smuzhiyun struct dsp_scb_descriptor * parent_scb,
156*4882a593Smuzhiyun int scb_child_type);
157*4882a593Smuzhiyun struct dsp_scb_descriptor *
158*4882a593Smuzhiyun cs46xx_dsp_create_spio_write_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,
159*4882a593Smuzhiyun struct dsp_scb_descriptor * parent_scb,
160*4882a593Smuzhiyun int scb_child_type);
161*4882a593Smuzhiyun struct dsp_scb_descriptor *
162*4882a593Smuzhiyun cs46xx_dsp_create_mix_to_ostream_scb(struct snd_cs46xx * chip, char * scb_name,
163*4882a593Smuzhiyun u16 mix_buffer_addr, u16 writeback_spb, u32 dest,
164*4882a593Smuzhiyun struct dsp_scb_descriptor * parent_scb,
165*4882a593Smuzhiyun int scb_child_type);
166*4882a593Smuzhiyun struct dsp_scb_descriptor *
167*4882a593Smuzhiyun cs46xx_dsp_create_magic_snoop_scb(struct snd_cs46xx * chip, char * scb_name,
168*4882a593Smuzhiyun u32 dest, u16 snoop_buffer_address,
169*4882a593Smuzhiyun struct dsp_scb_descriptor * snoop_scb,
170*4882a593Smuzhiyun struct dsp_scb_descriptor * parent_scb,
171*4882a593Smuzhiyun int scb_child_type);
172*4882a593Smuzhiyun struct dsp_pcm_channel_descriptor *
173*4882a593Smuzhiyun cs46xx_dsp_create_pcm_channel (struct snd_cs46xx * chip, u32 sample_rate,
174*4882a593Smuzhiyun void * private_data, u32 hw_dma_addr,
175*4882a593Smuzhiyun int pcm_channel_id);
176*4882a593Smuzhiyun void cs46xx_dsp_destroy_pcm_channel (struct snd_cs46xx * chip,
177*4882a593Smuzhiyun struct dsp_pcm_channel_descriptor * pcm_channel);
178*4882a593Smuzhiyun int cs46xx_dsp_pcm_unlink (struct snd_cs46xx * chip,
179*4882a593Smuzhiyun struct dsp_pcm_channel_descriptor * pcm_channel);
180*4882a593Smuzhiyun int cs46xx_dsp_pcm_link (struct snd_cs46xx * chip,
181*4882a593Smuzhiyun struct dsp_pcm_channel_descriptor * pcm_channel);
182*4882a593Smuzhiyun struct dsp_scb_descriptor *
183*4882a593Smuzhiyun cs46xx_add_record_source (struct snd_cs46xx *chip, struct dsp_scb_descriptor * source,
184*4882a593Smuzhiyun u16 addr, char * scb_name);
185*4882a593Smuzhiyun int cs46xx_src_unlink(struct snd_cs46xx *chip, struct dsp_scb_descriptor * src);
186*4882a593Smuzhiyun int cs46xx_src_link(struct snd_cs46xx *chip, struct dsp_scb_descriptor * src);
187*4882a593Smuzhiyun int cs46xx_iec958_pre_open (struct snd_cs46xx *chip);
188*4882a593Smuzhiyun int cs46xx_iec958_post_close (struct snd_cs46xx *chip);
189*4882a593Smuzhiyun int cs46xx_dsp_pcm_channel_set_period (struct snd_cs46xx * chip,
190*4882a593Smuzhiyun struct dsp_pcm_channel_descriptor * pcm_channel,
191*4882a593Smuzhiyun int period_size);
192*4882a593Smuzhiyun int cs46xx_dsp_pcm_ostream_set_period (struct snd_cs46xx * chip, int period_size);
193*4882a593Smuzhiyun int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right);
194*4882a593Smuzhiyun int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right);
195*4882a593Smuzhiyun #endif /* __CS46XX_LIB_H__ */
196