1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * based on btaudio.c by Gerd Knorr <kraxel@bytesex.org>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/pci.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/bitops.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <sound/core.h>
18*4882a593Smuzhiyun #include <sound/pcm.h>
19*4882a593Smuzhiyun #include <sound/pcm_params.h>
20*4882a593Smuzhiyun #include <sound/control.h>
21*4882a593Smuzhiyun #include <sound/initval.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
24*4882a593Smuzhiyun MODULE_DESCRIPTION("Brooktree Bt87x audio driver");
25*4882a593Smuzhiyun MODULE_LICENSE("GPL");
26*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("{{Brooktree,Bt878},"
27*4882a593Smuzhiyun "{Brooktree,Bt879}}");
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
30*4882a593Smuzhiyun static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
31*4882a593Smuzhiyun static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
32*4882a593Smuzhiyun static int digital_rate[SNDRV_CARDS]; /* digital input rate */
33*4882a593Smuzhiyun static bool load_all; /* allow to load cards not the allowlist */
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun module_param_array(index, int, NULL, 0444);
36*4882a593Smuzhiyun MODULE_PARM_DESC(index, "Index value for Bt87x soundcard");
37*4882a593Smuzhiyun module_param_array(id, charp, NULL, 0444);
38*4882a593Smuzhiyun MODULE_PARM_DESC(id, "ID string for Bt87x soundcard");
39*4882a593Smuzhiyun module_param_array(enable, bool, NULL, 0444);
40*4882a593Smuzhiyun MODULE_PARM_DESC(enable, "Enable Bt87x soundcard");
41*4882a593Smuzhiyun module_param_array(digital_rate, int, NULL, 0444);
42*4882a593Smuzhiyun MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard");
43*4882a593Smuzhiyun module_param(load_all, bool, 0444);
44*4882a593Smuzhiyun MODULE_PARM_DESC(load_all, "Allow to load cards not on the allowlist");
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* register offsets */
48*4882a593Smuzhiyun #define REG_INT_STAT 0x100 /* interrupt status */
49*4882a593Smuzhiyun #define REG_INT_MASK 0x104 /* interrupt mask */
50*4882a593Smuzhiyun #define REG_GPIO_DMA_CTL 0x10c /* audio control */
51*4882a593Smuzhiyun #define REG_PACKET_LEN 0x110 /* audio packet lengths */
52*4882a593Smuzhiyun #define REG_RISC_STRT_ADD 0x114 /* RISC program start address */
53*4882a593Smuzhiyun #define REG_RISC_COUNT 0x120 /* RISC program counter */
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* interrupt bits */
56*4882a593Smuzhiyun #define INT_OFLOW (1 << 3) /* audio A/D overflow */
57*4882a593Smuzhiyun #define INT_RISCI (1 << 11) /* RISC instruction IRQ bit set */
58*4882a593Smuzhiyun #define INT_FBUS (1 << 12) /* FIFO overrun due to bus access latency */
59*4882a593Smuzhiyun #define INT_FTRGT (1 << 13) /* FIFO overrun due to target latency */
60*4882a593Smuzhiyun #define INT_FDSR (1 << 14) /* FIFO data stream resynchronization */
61*4882a593Smuzhiyun #define INT_PPERR (1 << 15) /* PCI parity error */
62*4882a593Smuzhiyun #define INT_RIPERR (1 << 16) /* RISC instruction parity error */
63*4882a593Smuzhiyun #define INT_PABORT (1 << 17) /* PCI master or target abort */
64*4882a593Smuzhiyun #define INT_OCERR (1 << 18) /* invalid opcode */
65*4882a593Smuzhiyun #define INT_SCERR (1 << 19) /* sync counter overflow */
66*4882a593Smuzhiyun #define INT_RISC_EN (1 << 27) /* DMA controller running */
67*4882a593Smuzhiyun #define INT_RISCS_SHIFT 28 /* RISC status bits */
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /* audio control bits */
70*4882a593Smuzhiyun #define CTL_FIFO_ENABLE (1 << 0) /* enable audio data FIFO */
71*4882a593Smuzhiyun #define CTL_RISC_ENABLE (1 << 1) /* enable audio DMA controller */
72*4882a593Smuzhiyun #define CTL_PKTP_4 (0 << 2) /* packet mode FIFO trigger point - 4 DWORDs */
73*4882a593Smuzhiyun #define CTL_PKTP_8 (1 << 2) /* 8 DWORDs */
74*4882a593Smuzhiyun #define CTL_PKTP_16 (2 << 2) /* 16 DWORDs */
75*4882a593Smuzhiyun #define CTL_ACAP_EN (1 << 4) /* enable audio capture */
76*4882a593Smuzhiyun #define CTL_DA_APP (1 << 5) /* GPIO input */
77*4882a593Smuzhiyun #define CTL_DA_IOM_AFE (0 << 6) /* audio A/D input */
78*4882a593Smuzhiyun #define CTL_DA_IOM_DA (1 << 6) /* digital audio input */
79*4882a593Smuzhiyun #define CTL_DA_SDR_SHIFT 8 /* DDF first stage decimation rate */
80*4882a593Smuzhiyun #define CTL_DA_SDR_MASK (0xf<< 8)
81*4882a593Smuzhiyun #define CTL_DA_LMT (1 << 12) /* limit audio data values */
82*4882a593Smuzhiyun #define CTL_DA_ES2 (1 << 13) /* enable DDF stage 2 */
83*4882a593Smuzhiyun #define CTL_DA_SBR (1 << 14) /* samples rounded to 8 bits */
84*4882a593Smuzhiyun #define CTL_DA_DPM (1 << 15) /* data packet mode */
85*4882a593Smuzhiyun #define CTL_DA_LRD_SHIFT 16 /* ALRCK delay */
86*4882a593Smuzhiyun #define CTL_DA_MLB (1 << 21) /* MSB/LSB format */
87*4882a593Smuzhiyun #define CTL_DA_LRI (1 << 22) /* left/right indication */
88*4882a593Smuzhiyun #define CTL_DA_SCE (1 << 23) /* sample clock edge */
89*4882a593Smuzhiyun #define CTL_A_SEL_STV (0 << 24) /* TV tuner audio input */
90*4882a593Smuzhiyun #define CTL_A_SEL_SFM (1 << 24) /* FM audio input */
91*4882a593Smuzhiyun #define CTL_A_SEL_SML (2 << 24) /* mic/line audio input */
92*4882a593Smuzhiyun #define CTL_A_SEL_SMXC (3 << 24) /* MUX bypass */
93*4882a593Smuzhiyun #define CTL_A_SEL_SHIFT 24
94*4882a593Smuzhiyun #define CTL_A_SEL_MASK (3 << 24)
95*4882a593Smuzhiyun #define CTL_A_PWRDN (1 << 26) /* analog audio power-down */
96*4882a593Smuzhiyun #define CTL_A_G2X (1 << 27) /* audio gain boost */
97*4882a593Smuzhiyun #define CTL_A_GAIN_SHIFT 28 /* audio input gain */
98*4882a593Smuzhiyun #define CTL_A_GAIN_MASK (0xf<<28)
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /* RISC instruction opcodes */
101*4882a593Smuzhiyun #define RISC_WRITE (0x1 << 28) /* write FIFO data to memory at address */
102*4882a593Smuzhiyun #define RISC_WRITEC (0x5 << 28) /* write FIFO data to memory at current address */
103*4882a593Smuzhiyun #define RISC_SKIP (0x2 << 28) /* skip FIFO data */
104*4882a593Smuzhiyun #define RISC_JUMP (0x7 << 28) /* jump to address */
105*4882a593Smuzhiyun #define RISC_SYNC (0x8 << 28) /* synchronize with FIFO */
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* RISC instruction bits */
108*4882a593Smuzhiyun #define RISC_BYTES_ENABLE (0xf << 12) /* byte enable bits */
109*4882a593Smuzhiyun #define RISC_RESYNC ( 1 << 15) /* disable FDSR errors */
110*4882a593Smuzhiyun #define RISC_SET_STATUS_SHIFT 16 /* set status bits */
111*4882a593Smuzhiyun #define RISC_RESET_STATUS_SHIFT 20 /* clear status bits */
112*4882a593Smuzhiyun #define RISC_IRQ ( 1 << 24) /* interrupt */
113*4882a593Smuzhiyun #define RISC_EOL ( 1 << 26) /* end of line */
114*4882a593Smuzhiyun #define RISC_SOL ( 1 << 27) /* start of line */
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /* SYNC status bits values */
117*4882a593Smuzhiyun #define RISC_SYNC_FM1 0x6
118*4882a593Smuzhiyun #define RISC_SYNC_VRO 0xc
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun #define ANALOG_CLOCK 1792000
121*4882a593Smuzhiyun #ifdef CONFIG_SND_BT87X_OVERCLOCK
122*4882a593Smuzhiyun #define CLOCK_DIV_MIN 1
123*4882a593Smuzhiyun #else
124*4882a593Smuzhiyun #define CLOCK_DIV_MIN 4
125*4882a593Smuzhiyun #endif
126*4882a593Smuzhiyun #define CLOCK_DIV_MAX 15
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun #define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \
129*4882a593Smuzhiyun INT_RIPERR | INT_PABORT | INT_OCERR)
130*4882a593Smuzhiyun #define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS)
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun /* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */
133*4882a593Smuzhiyun #define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8)
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun /* Cards with configuration information */
136*4882a593Smuzhiyun enum snd_bt87x_boardid {
137*4882a593Smuzhiyun SND_BT87X_BOARD_UNKNOWN,
138*4882a593Smuzhiyun SND_BT87X_BOARD_GENERIC, /* both an & dig interfaces, 32kHz */
139*4882a593Smuzhiyun SND_BT87X_BOARD_ANALOG, /* board with no external A/D */
140*4882a593Smuzhiyun SND_BT87X_BOARD_OSPREY2x0,
141*4882a593Smuzhiyun SND_BT87X_BOARD_OSPREY440,
142*4882a593Smuzhiyun SND_BT87X_BOARD_AVPHONE98,
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /* Card configuration */
146*4882a593Smuzhiyun struct snd_bt87x_board {
147*4882a593Smuzhiyun int dig_rate; /* Digital input sampling rate */
148*4882a593Smuzhiyun u32 digital_fmt; /* Register settings for digital input */
149*4882a593Smuzhiyun unsigned no_analog:1; /* No analog input */
150*4882a593Smuzhiyun unsigned no_digital:1; /* No digital input */
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun static const struct snd_bt87x_board snd_bt87x_boards[] = {
154*4882a593Smuzhiyun [SND_BT87X_BOARD_UNKNOWN] = {
155*4882a593Smuzhiyun .dig_rate = 32000, /* just a guess */
156*4882a593Smuzhiyun },
157*4882a593Smuzhiyun [SND_BT87X_BOARD_GENERIC] = {
158*4882a593Smuzhiyun .dig_rate = 32000,
159*4882a593Smuzhiyun },
160*4882a593Smuzhiyun [SND_BT87X_BOARD_ANALOG] = {
161*4882a593Smuzhiyun .no_digital = 1,
162*4882a593Smuzhiyun },
163*4882a593Smuzhiyun [SND_BT87X_BOARD_OSPREY2x0] = {
164*4882a593Smuzhiyun .dig_rate = 44100,
165*4882a593Smuzhiyun .digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT),
166*4882a593Smuzhiyun },
167*4882a593Smuzhiyun [SND_BT87X_BOARD_OSPREY440] = {
168*4882a593Smuzhiyun .dig_rate = 32000,
169*4882a593Smuzhiyun .digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT),
170*4882a593Smuzhiyun .no_analog = 1,
171*4882a593Smuzhiyun },
172*4882a593Smuzhiyun [SND_BT87X_BOARD_AVPHONE98] = {
173*4882a593Smuzhiyun .dig_rate = 48000,
174*4882a593Smuzhiyun },
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun struct snd_bt87x {
178*4882a593Smuzhiyun struct snd_card *card;
179*4882a593Smuzhiyun struct pci_dev *pci;
180*4882a593Smuzhiyun struct snd_bt87x_board board;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun void __iomem *mmio;
183*4882a593Smuzhiyun int irq;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun spinlock_t reg_lock;
186*4882a593Smuzhiyun unsigned long opened;
187*4882a593Smuzhiyun struct snd_pcm_substream *substream;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun struct snd_dma_buffer dma_risc;
190*4882a593Smuzhiyun unsigned int line_bytes;
191*4882a593Smuzhiyun unsigned int lines;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun u32 reg_control;
194*4882a593Smuzhiyun u32 interrupt_mask;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun int current_line;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun int pci_parity_errors;
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun enum { DEVICE_DIGITAL, DEVICE_ANALOG };
202*4882a593Smuzhiyun
snd_bt87x_readl(struct snd_bt87x * chip,u32 reg)203*4882a593Smuzhiyun static inline u32 snd_bt87x_readl(struct snd_bt87x *chip, u32 reg)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun return readl(chip->mmio + reg);
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
snd_bt87x_writel(struct snd_bt87x * chip,u32 reg,u32 value)208*4882a593Smuzhiyun static inline void snd_bt87x_writel(struct snd_bt87x *chip, u32 reg, u32 value)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun writel(value, chip->mmio + reg);
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
snd_bt87x_create_risc(struct snd_bt87x * chip,struct snd_pcm_substream * substream,unsigned int periods,unsigned int period_bytes)213*4882a593Smuzhiyun static int snd_bt87x_create_risc(struct snd_bt87x *chip, struct snd_pcm_substream *substream,
214*4882a593Smuzhiyun unsigned int periods, unsigned int period_bytes)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun unsigned int i, offset;
217*4882a593Smuzhiyun __le32 *risc;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun if (chip->dma_risc.area == NULL) {
220*4882a593Smuzhiyun if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
221*4882a593Smuzhiyun PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0)
222*4882a593Smuzhiyun return -ENOMEM;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun risc = (__le32 *)chip->dma_risc.area;
225*4882a593Smuzhiyun offset = 0;
226*4882a593Smuzhiyun *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1);
227*4882a593Smuzhiyun *risc++ = cpu_to_le32(0);
228*4882a593Smuzhiyun for (i = 0; i < periods; ++i) {
229*4882a593Smuzhiyun u32 rest;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun rest = period_bytes;
232*4882a593Smuzhiyun do {
233*4882a593Smuzhiyun u32 cmd, len;
234*4882a593Smuzhiyun unsigned int addr;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun len = PAGE_SIZE - (offset % PAGE_SIZE);
237*4882a593Smuzhiyun if (len > rest)
238*4882a593Smuzhiyun len = rest;
239*4882a593Smuzhiyun cmd = RISC_WRITE | len;
240*4882a593Smuzhiyun if (rest == period_bytes) {
241*4882a593Smuzhiyun u32 block = i * 16 / periods;
242*4882a593Smuzhiyun cmd |= RISC_SOL;
243*4882a593Smuzhiyun cmd |= block << RISC_SET_STATUS_SHIFT;
244*4882a593Smuzhiyun cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun if (len == rest)
247*4882a593Smuzhiyun cmd |= RISC_EOL | RISC_IRQ;
248*4882a593Smuzhiyun *risc++ = cpu_to_le32(cmd);
249*4882a593Smuzhiyun addr = snd_pcm_sgbuf_get_addr(substream, offset);
250*4882a593Smuzhiyun *risc++ = cpu_to_le32(addr);
251*4882a593Smuzhiyun offset += len;
252*4882a593Smuzhiyun rest -= len;
253*4882a593Smuzhiyun } while (rest > 0);
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO);
256*4882a593Smuzhiyun *risc++ = cpu_to_le32(0);
257*4882a593Smuzhiyun *risc++ = cpu_to_le32(RISC_JUMP);
258*4882a593Smuzhiyun *risc++ = cpu_to_le32(chip->dma_risc.addr);
259*4882a593Smuzhiyun chip->line_bytes = period_bytes;
260*4882a593Smuzhiyun chip->lines = periods;
261*4882a593Smuzhiyun return 0;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
snd_bt87x_free_risc(struct snd_bt87x * chip)264*4882a593Smuzhiyun static void snd_bt87x_free_risc(struct snd_bt87x *chip)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun if (chip->dma_risc.area) {
267*4882a593Smuzhiyun snd_dma_free_pages(&chip->dma_risc);
268*4882a593Smuzhiyun chip->dma_risc.area = NULL;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
snd_bt87x_pci_error(struct snd_bt87x * chip,unsigned int status)272*4882a593Smuzhiyun static void snd_bt87x_pci_error(struct snd_bt87x *chip, unsigned int status)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun int pci_status = pci_status_get_and_clear_errors(chip->pci);
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun if (pci_status != PCI_STATUS_DETECTED_PARITY)
277*4882a593Smuzhiyun dev_err(chip->card->dev,
278*4882a593Smuzhiyun "Aieee - PCI error! status %#08x, PCI status %#04x\n",
279*4882a593Smuzhiyun status & ERROR_INTERRUPTS, pci_status);
280*4882a593Smuzhiyun else {
281*4882a593Smuzhiyun dev_err(chip->card->dev,
282*4882a593Smuzhiyun "Aieee - PCI parity error detected!\n");
283*4882a593Smuzhiyun /* error 'handling' similar to aic7xxx_pci.c: */
284*4882a593Smuzhiyun chip->pci_parity_errors++;
285*4882a593Smuzhiyun if (chip->pci_parity_errors > 20) {
286*4882a593Smuzhiyun dev_err(chip->card->dev,
287*4882a593Smuzhiyun "Too many PCI parity errors observed.\n");
288*4882a593Smuzhiyun dev_err(chip->card->dev,
289*4882a593Smuzhiyun "Some device on this bus is generating bad parity.\n");
290*4882a593Smuzhiyun dev_err(chip->card->dev,
291*4882a593Smuzhiyun "This is an error *observed by*, not *generated by*, this card.\n");
292*4882a593Smuzhiyun dev_err(chip->card->dev,
293*4882a593Smuzhiyun "PCI parity error checking has been disabled.\n");
294*4882a593Smuzhiyun chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR);
295*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
snd_bt87x_interrupt(int irq,void * dev_id)300*4882a593Smuzhiyun static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun struct snd_bt87x *chip = dev_id;
303*4882a593Smuzhiyun unsigned int status, irq_status;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun status = snd_bt87x_readl(chip, REG_INT_STAT);
306*4882a593Smuzhiyun irq_status = status & chip->interrupt_mask;
307*4882a593Smuzhiyun if (!irq_status)
308*4882a593Smuzhiyun return IRQ_NONE;
309*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_INT_STAT, irq_status);
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun if (irq_status & ERROR_INTERRUPTS) {
312*4882a593Smuzhiyun if (irq_status & (INT_FBUS | INT_FTRGT))
313*4882a593Smuzhiyun dev_warn(chip->card->dev,
314*4882a593Smuzhiyun "FIFO overrun, status %#08x\n", status);
315*4882a593Smuzhiyun if (irq_status & INT_OCERR)
316*4882a593Smuzhiyun dev_err(chip->card->dev,
317*4882a593Smuzhiyun "internal RISC error, status %#08x\n", status);
318*4882a593Smuzhiyun if (irq_status & (INT_PPERR | INT_RIPERR | INT_PABORT))
319*4882a593Smuzhiyun snd_bt87x_pci_error(chip, irq_status);
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun if ((irq_status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) {
322*4882a593Smuzhiyun int current_block, irq_block;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun /* assume that exactly one line has been recorded */
325*4882a593Smuzhiyun chip->current_line = (chip->current_line + 1) % chip->lines;
326*4882a593Smuzhiyun /* but check if some interrupts have been skipped */
327*4882a593Smuzhiyun current_block = chip->current_line * 16 / chip->lines;
328*4882a593Smuzhiyun irq_block = status >> INT_RISCS_SHIFT;
329*4882a593Smuzhiyun if (current_block != irq_block)
330*4882a593Smuzhiyun chip->current_line = (irq_block * chip->lines + 15) / 16;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun snd_pcm_period_elapsed(chip->substream);
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun return IRQ_HANDLED;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun static const struct snd_pcm_hardware snd_bt87x_digital_hw = {
338*4882a593Smuzhiyun .info = SNDRV_PCM_INFO_MMAP |
339*4882a593Smuzhiyun SNDRV_PCM_INFO_INTERLEAVED |
340*4882a593Smuzhiyun SNDRV_PCM_INFO_BLOCK_TRANSFER |
341*4882a593Smuzhiyun SNDRV_PCM_INFO_MMAP_VALID |
342*4882a593Smuzhiyun SNDRV_PCM_INFO_BATCH,
343*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S16_LE,
344*4882a593Smuzhiyun .rates = 0, /* set at runtime */
345*4882a593Smuzhiyun .channels_min = 2,
346*4882a593Smuzhiyun .channels_max = 2,
347*4882a593Smuzhiyun .buffer_bytes_max = 255 * 4092,
348*4882a593Smuzhiyun .period_bytes_min = 32,
349*4882a593Smuzhiyun .period_bytes_max = 4092,
350*4882a593Smuzhiyun .periods_min = 2,
351*4882a593Smuzhiyun .periods_max = 255,
352*4882a593Smuzhiyun };
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun static const struct snd_pcm_hardware snd_bt87x_analog_hw = {
355*4882a593Smuzhiyun .info = SNDRV_PCM_INFO_MMAP |
356*4882a593Smuzhiyun SNDRV_PCM_INFO_INTERLEAVED |
357*4882a593Smuzhiyun SNDRV_PCM_INFO_BLOCK_TRANSFER |
358*4882a593Smuzhiyun SNDRV_PCM_INFO_MMAP_VALID |
359*4882a593Smuzhiyun SNDRV_PCM_INFO_BATCH,
360*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
361*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_KNOT,
362*4882a593Smuzhiyun .rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX,
363*4882a593Smuzhiyun .rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN,
364*4882a593Smuzhiyun .channels_min = 1,
365*4882a593Smuzhiyun .channels_max = 1,
366*4882a593Smuzhiyun .buffer_bytes_max = 255 * 4092,
367*4882a593Smuzhiyun .period_bytes_min = 32,
368*4882a593Smuzhiyun .period_bytes_max = 4092,
369*4882a593Smuzhiyun .periods_min = 2,
370*4882a593Smuzhiyun .periods_max = 255,
371*4882a593Smuzhiyun };
372*4882a593Smuzhiyun
snd_bt87x_set_digital_hw(struct snd_bt87x * chip,struct snd_pcm_runtime * runtime)373*4882a593Smuzhiyun static int snd_bt87x_set_digital_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun chip->reg_control |= CTL_DA_IOM_DA | CTL_A_PWRDN;
376*4882a593Smuzhiyun runtime->hw = snd_bt87x_digital_hw;
377*4882a593Smuzhiyun runtime->hw.rates = snd_pcm_rate_to_rate_bit(chip->board.dig_rate);
378*4882a593Smuzhiyun runtime->hw.rate_min = chip->board.dig_rate;
379*4882a593Smuzhiyun runtime->hw.rate_max = chip->board.dig_rate;
380*4882a593Smuzhiyun return 0;
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun
snd_bt87x_set_analog_hw(struct snd_bt87x * chip,struct snd_pcm_runtime * runtime)383*4882a593Smuzhiyun static int snd_bt87x_set_analog_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun static const struct snd_ratnum analog_clock = {
386*4882a593Smuzhiyun .num = ANALOG_CLOCK,
387*4882a593Smuzhiyun .den_min = CLOCK_DIV_MIN,
388*4882a593Smuzhiyun .den_max = CLOCK_DIV_MAX,
389*4882a593Smuzhiyun .den_step = 1
390*4882a593Smuzhiyun };
391*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_ratnums constraint_rates = {
392*4882a593Smuzhiyun .nrats = 1,
393*4882a593Smuzhiyun .rats = &analog_clock
394*4882a593Smuzhiyun };
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun chip->reg_control &= ~(CTL_DA_IOM_DA | CTL_A_PWRDN);
397*4882a593Smuzhiyun runtime->hw = snd_bt87x_analog_hw;
398*4882a593Smuzhiyun return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
399*4882a593Smuzhiyun &constraint_rates);
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun
snd_bt87x_pcm_open(struct snd_pcm_substream * substream)402*4882a593Smuzhiyun static int snd_bt87x_pcm_open(struct snd_pcm_substream *substream)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
405*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
406*4882a593Smuzhiyun int err;
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun if (test_and_set_bit(0, &chip->opened))
409*4882a593Smuzhiyun return -EBUSY;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun if (substream->pcm->device == DEVICE_DIGITAL)
412*4882a593Smuzhiyun err = snd_bt87x_set_digital_hw(chip, runtime);
413*4882a593Smuzhiyun else
414*4882a593Smuzhiyun err = snd_bt87x_set_analog_hw(chip, runtime);
415*4882a593Smuzhiyun if (err < 0)
416*4882a593Smuzhiyun goto _error;
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
419*4882a593Smuzhiyun if (err < 0)
420*4882a593Smuzhiyun goto _error;
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun chip->substream = substream;
423*4882a593Smuzhiyun return 0;
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun _error:
426*4882a593Smuzhiyun clear_bit(0, &chip->opened);
427*4882a593Smuzhiyun smp_mb__after_atomic();
428*4882a593Smuzhiyun return err;
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun
snd_bt87x_close(struct snd_pcm_substream * substream)431*4882a593Smuzhiyun static int snd_bt87x_close(struct snd_pcm_substream *substream)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun spin_lock_irq(&chip->reg_lock);
436*4882a593Smuzhiyun chip->reg_control |= CTL_A_PWRDN;
437*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
438*4882a593Smuzhiyun spin_unlock_irq(&chip->reg_lock);
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun chip->substream = NULL;
441*4882a593Smuzhiyun clear_bit(0, &chip->opened);
442*4882a593Smuzhiyun smp_mb__after_atomic();
443*4882a593Smuzhiyun return 0;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun
snd_bt87x_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)446*4882a593Smuzhiyun static int snd_bt87x_hw_params(struct snd_pcm_substream *substream,
447*4882a593Smuzhiyun struct snd_pcm_hw_params *hw_params)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun return snd_bt87x_create_risc(chip, substream,
452*4882a593Smuzhiyun params_periods(hw_params),
453*4882a593Smuzhiyun params_period_bytes(hw_params));
454*4882a593Smuzhiyun }
455*4882a593Smuzhiyun
snd_bt87x_hw_free(struct snd_pcm_substream * substream)456*4882a593Smuzhiyun static int snd_bt87x_hw_free(struct snd_pcm_substream *substream)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun snd_bt87x_free_risc(chip);
461*4882a593Smuzhiyun return 0;
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun
snd_bt87x_prepare(struct snd_pcm_substream * substream)464*4882a593Smuzhiyun static int snd_bt87x_prepare(struct snd_pcm_substream *substream)
465*4882a593Smuzhiyun {
466*4882a593Smuzhiyun struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
467*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
468*4882a593Smuzhiyun int decimation;
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun spin_lock_irq(&chip->reg_lock);
471*4882a593Smuzhiyun chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR);
472*4882a593Smuzhiyun decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate;
473*4882a593Smuzhiyun chip->reg_control |= decimation << CTL_DA_SDR_SHIFT;
474*4882a593Smuzhiyun if (runtime->format == SNDRV_PCM_FORMAT_S8)
475*4882a593Smuzhiyun chip->reg_control |= CTL_DA_SBR;
476*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
477*4882a593Smuzhiyun spin_unlock_irq(&chip->reg_lock);
478*4882a593Smuzhiyun return 0;
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun
snd_bt87x_start(struct snd_bt87x * chip)481*4882a593Smuzhiyun static int snd_bt87x_start(struct snd_bt87x *chip)
482*4882a593Smuzhiyun {
483*4882a593Smuzhiyun spin_lock(&chip->reg_lock);
484*4882a593Smuzhiyun chip->current_line = 0;
485*4882a593Smuzhiyun chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN;
486*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr);
487*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_PACKET_LEN,
488*4882a593Smuzhiyun chip->line_bytes | (chip->lines << 16));
489*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
490*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
491*4882a593Smuzhiyun spin_unlock(&chip->reg_lock);
492*4882a593Smuzhiyun return 0;
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun
snd_bt87x_stop(struct snd_bt87x * chip)495*4882a593Smuzhiyun static int snd_bt87x_stop(struct snd_bt87x *chip)
496*4882a593Smuzhiyun {
497*4882a593Smuzhiyun spin_lock(&chip->reg_lock);
498*4882a593Smuzhiyun chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN);
499*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
500*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_INT_MASK, 0);
501*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
502*4882a593Smuzhiyun spin_unlock(&chip->reg_lock);
503*4882a593Smuzhiyun return 0;
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun
snd_bt87x_trigger(struct snd_pcm_substream * substream,int cmd)506*4882a593Smuzhiyun static int snd_bt87x_trigger(struct snd_pcm_substream *substream, int cmd)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun switch (cmd) {
511*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_START:
512*4882a593Smuzhiyun return snd_bt87x_start(chip);
513*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_STOP:
514*4882a593Smuzhiyun return snd_bt87x_stop(chip);
515*4882a593Smuzhiyun default:
516*4882a593Smuzhiyun return -EINVAL;
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun }
519*4882a593Smuzhiyun
snd_bt87x_pointer(struct snd_pcm_substream * substream)520*4882a593Smuzhiyun static snd_pcm_uframes_t snd_bt87x_pointer(struct snd_pcm_substream *substream)
521*4882a593Smuzhiyun {
522*4882a593Smuzhiyun struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
523*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes);
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun static const struct snd_pcm_ops snd_bt87x_pcm_ops = {
529*4882a593Smuzhiyun .open = snd_bt87x_pcm_open,
530*4882a593Smuzhiyun .close = snd_bt87x_close,
531*4882a593Smuzhiyun .hw_params = snd_bt87x_hw_params,
532*4882a593Smuzhiyun .hw_free = snd_bt87x_hw_free,
533*4882a593Smuzhiyun .prepare = snd_bt87x_prepare,
534*4882a593Smuzhiyun .trigger = snd_bt87x_trigger,
535*4882a593Smuzhiyun .pointer = snd_bt87x_pointer,
536*4882a593Smuzhiyun };
537*4882a593Smuzhiyun
snd_bt87x_capture_volume_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * info)538*4882a593Smuzhiyun static int snd_bt87x_capture_volume_info(struct snd_kcontrol *kcontrol,
539*4882a593Smuzhiyun struct snd_ctl_elem_info *info)
540*4882a593Smuzhiyun {
541*4882a593Smuzhiyun info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
542*4882a593Smuzhiyun info->count = 1;
543*4882a593Smuzhiyun info->value.integer.min = 0;
544*4882a593Smuzhiyun info->value.integer.max = 15;
545*4882a593Smuzhiyun return 0;
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun
snd_bt87x_capture_volume_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)548*4882a593Smuzhiyun static int snd_bt87x_capture_volume_get(struct snd_kcontrol *kcontrol,
549*4882a593Smuzhiyun struct snd_ctl_elem_value *value)
550*4882a593Smuzhiyun {
551*4882a593Smuzhiyun struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT;
554*4882a593Smuzhiyun return 0;
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun
snd_bt87x_capture_volume_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)557*4882a593Smuzhiyun static int snd_bt87x_capture_volume_put(struct snd_kcontrol *kcontrol,
558*4882a593Smuzhiyun struct snd_ctl_elem_value *value)
559*4882a593Smuzhiyun {
560*4882a593Smuzhiyun struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
561*4882a593Smuzhiyun u32 old_control;
562*4882a593Smuzhiyun int changed;
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun spin_lock_irq(&chip->reg_lock);
565*4882a593Smuzhiyun old_control = chip->reg_control;
566*4882a593Smuzhiyun chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK)
567*4882a593Smuzhiyun | (value->value.integer.value[0] << CTL_A_GAIN_SHIFT);
568*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
569*4882a593Smuzhiyun changed = old_control != chip->reg_control;
570*4882a593Smuzhiyun spin_unlock_irq(&chip->reg_lock);
571*4882a593Smuzhiyun return changed;
572*4882a593Smuzhiyun }
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_bt87x_capture_volume = {
575*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
576*4882a593Smuzhiyun .name = "Capture Volume",
577*4882a593Smuzhiyun .info = snd_bt87x_capture_volume_info,
578*4882a593Smuzhiyun .get = snd_bt87x_capture_volume_get,
579*4882a593Smuzhiyun .put = snd_bt87x_capture_volume_put,
580*4882a593Smuzhiyun };
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun #define snd_bt87x_capture_boost_info snd_ctl_boolean_mono_info
583*4882a593Smuzhiyun
snd_bt87x_capture_boost_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)584*4882a593Smuzhiyun static int snd_bt87x_capture_boost_get(struct snd_kcontrol *kcontrol,
585*4882a593Smuzhiyun struct snd_ctl_elem_value *value)
586*4882a593Smuzhiyun {
587*4882a593Smuzhiyun struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X);
590*4882a593Smuzhiyun return 0;
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
snd_bt87x_capture_boost_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)593*4882a593Smuzhiyun static int snd_bt87x_capture_boost_put(struct snd_kcontrol *kcontrol,
594*4882a593Smuzhiyun struct snd_ctl_elem_value *value)
595*4882a593Smuzhiyun {
596*4882a593Smuzhiyun struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
597*4882a593Smuzhiyun u32 old_control;
598*4882a593Smuzhiyun int changed;
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun spin_lock_irq(&chip->reg_lock);
601*4882a593Smuzhiyun old_control = chip->reg_control;
602*4882a593Smuzhiyun chip->reg_control = (chip->reg_control & ~CTL_A_G2X)
603*4882a593Smuzhiyun | (value->value.integer.value[0] ? CTL_A_G2X : 0);
604*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
605*4882a593Smuzhiyun changed = chip->reg_control != old_control;
606*4882a593Smuzhiyun spin_unlock_irq(&chip->reg_lock);
607*4882a593Smuzhiyun return changed;
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_bt87x_capture_boost = {
611*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
612*4882a593Smuzhiyun .name = "Capture Boost",
613*4882a593Smuzhiyun .info = snd_bt87x_capture_boost_info,
614*4882a593Smuzhiyun .get = snd_bt87x_capture_boost_get,
615*4882a593Smuzhiyun .put = snd_bt87x_capture_boost_put,
616*4882a593Smuzhiyun };
617*4882a593Smuzhiyun
snd_bt87x_capture_source_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * info)618*4882a593Smuzhiyun static int snd_bt87x_capture_source_info(struct snd_kcontrol *kcontrol,
619*4882a593Smuzhiyun struct snd_ctl_elem_info *info)
620*4882a593Smuzhiyun {
621*4882a593Smuzhiyun static const char *const texts[3] = {"TV Tuner", "FM", "Mic/Line"};
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun return snd_ctl_enum_info(info, 1, 3, texts);
624*4882a593Smuzhiyun }
625*4882a593Smuzhiyun
snd_bt87x_capture_source_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)626*4882a593Smuzhiyun static int snd_bt87x_capture_source_get(struct snd_kcontrol *kcontrol,
627*4882a593Smuzhiyun struct snd_ctl_elem_value *value)
628*4882a593Smuzhiyun {
629*4882a593Smuzhiyun struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT;
632*4882a593Smuzhiyun return 0;
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun
snd_bt87x_capture_source_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)635*4882a593Smuzhiyun static int snd_bt87x_capture_source_put(struct snd_kcontrol *kcontrol,
636*4882a593Smuzhiyun struct snd_ctl_elem_value *value)
637*4882a593Smuzhiyun {
638*4882a593Smuzhiyun struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
639*4882a593Smuzhiyun u32 old_control;
640*4882a593Smuzhiyun int changed;
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun spin_lock_irq(&chip->reg_lock);
643*4882a593Smuzhiyun old_control = chip->reg_control;
644*4882a593Smuzhiyun chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK)
645*4882a593Smuzhiyun | (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT);
646*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
647*4882a593Smuzhiyun changed = chip->reg_control != old_control;
648*4882a593Smuzhiyun spin_unlock_irq(&chip->reg_lock);
649*4882a593Smuzhiyun return changed;
650*4882a593Smuzhiyun }
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_bt87x_capture_source = {
653*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
654*4882a593Smuzhiyun .name = "Capture Source",
655*4882a593Smuzhiyun .info = snd_bt87x_capture_source_info,
656*4882a593Smuzhiyun .get = snd_bt87x_capture_source_get,
657*4882a593Smuzhiyun .put = snd_bt87x_capture_source_put,
658*4882a593Smuzhiyun };
659*4882a593Smuzhiyun
snd_bt87x_free(struct snd_bt87x * chip)660*4882a593Smuzhiyun static int snd_bt87x_free(struct snd_bt87x *chip)
661*4882a593Smuzhiyun {
662*4882a593Smuzhiyun if (chip->mmio)
663*4882a593Smuzhiyun snd_bt87x_stop(chip);
664*4882a593Smuzhiyun if (chip->irq >= 0)
665*4882a593Smuzhiyun free_irq(chip->irq, chip);
666*4882a593Smuzhiyun iounmap(chip->mmio);
667*4882a593Smuzhiyun pci_release_regions(chip->pci);
668*4882a593Smuzhiyun pci_disable_device(chip->pci);
669*4882a593Smuzhiyun kfree(chip);
670*4882a593Smuzhiyun return 0;
671*4882a593Smuzhiyun }
672*4882a593Smuzhiyun
snd_bt87x_dev_free(struct snd_device * device)673*4882a593Smuzhiyun static int snd_bt87x_dev_free(struct snd_device *device)
674*4882a593Smuzhiyun {
675*4882a593Smuzhiyun struct snd_bt87x *chip = device->device_data;
676*4882a593Smuzhiyun return snd_bt87x_free(chip);
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun
snd_bt87x_pcm(struct snd_bt87x * chip,int device,char * name)679*4882a593Smuzhiyun static int snd_bt87x_pcm(struct snd_bt87x *chip, int device, char *name)
680*4882a593Smuzhiyun {
681*4882a593Smuzhiyun int err;
682*4882a593Smuzhiyun struct snd_pcm *pcm;
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
685*4882a593Smuzhiyun if (err < 0)
686*4882a593Smuzhiyun return err;
687*4882a593Smuzhiyun pcm->private_data = chip;
688*4882a593Smuzhiyun strcpy(pcm->name, name);
689*4882a593Smuzhiyun snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops);
690*4882a593Smuzhiyun snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
691*4882a593Smuzhiyun &chip->pci->dev,
692*4882a593Smuzhiyun 128 * 1024,
693*4882a593Smuzhiyun ALIGN(255 * 4092, 1024));
694*4882a593Smuzhiyun return 0;
695*4882a593Smuzhiyun }
696*4882a593Smuzhiyun
snd_bt87x_create(struct snd_card * card,struct pci_dev * pci,struct snd_bt87x ** rchip)697*4882a593Smuzhiyun static int snd_bt87x_create(struct snd_card *card,
698*4882a593Smuzhiyun struct pci_dev *pci,
699*4882a593Smuzhiyun struct snd_bt87x **rchip)
700*4882a593Smuzhiyun {
701*4882a593Smuzhiyun struct snd_bt87x *chip;
702*4882a593Smuzhiyun int err;
703*4882a593Smuzhiyun static const struct snd_device_ops ops = {
704*4882a593Smuzhiyun .dev_free = snd_bt87x_dev_free
705*4882a593Smuzhiyun };
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun *rchip = NULL;
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun err = pci_enable_device(pci);
710*4882a593Smuzhiyun if (err < 0)
711*4882a593Smuzhiyun return err;
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun chip = kzalloc(sizeof(*chip), GFP_KERNEL);
714*4882a593Smuzhiyun if (!chip) {
715*4882a593Smuzhiyun pci_disable_device(pci);
716*4882a593Smuzhiyun return -ENOMEM;
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun chip->card = card;
719*4882a593Smuzhiyun chip->pci = pci;
720*4882a593Smuzhiyun chip->irq = -1;
721*4882a593Smuzhiyun spin_lock_init(&chip->reg_lock);
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun if ((err = pci_request_regions(pci, "Bt87x audio")) < 0) {
724*4882a593Smuzhiyun kfree(chip);
725*4882a593Smuzhiyun pci_disable_device(pci);
726*4882a593Smuzhiyun return err;
727*4882a593Smuzhiyun }
728*4882a593Smuzhiyun chip->mmio = pci_ioremap_bar(pci, 0);
729*4882a593Smuzhiyun if (!chip->mmio) {
730*4882a593Smuzhiyun dev_err(card->dev, "cannot remap io memory\n");
731*4882a593Smuzhiyun err = -ENOMEM;
732*4882a593Smuzhiyun goto fail;
733*4882a593Smuzhiyun }
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun chip->reg_control = CTL_A_PWRDN | CTL_DA_ES2 |
736*4882a593Smuzhiyun CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT);
737*4882a593Smuzhiyun chip->interrupt_mask = MY_INTERRUPTS;
738*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
739*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_INT_MASK, 0);
740*4882a593Smuzhiyun snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun err = request_irq(pci->irq, snd_bt87x_interrupt, IRQF_SHARED,
743*4882a593Smuzhiyun KBUILD_MODNAME, chip);
744*4882a593Smuzhiyun if (err < 0) {
745*4882a593Smuzhiyun dev_err(card->dev, "cannot grab irq %d\n", pci->irq);
746*4882a593Smuzhiyun goto fail;
747*4882a593Smuzhiyun }
748*4882a593Smuzhiyun chip->irq = pci->irq;
749*4882a593Smuzhiyun card->sync_irq = chip->irq;
750*4882a593Smuzhiyun pci_set_master(pci);
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
753*4882a593Smuzhiyun if (err < 0)
754*4882a593Smuzhiyun goto fail;
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun *rchip = chip;
757*4882a593Smuzhiyun return 0;
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun fail:
760*4882a593Smuzhiyun snd_bt87x_free(chip);
761*4882a593Smuzhiyun return err;
762*4882a593Smuzhiyun }
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun #define BT_DEVICE(chip, subvend, subdev, id) \
765*4882a593Smuzhiyun { .vendor = PCI_VENDOR_ID_BROOKTREE, \
766*4882a593Smuzhiyun .device = chip, \
767*4882a593Smuzhiyun .subvendor = subvend, .subdevice = subdev, \
768*4882a593Smuzhiyun .driver_data = SND_BT87X_BOARD_ ## id }
769*4882a593Smuzhiyun /* driver_data is the card id for that device */
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun static const struct pci_device_id snd_bt87x_ids[] = {
772*4882a593Smuzhiyun /* Hauppauge WinTV series */
773*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0x13eb, GENERIC),
774*4882a593Smuzhiyun /* Hauppauge WinTV series */
775*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, 0x0070, 0x13eb, GENERIC),
776*4882a593Smuzhiyun /* Viewcast Osprey 200 */
777*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff01, OSPREY2x0),
778*4882a593Smuzhiyun /* Viewcast Osprey 440 (rate is configurable via gpio) */
779*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff07, OSPREY440),
780*4882a593Smuzhiyun /* ATI TV-Wonder */
781*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1002, 0x0001, GENERIC),
782*4882a593Smuzhiyun /* Leadtek Winfast tv 2000xp delux */
783*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x107d, 0x6606, GENERIC),
784*4882a593Smuzhiyun /* Pinnacle PCTV */
785*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x11bd, 0x0012, GENERIC),
786*4882a593Smuzhiyun /* Voodoo TV 200 */
787*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x121a, 0x3000, GENERIC),
788*4882a593Smuzhiyun /* Askey Computer Corp. MagicTView'99 */
789*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x144f, 0x3000, GENERIC),
790*4882a593Smuzhiyun /* AVerMedia Studio No. 103, 203, ...? */
791*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1461, 0x0003, AVPHONE98),
792*4882a593Smuzhiyun /* Prolink PixelView PV-M4900 */
793*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1554, 0x4011, GENERIC),
794*4882a593Smuzhiyun /* Pinnacle Studio PCTV rave */
795*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0xbd11, 0x1200, GENERIC),
796*4882a593Smuzhiyun { }
797*4882a593Smuzhiyun };
798*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, snd_bt87x_ids);
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun /* cards known not to have audio
801*4882a593Smuzhiyun * (DVB cards use the audio function to transfer MPEG data) */
802*4882a593Smuzhiyun static struct {
803*4882a593Smuzhiyun unsigned short subvendor, subdevice;
804*4882a593Smuzhiyun } denylist[] = {
805*4882a593Smuzhiyun {0x0071, 0x0101}, /* Nebula Electronics DigiTV */
806*4882a593Smuzhiyun {0x11bd, 0x001c}, /* Pinnacle PCTV Sat */
807*4882a593Smuzhiyun {0x11bd, 0x0026}, /* Pinnacle PCTV SAT CI */
808*4882a593Smuzhiyun {0x1461, 0x0761}, /* AVermedia AverTV DVB-T */
809*4882a593Smuzhiyun {0x1461, 0x0771}, /* AVermedia DVB-T 771 */
810*4882a593Smuzhiyun {0x1822, 0x0001}, /* Twinhan VisionPlus DVB-T */
811*4882a593Smuzhiyun {0x18ac, 0xd500}, /* DVICO FusionHDTV 5 Lite */
812*4882a593Smuzhiyun {0x18ac, 0xdb10}, /* DVICO FusionHDTV DVB-T Lite */
813*4882a593Smuzhiyun {0x18ac, 0xdb11}, /* Ultraview DVB-T Lite */
814*4882a593Smuzhiyun {0x270f, 0xfc00}, /* Chaintech Digitop DST-1000 DVB-S */
815*4882a593Smuzhiyun {0x7063, 0x2000}, /* pcHDTV HD-2000 TV */
816*4882a593Smuzhiyun };
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun static struct pci_driver driver;
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun /* return the id of the card, or a negative value if it's on the denylist */
snd_bt87x_detect_card(struct pci_dev * pci)821*4882a593Smuzhiyun static int snd_bt87x_detect_card(struct pci_dev *pci)
822*4882a593Smuzhiyun {
823*4882a593Smuzhiyun int i;
824*4882a593Smuzhiyun const struct pci_device_id *supported;
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun supported = pci_match_id(snd_bt87x_ids, pci);
827*4882a593Smuzhiyun if (supported && supported->driver_data > 0)
828*4882a593Smuzhiyun return supported->driver_data;
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(denylist); ++i)
831*4882a593Smuzhiyun if (denylist[i].subvendor == pci->subsystem_vendor &&
832*4882a593Smuzhiyun denylist[i].subdevice == pci->subsystem_device) {
833*4882a593Smuzhiyun dev_dbg(&pci->dev,
834*4882a593Smuzhiyun "card %#04x-%#04x:%#04x has no audio\n",
835*4882a593Smuzhiyun pci->device, pci->subsystem_vendor, pci->subsystem_device);
836*4882a593Smuzhiyun return -EBUSY;
837*4882a593Smuzhiyun }
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun dev_info(&pci->dev, "unknown card %#04x-%#04x:%#04x\n",
840*4882a593Smuzhiyun pci->device, pci->subsystem_vendor, pci->subsystem_device);
841*4882a593Smuzhiyun dev_info(&pci->dev, "please mail id, board name, and, "
842*4882a593Smuzhiyun "if it works, the correct digital_rate option to "
843*4882a593Smuzhiyun "<alsa-devel@alsa-project.org>\n");
844*4882a593Smuzhiyun return SND_BT87X_BOARD_UNKNOWN;
845*4882a593Smuzhiyun }
846*4882a593Smuzhiyun
snd_bt87x_probe(struct pci_dev * pci,const struct pci_device_id * pci_id)847*4882a593Smuzhiyun static int snd_bt87x_probe(struct pci_dev *pci,
848*4882a593Smuzhiyun const struct pci_device_id *pci_id)
849*4882a593Smuzhiyun {
850*4882a593Smuzhiyun static int dev;
851*4882a593Smuzhiyun struct snd_card *card;
852*4882a593Smuzhiyun struct snd_bt87x *chip;
853*4882a593Smuzhiyun int err;
854*4882a593Smuzhiyun enum snd_bt87x_boardid boardid;
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun if (!pci_id->driver_data) {
857*4882a593Smuzhiyun err = snd_bt87x_detect_card(pci);
858*4882a593Smuzhiyun if (err < 0)
859*4882a593Smuzhiyun return -ENODEV;
860*4882a593Smuzhiyun boardid = err;
861*4882a593Smuzhiyun } else
862*4882a593Smuzhiyun boardid = pci_id->driver_data;
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun if (dev >= SNDRV_CARDS)
865*4882a593Smuzhiyun return -ENODEV;
866*4882a593Smuzhiyun if (!enable[dev]) {
867*4882a593Smuzhiyun ++dev;
868*4882a593Smuzhiyun return -ENOENT;
869*4882a593Smuzhiyun }
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
872*4882a593Smuzhiyun 0, &card);
873*4882a593Smuzhiyun if (err < 0)
874*4882a593Smuzhiyun return err;
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun err = snd_bt87x_create(card, pci, &chip);
877*4882a593Smuzhiyun if (err < 0)
878*4882a593Smuzhiyun goto _error;
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun memcpy(&chip->board, &snd_bt87x_boards[boardid], sizeof(chip->board));
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun if (!chip->board.no_digital) {
883*4882a593Smuzhiyun if (digital_rate[dev] > 0)
884*4882a593Smuzhiyun chip->board.dig_rate = digital_rate[dev];
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun chip->reg_control |= chip->board.digital_fmt;
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital");
889*4882a593Smuzhiyun if (err < 0)
890*4882a593Smuzhiyun goto _error;
891*4882a593Smuzhiyun }
892*4882a593Smuzhiyun if (!chip->board.no_analog) {
893*4882a593Smuzhiyun err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog");
894*4882a593Smuzhiyun if (err < 0)
895*4882a593Smuzhiyun goto _error;
896*4882a593Smuzhiyun err = snd_ctl_add(card, snd_ctl_new1(
897*4882a593Smuzhiyun &snd_bt87x_capture_volume, chip));
898*4882a593Smuzhiyun if (err < 0)
899*4882a593Smuzhiyun goto _error;
900*4882a593Smuzhiyun err = snd_ctl_add(card, snd_ctl_new1(
901*4882a593Smuzhiyun &snd_bt87x_capture_boost, chip));
902*4882a593Smuzhiyun if (err < 0)
903*4882a593Smuzhiyun goto _error;
904*4882a593Smuzhiyun err = snd_ctl_add(card, snd_ctl_new1(
905*4882a593Smuzhiyun &snd_bt87x_capture_source, chip));
906*4882a593Smuzhiyun if (err < 0)
907*4882a593Smuzhiyun goto _error;
908*4882a593Smuzhiyun }
909*4882a593Smuzhiyun dev_info(card->dev, "bt87x%d: Using board %d, %sanalog, %sdigital "
910*4882a593Smuzhiyun "(rate %d Hz)\n", dev, boardid,
911*4882a593Smuzhiyun chip->board.no_analog ? "no " : "",
912*4882a593Smuzhiyun chip->board.no_digital ? "no " : "", chip->board.dig_rate);
913*4882a593Smuzhiyun
914*4882a593Smuzhiyun strcpy(card->driver, "Bt87x");
915*4882a593Smuzhiyun sprintf(card->shortname, "Brooktree Bt%x", pci->device);
916*4882a593Smuzhiyun sprintf(card->longname, "%s at %#llx, irq %i",
917*4882a593Smuzhiyun card->shortname, (unsigned long long)pci_resource_start(pci, 0),
918*4882a593Smuzhiyun chip->irq);
919*4882a593Smuzhiyun strcpy(card->mixername, "Bt87x");
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun err = snd_card_register(card);
922*4882a593Smuzhiyun if (err < 0)
923*4882a593Smuzhiyun goto _error;
924*4882a593Smuzhiyun
925*4882a593Smuzhiyun pci_set_drvdata(pci, card);
926*4882a593Smuzhiyun ++dev;
927*4882a593Smuzhiyun return 0;
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun _error:
930*4882a593Smuzhiyun snd_card_free(card);
931*4882a593Smuzhiyun return err;
932*4882a593Smuzhiyun }
933*4882a593Smuzhiyun
snd_bt87x_remove(struct pci_dev * pci)934*4882a593Smuzhiyun static void snd_bt87x_remove(struct pci_dev *pci)
935*4882a593Smuzhiyun {
936*4882a593Smuzhiyun snd_card_free(pci_get_drvdata(pci));
937*4882a593Smuzhiyun }
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun /* default entries for all Bt87x cards - it's not exported */
940*4882a593Smuzhiyun /* driver_data is set to 0 to call detection */
941*4882a593Smuzhiyun static const struct pci_device_id snd_bt87x_default_ids[] = {
942*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN),
943*4882a593Smuzhiyun BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN),
944*4882a593Smuzhiyun { }
945*4882a593Smuzhiyun };
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun static struct pci_driver driver = {
948*4882a593Smuzhiyun .name = KBUILD_MODNAME,
949*4882a593Smuzhiyun .id_table = snd_bt87x_ids,
950*4882a593Smuzhiyun .probe = snd_bt87x_probe,
951*4882a593Smuzhiyun .remove = snd_bt87x_remove,
952*4882a593Smuzhiyun };
953*4882a593Smuzhiyun
alsa_card_bt87x_init(void)954*4882a593Smuzhiyun static int __init alsa_card_bt87x_init(void)
955*4882a593Smuzhiyun {
956*4882a593Smuzhiyun if (load_all)
957*4882a593Smuzhiyun driver.id_table = snd_bt87x_default_ids;
958*4882a593Smuzhiyun return pci_register_driver(&driver);
959*4882a593Smuzhiyun }
960*4882a593Smuzhiyun
alsa_card_bt87x_exit(void)961*4882a593Smuzhiyun static void __exit alsa_card_bt87x_exit(void)
962*4882a593Smuzhiyun {
963*4882a593Smuzhiyun pci_unregister_driver(&driver);
964*4882a593Smuzhiyun }
965*4882a593Smuzhiyun
966*4882a593Smuzhiyun module_init(alsa_card_bt87x_init)
967*4882a593Smuzhiyun module_exit(alsa_card_bt87x_exit)
968