xref: /OK3568_Linux_fs/kernel/sound/pci/asihpi/hpi_internal.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /******************************************************************************
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun     AudioScience HPI driver
5*4882a593Smuzhiyun     Copyright (C) 1997-2012  AudioScience Inc. <support@audioscience.com>
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun HPI internal definitions
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun (C) Copyright AudioScience Inc. 1996-2009
11*4882a593Smuzhiyun ******************************************************************************/
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #ifndef _HPI_INTERNAL_H_
14*4882a593Smuzhiyun #define _HPI_INTERNAL_H_
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include "hpi.h"
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun /** maximum number of memory regions mapped to an adapter */
19*4882a593Smuzhiyun #define HPI_MAX_ADAPTER_MEM_SPACES (2)
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* Each OS needs its own hpios.h */
22*4882a593Smuzhiyun #include "hpios.h"
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* physical memory allocation */
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun /** Allocate and map an area of locked memory for bus master DMA operations.
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun On success, *pLockedMemeHandle is a valid handle, and 0 is returned
29*4882a593Smuzhiyun On error *pLockedMemHandle marked invalid, non-zero returned.
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun If this function succeeds, then HpiOs_LockedMem_GetVirtAddr() and
32*4882a593Smuzhiyun HpiOs_LockedMem_GetPyhsAddr() will always succed on the returned handle.
33*4882a593Smuzhiyun */
34*4882a593Smuzhiyun u16 hpios_locked_mem_alloc(struct consistent_dma_area *p_locked_mem_handle,
35*4882a593Smuzhiyun 							   /**< memory handle */
36*4882a593Smuzhiyun 	u32 size, /**< Size in bytes to allocate */
37*4882a593Smuzhiyun 	struct pci_dev *p_os_reference
38*4882a593Smuzhiyun 	/**< OS specific data required for memory allocation */
39*4882a593Smuzhiyun 	);
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /** Free mapping and memory represented by LockedMemHandle
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun Frees any resources, then invalidates the handle.
44*4882a593Smuzhiyun Returns 0 on success, 1 if handle is invalid.
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun */
47*4882a593Smuzhiyun u16 hpios_locked_mem_free(struct consistent_dma_area *locked_mem_handle);
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun /** Get the physical PCI address of memory represented by LockedMemHandle.
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun If handle is invalid *pPhysicalAddr is set to zero and return 1
52*4882a593Smuzhiyun */
53*4882a593Smuzhiyun u16 hpios_locked_mem_get_phys_addr(struct consistent_dma_area
54*4882a593Smuzhiyun 	*locked_mem_handle, u32 *p_physical_addr);
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /** Get the CPU address of memory represented by LockedMemHandle.
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun If handle is NULL *ppvVirtualAddr is set to NULL and return 1
59*4882a593Smuzhiyun */
60*4882a593Smuzhiyun u16 hpios_locked_mem_get_virt_addr(struct consistent_dma_area
61*4882a593Smuzhiyun 	*locked_mem_handle, void **ppv_virtual_addr);
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun /** Check that handle is valid
64*4882a593Smuzhiyun i.e it represents a valid memory area
65*4882a593Smuzhiyun */
66*4882a593Smuzhiyun u16 hpios_locked_mem_valid(struct consistent_dma_area *locked_mem_handle);
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun /* timing/delay */
69*4882a593Smuzhiyun void hpios_delay_micro_seconds(u32 num_micro_sec);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun struct hpi_message;
72*4882a593Smuzhiyun struct hpi_response;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun typedef void hpi_handler_func(struct hpi_message *, struct hpi_response *);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /* If the assert fails, compiler complains
77*4882a593Smuzhiyun    something like size of array `msg' is negative.
78*4882a593Smuzhiyun    Unlike linux BUILD_BUG_ON, this works outside function scope.
79*4882a593Smuzhiyun */
80*4882a593Smuzhiyun #define compile_time_assert(cond, msg) \
81*4882a593Smuzhiyun     typedef char ASSERT_##msg[(cond) ? 1 : -1]
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun /******************************************* bus types */
84*4882a593Smuzhiyun enum HPI_BUSES {
85*4882a593Smuzhiyun 	HPI_BUS_ISAPNP = 1,
86*4882a593Smuzhiyun 	HPI_BUS_PCI = 2,
87*4882a593Smuzhiyun 	HPI_BUS_USB = 3,
88*4882a593Smuzhiyun 	HPI_BUS_NET = 4
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun enum HPI_SUBSYS_OPTIONS {
92*4882a593Smuzhiyun 	/* 0, 256 are invalid, 1..255 reserved for global options */
93*4882a593Smuzhiyun 	HPI_SUBSYS_OPT_NET_ENABLE = 257,
94*4882a593Smuzhiyun 	HPI_SUBSYS_OPT_NET_BROADCAST = 258,
95*4882a593Smuzhiyun 	HPI_SUBSYS_OPT_NET_UNICAST = 259,
96*4882a593Smuzhiyun 	HPI_SUBSYS_OPT_NET_ADDR = 260,
97*4882a593Smuzhiyun 	HPI_SUBSYS_OPT_NET_MASK = 261,
98*4882a593Smuzhiyun 	HPI_SUBSYS_OPT_NET_ADAPTER_ADDRESS_ADD = 262
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun /** Volume flags
102*4882a593Smuzhiyun */
103*4882a593Smuzhiyun enum HPI_VOLUME_FLAGS {
104*4882a593Smuzhiyun 	/** Set if the volume control is muted */
105*4882a593Smuzhiyun 	HPI_VOLUME_FLAG_MUTED = (1 << 0),
106*4882a593Smuzhiyun 	/** Set if the volume control has a mute function */
107*4882a593Smuzhiyun 	HPI_VOLUME_FLAG_HAS_MUTE = (1 << 1),
108*4882a593Smuzhiyun 	/** Set if volume control can do autofading */
109*4882a593Smuzhiyun 	HPI_VOLUME_FLAG_HAS_AUTOFADE = (1 << 2)
110*4882a593Smuzhiyun 		/* Note Flags >= (1<<8) are for DSP internal use only */
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun /******************************************* CONTROL ATTRIBUTES ****/
114*4882a593Smuzhiyun /* (in order of control type ID */
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun /* This allows for 255 control types, 256 unique attributes each */
117*4882a593Smuzhiyun #define HPI_CTL_ATTR(ctl, ai) ((HPI_CONTROL_##ctl << 8) + ai)
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun /* Get the sub-index of the attribute for a control type */
120*4882a593Smuzhiyun #define HPI_CTL_ATTR_INDEX(i) (i & 0xff)
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun /* Extract the control from the control attribute */
123*4882a593Smuzhiyun #define HPI_CTL_ATTR_CONTROL(i) (i >> 8)
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun /** Enable event generation for a control.
126*4882a593Smuzhiyun 0=disable, 1=enable
127*4882a593Smuzhiyun \note generic to all controls that can generate events
128*4882a593Smuzhiyun */
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /** Unique identifiers for every control attribute
131*4882a593Smuzhiyun */
132*4882a593Smuzhiyun enum HPI_CONTROL_ATTRIBUTES {
133*4882a593Smuzhiyun 	HPI_GENERIC_ENABLE = HPI_CTL_ATTR(GENERIC, 1),
134*4882a593Smuzhiyun 	HPI_GENERIC_EVENT_ENABLE = HPI_CTL_ATTR(GENERIC, 2),
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	HPI_VOLUME_GAIN = HPI_CTL_ATTR(VOLUME, 1),
137*4882a593Smuzhiyun 	HPI_VOLUME_AUTOFADE = HPI_CTL_ATTR(VOLUME, 2),
138*4882a593Smuzhiyun 	HPI_VOLUME_MUTE = HPI_CTL_ATTR(VOLUME, 3),
139*4882a593Smuzhiyun 	HPI_VOLUME_GAIN_AND_FLAGS = HPI_CTL_ATTR(VOLUME, 4),
140*4882a593Smuzhiyun 	HPI_VOLUME_NUM_CHANNELS = HPI_CTL_ATTR(VOLUME, 6),
141*4882a593Smuzhiyun 	HPI_VOLUME_RANGE = HPI_CTL_ATTR(VOLUME, 10),
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	HPI_METER_RMS = HPI_CTL_ATTR(METER, 1),
144*4882a593Smuzhiyun 	HPI_METER_PEAK = HPI_CTL_ATTR(METER, 2),
145*4882a593Smuzhiyun 	HPI_METER_RMS_BALLISTICS = HPI_CTL_ATTR(METER, 3),
146*4882a593Smuzhiyun 	HPI_METER_PEAK_BALLISTICS = HPI_CTL_ATTR(METER, 4),
147*4882a593Smuzhiyun 	HPI_METER_NUM_CHANNELS = HPI_CTL_ATTR(METER, 5),
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	HPI_MULTIPLEXER_SOURCE = HPI_CTL_ATTR(MULTIPLEXER, 1),
150*4882a593Smuzhiyun 	HPI_MULTIPLEXER_QUERYSOURCE = HPI_CTL_ATTR(MULTIPLEXER, 2),
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	HPI_AESEBUTX_FORMAT = HPI_CTL_ATTR(AESEBUTX, 1),
153*4882a593Smuzhiyun 	HPI_AESEBUTX_SAMPLERATE = HPI_CTL_ATTR(AESEBUTX, 3),
154*4882a593Smuzhiyun 	HPI_AESEBUTX_CHANNELSTATUS = HPI_CTL_ATTR(AESEBUTX, 4),
155*4882a593Smuzhiyun 	HPI_AESEBUTX_USERDATA = HPI_CTL_ATTR(AESEBUTX, 5),
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	HPI_AESEBURX_FORMAT = HPI_CTL_ATTR(AESEBURX, 1),
158*4882a593Smuzhiyun 	HPI_AESEBURX_ERRORSTATUS = HPI_CTL_ATTR(AESEBURX, 2),
159*4882a593Smuzhiyun 	HPI_AESEBURX_SAMPLERATE = HPI_CTL_ATTR(AESEBURX, 3),
160*4882a593Smuzhiyun 	HPI_AESEBURX_CHANNELSTATUS = HPI_CTL_ATTR(AESEBURX, 4),
161*4882a593Smuzhiyun 	HPI_AESEBURX_USERDATA = HPI_CTL_ATTR(AESEBURX, 5),
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	HPI_LEVEL_GAIN = HPI_CTL_ATTR(LEVEL, 1),
164*4882a593Smuzhiyun 	HPI_LEVEL_RANGE = HPI_CTL_ATTR(LEVEL, 10),
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	HPI_TUNER_BAND = HPI_CTL_ATTR(TUNER, 1),
167*4882a593Smuzhiyun 	HPI_TUNER_FREQ = HPI_CTL_ATTR(TUNER, 2),
168*4882a593Smuzhiyun 	HPI_TUNER_LEVEL_AVG = HPI_CTL_ATTR(TUNER, 3),
169*4882a593Smuzhiyun 	HPI_TUNER_LEVEL_RAW = HPI_CTL_ATTR(TUNER, 4),
170*4882a593Smuzhiyun 	HPI_TUNER_SNR = HPI_CTL_ATTR(TUNER, 5),
171*4882a593Smuzhiyun 	HPI_TUNER_GAIN = HPI_CTL_ATTR(TUNER, 6),
172*4882a593Smuzhiyun 	HPI_TUNER_STATUS = HPI_CTL_ATTR(TUNER, 7),
173*4882a593Smuzhiyun 	HPI_TUNER_MODE = HPI_CTL_ATTR(TUNER, 8),
174*4882a593Smuzhiyun 	HPI_TUNER_RDS = HPI_CTL_ATTR(TUNER, 9),
175*4882a593Smuzhiyun 	HPI_TUNER_DEEMPHASIS = HPI_CTL_ATTR(TUNER, 10),
176*4882a593Smuzhiyun 	HPI_TUNER_PROGRAM = HPI_CTL_ATTR(TUNER, 11),
177*4882a593Smuzhiyun 	HPI_TUNER_HDRADIO_SIGNAL_QUALITY = HPI_CTL_ATTR(TUNER, 12),
178*4882a593Smuzhiyun 	HPI_TUNER_HDRADIO_SDK_VERSION = HPI_CTL_ATTR(TUNER, 13),
179*4882a593Smuzhiyun 	HPI_TUNER_HDRADIO_DSP_VERSION = HPI_CTL_ATTR(TUNER, 14),
180*4882a593Smuzhiyun 	HPI_TUNER_HDRADIO_BLEND = HPI_CTL_ATTR(TUNER, 15),
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	HPI_VOX_THRESHOLD = HPI_CTL_ATTR(VOX, 1),
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	HPI_CHANNEL_MODE_MODE = HPI_CTL_ATTR(CHANNEL_MODE, 1),
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	HPI_BITSTREAM_DATA_POLARITY = HPI_CTL_ATTR(BITSTREAM, 1),
187*4882a593Smuzhiyun 	HPI_BITSTREAM_CLOCK_EDGE = HPI_CTL_ATTR(BITSTREAM, 2),
188*4882a593Smuzhiyun 	HPI_BITSTREAM_CLOCK_SOURCE = HPI_CTL_ATTR(BITSTREAM, 3),
189*4882a593Smuzhiyun 	HPI_BITSTREAM_ACTIVITY = HPI_CTL_ATTR(BITSTREAM, 4),
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	HPI_SAMPLECLOCK_SOURCE = HPI_CTL_ATTR(SAMPLECLOCK, 1),
192*4882a593Smuzhiyun 	HPI_SAMPLECLOCK_SAMPLERATE = HPI_CTL_ATTR(SAMPLECLOCK, 2),
193*4882a593Smuzhiyun 	HPI_SAMPLECLOCK_SOURCE_INDEX = HPI_CTL_ATTR(SAMPLECLOCK, 3),
194*4882a593Smuzhiyun 	HPI_SAMPLECLOCK_LOCAL_SAMPLERATE = HPI_CTL_ATTR(SAMPLECLOCK, 4),
195*4882a593Smuzhiyun 	HPI_SAMPLECLOCK_AUTO = HPI_CTL_ATTR(SAMPLECLOCK, 5),
196*4882a593Smuzhiyun 	HPI_SAMPLECLOCK_LOCAL_LOCK = HPI_CTL_ATTR(SAMPLECLOCK, 6),
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	HPI_MICROPHONE_PHANTOM_POWER = HPI_CTL_ATTR(MICROPHONE, 1),
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	HPI_EQUALIZER_NUM_FILTERS = HPI_CTL_ATTR(EQUALIZER, 1),
201*4882a593Smuzhiyun 	HPI_EQUALIZER_FILTER = HPI_CTL_ATTR(EQUALIZER, 2),
202*4882a593Smuzhiyun 	HPI_EQUALIZER_COEFFICIENTS = HPI_CTL_ATTR(EQUALIZER, 3),
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	HPI_COMPANDER_PARAMS = HPI_CTL_ATTR(COMPANDER, 1),
205*4882a593Smuzhiyun 	HPI_COMPANDER_MAKEUPGAIN = HPI_CTL_ATTR(COMPANDER, 2),
206*4882a593Smuzhiyun 	HPI_COMPANDER_THRESHOLD = HPI_CTL_ATTR(COMPANDER, 3),
207*4882a593Smuzhiyun 	HPI_COMPANDER_RATIO = HPI_CTL_ATTR(COMPANDER, 4),
208*4882a593Smuzhiyun 	HPI_COMPANDER_ATTACK = HPI_CTL_ATTR(COMPANDER, 5),
209*4882a593Smuzhiyun 	HPI_COMPANDER_DECAY = HPI_CTL_ATTR(COMPANDER, 6),
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	HPI_COBRANET_SET = HPI_CTL_ATTR(COBRANET, 1),
212*4882a593Smuzhiyun 	HPI_COBRANET_GET = HPI_CTL_ATTR(COBRANET, 2),
213*4882a593Smuzhiyun 	HPI_COBRANET_GET_STATUS = HPI_CTL_ATTR(COBRANET, 5),
214*4882a593Smuzhiyun 	HPI_COBRANET_SEND_PACKET = HPI_CTL_ATTR(COBRANET, 6),
215*4882a593Smuzhiyun 	HPI_COBRANET_GET_PACKET = HPI_CTL_ATTR(COBRANET, 7),
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	HPI_TONEDETECTOR_THRESHOLD = HPI_CTL_ATTR(TONEDETECTOR, 1),
218*4882a593Smuzhiyun 	HPI_TONEDETECTOR_STATE = HPI_CTL_ATTR(TONEDETECTOR, 2),
219*4882a593Smuzhiyun 	HPI_TONEDETECTOR_FREQUENCY = HPI_CTL_ATTR(TONEDETECTOR, 3),
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	HPI_SILENCEDETECTOR_THRESHOLD = HPI_CTL_ATTR(SILENCEDETECTOR, 1),
222*4882a593Smuzhiyun 	HPI_SILENCEDETECTOR_STATE = HPI_CTL_ATTR(SILENCEDETECTOR, 2),
223*4882a593Smuzhiyun 	HPI_SILENCEDETECTOR_DELAY = HPI_CTL_ATTR(SILENCEDETECTOR, 3),
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	HPI_PAD_CHANNEL_NAME = HPI_CTL_ATTR(PAD, 1),
226*4882a593Smuzhiyun 	HPI_PAD_ARTIST = HPI_CTL_ATTR(PAD, 2),
227*4882a593Smuzhiyun 	HPI_PAD_TITLE = HPI_CTL_ATTR(PAD, 3),
228*4882a593Smuzhiyun 	HPI_PAD_COMMENT = HPI_CTL_ATTR(PAD, 4),
229*4882a593Smuzhiyun 	HPI_PAD_PROGRAM_TYPE = HPI_CTL_ATTR(PAD, 5),
230*4882a593Smuzhiyun 	HPI_PAD_PROGRAM_ID = HPI_CTL_ATTR(PAD, 6),
231*4882a593Smuzhiyun 	HPI_PAD_TA_SUPPORT = HPI_CTL_ATTR(PAD, 7),
232*4882a593Smuzhiyun 	HPI_PAD_TA_ACTIVE = HPI_CTL_ATTR(PAD, 8),
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	HPI_UNIVERSAL_ENTITY = HPI_CTL_ATTR(UNIVERSAL, 1)
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun #define HPI_POLARITY_POSITIVE           0
238*4882a593Smuzhiyun #define HPI_POLARITY_NEGATIVE           1
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun /*------------------------------------------------------------
241*4882a593Smuzhiyun  Cobranet Chip Bridge - copied from HMI.H
242*4882a593Smuzhiyun ------------------------------------------------------------*/
243*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_bridge           0x20000
244*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_bridge_tx_pkt_buf \
245*4882a593Smuzhiyun 	(HPI_COBRANET_HMI_cobra_bridge + 0x1000)
246*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_bridge_rx_pkt_buf \
247*4882a593Smuzhiyun 	(HPI_COBRANET_HMI_cobra_bridge + 0x2000)
248*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_if_table1         0x110000
249*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_if_phy_address \
250*4882a593Smuzhiyun 	(HPI_COBRANET_HMI_cobra_if_table1 + 0xd)
251*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_protocolIP       0x72000
252*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_ip_mon_currentIP \
253*4882a593Smuzhiyun 	(HPI_COBRANET_HMI_cobra_protocolIP + 0x0)
254*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_ip_mon_staticIP \
255*4882a593Smuzhiyun 	(HPI_COBRANET_HMI_cobra_protocolIP + 0x2)
256*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_sys              0x100000
257*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_sys_desc \
258*4882a593Smuzhiyun 		(HPI_COBRANET_HMI_cobra_sys + 0x0)
259*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_sys_objectID \
260*4882a593Smuzhiyun 	(HPI_COBRANET_HMI_cobra_sys + 0x100)
261*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_sys_contact \
262*4882a593Smuzhiyun 	(HPI_COBRANET_HMI_cobra_sys + 0x200)
263*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_sys_name \
264*4882a593Smuzhiyun 		(HPI_COBRANET_HMI_cobra_sys + 0x300)
265*4882a593Smuzhiyun #define  HPI_COBRANET_HMI_cobra_sys_location \
266*4882a593Smuzhiyun 	(HPI_COBRANET_HMI_cobra_sys + 0x400)
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun /*------------------------------------------------------------
269*4882a593Smuzhiyun  Cobranet Chip Status bits
270*4882a593Smuzhiyun ------------------------------------------------------------*/
271*4882a593Smuzhiyun #define HPI_COBRANET_HMI_STATUS_RXPACKET 2
272*4882a593Smuzhiyun #define HPI_COBRANET_HMI_STATUS_TXPACKET 3
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun /*------------------------------------------------------------
275*4882a593Smuzhiyun  Ethernet header size
276*4882a593Smuzhiyun ------------------------------------------------------------*/
277*4882a593Smuzhiyun #define HPI_ETHERNET_HEADER_SIZE (16)
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun /* These defines are used to fill in protocol information for an Ethernet packet
280*4882a593Smuzhiyun     sent using HMI on CS18102 */
281*4882a593Smuzhiyun /** ID supplied by Cirrus for ASI packets. */
282*4882a593Smuzhiyun #define HPI_ETHERNET_PACKET_ID                  0x85
283*4882a593Smuzhiyun /** Simple packet - no special routing required */
284*4882a593Smuzhiyun #define HPI_ETHERNET_PACKET_V1                  0x01
285*4882a593Smuzhiyun /** This packet must make its way to the host across the HPI interface */
286*4882a593Smuzhiyun #define HPI_ETHERNET_PACKET_HOSTED_VIA_HMI      0x20
287*4882a593Smuzhiyun /** This packet must make its way to the host across the HPI interface */
288*4882a593Smuzhiyun #define HPI_ETHERNET_PACKET_HOSTED_VIA_HMI_V1   0x21
289*4882a593Smuzhiyun /** This packet must make its way to the host across the HPI interface */
290*4882a593Smuzhiyun #define HPI_ETHERNET_PACKET_HOSTED_VIA_HPI      0x40
291*4882a593Smuzhiyun /** This packet must make its way to the host across the HPI interface */
292*4882a593Smuzhiyun #define HPI_ETHERNET_PACKET_HOSTED_VIA_HPI_V1   0x41
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun #define HPI_ETHERNET_UDP_PORT 44600 /**< HPI UDP service */
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun /** Default network timeout in milli-seconds. */
297*4882a593Smuzhiyun #define HPI_ETHERNET_TIMEOUT_MS 500
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun /** Locked memory buffer alloc/free phases */
300*4882a593Smuzhiyun enum HPI_BUFFER_CMDS {
301*4882a593Smuzhiyun 	/** use one message to allocate or free physical memory */
302*4882a593Smuzhiyun 	HPI_BUFFER_CMD_EXTERNAL = 0,
303*4882a593Smuzhiyun 	/** alloc physical memory */
304*4882a593Smuzhiyun 	HPI_BUFFER_CMD_INTERNAL_ALLOC = 1,
305*4882a593Smuzhiyun 	/** send physical memory address to adapter */
306*4882a593Smuzhiyun 	HPI_BUFFER_CMD_INTERNAL_GRANTADAPTER = 2,
307*4882a593Smuzhiyun 	/** notify adapter to stop using physical buffer */
308*4882a593Smuzhiyun 	HPI_BUFFER_CMD_INTERNAL_REVOKEADAPTER = 3,
309*4882a593Smuzhiyun 	/** free physical buffer */
310*4882a593Smuzhiyun 	HPI_BUFFER_CMD_INTERNAL_FREE = 4
311*4882a593Smuzhiyun };
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun /*****************************************************************************/
314*4882a593Smuzhiyun /*****************************************************************************/
315*4882a593Smuzhiyun /********               HPI LOW LEVEL MESSAGES                  *******/
316*4882a593Smuzhiyun /*****************************************************************************/
317*4882a593Smuzhiyun /*****************************************************************************/
318*4882a593Smuzhiyun /** Pnp ids */
319*4882a593Smuzhiyun /** "ASI"  - actual is "ASX" - need to change */
320*4882a593Smuzhiyun #define HPI_ID_ISAPNP_AUDIOSCIENCE      0x0669
321*4882a593Smuzhiyun /** PCI vendor ID that AudioScience uses */
322*4882a593Smuzhiyun #define HPI_PCI_VENDOR_ID_AUDIOSCIENCE  0x175C
323*4882a593Smuzhiyun /** PCI vendor ID that the DSP56301 has */
324*4882a593Smuzhiyun #define HPI_PCI_VENDOR_ID_MOTOROLA      0x1057
325*4882a593Smuzhiyun /** PCI vendor ID that TI uses */
326*4882a593Smuzhiyun #define HPI_PCI_VENDOR_ID_TI            0x104C
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun #define HPI_PCI_DEV_ID_PCI2040          0xAC60
329*4882a593Smuzhiyun /** TI's C6205 PCI interface has this ID */
330*4882a593Smuzhiyun #define HPI_PCI_DEV_ID_DSP6205          0xA106
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun #define HPI_USB_VENDOR_ID_AUDIOSCIENCE  0x1257
333*4882a593Smuzhiyun #define HPI_USB_W2K_TAG                 0x57495341	/* "ASIW"       */
334*4882a593Smuzhiyun #define HPI_USB_LINUX_TAG               0x4C495341	/* "ASIL"       */
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun /** Invalid Adapter index
337*4882a593Smuzhiyun Used in HPI messages that are not addressed to a specific adapter
338*4882a593Smuzhiyun Used in DLL to indicate device not present
339*4882a593Smuzhiyun */
340*4882a593Smuzhiyun #define HPI_ADAPTER_INDEX_INVALID 0xFFFF
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun /** First 2 hex digits define the adapter family */
343*4882a593Smuzhiyun #define HPI_ADAPTER_FAMILY_MASK         0xff00
344*4882a593Smuzhiyun #define HPI_MODULE_FAMILY_MASK          0xfff0
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun #define HPI_ADAPTER_FAMILY_ASI(f)   (f & HPI_ADAPTER_FAMILY_MASK)
347*4882a593Smuzhiyun #define HPI_MODULE_FAMILY_ASI(f)   (f & HPI_MODULE_FAMILY_MASK)
348*4882a593Smuzhiyun #define HPI_ADAPTER_ASI(f)   (f)
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun enum HPI_MESSAGE_TYPES {
351*4882a593Smuzhiyun 	HPI_TYPE_REQUEST = 1,
352*4882a593Smuzhiyun 	HPI_TYPE_RESPONSE = 2,
353*4882a593Smuzhiyun 	HPI_TYPE_DATA = 3,
354*4882a593Smuzhiyun 	HPI_TYPE_SSX2BYPASS_MESSAGE = 4,
355*4882a593Smuzhiyun 	HPI_TYPE_COMMAND = 5,
356*4882a593Smuzhiyun 	HPI_TYPE_NOTIFICATION = 6
357*4882a593Smuzhiyun };
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun enum HPI_OBJECT_TYPES {
360*4882a593Smuzhiyun 	HPI_OBJ_SUBSYSTEM = 1,
361*4882a593Smuzhiyun 	HPI_OBJ_ADAPTER = 2,
362*4882a593Smuzhiyun 	HPI_OBJ_OSTREAM = 3,
363*4882a593Smuzhiyun 	HPI_OBJ_ISTREAM = 4,
364*4882a593Smuzhiyun 	HPI_OBJ_MIXER = 5,
365*4882a593Smuzhiyun 	HPI_OBJ_NODE = 6,
366*4882a593Smuzhiyun 	HPI_OBJ_CONTROL = 7,
367*4882a593Smuzhiyun 	HPI_OBJ_NVMEMORY = 8,
368*4882a593Smuzhiyun 	HPI_OBJ_GPIO = 9,
369*4882a593Smuzhiyun 	HPI_OBJ_WATCHDOG = 10,
370*4882a593Smuzhiyun 	HPI_OBJ_CLOCK = 11,
371*4882a593Smuzhiyun 	HPI_OBJ_PROFILE = 12,
372*4882a593Smuzhiyun 	/* HPI_ OBJ_ CONTROLEX  = 13, */
373*4882a593Smuzhiyun 	HPI_OBJ_ASYNCEVENT = 14
374*4882a593Smuzhiyun #define HPI_OBJ_MAXINDEX 14
375*4882a593Smuzhiyun };
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun #define HPI_OBJ_FUNCTION_SPACING 0x100
378*4882a593Smuzhiyun #define HPI_FUNC_ID(obj, i) (HPI_OBJ_##obj * HPI_OBJ_FUNCTION_SPACING + i)
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun #define HPI_EXTRACT_INDEX(fn) (fn & 0xff)
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun enum HPI_FUNCTION_IDS {
383*4882a593Smuzhiyun 	HPI_SUBSYS_OPEN = HPI_FUNC_ID(SUBSYSTEM, 1),
384*4882a593Smuzhiyun 	HPI_SUBSYS_GET_VERSION = HPI_FUNC_ID(SUBSYSTEM, 2),
385*4882a593Smuzhiyun 	HPI_SUBSYS_GET_INFO = HPI_FUNC_ID(SUBSYSTEM, 3),
386*4882a593Smuzhiyun 	HPI_SUBSYS_CREATE_ADAPTER = HPI_FUNC_ID(SUBSYSTEM, 5),
387*4882a593Smuzhiyun 	HPI_SUBSYS_CLOSE = HPI_FUNC_ID(SUBSYSTEM, 6),
388*4882a593Smuzhiyun 	HPI_SUBSYS_DRIVER_LOAD = HPI_FUNC_ID(SUBSYSTEM, 8),
389*4882a593Smuzhiyun 	HPI_SUBSYS_DRIVER_UNLOAD = HPI_FUNC_ID(SUBSYSTEM, 9),
390*4882a593Smuzhiyun 	HPI_SUBSYS_GET_NUM_ADAPTERS = HPI_FUNC_ID(SUBSYSTEM, 12),
391*4882a593Smuzhiyun 	HPI_SUBSYS_GET_ADAPTER = HPI_FUNC_ID(SUBSYSTEM, 13),
392*4882a593Smuzhiyun 	HPI_SUBSYS_SET_NETWORK_INTERFACE = HPI_FUNC_ID(SUBSYSTEM, 14),
393*4882a593Smuzhiyun 	HPI_SUBSYS_OPTION_INFO = HPI_FUNC_ID(SUBSYSTEM, 15),
394*4882a593Smuzhiyun 	HPI_SUBSYS_OPTION_GET = HPI_FUNC_ID(SUBSYSTEM, 16),
395*4882a593Smuzhiyun 	HPI_SUBSYS_OPTION_SET = HPI_FUNC_ID(SUBSYSTEM, 17),
396*4882a593Smuzhiyun #define HPI_SUBSYS_FUNCTION_COUNT 17
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	HPI_ADAPTER_OPEN = HPI_FUNC_ID(ADAPTER, 1),
399*4882a593Smuzhiyun 	HPI_ADAPTER_CLOSE = HPI_FUNC_ID(ADAPTER, 2),
400*4882a593Smuzhiyun 	HPI_ADAPTER_GET_INFO = HPI_FUNC_ID(ADAPTER, 3),
401*4882a593Smuzhiyun 	HPI_ADAPTER_GET_ASSERT = HPI_FUNC_ID(ADAPTER, 4),
402*4882a593Smuzhiyun 	HPI_ADAPTER_TEST_ASSERT = HPI_FUNC_ID(ADAPTER, 5),
403*4882a593Smuzhiyun 	HPI_ADAPTER_SET_MODE = HPI_FUNC_ID(ADAPTER, 6),
404*4882a593Smuzhiyun 	HPI_ADAPTER_GET_MODE = HPI_FUNC_ID(ADAPTER, 7),
405*4882a593Smuzhiyun 	HPI_ADAPTER_ENABLE_CAPABILITY = HPI_FUNC_ID(ADAPTER, 8),
406*4882a593Smuzhiyun 	HPI_ADAPTER_SELFTEST = HPI_FUNC_ID(ADAPTER, 9),
407*4882a593Smuzhiyun 	HPI_ADAPTER_FIND_OBJECT = HPI_FUNC_ID(ADAPTER, 10),
408*4882a593Smuzhiyun 	HPI_ADAPTER_QUERY_FLASH = HPI_FUNC_ID(ADAPTER, 11),
409*4882a593Smuzhiyun 	HPI_ADAPTER_START_FLASH = HPI_FUNC_ID(ADAPTER, 12),
410*4882a593Smuzhiyun 	HPI_ADAPTER_PROGRAM_FLASH = HPI_FUNC_ID(ADAPTER, 13),
411*4882a593Smuzhiyun 	HPI_ADAPTER_SET_PROPERTY = HPI_FUNC_ID(ADAPTER, 14),
412*4882a593Smuzhiyun 	HPI_ADAPTER_GET_PROPERTY = HPI_FUNC_ID(ADAPTER, 15),
413*4882a593Smuzhiyun 	HPI_ADAPTER_ENUM_PROPERTY = HPI_FUNC_ID(ADAPTER, 16),
414*4882a593Smuzhiyun 	HPI_ADAPTER_MODULE_INFO = HPI_FUNC_ID(ADAPTER, 17),
415*4882a593Smuzhiyun 	HPI_ADAPTER_DEBUG_READ = HPI_FUNC_ID(ADAPTER, 18),
416*4882a593Smuzhiyun 	HPI_ADAPTER_IRQ_QUERY_AND_CLEAR = HPI_FUNC_ID(ADAPTER, 19),
417*4882a593Smuzhiyun 	HPI_ADAPTER_IRQ_CALLBACK = HPI_FUNC_ID(ADAPTER, 20),
418*4882a593Smuzhiyun 	HPI_ADAPTER_DELETE = HPI_FUNC_ID(ADAPTER, 21),
419*4882a593Smuzhiyun 	HPI_ADAPTER_READ_FLASH = HPI_FUNC_ID(ADAPTER, 22),
420*4882a593Smuzhiyun 	HPI_ADAPTER_END_FLASH = HPI_FUNC_ID(ADAPTER, 23),
421*4882a593Smuzhiyun 	HPI_ADAPTER_FILESTORE_DELETE_ALL = HPI_FUNC_ID(ADAPTER, 24),
422*4882a593Smuzhiyun #define HPI_ADAPTER_FUNCTION_COUNT 24
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun 	HPI_OSTREAM_OPEN = HPI_FUNC_ID(OSTREAM, 1),
425*4882a593Smuzhiyun 	HPI_OSTREAM_CLOSE = HPI_FUNC_ID(OSTREAM, 2),
426*4882a593Smuzhiyun 	HPI_OSTREAM_WRITE = HPI_FUNC_ID(OSTREAM, 3),
427*4882a593Smuzhiyun 	HPI_OSTREAM_START = HPI_FUNC_ID(OSTREAM, 4),
428*4882a593Smuzhiyun 	HPI_OSTREAM_STOP = HPI_FUNC_ID(OSTREAM, 5),
429*4882a593Smuzhiyun 	HPI_OSTREAM_RESET = HPI_FUNC_ID(OSTREAM, 6),
430*4882a593Smuzhiyun 	HPI_OSTREAM_GET_INFO = HPI_FUNC_ID(OSTREAM, 7),
431*4882a593Smuzhiyun 	HPI_OSTREAM_QUERY_FORMAT = HPI_FUNC_ID(OSTREAM, 8),
432*4882a593Smuzhiyun 	HPI_OSTREAM_DATA = HPI_FUNC_ID(OSTREAM, 9),
433*4882a593Smuzhiyun 	HPI_OSTREAM_SET_VELOCITY = HPI_FUNC_ID(OSTREAM, 10),
434*4882a593Smuzhiyun 	HPI_OSTREAM_SET_PUNCHINOUT = HPI_FUNC_ID(OSTREAM, 11),
435*4882a593Smuzhiyun 	HPI_OSTREAM_SINEGEN = HPI_FUNC_ID(OSTREAM, 12),
436*4882a593Smuzhiyun 	HPI_OSTREAM_ANC_RESET = HPI_FUNC_ID(OSTREAM, 13),
437*4882a593Smuzhiyun 	HPI_OSTREAM_ANC_GET_INFO = HPI_FUNC_ID(OSTREAM, 14),
438*4882a593Smuzhiyun 	HPI_OSTREAM_ANC_READ = HPI_FUNC_ID(OSTREAM, 15),
439*4882a593Smuzhiyun 	HPI_OSTREAM_SET_TIMESCALE = HPI_FUNC_ID(OSTREAM, 16),
440*4882a593Smuzhiyun 	HPI_OSTREAM_SET_FORMAT = HPI_FUNC_ID(OSTREAM, 17),
441*4882a593Smuzhiyun 	HPI_OSTREAM_HOSTBUFFER_ALLOC = HPI_FUNC_ID(OSTREAM, 18),
442*4882a593Smuzhiyun 	HPI_OSTREAM_HOSTBUFFER_FREE = HPI_FUNC_ID(OSTREAM, 19),
443*4882a593Smuzhiyun 	HPI_OSTREAM_GROUP_ADD = HPI_FUNC_ID(OSTREAM, 20),
444*4882a593Smuzhiyun 	HPI_OSTREAM_GROUP_GETMAP = HPI_FUNC_ID(OSTREAM, 21),
445*4882a593Smuzhiyun 	HPI_OSTREAM_GROUP_RESET = HPI_FUNC_ID(OSTREAM, 22),
446*4882a593Smuzhiyun 	HPI_OSTREAM_HOSTBUFFER_GET_INFO = HPI_FUNC_ID(OSTREAM, 23),
447*4882a593Smuzhiyun 	HPI_OSTREAM_WAIT_START = HPI_FUNC_ID(OSTREAM, 24),
448*4882a593Smuzhiyun 	HPI_OSTREAM_WAIT = HPI_FUNC_ID(OSTREAM, 25),
449*4882a593Smuzhiyun #define HPI_OSTREAM_FUNCTION_COUNT 25
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	HPI_ISTREAM_OPEN = HPI_FUNC_ID(ISTREAM, 1),
452*4882a593Smuzhiyun 	HPI_ISTREAM_CLOSE = HPI_FUNC_ID(ISTREAM, 2),
453*4882a593Smuzhiyun 	HPI_ISTREAM_SET_FORMAT = HPI_FUNC_ID(ISTREAM, 3),
454*4882a593Smuzhiyun 	HPI_ISTREAM_READ = HPI_FUNC_ID(ISTREAM, 4),
455*4882a593Smuzhiyun 	HPI_ISTREAM_START = HPI_FUNC_ID(ISTREAM, 5),
456*4882a593Smuzhiyun 	HPI_ISTREAM_STOP = HPI_FUNC_ID(ISTREAM, 6),
457*4882a593Smuzhiyun 	HPI_ISTREAM_RESET = HPI_FUNC_ID(ISTREAM, 7),
458*4882a593Smuzhiyun 	HPI_ISTREAM_GET_INFO = HPI_FUNC_ID(ISTREAM, 8),
459*4882a593Smuzhiyun 	HPI_ISTREAM_QUERY_FORMAT = HPI_FUNC_ID(ISTREAM, 9),
460*4882a593Smuzhiyun 	HPI_ISTREAM_ANC_RESET = HPI_FUNC_ID(ISTREAM, 10),
461*4882a593Smuzhiyun 	HPI_ISTREAM_ANC_GET_INFO = HPI_FUNC_ID(ISTREAM, 11),
462*4882a593Smuzhiyun 	HPI_ISTREAM_ANC_WRITE = HPI_FUNC_ID(ISTREAM, 12),
463*4882a593Smuzhiyun 	HPI_ISTREAM_HOSTBUFFER_ALLOC = HPI_FUNC_ID(ISTREAM, 13),
464*4882a593Smuzhiyun 	HPI_ISTREAM_HOSTBUFFER_FREE = HPI_FUNC_ID(ISTREAM, 14),
465*4882a593Smuzhiyun 	HPI_ISTREAM_GROUP_ADD = HPI_FUNC_ID(ISTREAM, 15),
466*4882a593Smuzhiyun 	HPI_ISTREAM_GROUP_GETMAP = HPI_FUNC_ID(ISTREAM, 16),
467*4882a593Smuzhiyun 	HPI_ISTREAM_GROUP_RESET = HPI_FUNC_ID(ISTREAM, 17),
468*4882a593Smuzhiyun 	HPI_ISTREAM_HOSTBUFFER_GET_INFO = HPI_FUNC_ID(ISTREAM, 18),
469*4882a593Smuzhiyun 	HPI_ISTREAM_WAIT_START = HPI_FUNC_ID(ISTREAM, 19),
470*4882a593Smuzhiyun 	HPI_ISTREAM_WAIT = HPI_FUNC_ID(ISTREAM, 20),
471*4882a593Smuzhiyun #define HPI_ISTREAM_FUNCTION_COUNT 20
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun /* NOTE:
474*4882a593Smuzhiyun    GET_NODE_INFO, SET_CONNECTION, GET_CONNECTIONS are not currently used */
475*4882a593Smuzhiyun 	HPI_MIXER_OPEN = HPI_FUNC_ID(MIXER, 1),
476*4882a593Smuzhiyun 	HPI_MIXER_CLOSE = HPI_FUNC_ID(MIXER, 2),
477*4882a593Smuzhiyun 	HPI_MIXER_GET_INFO = HPI_FUNC_ID(MIXER, 3),
478*4882a593Smuzhiyun 	HPI_MIXER_GET_NODE_INFO = HPI_FUNC_ID(MIXER, 4),
479*4882a593Smuzhiyun 	HPI_MIXER_GET_CONTROL = HPI_FUNC_ID(MIXER, 5),
480*4882a593Smuzhiyun 	HPI_MIXER_SET_CONNECTION = HPI_FUNC_ID(MIXER, 6),
481*4882a593Smuzhiyun 	HPI_MIXER_GET_CONNECTIONS = HPI_FUNC_ID(MIXER, 7),
482*4882a593Smuzhiyun 	HPI_MIXER_GET_CONTROL_BY_INDEX = HPI_FUNC_ID(MIXER, 8),
483*4882a593Smuzhiyun 	HPI_MIXER_GET_CONTROL_ARRAY_BY_INDEX = HPI_FUNC_ID(MIXER, 9),
484*4882a593Smuzhiyun 	HPI_MIXER_GET_CONTROL_MULTIPLE_VALUES = HPI_FUNC_ID(MIXER, 10),
485*4882a593Smuzhiyun 	HPI_MIXER_STORE = HPI_FUNC_ID(MIXER, 11),
486*4882a593Smuzhiyun 	HPI_MIXER_GET_CACHE_INFO = HPI_FUNC_ID(MIXER, 12),
487*4882a593Smuzhiyun 	HPI_MIXER_GET_BLOCK_HANDLE = HPI_FUNC_ID(MIXER, 13),
488*4882a593Smuzhiyun 	HPI_MIXER_GET_PARAMETER_HANDLE = HPI_FUNC_ID(MIXER, 14),
489*4882a593Smuzhiyun #define HPI_MIXER_FUNCTION_COUNT 14
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	HPI_CONTROL_GET_INFO = HPI_FUNC_ID(CONTROL, 1),
492*4882a593Smuzhiyun 	HPI_CONTROL_GET_STATE = HPI_FUNC_ID(CONTROL, 2),
493*4882a593Smuzhiyun 	HPI_CONTROL_SET_STATE = HPI_FUNC_ID(CONTROL, 3),
494*4882a593Smuzhiyun #define HPI_CONTROL_FUNCTION_COUNT 3
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 	HPI_NVMEMORY_OPEN = HPI_FUNC_ID(NVMEMORY, 1),
497*4882a593Smuzhiyun 	HPI_NVMEMORY_READ_BYTE = HPI_FUNC_ID(NVMEMORY, 2),
498*4882a593Smuzhiyun 	HPI_NVMEMORY_WRITE_BYTE = HPI_FUNC_ID(NVMEMORY, 3),
499*4882a593Smuzhiyun #define HPI_NVMEMORY_FUNCTION_COUNT 3
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	HPI_GPIO_OPEN = HPI_FUNC_ID(GPIO, 1),
502*4882a593Smuzhiyun 	HPI_GPIO_READ_BIT = HPI_FUNC_ID(GPIO, 2),
503*4882a593Smuzhiyun 	HPI_GPIO_WRITE_BIT = HPI_FUNC_ID(GPIO, 3),
504*4882a593Smuzhiyun 	HPI_GPIO_READ_ALL = HPI_FUNC_ID(GPIO, 4),
505*4882a593Smuzhiyun 	HPI_GPIO_WRITE_STATUS = HPI_FUNC_ID(GPIO, 5),
506*4882a593Smuzhiyun #define HPI_GPIO_FUNCTION_COUNT 5
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun 	HPI_ASYNCEVENT_OPEN = HPI_FUNC_ID(ASYNCEVENT, 1),
509*4882a593Smuzhiyun 	HPI_ASYNCEVENT_CLOSE = HPI_FUNC_ID(ASYNCEVENT, 2),
510*4882a593Smuzhiyun 	HPI_ASYNCEVENT_WAIT = HPI_FUNC_ID(ASYNCEVENT, 3),
511*4882a593Smuzhiyun 	HPI_ASYNCEVENT_GETCOUNT = HPI_FUNC_ID(ASYNCEVENT, 4),
512*4882a593Smuzhiyun 	HPI_ASYNCEVENT_GET = HPI_FUNC_ID(ASYNCEVENT, 5),
513*4882a593Smuzhiyun 	HPI_ASYNCEVENT_SENDEVENTS = HPI_FUNC_ID(ASYNCEVENT, 6),
514*4882a593Smuzhiyun #define HPI_ASYNCEVENT_FUNCTION_COUNT 6
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	HPI_WATCHDOG_OPEN = HPI_FUNC_ID(WATCHDOG, 1),
517*4882a593Smuzhiyun 	HPI_WATCHDOG_SET_TIME = HPI_FUNC_ID(WATCHDOG, 2),
518*4882a593Smuzhiyun 	HPI_WATCHDOG_PING = HPI_FUNC_ID(WATCHDOG, 3),
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun 	HPI_CLOCK_OPEN = HPI_FUNC_ID(CLOCK, 1),
521*4882a593Smuzhiyun 	HPI_CLOCK_SET_TIME = HPI_FUNC_ID(CLOCK, 2),
522*4882a593Smuzhiyun 	HPI_CLOCK_GET_TIME = HPI_FUNC_ID(CLOCK, 3),
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	HPI_PROFILE_OPEN_ALL = HPI_FUNC_ID(PROFILE, 1),
525*4882a593Smuzhiyun 	HPI_PROFILE_START_ALL = HPI_FUNC_ID(PROFILE, 2),
526*4882a593Smuzhiyun 	HPI_PROFILE_STOP_ALL = HPI_FUNC_ID(PROFILE, 3),
527*4882a593Smuzhiyun 	HPI_PROFILE_GET = HPI_FUNC_ID(PROFILE, 4),
528*4882a593Smuzhiyun 	HPI_PROFILE_GET_IDLECOUNT = HPI_FUNC_ID(PROFILE, 5),
529*4882a593Smuzhiyun 	HPI_PROFILE_GET_NAME = HPI_FUNC_ID(PROFILE, 6),
530*4882a593Smuzhiyun 	HPI_PROFILE_GET_UTILIZATION = HPI_FUNC_ID(PROFILE, 7)
531*4882a593Smuzhiyun #define HPI_PROFILE_FUNCTION_COUNT 7
532*4882a593Smuzhiyun };
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun /* ////////////////////////////////////////////////////////////////////// */
535*4882a593Smuzhiyun /* STRUCTURES */
536*4882a593Smuzhiyun #ifndef DISABLE_PRAGMA_PACK1
537*4882a593Smuzhiyun #pragma pack(push, 1)
538*4882a593Smuzhiyun #endif
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun /** PCI bus resource */
541*4882a593Smuzhiyun struct hpi_pci {
542*4882a593Smuzhiyun 	u32 __iomem *ap_mem_base[HPI_MAX_ADAPTER_MEM_SPACES];
543*4882a593Smuzhiyun 	struct pci_dev *pci_dev;
544*4882a593Smuzhiyun };
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun /** Adapter specification resource */
547*4882a593Smuzhiyun struct hpi_adapter_specification {
548*4882a593Smuzhiyun 	u32 type;
549*4882a593Smuzhiyun 	u8 modules[4];
550*4882a593Smuzhiyun };
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun struct hpi_resource {
553*4882a593Smuzhiyun 	union {
554*4882a593Smuzhiyun 		const struct hpi_pci *pci;
555*4882a593Smuzhiyun 		const char *net_if;
556*4882a593Smuzhiyun 		struct hpi_adapter_specification adapter_spec;
557*4882a593Smuzhiyun 		const void *sw_if;
558*4882a593Smuzhiyun 	} r;
559*4882a593Smuzhiyun 	u16 bus_type;		/* HPI_BUS_PNPISA, _PCI, _USB etc */
560*4882a593Smuzhiyun 	u16 padding;
561*4882a593Smuzhiyun };
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun /** Format info used inside struct hpi_message
564*4882a593Smuzhiyun     Not the same as public API struct hpi_format */
565*4882a593Smuzhiyun struct hpi_msg_format {
566*4882a593Smuzhiyun 	u32 sample_rate; /**< 11025, 32000, 44100 etc. */
567*4882a593Smuzhiyun 	u32 bit_rate; /**< for MPEG */
568*4882a593Smuzhiyun 	u32 attributes;	/**< stereo/joint_stereo/mono */
569*4882a593Smuzhiyun 	u16 channels; /**< 1,2..., (or ancillary mode or idle bit */
570*4882a593Smuzhiyun 	u16 format; /**< HPI_FORMAT_PCM16, _MPEG etc. see \ref HPI_FORMATS. */
571*4882a593Smuzhiyun };
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun /**  Buffer+format structure.
574*4882a593Smuzhiyun 	 Must be kept 7 * 32 bits to match public struct hpi_datastruct */
575*4882a593Smuzhiyun struct hpi_msg_data {
576*4882a593Smuzhiyun 	struct hpi_msg_format format;
577*4882a593Smuzhiyun 	u8 *pb_data;
578*4882a593Smuzhiyun #ifndef CONFIG_64BIT
579*4882a593Smuzhiyun 	u32 padding;
580*4882a593Smuzhiyun #endif
581*4882a593Smuzhiyun 	u32 data_size;
582*4882a593Smuzhiyun };
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun /** struct hpi_datastructure used up to 3.04 driver */
585*4882a593Smuzhiyun struct hpi_data_legacy32 {
586*4882a593Smuzhiyun 	struct hpi_format format;
587*4882a593Smuzhiyun 	u32 pb_data;
588*4882a593Smuzhiyun 	u32 data_size;
589*4882a593Smuzhiyun };
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun #ifdef CONFIG_64BIT
592*4882a593Smuzhiyun /* Compatibility version of struct hpi_data*/
593*4882a593Smuzhiyun struct hpi_data_compat32 {
594*4882a593Smuzhiyun 	struct hpi_msg_format format;
595*4882a593Smuzhiyun 	u32 pb_data;
596*4882a593Smuzhiyun 	u32 padding;
597*4882a593Smuzhiyun 	u32 data_size;
598*4882a593Smuzhiyun };
599*4882a593Smuzhiyun #endif
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun struct hpi_buffer {
602*4882a593Smuzhiyun   /** placeholder for backward compatibility (see dwBufferSize) */
603*4882a593Smuzhiyun 	struct hpi_msg_format reserved;
604*4882a593Smuzhiyun 	u32 command; /**< HPI_BUFFER_CMD_xxx*/
605*4882a593Smuzhiyun 	u32 pci_address; /**< PCI physical address of buffer for DSP DMA */
606*4882a593Smuzhiyun 	u32 buffer_size; /**< must line up with data_size of HPI_DATA*/
607*4882a593Smuzhiyun };
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun /*/////////////////////////////////////////////////////////////////////////// */
610*4882a593Smuzhiyun /* This is used for background buffer bus mastering stream buffers.           */
611*4882a593Smuzhiyun struct hpi_hostbuffer_status {
612*4882a593Smuzhiyun 	u32 samples_processed;
613*4882a593Smuzhiyun 	u32 auxiliary_data_available;
614*4882a593Smuzhiyun 	u32 stream_state;
615*4882a593Smuzhiyun 	/* DSP index in to the host bus master buffer. */
616*4882a593Smuzhiyun 	u32 dsp_index;
617*4882a593Smuzhiyun 	/* Host index in to the host bus master buffer. */
618*4882a593Smuzhiyun 	u32 host_index;
619*4882a593Smuzhiyun 	u32 size_in_bytes;
620*4882a593Smuzhiyun };
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun struct hpi_streamid {
623*4882a593Smuzhiyun 	u16 object_type;
624*4882a593Smuzhiyun 		    /**< Type of object, HPI_OBJ_OSTREAM or HPI_OBJ_ISTREAM. */
625*4882a593Smuzhiyun 	u16 stream_index; /**< outstream or instream index. */
626*4882a593Smuzhiyun };
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun struct hpi_punchinout {
629*4882a593Smuzhiyun 	u32 punch_in_sample;
630*4882a593Smuzhiyun 	u32 punch_out_sample;
631*4882a593Smuzhiyun };
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun struct hpi_subsys_msg {
634*4882a593Smuzhiyun 	struct hpi_resource resource;
635*4882a593Smuzhiyun };
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun struct hpi_subsys_res {
638*4882a593Smuzhiyun 	u32 version;
639*4882a593Smuzhiyun 	u32 data;		/* extended version */
640*4882a593Smuzhiyun 	u16 num_adapters;
641*4882a593Smuzhiyun 	u16 adapter_index;
642*4882a593Smuzhiyun 	u16 adapter_type;
643*4882a593Smuzhiyun 	u16 pad16;
644*4882a593Smuzhiyun };
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun union hpi_adapterx_msg {
647*4882a593Smuzhiyun 	struct {
648*4882a593Smuzhiyun 		u32 dsp_address;
649*4882a593Smuzhiyun 		u32 count_bytes;
650*4882a593Smuzhiyun 	} debug_read;
651*4882a593Smuzhiyun 	struct {
652*4882a593Smuzhiyun 		u32 adapter_mode;
653*4882a593Smuzhiyun 		u16 query_or_set;
654*4882a593Smuzhiyun 	} mode;
655*4882a593Smuzhiyun 	struct {
656*4882a593Smuzhiyun 		u16 index;
657*4882a593Smuzhiyun 	} module_info;
658*4882a593Smuzhiyun 	struct {
659*4882a593Smuzhiyun 		u16 index;
660*4882a593Smuzhiyun 		u16 what;
661*4882a593Smuzhiyun 		u16 property_index;
662*4882a593Smuzhiyun 	} property_enum;
663*4882a593Smuzhiyun 	struct {
664*4882a593Smuzhiyun 		u16 property;
665*4882a593Smuzhiyun 		u16 parameter1;
666*4882a593Smuzhiyun 		u16 parameter2;
667*4882a593Smuzhiyun 	} property_set;
668*4882a593Smuzhiyun 	struct {
669*4882a593Smuzhiyun 		u32 pad32;
670*4882a593Smuzhiyun 		u16 key1;
671*4882a593Smuzhiyun 		u16 key2;
672*4882a593Smuzhiyun 	} restart;
673*4882a593Smuzhiyun 	struct {
674*4882a593Smuzhiyun 		u32 pad32;
675*4882a593Smuzhiyun 		u16 value;
676*4882a593Smuzhiyun 	} test_assert;
677*4882a593Smuzhiyun 	struct {
678*4882a593Smuzhiyun 		u32 message;
679*4882a593Smuzhiyun 	} irq;
680*4882a593Smuzhiyun 	u32 pad[3];
681*4882a593Smuzhiyun };
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun struct hpi_adapter_res {
684*4882a593Smuzhiyun 	u32 serial_number;
685*4882a593Smuzhiyun 	u16 adapter_type;
686*4882a593Smuzhiyun 	u16 adapter_index;
687*4882a593Smuzhiyun 	u16 num_instreams;
688*4882a593Smuzhiyun 	u16 num_outstreams;
689*4882a593Smuzhiyun 	u16 num_mixers;
690*4882a593Smuzhiyun 	u16 version;
691*4882a593Smuzhiyun 	u8 sz_adapter_assert[HPI_STRING_LEN];
692*4882a593Smuzhiyun };
693*4882a593Smuzhiyun 
694*4882a593Smuzhiyun union hpi_adapterx_res {
695*4882a593Smuzhiyun 	struct hpi_adapter_res info;
696*4882a593Smuzhiyun 	struct {
697*4882a593Smuzhiyun 		u32 p1;
698*4882a593Smuzhiyun 		u16 count;
699*4882a593Smuzhiyun 		u16 dsp_index;
700*4882a593Smuzhiyun 		u32 p2;
701*4882a593Smuzhiyun 		u32 dsp_msg_addr;
702*4882a593Smuzhiyun 		char sz_message[HPI_STRING_LEN];
703*4882a593Smuzhiyun 	} assert;
704*4882a593Smuzhiyun 	struct {
705*4882a593Smuzhiyun 		u32 adapter_mode;
706*4882a593Smuzhiyun 	} mode;
707*4882a593Smuzhiyun 	struct {
708*4882a593Smuzhiyun 		u16 parameter1;
709*4882a593Smuzhiyun 		u16 parameter2;
710*4882a593Smuzhiyun 	} property_get;
711*4882a593Smuzhiyun 	struct {
712*4882a593Smuzhiyun 		u32 yes;
713*4882a593Smuzhiyun 	} irq_query;
714*4882a593Smuzhiyun };
715*4882a593Smuzhiyun 
716*4882a593Smuzhiyun struct hpi_stream_msg {
717*4882a593Smuzhiyun 	union {
718*4882a593Smuzhiyun 		struct hpi_msg_data data;
719*4882a593Smuzhiyun 		struct hpi_data_legacy32 data32;
720*4882a593Smuzhiyun 		u16 velocity;
721*4882a593Smuzhiyun 		struct hpi_punchinout pio;
722*4882a593Smuzhiyun 		u32 time_scale;
723*4882a593Smuzhiyun 		struct hpi_buffer buffer;
724*4882a593Smuzhiyun 		struct hpi_streamid stream;
725*4882a593Smuzhiyun 		u32 threshold_bytes;
726*4882a593Smuzhiyun 	} u;
727*4882a593Smuzhiyun };
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun struct hpi_stream_res {
730*4882a593Smuzhiyun 	union {
731*4882a593Smuzhiyun 		struct {
732*4882a593Smuzhiyun 			/* size of hardware buffer */
733*4882a593Smuzhiyun 			u32 buffer_size;
734*4882a593Smuzhiyun 			/* OutStream - data to play,
735*4882a593Smuzhiyun 			   InStream - data recorded */
736*4882a593Smuzhiyun 			u32 data_available;
737*4882a593Smuzhiyun 			/* OutStream - samples played,
738*4882a593Smuzhiyun 			   InStream - samples recorded */
739*4882a593Smuzhiyun 			u32 samples_transferred;
740*4882a593Smuzhiyun 			/* Adapter - OutStream - data to play,
741*4882a593Smuzhiyun 			   InStream - data recorded */
742*4882a593Smuzhiyun 			u32 auxiliary_data_available;
743*4882a593Smuzhiyun 			u16 state;	/* HPI_STATE_PLAYING, _STATE_STOPPED */
744*4882a593Smuzhiyun 			u16 padding;
745*4882a593Smuzhiyun 		} stream_info;
746*4882a593Smuzhiyun 		struct {
747*4882a593Smuzhiyun 			u32 buffer_size;
748*4882a593Smuzhiyun 			u32 data_available;
749*4882a593Smuzhiyun 			u32 samples_transfered;
750*4882a593Smuzhiyun 			u16 state;
751*4882a593Smuzhiyun 			u16 outstream_index;
752*4882a593Smuzhiyun 			u16 instream_index;
753*4882a593Smuzhiyun 			u16 padding;
754*4882a593Smuzhiyun 			u32 auxiliary_data_available;
755*4882a593Smuzhiyun 		} legacy_stream_info;
756*4882a593Smuzhiyun 		struct {
757*4882a593Smuzhiyun 			/* bitmap of grouped OutStreams */
758*4882a593Smuzhiyun 			u32 outstream_group_map;
759*4882a593Smuzhiyun 			/* bitmap of grouped InStreams */
760*4882a593Smuzhiyun 			u32 instream_group_map;
761*4882a593Smuzhiyun 		} group_info;
762*4882a593Smuzhiyun 		struct {
763*4882a593Smuzhiyun 			/* pointer to the buffer */
764*4882a593Smuzhiyun 			u8 *p_buffer;
765*4882a593Smuzhiyun 			/* pointer to the hostbuffer status */
766*4882a593Smuzhiyun 			struct hpi_hostbuffer_status *p_status;
767*4882a593Smuzhiyun 		} hostbuffer_info;
768*4882a593Smuzhiyun 	} u;
769*4882a593Smuzhiyun };
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun struct hpi_mixer_msg {
772*4882a593Smuzhiyun 	u16 control_index;
773*4882a593Smuzhiyun 	u16 control_type;	/* = HPI_CONTROL_METER _VOLUME etc */
774*4882a593Smuzhiyun 	u16 padding1;		/* Maintain alignment of subsequent fields */
775*4882a593Smuzhiyun 	u16 node_type1;		/* = HPI_SOURCENODE_LINEIN etc */
776*4882a593Smuzhiyun 	u16 node_index1;	/* = 0..N */
777*4882a593Smuzhiyun 	u16 node_type2;
778*4882a593Smuzhiyun 	u16 node_index2;
779*4882a593Smuzhiyun 	u16 padding2;		/* round to 4 bytes */
780*4882a593Smuzhiyun };
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun struct hpi_mixer_res {
783*4882a593Smuzhiyun 	u16 src_node_type;	/* = HPI_SOURCENODE_LINEIN etc */
784*4882a593Smuzhiyun 	u16 src_node_index;	/* = 0..N */
785*4882a593Smuzhiyun 	u16 dst_node_type;
786*4882a593Smuzhiyun 	u16 dst_node_index;
787*4882a593Smuzhiyun 	/* Also controlType for MixerGetControlByIndex */
788*4882a593Smuzhiyun 	u16 control_index;
789*4882a593Smuzhiyun 	/* may indicate which DSP the control is located on */
790*4882a593Smuzhiyun 	u16 dsp_index;
791*4882a593Smuzhiyun };
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun union hpi_mixerx_msg {
794*4882a593Smuzhiyun 	struct {
795*4882a593Smuzhiyun 		u16 starting_index;
796*4882a593Smuzhiyun 		u16 flags;
797*4882a593Smuzhiyun 		u32 length_in_bytes;	/* length in bytes of p_data */
798*4882a593Smuzhiyun 		u32 p_data;	/* pointer to a data array */
799*4882a593Smuzhiyun 	} gcabi;
800*4882a593Smuzhiyun 	struct {
801*4882a593Smuzhiyun 		u16 command;
802*4882a593Smuzhiyun 		u16 index;
803*4882a593Smuzhiyun 	} store;		/* for HPI_MIXER_STORE message */
804*4882a593Smuzhiyun };
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun union hpi_mixerx_res {
807*4882a593Smuzhiyun 	struct {
808*4882a593Smuzhiyun 		u32 bytes_returned;	/* size of items returned */
809*4882a593Smuzhiyun 		u32 p_data;	/* pointer to data array */
810*4882a593Smuzhiyun 		u16 more_to_do;	/* indicates if there is more to do */
811*4882a593Smuzhiyun 	} gcabi;
812*4882a593Smuzhiyun 	struct {
813*4882a593Smuzhiyun 		u32 total_controls;	/* count of controls in the mixer */
814*4882a593Smuzhiyun 		u32 cache_controls;	/* count of controls in the cac */
815*4882a593Smuzhiyun 		u32 cache_bytes;	/* size of cache */
816*4882a593Smuzhiyun 	} cache_info;
817*4882a593Smuzhiyun };
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun struct hpi_control_msg {
820*4882a593Smuzhiyun 	u16 attribute;		/* control attribute or property */
821*4882a593Smuzhiyun 	u16 saved_index;
822*4882a593Smuzhiyun 	u32 param1;		/* generic parameter 1 */
823*4882a593Smuzhiyun 	u32 param2;		/* generic parameter 2 */
824*4882a593Smuzhiyun 	short an_log_value[HPI_MAX_CHANNELS];
825*4882a593Smuzhiyun };
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun struct hpi_control_union_msg {
828*4882a593Smuzhiyun 	u16 attribute;		/* control attribute or property */
829*4882a593Smuzhiyun 	u16 saved_index;	/* only used in ctrl save/restore */
830*4882a593Smuzhiyun 	union {
831*4882a593Smuzhiyun 		struct {
832*4882a593Smuzhiyun 			u32 param1;	/* generic parameter 1 */
833*4882a593Smuzhiyun 			u32 param2;	/* generic parameter 2 */
834*4882a593Smuzhiyun 			short an_log_value[HPI_MAX_CHANNELS];
835*4882a593Smuzhiyun 		} old;
836*4882a593Smuzhiyun 		union {
837*4882a593Smuzhiyun 			u32 frequency;
838*4882a593Smuzhiyun 			u32 gain;
839*4882a593Smuzhiyun 			u32 band;
840*4882a593Smuzhiyun 			u32 deemphasis;
841*4882a593Smuzhiyun 			u32 program;
842*4882a593Smuzhiyun 			struct {
843*4882a593Smuzhiyun 				u32 mode;
844*4882a593Smuzhiyun 				u32 value;
845*4882a593Smuzhiyun 			} mode;
846*4882a593Smuzhiyun 			u32 blend;
847*4882a593Smuzhiyun 		} tuner;
848*4882a593Smuzhiyun 	} u;
849*4882a593Smuzhiyun };
850*4882a593Smuzhiyun 
851*4882a593Smuzhiyun struct hpi_control_res {
852*4882a593Smuzhiyun 	/* Could make union. dwParam, anLogValue never used in same response */
853*4882a593Smuzhiyun 	u32 param1;
854*4882a593Smuzhiyun 	u32 param2;
855*4882a593Smuzhiyun 	short an_log_value[HPI_MAX_CHANNELS];
856*4882a593Smuzhiyun };
857*4882a593Smuzhiyun 
858*4882a593Smuzhiyun union hpi_control_union_res {
859*4882a593Smuzhiyun 	struct {
860*4882a593Smuzhiyun 		u32 param1;
861*4882a593Smuzhiyun 		u32 param2;
862*4882a593Smuzhiyun 		short an_log_value[HPI_MAX_CHANNELS];
863*4882a593Smuzhiyun 	} old;
864*4882a593Smuzhiyun 	union {
865*4882a593Smuzhiyun 		u32 band;
866*4882a593Smuzhiyun 		u32 frequency;
867*4882a593Smuzhiyun 		u32 gain;
868*4882a593Smuzhiyun 		u32 deemphasis;
869*4882a593Smuzhiyun 		struct {
870*4882a593Smuzhiyun 			u32 data[2];
871*4882a593Smuzhiyun 			u32 bLER;
872*4882a593Smuzhiyun 		} rds;
873*4882a593Smuzhiyun 		short s_level;
874*4882a593Smuzhiyun 		struct {
875*4882a593Smuzhiyun 			u16 value;
876*4882a593Smuzhiyun 			u16 mask;
877*4882a593Smuzhiyun 		} status;
878*4882a593Smuzhiyun 	} tuner;
879*4882a593Smuzhiyun 	struct {
880*4882a593Smuzhiyun 		char sz_data[8];
881*4882a593Smuzhiyun 		u32 remaining_chars;
882*4882a593Smuzhiyun 	} chars8;
883*4882a593Smuzhiyun 	char c_data12[12];
884*4882a593Smuzhiyun 	union {
885*4882a593Smuzhiyun 		struct {
886*4882a593Smuzhiyun 			u32 status;
887*4882a593Smuzhiyun 			u32 readable_size;
888*4882a593Smuzhiyun 			u32 writeable_size;
889*4882a593Smuzhiyun 		} status;
890*4882a593Smuzhiyun 	} cobranet;
891*4882a593Smuzhiyun };
892*4882a593Smuzhiyun 
893*4882a593Smuzhiyun struct hpi_nvmemory_msg {
894*4882a593Smuzhiyun 	u16 address;
895*4882a593Smuzhiyun 	u16 data;
896*4882a593Smuzhiyun };
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun struct hpi_nvmemory_res {
899*4882a593Smuzhiyun 	u16 size_in_bytes;
900*4882a593Smuzhiyun 	u16 data;
901*4882a593Smuzhiyun };
902*4882a593Smuzhiyun 
903*4882a593Smuzhiyun struct hpi_gpio_msg {
904*4882a593Smuzhiyun 	u16 bit_index;
905*4882a593Smuzhiyun 	u16 bit_data;
906*4882a593Smuzhiyun };
907*4882a593Smuzhiyun 
908*4882a593Smuzhiyun struct hpi_gpio_res {
909*4882a593Smuzhiyun 	u16 number_input_bits;
910*4882a593Smuzhiyun 	u16 number_output_bits;
911*4882a593Smuzhiyun 	u16 bit_data[4];
912*4882a593Smuzhiyun };
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun struct hpi_async_msg {
915*4882a593Smuzhiyun 	u32 events;
916*4882a593Smuzhiyun 	u16 maximum_events;
917*4882a593Smuzhiyun 	u16 padding;
918*4882a593Smuzhiyun };
919*4882a593Smuzhiyun 
920*4882a593Smuzhiyun struct hpi_async_res {
921*4882a593Smuzhiyun 	union {
922*4882a593Smuzhiyun 		struct {
923*4882a593Smuzhiyun 			u16 count;
924*4882a593Smuzhiyun 		} count;
925*4882a593Smuzhiyun 		struct {
926*4882a593Smuzhiyun 			u32 events;
927*4882a593Smuzhiyun 			u16 number_returned;
928*4882a593Smuzhiyun 			u16 padding;
929*4882a593Smuzhiyun 		} get;
930*4882a593Smuzhiyun 		struct hpi_async_event event;
931*4882a593Smuzhiyun 	} u;
932*4882a593Smuzhiyun };
933*4882a593Smuzhiyun 
934*4882a593Smuzhiyun struct hpi_watchdog_msg {
935*4882a593Smuzhiyun 	u32 time_ms;
936*4882a593Smuzhiyun };
937*4882a593Smuzhiyun 
938*4882a593Smuzhiyun struct hpi_watchdog_res {
939*4882a593Smuzhiyun 	u32 time_ms;
940*4882a593Smuzhiyun };
941*4882a593Smuzhiyun 
942*4882a593Smuzhiyun struct hpi_clock_msg {
943*4882a593Smuzhiyun 	u16 hours;
944*4882a593Smuzhiyun 	u16 minutes;
945*4882a593Smuzhiyun 	u16 seconds;
946*4882a593Smuzhiyun 	u16 milli_seconds;
947*4882a593Smuzhiyun };
948*4882a593Smuzhiyun 
949*4882a593Smuzhiyun struct hpi_clock_res {
950*4882a593Smuzhiyun 	u16 size_in_bytes;
951*4882a593Smuzhiyun 	u16 hours;
952*4882a593Smuzhiyun 	u16 minutes;
953*4882a593Smuzhiyun 	u16 seconds;
954*4882a593Smuzhiyun 	u16 milli_seconds;
955*4882a593Smuzhiyun 	u16 padding;
956*4882a593Smuzhiyun };
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun struct hpi_profile_msg {
959*4882a593Smuzhiyun 	u16 bin_index;
960*4882a593Smuzhiyun 	u16 padding;
961*4882a593Smuzhiyun };
962*4882a593Smuzhiyun 
963*4882a593Smuzhiyun struct hpi_profile_res_open {
964*4882a593Smuzhiyun 	u16 max_profiles;
965*4882a593Smuzhiyun };
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun struct hpi_profile_res_time {
968*4882a593Smuzhiyun 	u32 total_tick_count;
969*4882a593Smuzhiyun 	u32 call_count;
970*4882a593Smuzhiyun 	u32 max_tick_count;
971*4882a593Smuzhiyun 	u32 ticks_per_millisecond;
972*4882a593Smuzhiyun 	u16 profile_interval;
973*4882a593Smuzhiyun };
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun struct hpi_profile_res_name {
976*4882a593Smuzhiyun 	u8 sz_name[32];
977*4882a593Smuzhiyun };
978*4882a593Smuzhiyun 
979*4882a593Smuzhiyun struct hpi_profile_res {
980*4882a593Smuzhiyun 	union {
981*4882a593Smuzhiyun 		struct hpi_profile_res_open o;
982*4882a593Smuzhiyun 		struct hpi_profile_res_time t;
983*4882a593Smuzhiyun 		struct hpi_profile_res_name n;
984*4882a593Smuzhiyun 	} u;
985*4882a593Smuzhiyun };
986*4882a593Smuzhiyun 
987*4882a593Smuzhiyun struct hpi_message_header {
988*4882a593Smuzhiyun 	u16 size;		/* total size in bytes */
989*4882a593Smuzhiyun 	u8 type;		/* HPI_TYPE_MESSAGE  */
990*4882a593Smuzhiyun 	u8 version;		/* message version */
991*4882a593Smuzhiyun 	u16 object;		/* HPI_OBJ_* */
992*4882a593Smuzhiyun 	u16 function;		/* HPI_SUBSYS_xxx, HPI_ADAPTER_xxx */
993*4882a593Smuzhiyun 	u16 adapter_index;	/* the adapter index */
994*4882a593Smuzhiyun 	u16 obj_index;		/* */
995*4882a593Smuzhiyun };
996*4882a593Smuzhiyun 
997*4882a593Smuzhiyun struct hpi_message {
998*4882a593Smuzhiyun 	/* following fields must match HPI_MESSAGE_HEADER */
999*4882a593Smuzhiyun 	u16 size;		/* total size in bytes */
1000*4882a593Smuzhiyun 	u8 type;		/* HPI_TYPE_MESSAGE  */
1001*4882a593Smuzhiyun 	u8 version;		/* message version */
1002*4882a593Smuzhiyun 	u16 object;		/* HPI_OBJ_* */
1003*4882a593Smuzhiyun 	u16 function;		/* HPI_SUBSYS_xxx, HPI_ADAPTER_xxx */
1004*4882a593Smuzhiyun 	u16 adapter_index;	/* the adapter index */
1005*4882a593Smuzhiyun 	u16 obj_index;		/*  */
1006*4882a593Smuzhiyun 	union {
1007*4882a593Smuzhiyun 		struct hpi_subsys_msg s;
1008*4882a593Smuzhiyun 		union hpi_adapterx_msg ax;
1009*4882a593Smuzhiyun 		struct hpi_stream_msg d;
1010*4882a593Smuzhiyun 		struct hpi_mixer_msg m;
1011*4882a593Smuzhiyun 		union hpi_mixerx_msg mx;	/* extended mixer; */
1012*4882a593Smuzhiyun 		struct hpi_control_msg c;	/* mixer control; */
1013*4882a593Smuzhiyun 		/* identical to struct hpi_control_msg,
1014*4882a593Smuzhiyun 		   but field naming is improved */
1015*4882a593Smuzhiyun 		struct hpi_control_union_msg cu;
1016*4882a593Smuzhiyun 		struct hpi_nvmemory_msg n;
1017*4882a593Smuzhiyun 		struct hpi_gpio_msg l;	/* digital i/o */
1018*4882a593Smuzhiyun 		struct hpi_watchdog_msg w;
1019*4882a593Smuzhiyun 		struct hpi_clock_msg t;	/* dsp time */
1020*4882a593Smuzhiyun 		struct hpi_profile_msg p;
1021*4882a593Smuzhiyun 		struct hpi_async_msg as;
1022*4882a593Smuzhiyun 		char fixed_size[32];
1023*4882a593Smuzhiyun 	} u;
1024*4882a593Smuzhiyun };
1025*4882a593Smuzhiyun 
1026*4882a593Smuzhiyun #define HPI_MESSAGE_SIZE_BY_OBJECT { \
1027*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) ,   /* Default, no object type 0 */ \
1028*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) + sizeof(struct hpi_subsys_msg),\
1029*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) + sizeof(union hpi_adapterx_msg),\
1030*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) + sizeof(struct hpi_stream_msg),\
1031*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) + sizeof(struct hpi_stream_msg),\
1032*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) + sizeof(struct hpi_mixer_msg),\
1033*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) ,   /* no node message */ \
1034*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) + sizeof(struct hpi_control_msg),\
1035*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) + sizeof(struct hpi_nvmemory_msg),\
1036*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) + sizeof(struct hpi_gpio_msg),\
1037*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) + sizeof(struct hpi_watchdog_msg),\
1038*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) + sizeof(struct hpi_clock_msg),\
1039*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) + sizeof(struct hpi_profile_msg),\
1040*4882a593Smuzhiyun 	sizeof(struct hpi_message_header), /* controlx obj removed */ \
1041*4882a593Smuzhiyun 	sizeof(struct hpi_message_header) + sizeof(struct hpi_async_msg) \
1042*4882a593Smuzhiyun }
1043*4882a593Smuzhiyun 
1044*4882a593Smuzhiyun /*
1045*4882a593Smuzhiyun Note that the wSpecificError error field should be inspected and potentially
1046*4882a593Smuzhiyun reported whenever HPI_ERROR_DSP_COMMUNICATION or HPI_ERROR_DSP_BOOTLOAD is
1047*4882a593Smuzhiyun returned in wError.
1048*4882a593Smuzhiyun */
1049*4882a593Smuzhiyun struct hpi_response_header {
1050*4882a593Smuzhiyun 	u16 size;
1051*4882a593Smuzhiyun 	u8 type;		/* HPI_TYPE_RESPONSE  */
1052*4882a593Smuzhiyun 	u8 version;		/* response version */
1053*4882a593Smuzhiyun 	u16 object;		/* HPI_OBJ_* */
1054*4882a593Smuzhiyun 	u16 function;		/* HPI_SUBSYS_xxx, HPI_ADAPTER_xxx */
1055*4882a593Smuzhiyun 	u16 error;		/* HPI_ERROR_xxx */
1056*4882a593Smuzhiyun 	u16 specific_error;	/* adapter specific error */
1057*4882a593Smuzhiyun };
1058*4882a593Smuzhiyun 
1059*4882a593Smuzhiyun struct hpi_response {
1060*4882a593Smuzhiyun /* following fields must match HPI_RESPONSE_HEADER */
1061*4882a593Smuzhiyun 	u16 size;
1062*4882a593Smuzhiyun 	u8 type;		/* HPI_TYPE_RESPONSE  */
1063*4882a593Smuzhiyun 	u8 version;		/* response version */
1064*4882a593Smuzhiyun 	u16 object;		/* HPI_OBJ_* */
1065*4882a593Smuzhiyun 	u16 function;		/* HPI_SUBSYS_xxx, HPI_ADAPTER_xxx */
1066*4882a593Smuzhiyun 	u16 error;		/* HPI_ERROR_xxx */
1067*4882a593Smuzhiyun 	u16 specific_error;	/* adapter specific error */
1068*4882a593Smuzhiyun 	union {
1069*4882a593Smuzhiyun 		struct hpi_subsys_res s;
1070*4882a593Smuzhiyun 		union hpi_adapterx_res ax;
1071*4882a593Smuzhiyun 		struct hpi_stream_res d;
1072*4882a593Smuzhiyun 		struct hpi_mixer_res m;
1073*4882a593Smuzhiyun 		union hpi_mixerx_res mx;	/* extended mixer; */
1074*4882a593Smuzhiyun 		struct hpi_control_res c;	/* mixer control; */
1075*4882a593Smuzhiyun 		/* identical to hpi_control_res, but field naming is improved */
1076*4882a593Smuzhiyun 		union hpi_control_union_res cu;
1077*4882a593Smuzhiyun 		struct hpi_nvmemory_res n;
1078*4882a593Smuzhiyun 		struct hpi_gpio_res l;	/* digital i/o */
1079*4882a593Smuzhiyun 		struct hpi_watchdog_res w;
1080*4882a593Smuzhiyun 		struct hpi_clock_res t;	/* dsp time */
1081*4882a593Smuzhiyun 		struct hpi_profile_res p;
1082*4882a593Smuzhiyun 		struct hpi_async_res as;
1083*4882a593Smuzhiyun 		u8 bytes[52];
1084*4882a593Smuzhiyun 	} u;
1085*4882a593Smuzhiyun };
1086*4882a593Smuzhiyun 
1087*4882a593Smuzhiyun #define HPI_RESPONSE_SIZE_BY_OBJECT { \
1088*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) ,/* Default, no object type 0 */ \
1089*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) + sizeof(struct hpi_subsys_res),\
1090*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) + sizeof(union  hpi_adapterx_res),\
1091*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) + sizeof(struct hpi_stream_res),\
1092*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) + sizeof(struct hpi_stream_res),\
1093*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) + sizeof(struct hpi_mixer_res),\
1094*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) , /* no node response */ \
1095*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) + sizeof(struct hpi_control_res),\
1096*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) + sizeof(struct hpi_nvmemory_res),\
1097*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) + sizeof(struct hpi_gpio_res),\
1098*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) + sizeof(struct hpi_watchdog_res),\
1099*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) + sizeof(struct hpi_clock_res),\
1100*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) + sizeof(struct hpi_profile_res),\
1101*4882a593Smuzhiyun 	sizeof(struct hpi_response_header), /* controlx obj removed */ \
1102*4882a593Smuzhiyun 	sizeof(struct hpi_response_header) + sizeof(struct hpi_async_res) \
1103*4882a593Smuzhiyun }
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun /*********************** version 1 message/response **************************/
1106*4882a593Smuzhiyun #define HPINET_ETHERNET_DATA_SIZE (1500)
1107*4882a593Smuzhiyun #define HPINET_IP_HDR_SIZE (20)
1108*4882a593Smuzhiyun #define HPINET_IP_DATA_SIZE (HPINET_ETHERNET_DATA_SIZE - HPINET_IP_HDR_SIZE)
1109*4882a593Smuzhiyun #define HPINET_UDP_HDR_SIZE (8)
1110*4882a593Smuzhiyun #define HPINET_UDP_DATA_SIZE (HPINET_IP_DATA_SIZE - HPINET_UDP_HDR_SIZE)
1111*4882a593Smuzhiyun #define HPINET_ASI_HDR_SIZE (2)
1112*4882a593Smuzhiyun #define HPINET_ASI_DATA_SIZE (HPINET_UDP_DATA_SIZE - HPINET_ASI_HDR_SIZE)
1113*4882a593Smuzhiyun 
1114*4882a593Smuzhiyun #define HPI_MAX_PAYLOAD_SIZE (HPINET_ASI_DATA_SIZE - 2)
1115*4882a593Smuzhiyun 
1116*4882a593Smuzhiyun /* New style message/response, but still V0 compatible */
1117*4882a593Smuzhiyun struct hpi_msg_adapter_get_info {
1118*4882a593Smuzhiyun 	struct hpi_message_header h;
1119*4882a593Smuzhiyun };
1120*4882a593Smuzhiyun 
1121*4882a593Smuzhiyun struct hpi_res_adapter_get_info {
1122*4882a593Smuzhiyun 	struct hpi_response_header h;	/*v0 */
1123*4882a593Smuzhiyun 	struct hpi_adapter_res p;
1124*4882a593Smuzhiyun };
1125*4882a593Smuzhiyun 
1126*4882a593Smuzhiyun struct hpi_res_adapter_debug_read {
1127*4882a593Smuzhiyun 	struct hpi_response_header h;
1128*4882a593Smuzhiyun 	u8 bytes[1024];
1129*4882a593Smuzhiyun };
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun struct hpi_msg_cobranet_hmi {
1132*4882a593Smuzhiyun 	u16 attribute;
1133*4882a593Smuzhiyun 	u16 padding;
1134*4882a593Smuzhiyun 	u32 hmi_address;
1135*4882a593Smuzhiyun 	u32 byte_count;
1136*4882a593Smuzhiyun };
1137*4882a593Smuzhiyun 
1138*4882a593Smuzhiyun struct hpi_msg_cobranet_hmiwrite {
1139*4882a593Smuzhiyun 	struct hpi_message_header h;
1140*4882a593Smuzhiyun 	struct hpi_msg_cobranet_hmi p;
1141*4882a593Smuzhiyun 	u8 bytes[256];
1142*4882a593Smuzhiyun };
1143*4882a593Smuzhiyun 
1144*4882a593Smuzhiyun struct hpi_msg_cobranet_hmiread {
1145*4882a593Smuzhiyun 	struct hpi_message_header h;
1146*4882a593Smuzhiyun 	struct hpi_msg_cobranet_hmi p;
1147*4882a593Smuzhiyun };
1148*4882a593Smuzhiyun 
1149*4882a593Smuzhiyun struct hpi_res_cobranet_hmiread {
1150*4882a593Smuzhiyun 	struct hpi_response_header h;
1151*4882a593Smuzhiyun 	u32 byte_count;
1152*4882a593Smuzhiyun 	u8 bytes[256];
1153*4882a593Smuzhiyun };
1154*4882a593Smuzhiyun 
1155*4882a593Smuzhiyun #if 1
1156*4882a593Smuzhiyun #define hpi_message_header_v1 hpi_message_header
1157*4882a593Smuzhiyun #define hpi_response_header_v1 hpi_response_header
1158*4882a593Smuzhiyun #else
1159*4882a593Smuzhiyun /* V1 headers in Addition to v0 headers */
1160*4882a593Smuzhiyun struct hpi_message_header_v1 {
1161*4882a593Smuzhiyun 	struct hpi_message_header h0;
1162*4882a593Smuzhiyun /* struct {
1163*4882a593Smuzhiyun } h1; */
1164*4882a593Smuzhiyun };
1165*4882a593Smuzhiyun 
1166*4882a593Smuzhiyun struct hpi_response_header_v1 {
1167*4882a593Smuzhiyun 	struct hpi_response_header h0;
1168*4882a593Smuzhiyun 	struct {
1169*4882a593Smuzhiyun 		u16 adapter_index;	/* the adapter index */
1170*4882a593Smuzhiyun 		u16 obj_index;	/* object index */
1171*4882a593Smuzhiyun 	} h1;
1172*4882a593Smuzhiyun };
1173*4882a593Smuzhiyun #endif
1174*4882a593Smuzhiyun 
1175*4882a593Smuzhiyun struct hpi_msg_payload_v0 {
1176*4882a593Smuzhiyun 	struct hpi_message_header h;
1177*4882a593Smuzhiyun 	union {
1178*4882a593Smuzhiyun 		struct hpi_subsys_msg s;
1179*4882a593Smuzhiyun 		union hpi_adapterx_msg ax;
1180*4882a593Smuzhiyun 		struct hpi_stream_msg d;
1181*4882a593Smuzhiyun 		struct hpi_mixer_msg m;
1182*4882a593Smuzhiyun 		union hpi_mixerx_msg mx;
1183*4882a593Smuzhiyun 		struct hpi_control_msg c;
1184*4882a593Smuzhiyun 		struct hpi_control_union_msg cu;
1185*4882a593Smuzhiyun 		struct hpi_nvmemory_msg n;
1186*4882a593Smuzhiyun 		struct hpi_gpio_msg l;
1187*4882a593Smuzhiyun 		struct hpi_watchdog_msg w;
1188*4882a593Smuzhiyun 		struct hpi_clock_msg t;
1189*4882a593Smuzhiyun 		struct hpi_profile_msg p;
1190*4882a593Smuzhiyun 		struct hpi_async_msg as;
1191*4882a593Smuzhiyun 	} u;
1192*4882a593Smuzhiyun };
1193*4882a593Smuzhiyun 
1194*4882a593Smuzhiyun struct hpi_res_payload_v0 {
1195*4882a593Smuzhiyun 	struct hpi_response_header h;
1196*4882a593Smuzhiyun 	union {
1197*4882a593Smuzhiyun 		struct hpi_subsys_res s;
1198*4882a593Smuzhiyun 		union hpi_adapterx_res ax;
1199*4882a593Smuzhiyun 		struct hpi_stream_res d;
1200*4882a593Smuzhiyun 		struct hpi_mixer_res m;
1201*4882a593Smuzhiyun 		union hpi_mixerx_res mx;
1202*4882a593Smuzhiyun 		struct hpi_control_res c;
1203*4882a593Smuzhiyun 		union hpi_control_union_res cu;
1204*4882a593Smuzhiyun 		struct hpi_nvmemory_res n;
1205*4882a593Smuzhiyun 		struct hpi_gpio_res l;
1206*4882a593Smuzhiyun 		struct hpi_watchdog_res w;
1207*4882a593Smuzhiyun 		struct hpi_clock_res t;
1208*4882a593Smuzhiyun 		struct hpi_profile_res p;
1209*4882a593Smuzhiyun 		struct hpi_async_res as;
1210*4882a593Smuzhiyun 	} u;
1211*4882a593Smuzhiyun };
1212*4882a593Smuzhiyun 
1213*4882a593Smuzhiyun union hpi_message_buffer_v1 {
1214*4882a593Smuzhiyun 	struct hpi_message m0;	/* version 0 */
1215*4882a593Smuzhiyun 	struct hpi_message_header_v1 h;
1216*4882a593Smuzhiyun 	u8 buf[HPI_MAX_PAYLOAD_SIZE];
1217*4882a593Smuzhiyun };
1218*4882a593Smuzhiyun 
1219*4882a593Smuzhiyun union hpi_response_buffer_v1 {
1220*4882a593Smuzhiyun 	struct hpi_response r0;	/* version 0 */
1221*4882a593Smuzhiyun 	struct hpi_response_header_v1 h;
1222*4882a593Smuzhiyun 	u8 buf[HPI_MAX_PAYLOAD_SIZE];
1223*4882a593Smuzhiyun };
1224*4882a593Smuzhiyun 
1225*4882a593Smuzhiyun compile_time_assert((sizeof(union hpi_message_buffer_v1) <=
1226*4882a593Smuzhiyun 		HPI_MAX_PAYLOAD_SIZE), message_buffer_ok);
1227*4882a593Smuzhiyun compile_time_assert((sizeof(union hpi_response_buffer_v1) <=
1228*4882a593Smuzhiyun 		HPI_MAX_PAYLOAD_SIZE), response_buffer_ok);
1229*4882a593Smuzhiyun 
1230*4882a593Smuzhiyun /*////////////////////////////////////////////////////////////////////////// */
1231*4882a593Smuzhiyun /* declarations for compact control calls  */
1232*4882a593Smuzhiyun struct hpi_control_defn {
1233*4882a593Smuzhiyun 	u8 type;
1234*4882a593Smuzhiyun 	u8 channels;
1235*4882a593Smuzhiyun 	u8 src_node_type;
1236*4882a593Smuzhiyun 	u8 src_node_index;
1237*4882a593Smuzhiyun 	u8 dest_node_type;
1238*4882a593Smuzhiyun 	u8 dest_node_index;
1239*4882a593Smuzhiyun };
1240*4882a593Smuzhiyun 
1241*4882a593Smuzhiyun /*////////////////////////////////////////////////////////////////////////// */
1242*4882a593Smuzhiyun /* declarations for control caching (internal to HPI<->DSP interaction)      */
1243*4882a593Smuzhiyun 
1244*4882a593Smuzhiyun /** indicates a cached u16 value is invalid. */
1245*4882a593Smuzhiyun #define HPI_CACHE_INVALID_UINT16 0xFFFF
1246*4882a593Smuzhiyun /** indicates a cached short value is invalid. */
1247*4882a593Smuzhiyun #define HPI_CACHE_INVALID_SHORT -32768
1248*4882a593Smuzhiyun 
1249*4882a593Smuzhiyun /** A compact representation of (part of) a controls state.
1250*4882a593Smuzhiyun Used for efficient transfer of the control state
1251*4882a593Smuzhiyun between DSP and host or across a network
1252*4882a593Smuzhiyun */
1253*4882a593Smuzhiyun struct hpi_control_cache_info {
1254*4882a593Smuzhiyun 	/** one of HPI_CONTROL_* */
1255*4882a593Smuzhiyun 	u8 control_type;
1256*4882a593Smuzhiyun 	/** The total size of cached information in 32-bit words. */
1257*4882a593Smuzhiyun 	u8 size_in32bit_words;
1258*4882a593Smuzhiyun 	/** The original index of the control on the DSP */
1259*4882a593Smuzhiyun 	u16 control_index;
1260*4882a593Smuzhiyun };
1261*4882a593Smuzhiyun 
1262*4882a593Smuzhiyun struct hpi_control_cache_vol {
1263*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1264*4882a593Smuzhiyun 	short an_log[2];
1265*4882a593Smuzhiyun 	unsigned short flags;
1266*4882a593Smuzhiyun 	char padding[2];
1267*4882a593Smuzhiyun };
1268*4882a593Smuzhiyun 
1269*4882a593Smuzhiyun struct hpi_control_cache_meter {
1270*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1271*4882a593Smuzhiyun 	short an_log_peak[2];
1272*4882a593Smuzhiyun 	short an_logRMS[2];
1273*4882a593Smuzhiyun };
1274*4882a593Smuzhiyun 
1275*4882a593Smuzhiyun struct hpi_control_cache_channelmode {
1276*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1277*4882a593Smuzhiyun 	u16 mode;
1278*4882a593Smuzhiyun 	char temp_padding[6];
1279*4882a593Smuzhiyun };
1280*4882a593Smuzhiyun 
1281*4882a593Smuzhiyun struct hpi_control_cache_mux {
1282*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1283*4882a593Smuzhiyun 	u16 source_node_type;
1284*4882a593Smuzhiyun 	u16 source_node_index;
1285*4882a593Smuzhiyun 	char temp_padding[4];
1286*4882a593Smuzhiyun };
1287*4882a593Smuzhiyun 
1288*4882a593Smuzhiyun struct hpi_control_cache_level {
1289*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1290*4882a593Smuzhiyun 	short an_log[2];
1291*4882a593Smuzhiyun 	char temp_padding[4];
1292*4882a593Smuzhiyun };
1293*4882a593Smuzhiyun 
1294*4882a593Smuzhiyun struct hpi_control_cache_tuner {
1295*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1296*4882a593Smuzhiyun 	u32 freq_ink_hz;
1297*4882a593Smuzhiyun 	u16 band;
1298*4882a593Smuzhiyun 	short s_level_avg;
1299*4882a593Smuzhiyun };
1300*4882a593Smuzhiyun 
1301*4882a593Smuzhiyun struct hpi_control_cache_aes3rx {
1302*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1303*4882a593Smuzhiyun 	u32 error_status;
1304*4882a593Smuzhiyun 	u32 format;
1305*4882a593Smuzhiyun };
1306*4882a593Smuzhiyun 
1307*4882a593Smuzhiyun struct hpi_control_cache_aes3tx {
1308*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1309*4882a593Smuzhiyun 	u32 format;
1310*4882a593Smuzhiyun 	char temp_padding[4];
1311*4882a593Smuzhiyun };
1312*4882a593Smuzhiyun 
1313*4882a593Smuzhiyun struct hpi_control_cache_tonedetector {
1314*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1315*4882a593Smuzhiyun 	u16 state;
1316*4882a593Smuzhiyun 	char temp_padding[6];
1317*4882a593Smuzhiyun };
1318*4882a593Smuzhiyun 
1319*4882a593Smuzhiyun struct hpi_control_cache_silencedetector {
1320*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1321*4882a593Smuzhiyun 	u32 state;
1322*4882a593Smuzhiyun 	char temp_padding[4];
1323*4882a593Smuzhiyun };
1324*4882a593Smuzhiyun 
1325*4882a593Smuzhiyun struct hpi_control_cache_sampleclock {
1326*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1327*4882a593Smuzhiyun 	u16 source;
1328*4882a593Smuzhiyun 	u16 source_index;
1329*4882a593Smuzhiyun 	u32 sample_rate;
1330*4882a593Smuzhiyun };
1331*4882a593Smuzhiyun 
1332*4882a593Smuzhiyun struct hpi_control_cache_microphone {
1333*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1334*4882a593Smuzhiyun 	u16 phantom_state;
1335*4882a593Smuzhiyun 	char temp_padding[6];
1336*4882a593Smuzhiyun };
1337*4882a593Smuzhiyun 
1338*4882a593Smuzhiyun struct hpi_control_cache_single {
1339*4882a593Smuzhiyun 	union {
1340*4882a593Smuzhiyun 		struct hpi_control_cache_info i;
1341*4882a593Smuzhiyun 		struct hpi_control_cache_vol vol;
1342*4882a593Smuzhiyun 		struct hpi_control_cache_meter meter;
1343*4882a593Smuzhiyun 		struct hpi_control_cache_channelmode mode;
1344*4882a593Smuzhiyun 		struct hpi_control_cache_mux mux;
1345*4882a593Smuzhiyun 		struct hpi_control_cache_level level;
1346*4882a593Smuzhiyun 		struct hpi_control_cache_tuner tuner;
1347*4882a593Smuzhiyun 		struct hpi_control_cache_aes3rx aes3rx;
1348*4882a593Smuzhiyun 		struct hpi_control_cache_aes3tx aes3tx;
1349*4882a593Smuzhiyun 		struct hpi_control_cache_tonedetector tone;
1350*4882a593Smuzhiyun 		struct hpi_control_cache_silencedetector silence;
1351*4882a593Smuzhiyun 		struct hpi_control_cache_sampleclock clk;
1352*4882a593Smuzhiyun 		struct hpi_control_cache_microphone microphone;
1353*4882a593Smuzhiyun 	} u;
1354*4882a593Smuzhiyun };
1355*4882a593Smuzhiyun 
1356*4882a593Smuzhiyun struct hpi_control_cache_pad {
1357*4882a593Smuzhiyun 	struct hpi_control_cache_info i;
1358*4882a593Smuzhiyun 	u32 field_valid_flags;
1359*4882a593Smuzhiyun 	u8 c_channel[40];
1360*4882a593Smuzhiyun 	u8 c_artist[100];
1361*4882a593Smuzhiyun 	u8 c_title[100];
1362*4882a593Smuzhiyun 	u8 c_comment[200];
1363*4882a593Smuzhiyun 	u32 pTY;
1364*4882a593Smuzhiyun 	u32 pI;
1365*4882a593Smuzhiyun 	u32 traffic_supported;
1366*4882a593Smuzhiyun 	u32 traffic_anouncement;
1367*4882a593Smuzhiyun };
1368*4882a593Smuzhiyun 
1369*4882a593Smuzhiyun /* 2^N sized FIFO buffer (internal to HPI<->DSP interaction) */
1370*4882a593Smuzhiyun struct hpi_fifo_buffer {
1371*4882a593Smuzhiyun 	u32 size;
1372*4882a593Smuzhiyun 	u32 dsp_index;
1373*4882a593Smuzhiyun 	u32 host_index;
1374*4882a593Smuzhiyun };
1375*4882a593Smuzhiyun 
1376*4882a593Smuzhiyun #ifndef DISABLE_PRAGMA_PACK1
1377*4882a593Smuzhiyun #pragma pack(pop)
1378*4882a593Smuzhiyun #endif
1379*4882a593Smuzhiyun 
1380*4882a593Smuzhiyun /* skip host side function declarations for DSP
1381*4882a593Smuzhiyun    compile and documentation extraction */
1382*4882a593Smuzhiyun 
1383*4882a593Smuzhiyun char hpi_handle_object(const u32 handle);
1384*4882a593Smuzhiyun 
1385*4882a593Smuzhiyun void hpi_handle_to_indexes(const u32 handle, u16 *pw_adapter_index,
1386*4882a593Smuzhiyun 	u16 *pw_object_index);
1387*4882a593Smuzhiyun 
1388*4882a593Smuzhiyun u32 hpi_indexes_to_handle(const char c_object, const u16 adapter_index,
1389*4882a593Smuzhiyun 	const u16 object_index);
1390*4882a593Smuzhiyun 
1391*4882a593Smuzhiyun /*////////////////////////////////////////////////////////////////////////// */
1392*4882a593Smuzhiyun 
1393*4882a593Smuzhiyun /* main HPI entry point */
1394*4882a593Smuzhiyun void hpi_send_recv(struct hpi_message *phm, struct hpi_response *phr);
1395*4882a593Smuzhiyun 
1396*4882a593Smuzhiyun /* used in PnP OS/driver */
1397*4882a593Smuzhiyun u16 hpi_subsys_create_adapter(const struct hpi_resource *p_resource,
1398*4882a593Smuzhiyun 	u16 *pw_adapter_index);
1399*4882a593Smuzhiyun 
1400*4882a593Smuzhiyun u16 hpi_outstream_host_buffer_get_info(u32 h_outstream, u8 **pp_buffer,
1401*4882a593Smuzhiyun 	struct hpi_hostbuffer_status **pp_status);
1402*4882a593Smuzhiyun 
1403*4882a593Smuzhiyun u16 hpi_instream_host_buffer_get_info(u32 h_instream, u8 **pp_buffer,
1404*4882a593Smuzhiyun 	struct hpi_hostbuffer_status **pp_status);
1405*4882a593Smuzhiyun 
1406*4882a593Smuzhiyun u16 hpi_adapter_restart(u16 adapter_index);
1407*4882a593Smuzhiyun 
1408*4882a593Smuzhiyun /*
1409*4882a593Smuzhiyun The following 3 functions were last declared in header files for
1410*4882a593Smuzhiyun driver 3.10. HPI_ControlQuery() used to be the recommended way
1411*4882a593Smuzhiyun of getting a volume range. Declared here for binary asihpi32.dll
1412*4882a593Smuzhiyun compatibility.
1413*4882a593Smuzhiyun */
1414*4882a593Smuzhiyun 
1415*4882a593Smuzhiyun void hpi_format_to_msg(struct hpi_msg_format *pMF,
1416*4882a593Smuzhiyun 	const struct hpi_format *pF);
1417*4882a593Smuzhiyun void hpi_stream_response_to_legacy(struct hpi_stream_res *pSR);
1418*4882a593Smuzhiyun 
1419*4882a593Smuzhiyun /*////////////////////////////////////////////////////////////////////////// */
1420*4882a593Smuzhiyun /* declarations for individual HPI entry points */
1421*4882a593Smuzhiyun hpi_handler_func HPI_6000;
1422*4882a593Smuzhiyun hpi_handler_func HPI_6205;
1423*4882a593Smuzhiyun 
1424*4882a593Smuzhiyun #endif				/* _HPI_INTERNAL_H_ */
1425