1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /***************************************************************************** 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun AudioScience HPI driver 5*4882a593Smuzhiyun Copyright (C) 1997-2011 AudioScience Inc. <support@audioscience.com> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun Host Interface module for an ASI6205 based 9*4882a593Smuzhiyun bus mastering PCI adapter. 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun Copyright AudioScience, Inc., 2003 12*4882a593Smuzhiyun ******************************************************************************/ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #ifndef _HPI6205_H_ 15*4882a593Smuzhiyun #define _HPI6205_H_ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #include "hpi_internal.h" 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /*********************************************************** 20*4882a593Smuzhiyun Defines used for basic messaging 21*4882a593Smuzhiyun ************************************************************/ 22*4882a593Smuzhiyun #define H620_HIF_RESET 0 23*4882a593Smuzhiyun #define H620_HIF_IDLE 1 24*4882a593Smuzhiyun #define H620_HIF_GET_RESP 2 25*4882a593Smuzhiyun #define H620_HIF_DATA_DONE 3 26*4882a593Smuzhiyun #define H620_HIF_DATA_MASK 0x10 27*4882a593Smuzhiyun #define H620_HIF_SEND_DATA 0x14 28*4882a593Smuzhiyun #define H620_HIF_GET_DATA 0x15 29*4882a593Smuzhiyun #define H620_HIF_UNKNOWN 0x0000ffff 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /*********************************************************** 32*4882a593Smuzhiyun Types used for mixer control caching 33*4882a593Smuzhiyun ************************************************************/ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define H620_MAX_ISTREAMS 32 36*4882a593Smuzhiyun #define H620_MAX_OSTREAMS 32 37*4882a593Smuzhiyun #define HPI_NMIXER_CONTROLS 2048 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /********************************************************************* 40*4882a593Smuzhiyun This is used for dynamic control cache allocation 41*4882a593Smuzhiyun **********************************************************************/ 42*4882a593Smuzhiyun struct controlcache_6205 { 43*4882a593Smuzhiyun u32 number_of_controls; 44*4882a593Smuzhiyun u32 physical_address32; 45*4882a593Smuzhiyun u32 size_in_bytes; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /********************************************************************* 49*4882a593Smuzhiyun This is used for dynamic allocation of async event array 50*4882a593Smuzhiyun **********************************************************************/ 51*4882a593Smuzhiyun struct async_event_buffer_6205 { 52*4882a593Smuzhiyun u32 physical_address32; 53*4882a593Smuzhiyun u32 spare; 54*4882a593Smuzhiyun struct hpi_fifo_buffer b; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /*********************************************************** 58*4882a593Smuzhiyun The Host located memory buffer that the 6205 will bus master 59*4882a593Smuzhiyun in and out of. 60*4882a593Smuzhiyun ************************************************************/ 61*4882a593Smuzhiyun #define HPI6205_SIZEOF_DATA (16*1024) 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun struct message_buffer_6205 { 64*4882a593Smuzhiyun struct hpi_message message; 65*4882a593Smuzhiyun char data[256]; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun struct response_buffer_6205 { 69*4882a593Smuzhiyun struct hpi_response response; 70*4882a593Smuzhiyun char data[256]; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun union buffer_6205 { 74*4882a593Smuzhiyun struct message_buffer_6205 message_buffer; 75*4882a593Smuzhiyun struct response_buffer_6205 response_buffer; 76*4882a593Smuzhiyun u8 b_data[HPI6205_SIZEOF_DATA]; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun struct bus_master_interface { 80*4882a593Smuzhiyun u32 host_cmd; 81*4882a593Smuzhiyun u32 dsp_ack; 82*4882a593Smuzhiyun u32 transfer_size_in_bytes; 83*4882a593Smuzhiyun union buffer_6205 u; 84*4882a593Smuzhiyun struct controlcache_6205 control_cache; 85*4882a593Smuzhiyun struct async_event_buffer_6205 async_buffer; 86*4882a593Smuzhiyun struct hpi_hostbuffer_status 87*4882a593Smuzhiyun instream_host_buffer_status[H620_MAX_ISTREAMS]; 88*4882a593Smuzhiyun struct hpi_hostbuffer_status 89*4882a593Smuzhiyun outstream_host_buffer_status[H620_MAX_OSTREAMS]; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #endif 93