xref: /OK3568_Linux_fs/kernel/sound/isa/opti9xx/opti92x-ad1848.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun     card-opti92x-ad1848.c - driver for OPTi 82c92x based soundcards.
4*4882a593Smuzhiyun     Copyright (C) 1998-2000 by Massimo Piccioni <dafastidio@libero.it>
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun     Part of this code was developed at the Italian Ministry of Air Defence,
7*4882a593Smuzhiyun     Sixth Division (oh, che pace ...), Rome.
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun     Thanks to Maria Grazia Pollarini, Salvatore Vassallo.
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/err.h>
16*4882a593Smuzhiyun #include <linux/isa.h>
17*4882a593Smuzhiyun #include <linux/delay.h>
18*4882a593Smuzhiyun #include <linux/pnp.h>
19*4882a593Smuzhiyun #include <linux/module.h>
20*4882a593Smuzhiyun #include <linux/io.h>
21*4882a593Smuzhiyun #include <asm/dma.h>
22*4882a593Smuzhiyun #include <sound/core.h>
23*4882a593Smuzhiyun #include <sound/tlv.h>
24*4882a593Smuzhiyun #include <sound/wss.h>
25*4882a593Smuzhiyun #include <sound/mpu401.h>
26*4882a593Smuzhiyun #include <sound/opl3.h>
27*4882a593Smuzhiyun #ifndef OPTi93X
28*4882a593Smuzhiyun #include <sound/opl4.h>
29*4882a593Smuzhiyun #endif
30*4882a593Smuzhiyun #define SNDRV_LEGACY_FIND_FREE_IOPORT
31*4882a593Smuzhiyun #define SNDRV_LEGACY_FIND_FREE_IRQ
32*4882a593Smuzhiyun #define SNDRV_LEGACY_FIND_FREE_DMA
33*4882a593Smuzhiyun #include <sound/initval.h>
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun MODULE_AUTHOR("Massimo Piccioni <dafastidio@libero.it>");
36*4882a593Smuzhiyun MODULE_LICENSE("GPL");
37*4882a593Smuzhiyun #ifdef OPTi93X
38*4882a593Smuzhiyun MODULE_DESCRIPTION("OPTi93X");
39*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("{{OPTi,82C931/3}}");
40*4882a593Smuzhiyun #else	/* OPTi93X */
41*4882a593Smuzhiyun #ifdef CS4231
42*4882a593Smuzhiyun MODULE_DESCRIPTION("OPTi92X - CS4231");
43*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("{{OPTi,82C924 (CS4231)},"
44*4882a593Smuzhiyun 		"{OPTi,82C925 (CS4231)}}");
45*4882a593Smuzhiyun #else	/* CS4231 */
46*4882a593Smuzhiyun MODULE_DESCRIPTION("OPTi92X - AD1848");
47*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("{{OPTi,82C924 (AD1848)},"
48*4882a593Smuzhiyun 		"{OPTi,82C925 (AD1848)},"
49*4882a593Smuzhiyun 	        "{OAK,Mozart}}");
50*4882a593Smuzhiyun #endif	/* CS4231 */
51*4882a593Smuzhiyun #endif	/* OPTi93X */
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun static int index = SNDRV_DEFAULT_IDX1;	/* Index 0-MAX */
54*4882a593Smuzhiyun static char *id = SNDRV_DEFAULT_STR1;		/* ID for this card */
55*4882a593Smuzhiyun //static bool enable = SNDRV_DEFAULT_ENABLE1;	/* Enable this card */
56*4882a593Smuzhiyun #ifdef CONFIG_PNP
57*4882a593Smuzhiyun static bool isapnp = true;			/* Enable ISA PnP detection */
58*4882a593Smuzhiyun #endif
59*4882a593Smuzhiyun static long port = SNDRV_DEFAULT_PORT1; 	/* 0x530,0xe80,0xf40,0x604 */
60*4882a593Smuzhiyun static long mpu_port = SNDRV_DEFAULT_PORT1;	/* 0x300,0x310,0x320,0x330 */
61*4882a593Smuzhiyun static long fm_port = SNDRV_DEFAULT_PORT1;	/* 0x388 */
62*4882a593Smuzhiyun static int irq = SNDRV_DEFAULT_IRQ1;		/* 5,7,9,10,11 */
63*4882a593Smuzhiyun static int mpu_irq = SNDRV_DEFAULT_IRQ1;	/* 5,7,9,10 */
64*4882a593Smuzhiyun static int dma1 = SNDRV_DEFAULT_DMA1;		/* 0,1,3 */
65*4882a593Smuzhiyun #if defined(CS4231) || defined(OPTi93X)
66*4882a593Smuzhiyun static int dma2 = SNDRV_DEFAULT_DMA1;		/* 0,1,3 */
67*4882a593Smuzhiyun #endif	/* CS4231 || OPTi93X */
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun module_param(index, int, 0444);
70*4882a593Smuzhiyun MODULE_PARM_DESC(index, "Index value for opti9xx based soundcard.");
71*4882a593Smuzhiyun module_param(id, charp, 0444);
72*4882a593Smuzhiyun MODULE_PARM_DESC(id, "ID string for opti9xx based soundcard.");
73*4882a593Smuzhiyun //module_param(enable, bool, 0444);
74*4882a593Smuzhiyun //MODULE_PARM_DESC(enable, "Enable opti9xx soundcard.");
75*4882a593Smuzhiyun #ifdef CONFIG_PNP
76*4882a593Smuzhiyun module_param(isapnp, bool, 0444);
77*4882a593Smuzhiyun MODULE_PARM_DESC(isapnp, "Enable ISA PnP detection for specified soundcard.");
78*4882a593Smuzhiyun #endif
79*4882a593Smuzhiyun module_param_hw(port, long, ioport, 0444);
80*4882a593Smuzhiyun MODULE_PARM_DESC(port, "WSS port # for opti9xx driver.");
81*4882a593Smuzhiyun module_param_hw(mpu_port, long, ioport, 0444);
82*4882a593Smuzhiyun MODULE_PARM_DESC(mpu_port, "MPU-401 port # for opti9xx driver.");
83*4882a593Smuzhiyun module_param_hw(fm_port, long, ioport, 0444);
84*4882a593Smuzhiyun MODULE_PARM_DESC(fm_port, "FM port # for opti9xx driver.");
85*4882a593Smuzhiyun module_param_hw(irq, int, irq, 0444);
86*4882a593Smuzhiyun MODULE_PARM_DESC(irq, "WSS irq # for opti9xx driver.");
87*4882a593Smuzhiyun module_param_hw(mpu_irq, int, irq, 0444);
88*4882a593Smuzhiyun MODULE_PARM_DESC(mpu_irq, "MPU-401 irq # for opti9xx driver.");
89*4882a593Smuzhiyun module_param_hw(dma1, int, dma, 0444);
90*4882a593Smuzhiyun MODULE_PARM_DESC(dma1, "1st dma # for opti9xx driver.");
91*4882a593Smuzhiyun #if defined(CS4231) || defined(OPTi93X)
92*4882a593Smuzhiyun module_param_hw(dma2, int, dma, 0444);
93*4882a593Smuzhiyun MODULE_PARM_DESC(dma2, "2nd dma # for opti9xx driver.");
94*4882a593Smuzhiyun #endif	/* CS4231 || OPTi93X */
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun #define OPTi9XX_HW_82C928	1
97*4882a593Smuzhiyun #define OPTi9XX_HW_82C929	2
98*4882a593Smuzhiyun #define OPTi9XX_HW_82C924	3
99*4882a593Smuzhiyun #define OPTi9XX_HW_82C925	4
100*4882a593Smuzhiyun #define OPTi9XX_HW_82C930	5
101*4882a593Smuzhiyun #define OPTi9XX_HW_82C931	6
102*4882a593Smuzhiyun #define OPTi9XX_HW_82C933	7
103*4882a593Smuzhiyun #define OPTi9XX_HW_LAST		OPTi9XX_HW_82C933
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun #define OPTi9XX_MC_REG(n)	n
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun #ifdef OPTi93X
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun #define OPTi93X_STATUS			0x02
110*4882a593Smuzhiyun #define OPTi93X_PORT(chip, r)		((chip)->port + OPTi93X_##r)
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun #define OPTi93X_IRQ_PLAYBACK		0x04
113*4882a593Smuzhiyun #define OPTi93X_IRQ_CAPTURE		0x08
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun #endif /* OPTi93X */
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun struct snd_opti9xx {
118*4882a593Smuzhiyun 	unsigned short hardware;
119*4882a593Smuzhiyun 	unsigned char password;
120*4882a593Smuzhiyun 	char name[7];
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	unsigned long mc_base;
123*4882a593Smuzhiyun 	struct resource *res_mc_base;
124*4882a593Smuzhiyun 	unsigned long mc_base_size;
125*4882a593Smuzhiyun #ifdef OPTi93X
126*4882a593Smuzhiyun 	unsigned long mc_indir_index;
127*4882a593Smuzhiyun 	struct resource *res_mc_indir;
128*4882a593Smuzhiyun #endif	/* OPTi93X */
129*4882a593Smuzhiyun 	struct snd_wss *codec;
130*4882a593Smuzhiyun 	unsigned long pwd_reg;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	spinlock_t lock;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	long wss_base;
135*4882a593Smuzhiyun 	int irq;
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun static int snd_opti9xx_pnp_is_probed;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun #ifdef CONFIG_PNP
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun static const struct pnp_card_device_id snd_opti9xx_pnpids[] = {
143*4882a593Smuzhiyun #ifndef OPTi93X
144*4882a593Smuzhiyun 	/* OPTi 82C924 */
145*4882a593Smuzhiyun 	{ .id = "OPT0924",
146*4882a593Smuzhiyun 	  .devs = { { "OPT0000" }, { "OPT0002" }, { "OPT0005" } },
147*4882a593Smuzhiyun 	  .driver_data = 0x0924 },
148*4882a593Smuzhiyun 	/* OPTi 82C925 */
149*4882a593Smuzhiyun 	{ .id = "OPT0925",
150*4882a593Smuzhiyun 	  .devs = { { "OPT9250" }, { "OPT0002" }, { "OPT0005" } },
151*4882a593Smuzhiyun 	  .driver_data = 0x0925 },
152*4882a593Smuzhiyun #else
153*4882a593Smuzhiyun 	/* OPTi 82C931/3 */
154*4882a593Smuzhiyun 	{ .id = "OPT0931", .devs = { { "OPT9310" }, { "OPT0002" } },
155*4882a593Smuzhiyun 	  .driver_data = 0x0931 },
156*4882a593Smuzhiyun #endif	/* OPTi93X */
157*4882a593Smuzhiyun 	{ .id = "" }
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pnp_card, snd_opti9xx_pnpids);
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun #endif	/* CONFIG_PNP */
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun #define DEV_NAME KBUILD_MODNAME
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun static const char * const snd_opti9xx_names[] = {
167*4882a593Smuzhiyun 	"unknown",
168*4882a593Smuzhiyun 	"82C928",	"82C929",
169*4882a593Smuzhiyun 	"82C924",	"82C925",
170*4882a593Smuzhiyun 	"82C930",	"82C931",	"82C933"
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun 
snd_opti9xx_init(struct snd_opti9xx * chip,unsigned short hardware)173*4882a593Smuzhiyun static int snd_opti9xx_init(struct snd_opti9xx *chip,
174*4882a593Smuzhiyun 			    unsigned short hardware)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun 	static const int opti9xx_mc_size[] = {7, 7, 10, 10, 2, 2, 2};
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	chip->hardware = hardware;
179*4882a593Smuzhiyun 	strcpy(chip->name, snd_opti9xx_names[hardware]);
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	spin_lock_init(&chip->lock);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	chip->irq = -1;
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun #ifndef OPTi93X
186*4882a593Smuzhiyun #ifdef CONFIG_PNP
187*4882a593Smuzhiyun 	if (isapnp && chip->mc_base)
188*4882a593Smuzhiyun 		/* PnP resource gives the least 10 bits */
189*4882a593Smuzhiyun 		chip->mc_base |= 0xc00;
190*4882a593Smuzhiyun 	else
191*4882a593Smuzhiyun #endif	/* CONFIG_PNP */
192*4882a593Smuzhiyun 	{
193*4882a593Smuzhiyun 		chip->mc_base = 0xf8c;
194*4882a593Smuzhiyun 		chip->mc_base_size = opti9xx_mc_size[hardware];
195*4882a593Smuzhiyun 	}
196*4882a593Smuzhiyun #else
197*4882a593Smuzhiyun 		chip->mc_base_size = opti9xx_mc_size[hardware];
198*4882a593Smuzhiyun #endif
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	switch (hardware) {
201*4882a593Smuzhiyun #ifndef OPTi93X
202*4882a593Smuzhiyun 	case OPTi9XX_HW_82C928:
203*4882a593Smuzhiyun 	case OPTi9XX_HW_82C929:
204*4882a593Smuzhiyun 		chip->password = (hardware == OPTi9XX_HW_82C928) ? 0xe2 : 0xe3;
205*4882a593Smuzhiyun 		chip->pwd_reg = 3;
206*4882a593Smuzhiyun 		break;
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	case OPTi9XX_HW_82C924:
209*4882a593Smuzhiyun 	case OPTi9XX_HW_82C925:
210*4882a593Smuzhiyun 		chip->password = 0xe5;
211*4882a593Smuzhiyun 		chip->pwd_reg = 3;
212*4882a593Smuzhiyun 		break;
213*4882a593Smuzhiyun #else	/* OPTi93X */
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	case OPTi9XX_HW_82C930:
216*4882a593Smuzhiyun 	case OPTi9XX_HW_82C931:
217*4882a593Smuzhiyun 	case OPTi9XX_HW_82C933:
218*4882a593Smuzhiyun 		chip->mc_base = (hardware == OPTi9XX_HW_82C930) ? 0xf8f : 0xf8d;
219*4882a593Smuzhiyun 		if (!chip->mc_indir_index)
220*4882a593Smuzhiyun 			chip->mc_indir_index = 0xe0e;
221*4882a593Smuzhiyun 		chip->password = 0xe4;
222*4882a593Smuzhiyun 		chip->pwd_reg = 0;
223*4882a593Smuzhiyun 		break;
224*4882a593Smuzhiyun #endif	/* OPTi93X */
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	default:
227*4882a593Smuzhiyun 		snd_printk(KERN_ERR "chip %d not supported\n", hardware);
228*4882a593Smuzhiyun 		return -ENODEV;
229*4882a593Smuzhiyun 	}
230*4882a593Smuzhiyun 	return 0;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun 
snd_opti9xx_read(struct snd_opti9xx * chip,unsigned char reg)233*4882a593Smuzhiyun static unsigned char snd_opti9xx_read(struct snd_opti9xx *chip,
234*4882a593Smuzhiyun 				      unsigned char reg)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun 	unsigned long flags;
237*4882a593Smuzhiyun 	unsigned char retval = 0xff;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	spin_lock_irqsave(&chip->lock, flags);
240*4882a593Smuzhiyun 	outb(chip->password, chip->mc_base + chip->pwd_reg);
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	switch (chip->hardware) {
243*4882a593Smuzhiyun #ifndef OPTi93X
244*4882a593Smuzhiyun 	case OPTi9XX_HW_82C924:
245*4882a593Smuzhiyun 	case OPTi9XX_HW_82C925:
246*4882a593Smuzhiyun 		if (reg > 7) {
247*4882a593Smuzhiyun 			outb(reg, chip->mc_base + 8);
248*4882a593Smuzhiyun 			outb(chip->password, chip->mc_base + chip->pwd_reg);
249*4882a593Smuzhiyun 			retval = inb(chip->mc_base + 9);
250*4882a593Smuzhiyun 			break;
251*4882a593Smuzhiyun 		}
252*4882a593Smuzhiyun 		fallthrough;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	case OPTi9XX_HW_82C928:
255*4882a593Smuzhiyun 	case OPTi9XX_HW_82C929:
256*4882a593Smuzhiyun 		retval = inb(chip->mc_base + reg);
257*4882a593Smuzhiyun 		break;
258*4882a593Smuzhiyun #else	/* OPTi93X */
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	case OPTi9XX_HW_82C930:
261*4882a593Smuzhiyun 	case OPTi9XX_HW_82C931:
262*4882a593Smuzhiyun 	case OPTi9XX_HW_82C933:
263*4882a593Smuzhiyun 		outb(reg, chip->mc_indir_index);
264*4882a593Smuzhiyun 		outb(chip->password, chip->mc_base + chip->pwd_reg);
265*4882a593Smuzhiyun 		retval = inb(chip->mc_indir_index + 1);
266*4882a593Smuzhiyun 		break;
267*4882a593Smuzhiyun #endif	/* OPTi93X */
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	default:
270*4882a593Smuzhiyun 		snd_printk(KERN_ERR "chip %d not supported\n", chip->hardware);
271*4882a593Smuzhiyun 	}
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	spin_unlock_irqrestore(&chip->lock, flags);
274*4882a593Smuzhiyun 	return retval;
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun 
snd_opti9xx_write(struct snd_opti9xx * chip,unsigned char reg,unsigned char value)277*4882a593Smuzhiyun static void snd_opti9xx_write(struct snd_opti9xx *chip, unsigned char reg,
278*4882a593Smuzhiyun 			      unsigned char value)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun 	unsigned long flags;
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	spin_lock_irqsave(&chip->lock, flags);
283*4882a593Smuzhiyun 	outb(chip->password, chip->mc_base + chip->pwd_reg);
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	switch (chip->hardware) {
286*4882a593Smuzhiyun #ifndef OPTi93X
287*4882a593Smuzhiyun 	case OPTi9XX_HW_82C924:
288*4882a593Smuzhiyun 	case OPTi9XX_HW_82C925:
289*4882a593Smuzhiyun 		if (reg > 7) {
290*4882a593Smuzhiyun 			outb(reg, chip->mc_base + 8);
291*4882a593Smuzhiyun 			outb(chip->password, chip->mc_base + chip->pwd_reg);
292*4882a593Smuzhiyun 			outb(value, chip->mc_base + 9);
293*4882a593Smuzhiyun 			break;
294*4882a593Smuzhiyun 		}
295*4882a593Smuzhiyun 		fallthrough;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	case OPTi9XX_HW_82C928:
298*4882a593Smuzhiyun 	case OPTi9XX_HW_82C929:
299*4882a593Smuzhiyun 		outb(value, chip->mc_base + reg);
300*4882a593Smuzhiyun 		break;
301*4882a593Smuzhiyun #else	/* OPTi93X */
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	case OPTi9XX_HW_82C930:
304*4882a593Smuzhiyun 	case OPTi9XX_HW_82C931:
305*4882a593Smuzhiyun 	case OPTi9XX_HW_82C933:
306*4882a593Smuzhiyun 		outb(reg, chip->mc_indir_index);
307*4882a593Smuzhiyun 		outb(chip->password, chip->mc_base + chip->pwd_reg);
308*4882a593Smuzhiyun 		outb(value, chip->mc_indir_index + 1);
309*4882a593Smuzhiyun 		break;
310*4882a593Smuzhiyun #endif	/* OPTi93X */
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	default:
313*4882a593Smuzhiyun 		snd_printk(KERN_ERR "chip %d not supported\n", chip->hardware);
314*4882a593Smuzhiyun 	}
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	spin_unlock_irqrestore(&chip->lock, flags);
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 
snd_opti9xx_write_mask(struct snd_opti9xx * chip,unsigned char reg,unsigned char value,unsigned char mask)320*4882a593Smuzhiyun static inline void snd_opti9xx_write_mask(struct snd_opti9xx *chip,
321*4882a593Smuzhiyun 		unsigned char reg, unsigned char value, unsigned char mask)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun 	unsigned char oldval = snd_opti9xx_read(chip, reg);
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	snd_opti9xx_write(chip, reg, (oldval & ~mask) | (value & mask));
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun 
snd_opti9xx_configure(struct snd_opti9xx * chip,long port,int irq,int dma1,int dma2,long mpu_port,int mpu_irq)328*4882a593Smuzhiyun static int snd_opti9xx_configure(struct snd_opti9xx *chip,
329*4882a593Smuzhiyun 					   long port,
330*4882a593Smuzhiyun 					   int irq, int dma1, int dma2,
331*4882a593Smuzhiyun 					   long mpu_port, int mpu_irq)
332*4882a593Smuzhiyun {
333*4882a593Smuzhiyun 	unsigned char wss_base_bits;
334*4882a593Smuzhiyun 	unsigned char irq_bits;
335*4882a593Smuzhiyun 	unsigned char dma_bits;
336*4882a593Smuzhiyun 	unsigned char mpu_port_bits = 0;
337*4882a593Smuzhiyun 	unsigned char mpu_irq_bits;
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	switch (chip->hardware) {
340*4882a593Smuzhiyun #ifndef OPTi93X
341*4882a593Smuzhiyun 	case OPTi9XX_HW_82C924:
342*4882a593Smuzhiyun 		/* opti 929 mode (?), OPL3 clock output, audio enable */
343*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(4), 0xf0, 0xfc);
344*4882a593Smuzhiyun 		/* enable wave audio */
345*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(6), 0x02, 0x02);
346*4882a593Smuzhiyun 		fallthrough;
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	case OPTi9XX_HW_82C925:
349*4882a593Smuzhiyun 		/* enable WSS mode */
350*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(1), 0x80, 0x80);
351*4882a593Smuzhiyun 		/* OPL3 FM synthesis */
352*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(2), 0x00, 0x20);
353*4882a593Smuzhiyun 		/* disable Sound Blaster IRQ and DMA */
354*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(3), 0xf0, 0xff);
355*4882a593Smuzhiyun #ifdef CS4231
356*4882a593Smuzhiyun 		/* cs4231/4248 fix enabled */
357*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x02, 0x02);
358*4882a593Smuzhiyun #else
359*4882a593Smuzhiyun 		/* cs4231/4248 fix disabled */
360*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x00, 0x02);
361*4882a593Smuzhiyun #endif	/* CS4231 */
362*4882a593Smuzhiyun 		break;
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	case OPTi9XX_HW_82C928:
365*4882a593Smuzhiyun 	case OPTi9XX_HW_82C929:
366*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(1), 0x80, 0x80);
367*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(2), 0x00, 0x20);
368*4882a593Smuzhiyun 		/*
369*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(3), 0xa2, 0xae);
370*4882a593Smuzhiyun 		*/
371*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(4), 0x00, 0x0c);
372*4882a593Smuzhiyun #ifdef CS4231
373*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x02, 0x02);
374*4882a593Smuzhiyun #else
375*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x00, 0x02);
376*4882a593Smuzhiyun #endif	/* CS4231 */
377*4882a593Smuzhiyun 		break;
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun #else	/* OPTi93X */
380*4882a593Smuzhiyun 	case OPTi9XX_HW_82C931:
381*4882a593Smuzhiyun 		/* disable 3D sound (set GPIO1 as output, low) */
382*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(20), 0x04, 0x0c);
383*4882a593Smuzhiyun 		fallthrough;
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	case OPTi9XX_HW_82C933:
386*4882a593Smuzhiyun 		/*
387*4882a593Smuzhiyun 		 * The BTC 1817DW has QS1000 wavetable which is connected
388*4882a593Smuzhiyun 		 * to the serial digital input of the OPTI931.
389*4882a593Smuzhiyun 		 */
390*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(21), 0x82, 0xff);
391*4882a593Smuzhiyun 		/*
392*4882a593Smuzhiyun 		 * This bit sets OPTI931 to automaticaly select FM
393*4882a593Smuzhiyun 		 * or digital input signal.
394*4882a593Smuzhiyun 		 */
395*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(26), 0x01, 0x01);
396*4882a593Smuzhiyun 		fallthrough;
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	case OPTi9XX_HW_82C930:
399*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(6), 0x02, 0x03);
400*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(3), 0x00, 0xff);
401*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(4), 0x10 |
402*4882a593Smuzhiyun 			(chip->hardware == OPTi9XX_HW_82C930 ? 0x00 : 0x04),
403*4882a593Smuzhiyun 			0x34);
404*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x20, 0xbf);
405*4882a593Smuzhiyun 		break;
406*4882a593Smuzhiyun #endif	/* OPTi93X */
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	default:
409*4882a593Smuzhiyun 		snd_printk(KERN_ERR "chip %d not supported\n", chip->hardware);
410*4882a593Smuzhiyun 		return -EINVAL;
411*4882a593Smuzhiyun 	}
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	/* PnP resource says it decodes only 10 bits of address */
414*4882a593Smuzhiyun 	switch (port & 0x3ff) {
415*4882a593Smuzhiyun 	case 0x130:
416*4882a593Smuzhiyun 		chip->wss_base = 0x530;
417*4882a593Smuzhiyun 		wss_base_bits = 0x00;
418*4882a593Smuzhiyun 		break;
419*4882a593Smuzhiyun 	case 0x204:
420*4882a593Smuzhiyun 		chip->wss_base = 0x604;
421*4882a593Smuzhiyun 		wss_base_bits = 0x03;
422*4882a593Smuzhiyun 		break;
423*4882a593Smuzhiyun 	case 0x280:
424*4882a593Smuzhiyun 		chip->wss_base = 0xe80;
425*4882a593Smuzhiyun 		wss_base_bits = 0x01;
426*4882a593Smuzhiyun 		break;
427*4882a593Smuzhiyun 	case 0x340:
428*4882a593Smuzhiyun 		chip->wss_base = 0xf40;
429*4882a593Smuzhiyun 		wss_base_bits = 0x02;
430*4882a593Smuzhiyun 		break;
431*4882a593Smuzhiyun 	default:
432*4882a593Smuzhiyun 		snd_printk(KERN_WARNING "WSS port 0x%lx not valid\n", port);
433*4882a593Smuzhiyun 		goto __skip_base;
434*4882a593Smuzhiyun 	}
435*4882a593Smuzhiyun 	snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(1), wss_base_bits << 4, 0x30);
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun __skip_base:
438*4882a593Smuzhiyun 	switch (irq) {
439*4882a593Smuzhiyun //#ifdef OPTi93X
440*4882a593Smuzhiyun 	case 5:
441*4882a593Smuzhiyun 		irq_bits = 0x05;
442*4882a593Smuzhiyun 		break;
443*4882a593Smuzhiyun //#endif	/* OPTi93X */
444*4882a593Smuzhiyun 	case 7:
445*4882a593Smuzhiyun 		irq_bits = 0x01;
446*4882a593Smuzhiyun 		break;
447*4882a593Smuzhiyun 	case 9:
448*4882a593Smuzhiyun 		irq_bits = 0x02;
449*4882a593Smuzhiyun 		break;
450*4882a593Smuzhiyun 	case 10:
451*4882a593Smuzhiyun 		irq_bits = 0x03;
452*4882a593Smuzhiyun 		break;
453*4882a593Smuzhiyun 	case 11:
454*4882a593Smuzhiyun 		irq_bits = 0x04;
455*4882a593Smuzhiyun 		break;
456*4882a593Smuzhiyun 	default:
457*4882a593Smuzhiyun 		snd_printk(KERN_WARNING "WSS irq # %d not valid\n", irq);
458*4882a593Smuzhiyun 		goto __skip_resources;
459*4882a593Smuzhiyun 	}
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	switch (dma1) {
462*4882a593Smuzhiyun 	case 0:
463*4882a593Smuzhiyun 		dma_bits = 0x01;
464*4882a593Smuzhiyun 		break;
465*4882a593Smuzhiyun 	case 1:
466*4882a593Smuzhiyun 		dma_bits = 0x02;
467*4882a593Smuzhiyun 		break;
468*4882a593Smuzhiyun 	case 3:
469*4882a593Smuzhiyun 		dma_bits = 0x03;
470*4882a593Smuzhiyun 		break;
471*4882a593Smuzhiyun 	default:
472*4882a593Smuzhiyun 		snd_printk(KERN_WARNING "WSS dma1 # %d not valid\n", dma1);
473*4882a593Smuzhiyun 		goto __skip_resources;
474*4882a593Smuzhiyun 	}
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun #if defined(CS4231) || defined(OPTi93X)
477*4882a593Smuzhiyun 	if (dma1 == dma2) {
478*4882a593Smuzhiyun 		snd_printk(KERN_ERR "don't want to share dmas\n");
479*4882a593Smuzhiyun 		return -EBUSY;
480*4882a593Smuzhiyun 	}
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	switch (dma2) {
483*4882a593Smuzhiyun 	case 0:
484*4882a593Smuzhiyun 	case 1:
485*4882a593Smuzhiyun 		break;
486*4882a593Smuzhiyun 	default:
487*4882a593Smuzhiyun 		snd_printk(KERN_WARNING "WSS dma2 # %d not valid\n", dma2);
488*4882a593Smuzhiyun 		goto __skip_resources;
489*4882a593Smuzhiyun 	}
490*4882a593Smuzhiyun 	dma_bits |= 0x04;
491*4882a593Smuzhiyun #endif	/* CS4231 || OPTi93X */
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun #ifndef OPTi93X
494*4882a593Smuzhiyun 	 outb(irq_bits << 3 | dma_bits, chip->wss_base);
495*4882a593Smuzhiyun #else /* OPTi93X */
496*4882a593Smuzhiyun 	snd_opti9xx_write(chip, OPTi9XX_MC_REG(3), (irq_bits << 3 | dma_bits));
497*4882a593Smuzhiyun #endif /* OPTi93X */
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun __skip_resources:
500*4882a593Smuzhiyun 	if (chip->hardware > OPTi9XX_HW_82C928) {
501*4882a593Smuzhiyun 		switch (mpu_port) {
502*4882a593Smuzhiyun 		case 0:
503*4882a593Smuzhiyun 		case -1:
504*4882a593Smuzhiyun 			break;
505*4882a593Smuzhiyun 		case 0x300:
506*4882a593Smuzhiyun 			mpu_port_bits = 0x03;
507*4882a593Smuzhiyun 			break;
508*4882a593Smuzhiyun 		case 0x310:
509*4882a593Smuzhiyun 			mpu_port_bits = 0x02;
510*4882a593Smuzhiyun 			break;
511*4882a593Smuzhiyun 		case 0x320:
512*4882a593Smuzhiyun 			mpu_port_bits = 0x01;
513*4882a593Smuzhiyun 			break;
514*4882a593Smuzhiyun 		case 0x330:
515*4882a593Smuzhiyun 			mpu_port_bits = 0x00;
516*4882a593Smuzhiyun 			break;
517*4882a593Smuzhiyun 		default:
518*4882a593Smuzhiyun 			snd_printk(KERN_WARNING
519*4882a593Smuzhiyun 				   "MPU-401 port 0x%lx not valid\n", mpu_port);
520*4882a593Smuzhiyun 			goto __skip_mpu;
521*4882a593Smuzhiyun 		}
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun 		switch (mpu_irq) {
524*4882a593Smuzhiyun 		case 5:
525*4882a593Smuzhiyun 			mpu_irq_bits = 0x02;
526*4882a593Smuzhiyun 			break;
527*4882a593Smuzhiyun 		case 7:
528*4882a593Smuzhiyun 			mpu_irq_bits = 0x03;
529*4882a593Smuzhiyun 			break;
530*4882a593Smuzhiyun 		case 9:
531*4882a593Smuzhiyun 			mpu_irq_bits = 0x00;
532*4882a593Smuzhiyun 			break;
533*4882a593Smuzhiyun 		case 10:
534*4882a593Smuzhiyun 			mpu_irq_bits = 0x01;
535*4882a593Smuzhiyun 			break;
536*4882a593Smuzhiyun 		default:
537*4882a593Smuzhiyun 			snd_printk(KERN_WARNING "MPU-401 irq # %d not valid\n",
538*4882a593Smuzhiyun 				mpu_irq);
539*4882a593Smuzhiyun 			goto __skip_mpu;
540*4882a593Smuzhiyun 		}
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 		snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(6),
543*4882a593Smuzhiyun 			(mpu_port <= 0) ? 0x00 :
544*4882a593Smuzhiyun 				0x80 | mpu_port_bits << 5 | mpu_irq_bits << 3,
545*4882a593Smuzhiyun 			0xf8);
546*4882a593Smuzhiyun 	}
547*4882a593Smuzhiyun __skip_mpu:
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	return 0;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun #ifdef OPTi93X
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(db_scale_5bit_3db_step, -9300, 300, 0);
555*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0);
556*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(db_scale_4bit_12db_max, -3300, 300, 0);
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_opti93x_controls[] = {
559*4882a593Smuzhiyun WSS_DOUBLE("Master Playback Switch", 0,
560*4882a593Smuzhiyun 		OPTi93X_OUT_LEFT, OPTi93X_OUT_RIGHT, 7, 7, 1, 1),
561*4882a593Smuzhiyun WSS_DOUBLE_TLV("Master Playback Volume", 0,
562*4882a593Smuzhiyun 		OPTi93X_OUT_LEFT, OPTi93X_OUT_RIGHT, 1, 1, 31, 1,
563*4882a593Smuzhiyun 		db_scale_5bit_3db_step),
564*4882a593Smuzhiyun WSS_DOUBLE_TLV("PCM Playback Volume", 0,
565*4882a593Smuzhiyun 		CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 31, 1,
566*4882a593Smuzhiyun 		db_scale_5bit),
567*4882a593Smuzhiyun WSS_DOUBLE_TLV("FM Playback Volume", 0,
568*4882a593Smuzhiyun 		CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 1, 1, 15, 1,
569*4882a593Smuzhiyun 		db_scale_4bit_12db_max),
570*4882a593Smuzhiyun WSS_DOUBLE("Line Playback Switch", 0,
571*4882a593Smuzhiyun 		CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
572*4882a593Smuzhiyun WSS_DOUBLE_TLV("Line Playback Volume", 0,
573*4882a593Smuzhiyun 		CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 15, 1,
574*4882a593Smuzhiyun 		db_scale_4bit_12db_max),
575*4882a593Smuzhiyun WSS_DOUBLE("Mic Playback Switch", 0,
576*4882a593Smuzhiyun 		OPTi93X_MIC_LEFT_INPUT, OPTi93X_MIC_RIGHT_INPUT, 7, 7, 1, 1),
577*4882a593Smuzhiyun WSS_DOUBLE_TLV("Mic Playback Volume", 0,
578*4882a593Smuzhiyun 		OPTi93X_MIC_LEFT_INPUT, OPTi93X_MIC_RIGHT_INPUT, 1, 1, 15, 1,
579*4882a593Smuzhiyun 		db_scale_4bit_12db_max),
580*4882a593Smuzhiyun WSS_DOUBLE_TLV("CD Playback Volume", 0,
581*4882a593Smuzhiyun 		CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 1, 1, 15, 1,
582*4882a593Smuzhiyun 		db_scale_4bit_12db_max),
583*4882a593Smuzhiyun WSS_DOUBLE("Aux Playback Switch", 0,
584*4882a593Smuzhiyun 		OPTi931_AUX_LEFT_INPUT, OPTi931_AUX_RIGHT_INPUT, 7, 7, 1, 1),
585*4882a593Smuzhiyun WSS_DOUBLE_TLV("Aux Playback Volume", 0,
586*4882a593Smuzhiyun 		OPTi931_AUX_LEFT_INPUT, OPTi931_AUX_RIGHT_INPUT, 1, 1, 15, 1,
587*4882a593Smuzhiyun 		db_scale_4bit_12db_max),
588*4882a593Smuzhiyun };
589*4882a593Smuzhiyun 
snd_opti93x_mixer(struct snd_wss * chip)590*4882a593Smuzhiyun static int snd_opti93x_mixer(struct snd_wss *chip)
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun 	struct snd_card *card;
593*4882a593Smuzhiyun 	unsigned int idx;
594*4882a593Smuzhiyun 	struct snd_ctl_elem_id id1, id2;
595*4882a593Smuzhiyun 	int err;
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun 	if (snd_BUG_ON(!chip || !chip->pcm))
598*4882a593Smuzhiyun 		return -EINVAL;
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	card = chip->card;
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 	strcpy(card->mixername, chip->pcm->name);
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun 	memset(&id1, 0, sizeof(id1));
605*4882a593Smuzhiyun 	memset(&id2, 0, sizeof(id2));
606*4882a593Smuzhiyun 	id1.iface = id2.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
607*4882a593Smuzhiyun 	/* reassign AUX0 switch to CD */
608*4882a593Smuzhiyun 	strcpy(id1.name, "Aux Playback Switch");
609*4882a593Smuzhiyun 	strcpy(id2.name, "CD Playback Switch");
610*4882a593Smuzhiyun 	err = snd_ctl_rename_id(card, &id1, &id2);
611*4882a593Smuzhiyun 	if (err < 0) {
612*4882a593Smuzhiyun 		snd_printk(KERN_ERR "Cannot rename opti93x control\n");
613*4882a593Smuzhiyun 		return err;
614*4882a593Smuzhiyun 	}
615*4882a593Smuzhiyun 	/* reassign AUX1 switch to FM */
616*4882a593Smuzhiyun 	strcpy(id1.name, "Aux Playback Switch"); id1.index = 1;
617*4882a593Smuzhiyun 	strcpy(id2.name, "FM Playback Switch");
618*4882a593Smuzhiyun 	err = snd_ctl_rename_id(card, &id1, &id2);
619*4882a593Smuzhiyun 	if (err < 0) {
620*4882a593Smuzhiyun 		snd_printk(KERN_ERR "Cannot rename opti93x control\n");
621*4882a593Smuzhiyun 		return err;
622*4882a593Smuzhiyun 	}
623*4882a593Smuzhiyun 	/* remove AUX1 volume */
624*4882a593Smuzhiyun 	strcpy(id1.name, "Aux Playback Volume"); id1.index = 1;
625*4882a593Smuzhiyun 	snd_ctl_remove_id(card, &id1);
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	/* Replace WSS volume controls with OPTi93x volume controls */
628*4882a593Smuzhiyun 	id1.index = 0;
629*4882a593Smuzhiyun 	for (idx = 0; idx < ARRAY_SIZE(snd_opti93x_controls); idx++) {
630*4882a593Smuzhiyun 		strcpy(id1.name, snd_opti93x_controls[idx].name);
631*4882a593Smuzhiyun 		snd_ctl_remove_id(card, &id1);
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 		err = snd_ctl_add(card,
634*4882a593Smuzhiyun 				snd_ctl_new1(&snd_opti93x_controls[idx], chip));
635*4882a593Smuzhiyun 		if (err < 0)
636*4882a593Smuzhiyun 			return err;
637*4882a593Smuzhiyun 	}
638*4882a593Smuzhiyun 	return 0;
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun 
snd_opti93x_interrupt(int irq,void * dev_id)641*4882a593Smuzhiyun static irqreturn_t snd_opti93x_interrupt(int irq, void *dev_id)
642*4882a593Smuzhiyun {
643*4882a593Smuzhiyun 	struct snd_opti9xx *chip = dev_id;
644*4882a593Smuzhiyun 	struct snd_wss *codec = chip->codec;
645*4882a593Smuzhiyun 	unsigned char status;
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun 	if (!codec)
648*4882a593Smuzhiyun 		return IRQ_HANDLED;
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 	status = snd_opti9xx_read(chip, OPTi9XX_MC_REG(11));
651*4882a593Smuzhiyun 	if ((status & OPTi93X_IRQ_PLAYBACK) && codec->playback_substream)
652*4882a593Smuzhiyun 		snd_pcm_period_elapsed(codec->playback_substream);
653*4882a593Smuzhiyun 	if ((status & OPTi93X_IRQ_CAPTURE) && codec->capture_substream) {
654*4882a593Smuzhiyun 		snd_wss_overrange(codec);
655*4882a593Smuzhiyun 		snd_pcm_period_elapsed(codec->capture_substream);
656*4882a593Smuzhiyun 	}
657*4882a593Smuzhiyun 	outb(0x00, OPTi93X_PORT(codec, STATUS));
658*4882a593Smuzhiyun 	return IRQ_HANDLED;
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun #endif /* OPTi93X */
662*4882a593Smuzhiyun 
snd_opti9xx_read_check(struct snd_opti9xx * chip)663*4882a593Smuzhiyun static int snd_opti9xx_read_check(struct snd_opti9xx *chip)
664*4882a593Smuzhiyun {
665*4882a593Smuzhiyun 	unsigned char value;
666*4882a593Smuzhiyun #ifdef OPTi93X
667*4882a593Smuzhiyun 	unsigned long flags;
668*4882a593Smuzhiyun #endif
669*4882a593Smuzhiyun 
670*4882a593Smuzhiyun 	chip->res_mc_base = request_region(chip->mc_base, chip->mc_base_size,
671*4882a593Smuzhiyun 					   "OPTi9xx MC");
672*4882a593Smuzhiyun 	if (chip->res_mc_base == NULL)
673*4882a593Smuzhiyun 		return -EBUSY;
674*4882a593Smuzhiyun #ifndef OPTi93X
675*4882a593Smuzhiyun 	value = snd_opti9xx_read(chip, OPTi9XX_MC_REG(1));
676*4882a593Smuzhiyun 	if (value != 0xff && value != inb(chip->mc_base + OPTi9XX_MC_REG(1)))
677*4882a593Smuzhiyun 		if (value == snd_opti9xx_read(chip, OPTi9XX_MC_REG(1)))
678*4882a593Smuzhiyun 			return 0;
679*4882a593Smuzhiyun #else	/* OPTi93X */
680*4882a593Smuzhiyun 	chip->res_mc_indir = request_region(chip->mc_indir_index, 2,
681*4882a593Smuzhiyun 					    "OPTi93x MC");
682*4882a593Smuzhiyun 	if (chip->res_mc_indir == NULL)
683*4882a593Smuzhiyun 		return -EBUSY;
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun 	spin_lock_irqsave(&chip->lock, flags);
686*4882a593Smuzhiyun 	outb(chip->password, chip->mc_base + chip->pwd_reg);
687*4882a593Smuzhiyun 	outb(((chip->mc_indir_index & 0x1f0) >> 4), chip->mc_base);
688*4882a593Smuzhiyun 	spin_unlock_irqrestore(&chip->lock, flags);
689*4882a593Smuzhiyun 
690*4882a593Smuzhiyun 	value = snd_opti9xx_read(chip, OPTi9XX_MC_REG(7));
691*4882a593Smuzhiyun 	snd_opti9xx_write(chip, OPTi9XX_MC_REG(7), 0xff - value);
692*4882a593Smuzhiyun 	if (snd_opti9xx_read(chip, OPTi9XX_MC_REG(7)) == 0xff - value)
693*4882a593Smuzhiyun 		return 0;
694*4882a593Smuzhiyun 
695*4882a593Smuzhiyun 	release_and_free_resource(chip->res_mc_indir);
696*4882a593Smuzhiyun 	chip->res_mc_indir = NULL;
697*4882a593Smuzhiyun #endif	/* OPTi93X */
698*4882a593Smuzhiyun 	release_and_free_resource(chip->res_mc_base);
699*4882a593Smuzhiyun 	chip->res_mc_base = NULL;
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun 	return -ENODEV;
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun 
snd_card_opti9xx_detect(struct snd_card * card,struct snd_opti9xx * chip)704*4882a593Smuzhiyun static int snd_card_opti9xx_detect(struct snd_card *card,
705*4882a593Smuzhiyun 				   struct snd_opti9xx *chip)
706*4882a593Smuzhiyun {
707*4882a593Smuzhiyun 	int i, err;
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun #ifndef OPTi93X
710*4882a593Smuzhiyun 	for (i = OPTi9XX_HW_82C928; i < OPTi9XX_HW_82C930; i++) {
711*4882a593Smuzhiyun #else
712*4882a593Smuzhiyun 	for (i = OPTi9XX_HW_82C931; i >= OPTi9XX_HW_82C930; i--) {
713*4882a593Smuzhiyun #endif
714*4882a593Smuzhiyun 		err = snd_opti9xx_init(chip, i);
715*4882a593Smuzhiyun 		if (err < 0)
716*4882a593Smuzhiyun 			return err;
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 		err = snd_opti9xx_read_check(chip);
719*4882a593Smuzhiyun 		if (err == 0)
720*4882a593Smuzhiyun 			return 1;
721*4882a593Smuzhiyun #ifdef OPTi93X
722*4882a593Smuzhiyun 		chip->mc_indir_index = 0;
723*4882a593Smuzhiyun #endif
724*4882a593Smuzhiyun 	}
725*4882a593Smuzhiyun 	return -ENODEV;
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun 
728*4882a593Smuzhiyun #ifdef CONFIG_PNP
729*4882a593Smuzhiyun static int snd_card_opti9xx_pnp(struct snd_opti9xx *chip,
730*4882a593Smuzhiyun 				struct pnp_card_link *card,
731*4882a593Smuzhiyun 				const struct pnp_card_device_id *pid)
732*4882a593Smuzhiyun {
733*4882a593Smuzhiyun 	struct pnp_dev *pdev;
734*4882a593Smuzhiyun 	int err;
735*4882a593Smuzhiyun 	struct pnp_dev *devmpu;
736*4882a593Smuzhiyun #ifndef OPTi93X
737*4882a593Smuzhiyun 	struct pnp_dev *devmc;
738*4882a593Smuzhiyun #endif
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun 	pdev = pnp_request_card_device(card, pid->devs[0].id, NULL);
741*4882a593Smuzhiyun 	if (pdev == NULL)
742*4882a593Smuzhiyun 		return -EBUSY;
743*4882a593Smuzhiyun 
744*4882a593Smuzhiyun 	err = pnp_activate_dev(pdev);
745*4882a593Smuzhiyun 	if (err < 0) {
746*4882a593Smuzhiyun 		snd_printk(KERN_ERR "AUDIO pnp configure failure: %d\n", err);
747*4882a593Smuzhiyun 		return err;
748*4882a593Smuzhiyun 	}
749*4882a593Smuzhiyun 
750*4882a593Smuzhiyun #ifdef OPTi93X
751*4882a593Smuzhiyun 	port = pnp_port_start(pdev, 0) - 4;
752*4882a593Smuzhiyun 	fm_port = pnp_port_start(pdev, 1) + 8;
753*4882a593Smuzhiyun 	/* adjust mc_indir_index - some cards report it at 0xe?d,
754*4882a593Smuzhiyun 	   other at 0xe?c but it really is always at 0xe?e */
755*4882a593Smuzhiyun 	chip->mc_indir_index = (pnp_port_start(pdev, 3) & ~0xf) | 0xe;
756*4882a593Smuzhiyun #else
757*4882a593Smuzhiyun 	devmc = pnp_request_card_device(card, pid->devs[2].id, NULL);
758*4882a593Smuzhiyun 	if (devmc == NULL)
759*4882a593Smuzhiyun 		return -EBUSY;
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 	err = pnp_activate_dev(devmc);
762*4882a593Smuzhiyun 	if (err < 0) {
763*4882a593Smuzhiyun 		snd_printk(KERN_ERR "MC pnp configure failure: %d\n", err);
764*4882a593Smuzhiyun 		return err;
765*4882a593Smuzhiyun 	}
766*4882a593Smuzhiyun 
767*4882a593Smuzhiyun 	port = pnp_port_start(pdev, 1);
768*4882a593Smuzhiyun 	fm_port = pnp_port_start(pdev, 2) + 8;
769*4882a593Smuzhiyun 	/*
770*4882a593Smuzhiyun 	 * The MC(0) is never accessed and card does not
771*4882a593Smuzhiyun 	 * include it in the PnP resource range. OPTI93x include it.
772*4882a593Smuzhiyun 	 */
773*4882a593Smuzhiyun 	chip->mc_base = pnp_port_start(devmc, 0) - 1;
774*4882a593Smuzhiyun 	chip->mc_base_size = pnp_port_len(devmc, 0) + 1;
775*4882a593Smuzhiyun #endif	/* OPTi93X */
776*4882a593Smuzhiyun 	irq = pnp_irq(pdev, 0);
777*4882a593Smuzhiyun 	dma1 = pnp_dma(pdev, 0);
778*4882a593Smuzhiyun #if defined(CS4231) || defined(OPTi93X)
779*4882a593Smuzhiyun 	dma2 = pnp_dma(pdev, 1);
780*4882a593Smuzhiyun #endif	/* CS4231 || OPTi93X */
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun 	devmpu = pnp_request_card_device(card, pid->devs[1].id, NULL);
783*4882a593Smuzhiyun 
784*4882a593Smuzhiyun 	if (devmpu && mpu_port > 0) {
785*4882a593Smuzhiyun 		err = pnp_activate_dev(devmpu);
786*4882a593Smuzhiyun 		if (err < 0) {
787*4882a593Smuzhiyun 			snd_printk(KERN_ERR "MPU401 pnp configure failure\n");
788*4882a593Smuzhiyun 			mpu_port = -1;
789*4882a593Smuzhiyun 		} else {
790*4882a593Smuzhiyun 			mpu_port = pnp_port_start(devmpu, 0);
791*4882a593Smuzhiyun 			mpu_irq = pnp_irq(devmpu, 0);
792*4882a593Smuzhiyun 		}
793*4882a593Smuzhiyun 	}
794*4882a593Smuzhiyun 	return pid->driver_data;
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun #endif	/* CONFIG_PNP */
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun static void snd_card_opti9xx_free(struct snd_card *card)
799*4882a593Smuzhiyun {
800*4882a593Smuzhiyun 	struct snd_opti9xx *chip = card->private_data;
801*4882a593Smuzhiyun 
802*4882a593Smuzhiyun 	if (chip) {
803*4882a593Smuzhiyun #ifdef OPTi93X
804*4882a593Smuzhiyun 		if (chip->irq > 0) {
805*4882a593Smuzhiyun 			disable_irq(chip->irq);
806*4882a593Smuzhiyun 			free_irq(chip->irq, chip);
807*4882a593Smuzhiyun 		}
808*4882a593Smuzhiyun 		release_and_free_resource(chip->res_mc_indir);
809*4882a593Smuzhiyun #endif
810*4882a593Smuzhiyun 		release_and_free_resource(chip->res_mc_base);
811*4882a593Smuzhiyun 	}
812*4882a593Smuzhiyun }
813*4882a593Smuzhiyun 
814*4882a593Smuzhiyun static int snd_opti9xx_probe(struct snd_card *card)
815*4882a593Smuzhiyun {
816*4882a593Smuzhiyun 	static const long possible_ports[] = {0x530, 0xe80, 0xf40, 0x604, -1};
817*4882a593Smuzhiyun 	int error;
818*4882a593Smuzhiyun 	int xdma2;
819*4882a593Smuzhiyun 	struct snd_opti9xx *chip = card->private_data;
820*4882a593Smuzhiyun 	struct snd_wss *codec;
821*4882a593Smuzhiyun 	struct snd_rawmidi *rmidi;
822*4882a593Smuzhiyun 	struct snd_hwdep *synth;
823*4882a593Smuzhiyun 
824*4882a593Smuzhiyun #if defined(CS4231) || defined(OPTi93X)
825*4882a593Smuzhiyun 	xdma2 = dma2;
826*4882a593Smuzhiyun #else
827*4882a593Smuzhiyun 	xdma2 = -1;
828*4882a593Smuzhiyun #endif
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun 	if (port == SNDRV_AUTO_PORT) {
831*4882a593Smuzhiyun 		port = snd_legacy_find_free_ioport(possible_ports, 4);
832*4882a593Smuzhiyun 		if (port < 0) {
833*4882a593Smuzhiyun 			snd_printk(KERN_ERR "unable to find a free WSS port\n");
834*4882a593Smuzhiyun 			return -EBUSY;
835*4882a593Smuzhiyun 		}
836*4882a593Smuzhiyun 	}
837*4882a593Smuzhiyun 	error = snd_opti9xx_configure(chip, port, irq, dma1, xdma2,
838*4882a593Smuzhiyun 				      mpu_port, mpu_irq);
839*4882a593Smuzhiyun 	if (error)
840*4882a593Smuzhiyun 		return error;
841*4882a593Smuzhiyun 
842*4882a593Smuzhiyun 	error = snd_wss_create(card, chip->wss_base + 4, -1, irq, dma1, xdma2,
843*4882a593Smuzhiyun #ifdef OPTi93X
844*4882a593Smuzhiyun 			       WSS_HW_OPTI93X, WSS_HWSHARE_IRQ,
845*4882a593Smuzhiyun #else
846*4882a593Smuzhiyun 			       WSS_HW_DETECT, 0,
847*4882a593Smuzhiyun #endif
848*4882a593Smuzhiyun 			       &codec);
849*4882a593Smuzhiyun 	if (error < 0)
850*4882a593Smuzhiyun 		return error;
851*4882a593Smuzhiyun 	chip->codec = codec;
852*4882a593Smuzhiyun 	error = snd_wss_pcm(codec, 0);
853*4882a593Smuzhiyun 	if (error < 0)
854*4882a593Smuzhiyun 		return error;
855*4882a593Smuzhiyun 	error = snd_wss_mixer(codec);
856*4882a593Smuzhiyun 	if (error < 0)
857*4882a593Smuzhiyun 		return error;
858*4882a593Smuzhiyun #ifdef OPTi93X
859*4882a593Smuzhiyun 	error = snd_opti93x_mixer(codec);
860*4882a593Smuzhiyun 	if (error < 0)
861*4882a593Smuzhiyun 		return error;
862*4882a593Smuzhiyun #endif
863*4882a593Smuzhiyun #ifdef CS4231
864*4882a593Smuzhiyun 	error = snd_wss_timer(codec, 0);
865*4882a593Smuzhiyun 	if (error < 0)
866*4882a593Smuzhiyun 		return error;
867*4882a593Smuzhiyun #endif
868*4882a593Smuzhiyun #ifdef OPTi93X
869*4882a593Smuzhiyun 	error = request_irq(irq, snd_opti93x_interrupt,
870*4882a593Smuzhiyun 			    0, DEV_NAME" - WSS", chip);
871*4882a593Smuzhiyun 	if (error < 0) {
872*4882a593Smuzhiyun 		snd_printk(KERN_ERR "opti9xx: can't grab IRQ %d\n", irq);
873*4882a593Smuzhiyun 		return error;
874*4882a593Smuzhiyun 	}
875*4882a593Smuzhiyun #endif
876*4882a593Smuzhiyun 	chip->irq = irq;
877*4882a593Smuzhiyun 	card->sync_irq = chip->irq;
878*4882a593Smuzhiyun 	strcpy(card->driver, chip->name);
879*4882a593Smuzhiyun 	sprintf(card->shortname, "OPTi %s", card->driver);
880*4882a593Smuzhiyun #if defined(CS4231) || defined(OPTi93X)
881*4882a593Smuzhiyun 	snprintf(card->longname, sizeof(card->longname),
882*4882a593Smuzhiyun 		 "%s, %s at 0x%lx, irq %d, dma %d&%d",
883*4882a593Smuzhiyun 		 card->shortname, codec->pcm->name,
884*4882a593Smuzhiyun 		 chip->wss_base + 4, irq, dma1, xdma2);
885*4882a593Smuzhiyun #else
886*4882a593Smuzhiyun 	snprintf(card->longname, sizeof(card->longname),
887*4882a593Smuzhiyun 		 "%s, %s at 0x%lx, irq %d, dma %d",
888*4882a593Smuzhiyun 		 card->shortname, codec->pcm->name, chip->wss_base + 4, irq,
889*4882a593Smuzhiyun 		 dma1);
890*4882a593Smuzhiyun #endif	/* CS4231 || OPTi93X */
891*4882a593Smuzhiyun 
892*4882a593Smuzhiyun 	if (mpu_port <= 0 || mpu_port == SNDRV_AUTO_PORT)
893*4882a593Smuzhiyun 		rmidi = NULL;
894*4882a593Smuzhiyun 	else {
895*4882a593Smuzhiyun 		error = snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
896*4882a593Smuzhiyun 				mpu_port, 0, mpu_irq, &rmidi);
897*4882a593Smuzhiyun 		if (error)
898*4882a593Smuzhiyun 			snd_printk(KERN_WARNING "no MPU-401 device at 0x%lx?\n",
899*4882a593Smuzhiyun 				   mpu_port);
900*4882a593Smuzhiyun 	}
901*4882a593Smuzhiyun 
902*4882a593Smuzhiyun 	if (fm_port > 0 && fm_port != SNDRV_AUTO_PORT) {
903*4882a593Smuzhiyun 		struct snd_opl3 *opl3 = NULL;
904*4882a593Smuzhiyun #ifndef OPTi93X
905*4882a593Smuzhiyun 		if (chip->hardware == OPTi9XX_HW_82C928 ||
906*4882a593Smuzhiyun 		    chip->hardware == OPTi9XX_HW_82C929 ||
907*4882a593Smuzhiyun 		    chip->hardware == OPTi9XX_HW_82C924) {
908*4882a593Smuzhiyun 			struct snd_opl4 *opl4;
909*4882a593Smuzhiyun 			/* assume we have an OPL4 */
910*4882a593Smuzhiyun 			snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(2),
911*4882a593Smuzhiyun 					       0x20, 0x20);
912*4882a593Smuzhiyun 			if (snd_opl4_create(card, fm_port, fm_port - 8,
913*4882a593Smuzhiyun 					    2, &opl3, &opl4) < 0) {
914*4882a593Smuzhiyun 				/* no luck, use OPL3 instead */
915*4882a593Smuzhiyun 				snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(2),
916*4882a593Smuzhiyun 						       0x00, 0x20);
917*4882a593Smuzhiyun 			}
918*4882a593Smuzhiyun 		}
919*4882a593Smuzhiyun #endif	/* !OPTi93X */
920*4882a593Smuzhiyun 		if (!opl3 && snd_opl3_create(card, fm_port, fm_port + 2,
921*4882a593Smuzhiyun 					     OPL3_HW_AUTO, 0, &opl3) < 0) {
922*4882a593Smuzhiyun 			snd_printk(KERN_WARNING "no OPL device at 0x%lx-0x%lx\n",
923*4882a593Smuzhiyun 				   fm_port, fm_port + 4 - 1);
924*4882a593Smuzhiyun 		}
925*4882a593Smuzhiyun 		if (opl3) {
926*4882a593Smuzhiyun 			error = snd_opl3_hwdep_new(opl3, 0, 1, &synth);
927*4882a593Smuzhiyun 			if (error < 0)
928*4882a593Smuzhiyun 				return error;
929*4882a593Smuzhiyun 		}
930*4882a593Smuzhiyun 	}
931*4882a593Smuzhiyun 
932*4882a593Smuzhiyun 	return snd_card_register(card);
933*4882a593Smuzhiyun }
934*4882a593Smuzhiyun 
935*4882a593Smuzhiyun static int snd_opti9xx_card_new(struct device *pdev, struct snd_card **cardp)
936*4882a593Smuzhiyun {
937*4882a593Smuzhiyun 	struct snd_card *card;
938*4882a593Smuzhiyun 	int err;
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun 	err = snd_card_new(pdev, index, id, THIS_MODULE,
941*4882a593Smuzhiyun 			   sizeof(struct snd_opti9xx), &card);
942*4882a593Smuzhiyun 	if (err < 0)
943*4882a593Smuzhiyun 		return err;
944*4882a593Smuzhiyun 	card->private_free = snd_card_opti9xx_free;
945*4882a593Smuzhiyun 	*cardp = card;
946*4882a593Smuzhiyun 	return 0;
947*4882a593Smuzhiyun }
948*4882a593Smuzhiyun 
949*4882a593Smuzhiyun static int snd_opti9xx_isa_match(struct device *devptr,
950*4882a593Smuzhiyun 				 unsigned int dev)
951*4882a593Smuzhiyun {
952*4882a593Smuzhiyun #ifdef CONFIG_PNP
953*4882a593Smuzhiyun 	if (snd_opti9xx_pnp_is_probed)
954*4882a593Smuzhiyun 		return 0;
955*4882a593Smuzhiyun 	if (isapnp)
956*4882a593Smuzhiyun 		return 0;
957*4882a593Smuzhiyun #endif
958*4882a593Smuzhiyun 	return 1;
959*4882a593Smuzhiyun }
960*4882a593Smuzhiyun 
961*4882a593Smuzhiyun static int snd_opti9xx_isa_probe(struct device *devptr,
962*4882a593Smuzhiyun 				 unsigned int dev)
963*4882a593Smuzhiyun {
964*4882a593Smuzhiyun 	struct snd_card *card;
965*4882a593Smuzhiyun 	int error;
966*4882a593Smuzhiyun 	static const long possible_mpu_ports[] = {0x300, 0x310, 0x320, 0x330, -1};
967*4882a593Smuzhiyun #ifdef OPTi93X
968*4882a593Smuzhiyun 	static const int possible_irqs[] = {5, 9, 10, 11, 7, -1};
969*4882a593Smuzhiyun #else
970*4882a593Smuzhiyun 	static const int possible_irqs[] = {9, 10, 11, 7, -1};
971*4882a593Smuzhiyun #endif	/* OPTi93X */
972*4882a593Smuzhiyun 	static const int possible_mpu_irqs[] = {5, 9, 10, 7, -1};
973*4882a593Smuzhiyun 	static const int possible_dma1s[] = {3, 1, 0, -1};
974*4882a593Smuzhiyun #if defined(CS4231) || defined(OPTi93X)
975*4882a593Smuzhiyun 	static const int possible_dma2s[][2] = {{1,-1}, {0,-1}, {-1,-1}, {0,-1}};
976*4882a593Smuzhiyun #endif	/* CS4231 || OPTi93X */
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun 	if (mpu_port == SNDRV_AUTO_PORT) {
979*4882a593Smuzhiyun 		if ((mpu_port = snd_legacy_find_free_ioport(possible_mpu_ports, 2)) < 0) {
980*4882a593Smuzhiyun 			snd_printk(KERN_ERR "unable to find a free MPU401 port\n");
981*4882a593Smuzhiyun 			return -EBUSY;
982*4882a593Smuzhiyun 		}
983*4882a593Smuzhiyun 	}
984*4882a593Smuzhiyun 	if (irq == SNDRV_AUTO_IRQ) {
985*4882a593Smuzhiyun 		if ((irq = snd_legacy_find_free_irq(possible_irqs)) < 0) {
986*4882a593Smuzhiyun 			snd_printk(KERN_ERR "unable to find a free IRQ\n");
987*4882a593Smuzhiyun 			return -EBUSY;
988*4882a593Smuzhiyun 		}
989*4882a593Smuzhiyun 	}
990*4882a593Smuzhiyun 	if (mpu_irq == SNDRV_AUTO_IRQ) {
991*4882a593Smuzhiyun 		if ((mpu_irq = snd_legacy_find_free_irq(possible_mpu_irqs)) < 0) {
992*4882a593Smuzhiyun 			snd_printk(KERN_ERR "unable to find a free MPU401 IRQ\n");
993*4882a593Smuzhiyun 			return -EBUSY;
994*4882a593Smuzhiyun 		}
995*4882a593Smuzhiyun 	}
996*4882a593Smuzhiyun 	if (dma1 == SNDRV_AUTO_DMA) {
997*4882a593Smuzhiyun 		if ((dma1 = snd_legacy_find_free_dma(possible_dma1s)) < 0) {
998*4882a593Smuzhiyun 			snd_printk(KERN_ERR "unable to find a free DMA1\n");
999*4882a593Smuzhiyun 			return -EBUSY;
1000*4882a593Smuzhiyun 		}
1001*4882a593Smuzhiyun 	}
1002*4882a593Smuzhiyun #if defined(CS4231) || defined(OPTi93X)
1003*4882a593Smuzhiyun 	if (dma2 == SNDRV_AUTO_DMA) {
1004*4882a593Smuzhiyun 		if ((dma2 = snd_legacy_find_free_dma(possible_dma2s[dma1 % 4])) < 0) {
1005*4882a593Smuzhiyun 			snd_printk(KERN_ERR "unable to find a free DMA2\n");
1006*4882a593Smuzhiyun 			return -EBUSY;
1007*4882a593Smuzhiyun 		}
1008*4882a593Smuzhiyun 	}
1009*4882a593Smuzhiyun #endif
1010*4882a593Smuzhiyun 
1011*4882a593Smuzhiyun 	error = snd_opti9xx_card_new(devptr, &card);
1012*4882a593Smuzhiyun 	if (error < 0)
1013*4882a593Smuzhiyun 		return error;
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun 	if ((error = snd_card_opti9xx_detect(card, card->private_data)) < 0) {
1016*4882a593Smuzhiyun 		snd_card_free(card);
1017*4882a593Smuzhiyun 		return error;
1018*4882a593Smuzhiyun 	}
1019*4882a593Smuzhiyun 	if ((error = snd_opti9xx_probe(card)) < 0) {
1020*4882a593Smuzhiyun 		snd_card_free(card);
1021*4882a593Smuzhiyun 		return error;
1022*4882a593Smuzhiyun 	}
1023*4882a593Smuzhiyun 	dev_set_drvdata(devptr, card);
1024*4882a593Smuzhiyun 	return 0;
1025*4882a593Smuzhiyun }
1026*4882a593Smuzhiyun 
1027*4882a593Smuzhiyun static int snd_opti9xx_isa_remove(struct device *devptr,
1028*4882a593Smuzhiyun 				  unsigned int dev)
1029*4882a593Smuzhiyun {
1030*4882a593Smuzhiyun 	snd_card_free(dev_get_drvdata(devptr));
1031*4882a593Smuzhiyun 	return 0;
1032*4882a593Smuzhiyun }
1033*4882a593Smuzhiyun 
1034*4882a593Smuzhiyun #ifdef CONFIG_PM
1035*4882a593Smuzhiyun static int snd_opti9xx_suspend(struct snd_card *card)
1036*4882a593Smuzhiyun {
1037*4882a593Smuzhiyun 	struct snd_opti9xx *chip = card->private_data;
1038*4882a593Smuzhiyun 
1039*4882a593Smuzhiyun 	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1040*4882a593Smuzhiyun 	chip->codec->suspend(chip->codec);
1041*4882a593Smuzhiyun 	return 0;
1042*4882a593Smuzhiyun }
1043*4882a593Smuzhiyun 
1044*4882a593Smuzhiyun static int snd_opti9xx_resume(struct snd_card *card)
1045*4882a593Smuzhiyun {
1046*4882a593Smuzhiyun 	struct snd_opti9xx *chip = card->private_data;
1047*4882a593Smuzhiyun 	int error, xdma2;
1048*4882a593Smuzhiyun #if defined(CS4231) || defined(OPTi93X)
1049*4882a593Smuzhiyun 	xdma2 = dma2;
1050*4882a593Smuzhiyun #else
1051*4882a593Smuzhiyun 	xdma2 = -1;
1052*4882a593Smuzhiyun #endif
1053*4882a593Smuzhiyun 
1054*4882a593Smuzhiyun 	error = snd_opti9xx_configure(chip, port, irq, dma1, xdma2,
1055*4882a593Smuzhiyun 				      mpu_port, mpu_irq);
1056*4882a593Smuzhiyun 	if (error)
1057*4882a593Smuzhiyun 		return error;
1058*4882a593Smuzhiyun 	chip->codec->resume(chip->codec);
1059*4882a593Smuzhiyun 	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1060*4882a593Smuzhiyun 	return 0;
1061*4882a593Smuzhiyun }
1062*4882a593Smuzhiyun 
1063*4882a593Smuzhiyun static int snd_opti9xx_isa_suspend(struct device *dev, unsigned int n,
1064*4882a593Smuzhiyun 				   pm_message_t state)
1065*4882a593Smuzhiyun {
1066*4882a593Smuzhiyun 	return snd_opti9xx_suspend(dev_get_drvdata(dev));
1067*4882a593Smuzhiyun }
1068*4882a593Smuzhiyun 
1069*4882a593Smuzhiyun static int snd_opti9xx_isa_resume(struct device *dev, unsigned int n)
1070*4882a593Smuzhiyun {
1071*4882a593Smuzhiyun 	return snd_opti9xx_resume(dev_get_drvdata(dev));
1072*4882a593Smuzhiyun }
1073*4882a593Smuzhiyun #endif
1074*4882a593Smuzhiyun 
1075*4882a593Smuzhiyun static struct isa_driver snd_opti9xx_driver = {
1076*4882a593Smuzhiyun 	.match		= snd_opti9xx_isa_match,
1077*4882a593Smuzhiyun 	.probe		= snd_opti9xx_isa_probe,
1078*4882a593Smuzhiyun 	.remove		= snd_opti9xx_isa_remove,
1079*4882a593Smuzhiyun #ifdef CONFIG_PM
1080*4882a593Smuzhiyun 	.suspend	= snd_opti9xx_isa_suspend,
1081*4882a593Smuzhiyun 	.resume		= snd_opti9xx_isa_resume,
1082*4882a593Smuzhiyun #endif
1083*4882a593Smuzhiyun 	.driver		= {
1084*4882a593Smuzhiyun 		.name	= DEV_NAME
1085*4882a593Smuzhiyun 	},
1086*4882a593Smuzhiyun };
1087*4882a593Smuzhiyun 
1088*4882a593Smuzhiyun #ifdef CONFIG_PNP
1089*4882a593Smuzhiyun static int snd_opti9xx_pnp_probe(struct pnp_card_link *pcard,
1090*4882a593Smuzhiyun 				 const struct pnp_card_device_id *pid)
1091*4882a593Smuzhiyun {
1092*4882a593Smuzhiyun 	struct snd_card *card;
1093*4882a593Smuzhiyun 	int error, hw;
1094*4882a593Smuzhiyun 	struct snd_opti9xx *chip;
1095*4882a593Smuzhiyun 
1096*4882a593Smuzhiyun 	if (snd_opti9xx_pnp_is_probed)
1097*4882a593Smuzhiyun 		return -EBUSY;
1098*4882a593Smuzhiyun 	if (! isapnp)
1099*4882a593Smuzhiyun 		return -ENODEV;
1100*4882a593Smuzhiyun 	error = snd_opti9xx_card_new(&pcard->card->dev, &card);
1101*4882a593Smuzhiyun 	if (error < 0)
1102*4882a593Smuzhiyun 		return error;
1103*4882a593Smuzhiyun 	chip = card->private_data;
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun 	hw = snd_card_opti9xx_pnp(chip, pcard, pid);
1106*4882a593Smuzhiyun 	switch (hw) {
1107*4882a593Smuzhiyun 	case 0x0924:
1108*4882a593Smuzhiyun 		hw = OPTi9XX_HW_82C924;
1109*4882a593Smuzhiyun 		break;
1110*4882a593Smuzhiyun 	case 0x0925:
1111*4882a593Smuzhiyun 		hw = OPTi9XX_HW_82C925;
1112*4882a593Smuzhiyun 		break;
1113*4882a593Smuzhiyun 	case 0x0931:
1114*4882a593Smuzhiyun 		hw = OPTi9XX_HW_82C931;
1115*4882a593Smuzhiyun 		break;
1116*4882a593Smuzhiyun 	default:
1117*4882a593Smuzhiyun 		snd_card_free(card);
1118*4882a593Smuzhiyun 		return -ENODEV;
1119*4882a593Smuzhiyun 	}
1120*4882a593Smuzhiyun 
1121*4882a593Smuzhiyun 	if ((error = snd_opti9xx_init(chip, hw))) {
1122*4882a593Smuzhiyun 		snd_card_free(card);
1123*4882a593Smuzhiyun 		return error;
1124*4882a593Smuzhiyun 	}
1125*4882a593Smuzhiyun 	error = snd_opti9xx_read_check(chip);
1126*4882a593Smuzhiyun 	if (error) {
1127*4882a593Smuzhiyun 		snd_printk(KERN_ERR "OPTI chip not found\n");
1128*4882a593Smuzhiyun 		snd_card_free(card);
1129*4882a593Smuzhiyun 		return error;
1130*4882a593Smuzhiyun 	}
1131*4882a593Smuzhiyun 	if ((error = snd_opti9xx_probe(card)) < 0) {
1132*4882a593Smuzhiyun 		snd_card_free(card);
1133*4882a593Smuzhiyun 		return error;
1134*4882a593Smuzhiyun 	}
1135*4882a593Smuzhiyun 	pnp_set_card_drvdata(pcard, card);
1136*4882a593Smuzhiyun 	snd_opti9xx_pnp_is_probed = 1;
1137*4882a593Smuzhiyun 	return 0;
1138*4882a593Smuzhiyun }
1139*4882a593Smuzhiyun 
1140*4882a593Smuzhiyun static void snd_opti9xx_pnp_remove(struct pnp_card_link *pcard)
1141*4882a593Smuzhiyun {
1142*4882a593Smuzhiyun 	snd_card_free(pnp_get_card_drvdata(pcard));
1143*4882a593Smuzhiyun 	pnp_set_card_drvdata(pcard, NULL);
1144*4882a593Smuzhiyun 	snd_opti9xx_pnp_is_probed = 0;
1145*4882a593Smuzhiyun }
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun #ifdef CONFIG_PM
1148*4882a593Smuzhiyun static int snd_opti9xx_pnp_suspend(struct pnp_card_link *pcard,
1149*4882a593Smuzhiyun 				   pm_message_t state)
1150*4882a593Smuzhiyun {
1151*4882a593Smuzhiyun 	return snd_opti9xx_suspend(pnp_get_card_drvdata(pcard));
1152*4882a593Smuzhiyun }
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun static int snd_opti9xx_pnp_resume(struct pnp_card_link *pcard)
1155*4882a593Smuzhiyun {
1156*4882a593Smuzhiyun 	return snd_opti9xx_resume(pnp_get_card_drvdata(pcard));
1157*4882a593Smuzhiyun }
1158*4882a593Smuzhiyun #endif
1159*4882a593Smuzhiyun 
1160*4882a593Smuzhiyun static struct pnp_card_driver opti9xx_pnpc_driver = {
1161*4882a593Smuzhiyun 	.flags		= PNP_DRIVER_RES_DISABLE,
1162*4882a593Smuzhiyun 	.name		= DEV_NAME,
1163*4882a593Smuzhiyun 	.id_table	= snd_opti9xx_pnpids,
1164*4882a593Smuzhiyun 	.probe		= snd_opti9xx_pnp_probe,
1165*4882a593Smuzhiyun 	.remove		= snd_opti9xx_pnp_remove,
1166*4882a593Smuzhiyun #ifdef CONFIG_PM
1167*4882a593Smuzhiyun 	.suspend	= snd_opti9xx_pnp_suspend,
1168*4882a593Smuzhiyun 	.resume		= snd_opti9xx_pnp_resume,
1169*4882a593Smuzhiyun #endif
1170*4882a593Smuzhiyun };
1171*4882a593Smuzhiyun #endif
1172*4882a593Smuzhiyun 
1173*4882a593Smuzhiyun #ifdef OPTi93X
1174*4882a593Smuzhiyun #define CHIP_NAME	"82C93x"
1175*4882a593Smuzhiyun #else
1176*4882a593Smuzhiyun #define CHIP_NAME	"82C92x"
1177*4882a593Smuzhiyun #endif
1178*4882a593Smuzhiyun 
1179*4882a593Smuzhiyun static int __init alsa_card_opti9xx_init(void)
1180*4882a593Smuzhiyun {
1181*4882a593Smuzhiyun #ifdef CONFIG_PNP
1182*4882a593Smuzhiyun 	pnp_register_card_driver(&opti9xx_pnpc_driver);
1183*4882a593Smuzhiyun 	if (snd_opti9xx_pnp_is_probed)
1184*4882a593Smuzhiyun 		return 0;
1185*4882a593Smuzhiyun 	pnp_unregister_card_driver(&opti9xx_pnpc_driver);
1186*4882a593Smuzhiyun #endif
1187*4882a593Smuzhiyun 	return isa_register_driver(&snd_opti9xx_driver, 1);
1188*4882a593Smuzhiyun }
1189*4882a593Smuzhiyun 
1190*4882a593Smuzhiyun static void __exit alsa_card_opti9xx_exit(void)
1191*4882a593Smuzhiyun {
1192*4882a593Smuzhiyun 	if (!snd_opti9xx_pnp_is_probed) {
1193*4882a593Smuzhiyun 		isa_unregister_driver(&snd_opti9xx_driver);
1194*4882a593Smuzhiyun 		return;
1195*4882a593Smuzhiyun 	}
1196*4882a593Smuzhiyun #ifdef CONFIG_PNP
1197*4882a593Smuzhiyun 	pnp_unregister_card_driver(&opti9xx_pnpc_driver);
1198*4882a593Smuzhiyun #endif
1199*4882a593Smuzhiyun }
1200*4882a593Smuzhiyun 
1201*4882a593Smuzhiyun module_init(alsa_card_opti9xx_init)
1202*4882a593Smuzhiyun module_exit(alsa_card_opti9xx_exit)
1203