1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for Yamaha OPL3-SA[2,3] soundcards
4*4882a593Smuzhiyun * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/init.h>
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/isa.h>
10*4882a593Smuzhiyun #include <linux/interrupt.h>
11*4882a593Smuzhiyun #include <linux/pm.h>
12*4882a593Smuzhiyun #include <linux/pnp.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/io.h>
15*4882a593Smuzhiyun #include <sound/core.h>
16*4882a593Smuzhiyun #include <sound/wss.h>
17*4882a593Smuzhiyun #include <sound/mpu401.h>
18*4882a593Smuzhiyun #include <sound/opl3.h>
19*4882a593Smuzhiyun #include <sound/initval.h>
20*4882a593Smuzhiyun #include <sound/tlv.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
23*4882a593Smuzhiyun MODULE_DESCRIPTION("Yamaha OPL3SA2+");
24*4882a593Smuzhiyun MODULE_LICENSE("GPL");
25*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("{{Yamaha,YMF719E-S},"
26*4882a593Smuzhiyun "{Genius,Sound Maker 3DX},"
27*4882a593Smuzhiyun "{Yamaha,OPL3SA3},"
28*4882a593Smuzhiyun "{Intel,AL440LX sound},"
29*4882a593Smuzhiyun "{NeoMagic,MagicWave 3DX}}");
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
32*4882a593Smuzhiyun static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
33*4882a593Smuzhiyun static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_ISAPNP; /* Enable this card */
34*4882a593Smuzhiyun #ifdef CONFIG_PNP
35*4882a593Smuzhiyun static bool isapnp[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
36*4882a593Smuzhiyun #endif
37*4882a593Smuzhiyun static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0xf86,0x370,0x100 */
38*4882a593Smuzhiyun static long sb_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */
39*4882a593Smuzhiyun static long wss_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT;/* 0x530,0xe80,0xf40,0x604 */
40*4882a593Smuzhiyun static long fm_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x388 */
41*4882a593Smuzhiyun static long midi_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT;/* 0x330,0x300 */
42*4882a593Smuzhiyun static int irq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ; /* 0,1,3,5,9,11,12,15 */
43*4882a593Smuzhiyun static int dma1[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 1,3,5,6,7 */
44*4882a593Smuzhiyun static int dma2[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 1,3,5,6,7 */
45*4882a593Smuzhiyun static int opl3sa3_ymode[SNDRV_CARDS]; /* 0,1,2,3 */ /*SL Added*/
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun module_param_array(index, int, NULL, 0444);
48*4882a593Smuzhiyun MODULE_PARM_DESC(index, "Index value for OPL3-SA soundcard.");
49*4882a593Smuzhiyun module_param_array(id, charp, NULL, 0444);
50*4882a593Smuzhiyun MODULE_PARM_DESC(id, "ID string for OPL3-SA soundcard.");
51*4882a593Smuzhiyun module_param_array(enable, bool, NULL, 0444);
52*4882a593Smuzhiyun MODULE_PARM_DESC(enable, "Enable OPL3-SA soundcard.");
53*4882a593Smuzhiyun #ifdef CONFIG_PNP
54*4882a593Smuzhiyun module_param_array(isapnp, bool, NULL, 0444);
55*4882a593Smuzhiyun MODULE_PARM_DESC(isapnp, "PnP detection for specified soundcard.");
56*4882a593Smuzhiyun #endif
57*4882a593Smuzhiyun module_param_hw_array(port, long, ioport, NULL, 0444);
58*4882a593Smuzhiyun MODULE_PARM_DESC(port, "Port # for OPL3-SA driver.");
59*4882a593Smuzhiyun module_param_hw_array(sb_port, long, ioport, NULL, 0444);
60*4882a593Smuzhiyun MODULE_PARM_DESC(sb_port, "SB port # for OPL3-SA driver.");
61*4882a593Smuzhiyun module_param_hw_array(wss_port, long, ioport, NULL, 0444);
62*4882a593Smuzhiyun MODULE_PARM_DESC(wss_port, "WSS port # for OPL3-SA driver.");
63*4882a593Smuzhiyun module_param_hw_array(fm_port, long, ioport, NULL, 0444);
64*4882a593Smuzhiyun MODULE_PARM_DESC(fm_port, "FM port # for OPL3-SA driver.");
65*4882a593Smuzhiyun module_param_hw_array(midi_port, long, ioport, NULL, 0444);
66*4882a593Smuzhiyun MODULE_PARM_DESC(midi_port, "MIDI port # for OPL3-SA driver.");
67*4882a593Smuzhiyun module_param_hw_array(irq, int, irq, NULL, 0444);
68*4882a593Smuzhiyun MODULE_PARM_DESC(irq, "IRQ # for OPL3-SA driver.");
69*4882a593Smuzhiyun module_param_hw_array(dma1, int, dma, NULL, 0444);
70*4882a593Smuzhiyun MODULE_PARM_DESC(dma1, "DMA1 # for OPL3-SA driver.");
71*4882a593Smuzhiyun module_param_hw_array(dma2, int, dma, NULL, 0444);
72*4882a593Smuzhiyun MODULE_PARM_DESC(dma2, "DMA2 # for OPL3-SA driver.");
73*4882a593Smuzhiyun module_param_array(opl3sa3_ymode, int, NULL, 0444);
74*4882a593Smuzhiyun MODULE_PARM_DESC(opl3sa3_ymode, "Speaker size selection for 3D Enhancement mode: Desktop/Large Notebook/Small Notebook/HiFi.");
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun #ifdef CONFIG_PNP
77*4882a593Smuzhiyun static int isa_registered;
78*4882a593Smuzhiyun static int pnp_registered;
79*4882a593Smuzhiyun static int pnpc_registered;
80*4882a593Smuzhiyun #endif
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /* control ports */
83*4882a593Smuzhiyun #define OPL3SA2_PM_CTRL 0x01
84*4882a593Smuzhiyun #define OPL3SA2_SYS_CTRL 0x02
85*4882a593Smuzhiyun #define OPL3SA2_IRQ_CONFIG 0x03
86*4882a593Smuzhiyun #define OPL3SA2_IRQ_STATUS 0x04
87*4882a593Smuzhiyun #define OPL3SA2_DMA_CONFIG 0x06
88*4882a593Smuzhiyun #define OPL3SA2_MASTER_LEFT 0x07
89*4882a593Smuzhiyun #define OPL3SA2_MASTER_RIGHT 0x08
90*4882a593Smuzhiyun #define OPL3SA2_MIC 0x09
91*4882a593Smuzhiyun #define OPL3SA2_MISC 0x0A
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun /* opl3sa3 only */
94*4882a593Smuzhiyun #define OPL3SA3_DGTL_DOWN 0x12
95*4882a593Smuzhiyun #define OPL3SA3_ANLG_DOWN 0x13
96*4882a593Smuzhiyun #define OPL3SA3_WIDE 0x14
97*4882a593Smuzhiyun #define OPL3SA3_BASS 0x15
98*4882a593Smuzhiyun #define OPL3SA3_TREBLE 0x16
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /* power management bits */
101*4882a593Smuzhiyun #define OPL3SA2_PM_ADOWN 0x20
102*4882a593Smuzhiyun #define OPL3SA2_PM_PSV 0x04
103*4882a593Smuzhiyun #define OPL3SA2_PM_PDN 0x02
104*4882a593Smuzhiyun #define OPL3SA2_PM_PDX 0x01
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun #define OPL3SA2_PM_D0 0x00
107*4882a593Smuzhiyun #define OPL3SA2_PM_D3 (OPL3SA2_PM_ADOWN|OPL3SA2_PM_PSV|OPL3SA2_PM_PDN|OPL3SA2_PM_PDX)
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun struct snd_opl3sa2 {
110*4882a593Smuzhiyun int version; /* 2 or 3 */
111*4882a593Smuzhiyun unsigned long port; /* control port */
112*4882a593Smuzhiyun struct resource *res_port; /* control port resource */
113*4882a593Smuzhiyun int irq;
114*4882a593Smuzhiyun int single_dma;
115*4882a593Smuzhiyun spinlock_t reg_lock;
116*4882a593Smuzhiyun struct snd_hwdep *synth;
117*4882a593Smuzhiyun struct snd_rawmidi *rmidi;
118*4882a593Smuzhiyun struct snd_wss *wss;
119*4882a593Smuzhiyun unsigned char ctlregs[0x20];
120*4882a593Smuzhiyun int ymode; /* SL added */
121*4882a593Smuzhiyun struct snd_kcontrol *master_switch;
122*4882a593Smuzhiyun struct snd_kcontrol *master_volume;
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun #define PFX "opl3sa2: "
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun #ifdef CONFIG_PNP
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun static const struct pnp_device_id snd_opl3sa2_pnpbiosids[] = {
130*4882a593Smuzhiyun { .id = "YMH0021" },
131*4882a593Smuzhiyun { .id = "NMX2210" }, /* Gateway Solo 2500 */
132*4882a593Smuzhiyun { .id = "" } /* end */
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pnp, snd_opl3sa2_pnpbiosids);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun static const struct pnp_card_device_id snd_opl3sa2_pnpids[] = {
138*4882a593Smuzhiyun /* Yamaha YMF719E-S (Genius Sound Maker 3DX) */
139*4882a593Smuzhiyun { .id = "YMH0020", .devs = { { "YMH0021" } } },
140*4882a593Smuzhiyun /* Yamaha OPL3-SA3 (integrated on Intel's Pentium II AL440LX motherboard) */
141*4882a593Smuzhiyun { .id = "YMH0030", .devs = { { "YMH0021" } } },
142*4882a593Smuzhiyun /* Yamaha OPL3-SA2 */
143*4882a593Smuzhiyun { .id = "YMH0800", .devs = { { "YMH0021" } } },
144*4882a593Smuzhiyun /* Yamaha OPL3-SA2 */
145*4882a593Smuzhiyun { .id = "YMH0801", .devs = { { "YMH0021" } } },
146*4882a593Smuzhiyun /* NeoMagic MagicWave 3DX */
147*4882a593Smuzhiyun { .id = "NMX2200", .devs = { { "YMH2210" } } },
148*4882a593Smuzhiyun /* NeoMagic MagicWave 3D */
149*4882a593Smuzhiyun { .id = "NMX2200", .devs = { { "NMX2210" } } },
150*4882a593Smuzhiyun /* --- */
151*4882a593Smuzhiyun { .id = "" } /* end */
152*4882a593Smuzhiyun };
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pnp_card, snd_opl3sa2_pnpids);
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun #endif /* CONFIG_PNP */
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun /* read control port (w/o spinlock) */
__snd_opl3sa2_read(struct snd_opl3sa2 * chip,unsigned char reg)160*4882a593Smuzhiyun static unsigned char __snd_opl3sa2_read(struct snd_opl3sa2 *chip, unsigned char reg)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun unsigned char result;
163*4882a593Smuzhiyun #if 0
164*4882a593Smuzhiyun outb(0x1d, port); /* password */
165*4882a593Smuzhiyun printk(KERN_DEBUG "read [0x%lx] = 0x%x\n", port, inb(port));
166*4882a593Smuzhiyun #endif
167*4882a593Smuzhiyun outb(reg, chip->port); /* register */
168*4882a593Smuzhiyun result = inb(chip->port + 1);
169*4882a593Smuzhiyun #if 0
170*4882a593Smuzhiyun printk(KERN_DEBUG "read [0x%lx] = 0x%x [0x%x]\n",
171*4882a593Smuzhiyun port, result, inb(port));
172*4882a593Smuzhiyun #endif
173*4882a593Smuzhiyun return result;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun /* read control port (with spinlock) */
snd_opl3sa2_read(struct snd_opl3sa2 * chip,unsigned char reg)177*4882a593Smuzhiyun static unsigned char snd_opl3sa2_read(struct snd_opl3sa2 *chip, unsigned char reg)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun unsigned long flags;
180*4882a593Smuzhiyun unsigned char result;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
183*4882a593Smuzhiyun result = __snd_opl3sa2_read(chip, reg);
184*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
185*4882a593Smuzhiyun return result;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun /* write control port (w/o spinlock) */
__snd_opl3sa2_write(struct snd_opl3sa2 * chip,unsigned char reg,unsigned char value)189*4882a593Smuzhiyun static void __snd_opl3sa2_write(struct snd_opl3sa2 *chip, unsigned char reg, unsigned char value)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun #if 0
192*4882a593Smuzhiyun outb(0x1d, port); /* password */
193*4882a593Smuzhiyun #endif
194*4882a593Smuzhiyun outb(reg, chip->port); /* register */
195*4882a593Smuzhiyun outb(value, chip->port + 1);
196*4882a593Smuzhiyun chip->ctlregs[reg] = value;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /* write control port (with spinlock) */
snd_opl3sa2_write(struct snd_opl3sa2 * chip,unsigned char reg,unsigned char value)200*4882a593Smuzhiyun static void snd_opl3sa2_write(struct snd_opl3sa2 *chip, unsigned char reg, unsigned char value)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun unsigned long flags;
203*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
204*4882a593Smuzhiyun __snd_opl3sa2_write(chip, reg, value);
205*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
snd_opl3sa2_detect(struct snd_card * card)208*4882a593Smuzhiyun static int snd_opl3sa2_detect(struct snd_card *card)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun struct snd_opl3sa2 *chip = card->private_data;
211*4882a593Smuzhiyun unsigned long port;
212*4882a593Smuzhiyun unsigned char tmp, tmp1;
213*4882a593Smuzhiyun char str[2];
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun port = chip->port;
216*4882a593Smuzhiyun if ((chip->res_port = request_region(port, 2, "OPL3-SA control")) == NULL) {
217*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "can't grab port 0x%lx\n", port);
218*4882a593Smuzhiyun return -EBUSY;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun /*
221*4882a593Smuzhiyun snd_printk(KERN_DEBUG "REG 0A = 0x%x\n",
222*4882a593Smuzhiyun snd_opl3sa2_read(chip, 0x0a));
223*4882a593Smuzhiyun */
224*4882a593Smuzhiyun chip->version = 0;
225*4882a593Smuzhiyun tmp = snd_opl3sa2_read(chip, OPL3SA2_MISC);
226*4882a593Smuzhiyun if (tmp == 0xff) {
227*4882a593Smuzhiyun snd_printd("OPL3-SA [0x%lx] detect = 0x%x\n", port, tmp);
228*4882a593Smuzhiyun return -ENODEV;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun switch (tmp & 0x07) {
231*4882a593Smuzhiyun case 0x01:
232*4882a593Smuzhiyun chip->version = 2; /* YMF711 */
233*4882a593Smuzhiyun break;
234*4882a593Smuzhiyun default:
235*4882a593Smuzhiyun chip->version = 3;
236*4882a593Smuzhiyun /* 0x02 - standard */
237*4882a593Smuzhiyun /* 0x03 - YM715B */
238*4882a593Smuzhiyun /* 0x04 - YM719 - OPL-SA4? */
239*4882a593Smuzhiyun /* 0x05 - OPL3-SA3 - Libretto 100 */
240*4882a593Smuzhiyun /* 0x07 - unknown - Neomagic MagicWave 3D */
241*4882a593Smuzhiyun break;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun str[0] = chip->version + '0';
244*4882a593Smuzhiyun str[1] = 0;
245*4882a593Smuzhiyun strcat(card->shortname, str);
246*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA2_MISC, tmp ^ 7);
247*4882a593Smuzhiyun if ((tmp1 = snd_opl3sa2_read(chip, OPL3SA2_MISC)) != tmp) {
248*4882a593Smuzhiyun snd_printd("OPL3-SA [0x%lx] detect (1) = 0x%x (0x%x)\n", port, tmp, tmp1);
249*4882a593Smuzhiyun return -ENODEV;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun /* try if the MIC register is accessible */
252*4882a593Smuzhiyun tmp = snd_opl3sa2_read(chip, OPL3SA2_MIC);
253*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA2_MIC, 0x8a);
254*4882a593Smuzhiyun if (((tmp1 = snd_opl3sa2_read(chip, OPL3SA2_MIC)) & 0x9f) != 0x8a) {
255*4882a593Smuzhiyun snd_printd("OPL3-SA [0x%lx] detect (2) = 0x%x (0x%x)\n", port, tmp, tmp1);
256*4882a593Smuzhiyun return -ENODEV;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA2_MIC, 0x9f);
259*4882a593Smuzhiyun /* initialization */
260*4882a593Smuzhiyun /* Power Management - full on */
261*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA2_PM_CTRL, OPL3SA2_PM_D0);
262*4882a593Smuzhiyun if (chip->version > 2) {
263*4882a593Smuzhiyun /* ymode is bits 4&5 (of 0 to 7) on all but opl3sa2 versions */
264*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA2_SYS_CTRL, (chip->ymode << 4));
265*4882a593Smuzhiyun } else {
266*4882a593Smuzhiyun /* default for opl3sa2 versions */
267*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA2_SYS_CTRL, 0x00);
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA2_IRQ_CONFIG, 0x0d); /* Interrupt Channel Configuration - IRQ A = OPL3 + MPU + WSS */
270*4882a593Smuzhiyun if (chip->single_dma) {
271*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA2_DMA_CONFIG, 0x03); /* DMA Configuration - DMA A = WSS-R + WSS-P */
272*4882a593Smuzhiyun } else {
273*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA2_DMA_CONFIG, 0x21); /* DMA Configuration - DMA B = WSS-R, DMA A = WSS-P */
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA2_MISC, 0x80 | (tmp & 7)); /* Miscellaneous - default */
276*4882a593Smuzhiyun if (chip->version > 2) {
277*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA3_DGTL_DOWN, 0x00); /* Digital Block Partial Power Down - default */
278*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA3_ANLG_DOWN, 0x00); /* Analog Block Partial Power Down - default */
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun return 0;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
snd_opl3sa2_interrupt(int irq,void * dev_id)283*4882a593Smuzhiyun static irqreturn_t snd_opl3sa2_interrupt(int irq, void *dev_id)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun unsigned short status;
286*4882a593Smuzhiyun struct snd_card *card = dev_id;
287*4882a593Smuzhiyun struct snd_opl3sa2 *chip;
288*4882a593Smuzhiyun int handled = 0;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun if (card == NULL)
291*4882a593Smuzhiyun return IRQ_NONE;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun chip = card->private_data;
294*4882a593Smuzhiyun status = snd_opl3sa2_read(chip, OPL3SA2_IRQ_STATUS);
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun if (status & 0x20) {
297*4882a593Smuzhiyun handled = 1;
298*4882a593Smuzhiyun snd_opl3_interrupt(chip->synth);
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun if ((status & 0x10) && chip->rmidi != NULL) {
302*4882a593Smuzhiyun handled = 1;
303*4882a593Smuzhiyun snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun if (status & 0x07) { /* TI,CI,PI */
307*4882a593Smuzhiyun handled = 1;
308*4882a593Smuzhiyun snd_wss_interrupt(irq, chip->wss);
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun if (status & 0x40) { /* hardware volume change */
312*4882a593Smuzhiyun handled = 1;
313*4882a593Smuzhiyun /* reading from Master Lch register at 0x07 clears this bit */
314*4882a593Smuzhiyun snd_opl3sa2_read(chip, OPL3SA2_MASTER_RIGHT);
315*4882a593Smuzhiyun snd_opl3sa2_read(chip, OPL3SA2_MASTER_LEFT);
316*4882a593Smuzhiyun if (chip->master_switch && chip->master_volume) {
317*4882a593Smuzhiyun snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_VALUE,
318*4882a593Smuzhiyun &chip->master_switch->id);
319*4882a593Smuzhiyun snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_VALUE,
320*4882a593Smuzhiyun &chip->master_volume->id);
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun return IRQ_RETVAL(handled);
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun #define OPL3SA2_SINGLE(xname, xindex, reg, shift, mask, invert) \
327*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
328*4882a593Smuzhiyun .info = snd_wss_info_single, \
329*4882a593Smuzhiyun .get = snd_opl3sa2_get_single, .put = snd_opl3sa2_put_single, \
330*4882a593Smuzhiyun .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
331*4882a593Smuzhiyun #define OPL3SA2_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
332*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
333*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
334*4882a593Smuzhiyun .name = xname, .index = xindex, \
335*4882a593Smuzhiyun .info = snd_wss_info_single, \
336*4882a593Smuzhiyun .get = snd_opl3sa2_get_single, .put = snd_opl3sa2_put_single, \
337*4882a593Smuzhiyun .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
338*4882a593Smuzhiyun .tlv = { .p = (xtlv) } }
339*4882a593Smuzhiyun
snd_opl3sa2_get_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)340*4882a593Smuzhiyun static int snd_opl3sa2_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun struct snd_opl3sa2 *chip = snd_kcontrol_chip(kcontrol);
343*4882a593Smuzhiyun unsigned long flags;
344*4882a593Smuzhiyun int reg = kcontrol->private_value & 0xff;
345*4882a593Smuzhiyun int shift = (kcontrol->private_value >> 8) & 0xff;
346*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 16) & 0xff;
347*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 24) & 0xff;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
350*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (chip->ctlregs[reg] >> shift) & mask;
351*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
352*4882a593Smuzhiyun if (invert)
353*4882a593Smuzhiyun ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
354*4882a593Smuzhiyun return 0;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
snd_opl3sa2_put_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)357*4882a593Smuzhiyun static int snd_opl3sa2_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun struct snd_opl3sa2 *chip = snd_kcontrol_chip(kcontrol);
360*4882a593Smuzhiyun unsigned long flags;
361*4882a593Smuzhiyun int reg = kcontrol->private_value & 0xff;
362*4882a593Smuzhiyun int shift = (kcontrol->private_value >> 8) & 0xff;
363*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 16) & 0xff;
364*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 24) & 0xff;
365*4882a593Smuzhiyun int change;
366*4882a593Smuzhiyun unsigned short val, oval;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun val = (ucontrol->value.integer.value[0] & mask);
369*4882a593Smuzhiyun if (invert)
370*4882a593Smuzhiyun val = mask - val;
371*4882a593Smuzhiyun val <<= shift;
372*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
373*4882a593Smuzhiyun oval = chip->ctlregs[reg];
374*4882a593Smuzhiyun val = (oval & ~(mask << shift)) | val;
375*4882a593Smuzhiyun change = val != oval;
376*4882a593Smuzhiyun __snd_opl3sa2_write(chip, reg, val);
377*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
378*4882a593Smuzhiyun return change;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun #define OPL3SA2_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
382*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
383*4882a593Smuzhiyun .info = snd_wss_info_double, \
384*4882a593Smuzhiyun .get = snd_opl3sa2_get_double, .put = snd_opl3sa2_put_double, \
385*4882a593Smuzhiyun .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
386*4882a593Smuzhiyun #define OPL3SA2_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
387*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
388*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
389*4882a593Smuzhiyun .name = xname, .index = xindex, \
390*4882a593Smuzhiyun .info = snd_wss_info_double, \
391*4882a593Smuzhiyun .get = snd_opl3sa2_get_double, .put = snd_opl3sa2_put_double, \
392*4882a593Smuzhiyun .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
393*4882a593Smuzhiyun .tlv = { .p = (xtlv) } }
394*4882a593Smuzhiyun
snd_opl3sa2_get_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)395*4882a593Smuzhiyun static int snd_opl3sa2_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun struct snd_opl3sa2 *chip = snd_kcontrol_chip(kcontrol);
398*4882a593Smuzhiyun unsigned long flags;
399*4882a593Smuzhiyun int left_reg = kcontrol->private_value & 0xff;
400*4882a593Smuzhiyun int right_reg = (kcontrol->private_value >> 8) & 0xff;
401*4882a593Smuzhiyun int shift_left = (kcontrol->private_value >> 16) & 0x07;
402*4882a593Smuzhiyun int shift_right = (kcontrol->private_value >> 19) & 0x07;
403*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 24) & 0xff;
404*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 22) & 1;
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
407*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (chip->ctlregs[left_reg] >> shift_left) & mask;
408*4882a593Smuzhiyun ucontrol->value.integer.value[1] = (chip->ctlregs[right_reg] >> shift_right) & mask;
409*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
410*4882a593Smuzhiyun if (invert) {
411*4882a593Smuzhiyun ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
412*4882a593Smuzhiyun ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun return 0;
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun
snd_opl3sa2_put_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)417*4882a593Smuzhiyun static int snd_opl3sa2_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun struct snd_opl3sa2 *chip = snd_kcontrol_chip(kcontrol);
420*4882a593Smuzhiyun unsigned long flags;
421*4882a593Smuzhiyun int left_reg = kcontrol->private_value & 0xff;
422*4882a593Smuzhiyun int right_reg = (kcontrol->private_value >> 8) & 0xff;
423*4882a593Smuzhiyun int shift_left = (kcontrol->private_value >> 16) & 0x07;
424*4882a593Smuzhiyun int shift_right = (kcontrol->private_value >> 19) & 0x07;
425*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 24) & 0xff;
426*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 22) & 1;
427*4882a593Smuzhiyun int change;
428*4882a593Smuzhiyun unsigned short val1, val2, oval1, oval2;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun val1 = ucontrol->value.integer.value[0] & mask;
431*4882a593Smuzhiyun val2 = ucontrol->value.integer.value[1] & mask;
432*4882a593Smuzhiyun if (invert) {
433*4882a593Smuzhiyun val1 = mask - val1;
434*4882a593Smuzhiyun val2 = mask - val2;
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun val1 <<= shift_left;
437*4882a593Smuzhiyun val2 <<= shift_right;
438*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
439*4882a593Smuzhiyun if (left_reg != right_reg) {
440*4882a593Smuzhiyun oval1 = chip->ctlregs[left_reg];
441*4882a593Smuzhiyun oval2 = chip->ctlregs[right_reg];
442*4882a593Smuzhiyun val1 = (oval1 & ~(mask << shift_left)) | val1;
443*4882a593Smuzhiyun val2 = (oval2 & ~(mask << shift_right)) | val2;
444*4882a593Smuzhiyun change = val1 != oval1 || val2 != oval2;
445*4882a593Smuzhiyun __snd_opl3sa2_write(chip, left_reg, val1);
446*4882a593Smuzhiyun __snd_opl3sa2_write(chip, right_reg, val2);
447*4882a593Smuzhiyun } else {
448*4882a593Smuzhiyun oval1 = chip->ctlregs[left_reg];
449*4882a593Smuzhiyun val1 = (oval1 & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
450*4882a593Smuzhiyun change = val1 != oval1;
451*4882a593Smuzhiyun __snd_opl3sa2_write(chip, left_reg, val1);
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
454*4882a593Smuzhiyun return change;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(db_scale_master, -3000, 200, 0);
458*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_opl3sa2_controls[] = {
461*4882a593Smuzhiyun OPL3SA2_DOUBLE("Master Playback Switch", 0, 0x07, 0x08, 7, 7, 1, 1),
462*4882a593Smuzhiyun OPL3SA2_DOUBLE_TLV("Master Playback Volume", 0, 0x07, 0x08, 0, 0, 15, 1,
463*4882a593Smuzhiyun db_scale_master),
464*4882a593Smuzhiyun OPL3SA2_SINGLE("Mic Playback Switch", 0, 0x09, 7, 1, 1),
465*4882a593Smuzhiyun OPL3SA2_SINGLE_TLV("Mic Playback Volume", 0, 0x09, 0, 31, 1,
466*4882a593Smuzhiyun db_scale_5bit_12db_max),
467*4882a593Smuzhiyun OPL3SA2_SINGLE("ZV Port Switch", 0, 0x02, 0, 1, 0),
468*4882a593Smuzhiyun };
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_opl3sa2_tone_controls[] = {
471*4882a593Smuzhiyun OPL3SA2_DOUBLE("3D Control - Wide", 0, 0x14, 0x14, 4, 0, 7, 0),
472*4882a593Smuzhiyun OPL3SA2_DOUBLE("Tone Control - Bass", 0, 0x15, 0x15, 4, 0, 7, 0),
473*4882a593Smuzhiyun OPL3SA2_DOUBLE("Tone Control - Treble", 0, 0x16, 0x16, 4, 0, 7, 0)
474*4882a593Smuzhiyun };
475*4882a593Smuzhiyun
snd_opl3sa2_master_free(struct snd_kcontrol * kcontrol)476*4882a593Smuzhiyun static void snd_opl3sa2_master_free(struct snd_kcontrol *kcontrol)
477*4882a593Smuzhiyun {
478*4882a593Smuzhiyun struct snd_opl3sa2 *chip = snd_kcontrol_chip(kcontrol);
479*4882a593Smuzhiyun chip->master_switch = NULL;
480*4882a593Smuzhiyun chip->master_volume = NULL;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
snd_opl3sa2_mixer(struct snd_card * card)483*4882a593Smuzhiyun static int snd_opl3sa2_mixer(struct snd_card *card)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun struct snd_opl3sa2 *chip = card->private_data;
486*4882a593Smuzhiyun struct snd_ctl_elem_id id1, id2;
487*4882a593Smuzhiyun struct snd_kcontrol *kctl;
488*4882a593Smuzhiyun unsigned int idx;
489*4882a593Smuzhiyun int err;
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun memset(&id1, 0, sizeof(id1));
492*4882a593Smuzhiyun memset(&id2, 0, sizeof(id2));
493*4882a593Smuzhiyun id1.iface = id2.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
494*4882a593Smuzhiyun /* reassign AUX0 to CD */
495*4882a593Smuzhiyun strcpy(id1.name, "Aux Playback Switch");
496*4882a593Smuzhiyun strcpy(id2.name, "CD Playback Switch");
497*4882a593Smuzhiyun if ((err = snd_ctl_rename_id(card, &id1, &id2)) < 0) {
498*4882a593Smuzhiyun snd_printk(KERN_ERR "Cannot rename opl3sa2 control\n");
499*4882a593Smuzhiyun return err;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun strcpy(id1.name, "Aux Playback Volume");
502*4882a593Smuzhiyun strcpy(id2.name, "CD Playback Volume");
503*4882a593Smuzhiyun if ((err = snd_ctl_rename_id(card, &id1, &id2)) < 0) {
504*4882a593Smuzhiyun snd_printk(KERN_ERR "Cannot rename opl3sa2 control\n");
505*4882a593Smuzhiyun return err;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun /* reassign AUX1 to FM */
508*4882a593Smuzhiyun strcpy(id1.name, "Aux Playback Switch"); id1.index = 1;
509*4882a593Smuzhiyun strcpy(id2.name, "FM Playback Switch");
510*4882a593Smuzhiyun if ((err = snd_ctl_rename_id(card, &id1, &id2)) < 0) {
511*4882a593Smuzhiyun snd_printk(KERN_ERR "Cannot rename opl3sa2 control\n");
512*4882a593Smuzhiyun return err;
513*4882a593Smuzhiyun }
514*4882a593Smuzhiyun strcpy(id1.name, "Aux Playback Volume");
515*4882a593Smuzhiyun strcpy(id2.name, "FM Playback Volume");
516*4882a593Smuzhiyun if ((err = snd_ctl_rename_id(card, &id1, &id2)) < 0) {
517*4882a593Smuzhiyun snd_printk(KERN_ERR "Cannot rename opl3sa2 control\n");
518*4882a593Smuzhiyun return err;
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun /* add OPL3SA2 controls */
521*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_opl3sa2_controls); idx++) {
522*4882a593Smuzhiyun if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_opl3sa2_controls[idx], chip))) < 0)
523*4882a593Smuzhiyun return err;
524*4882a593Smuzhiyun switch (idx) {
525*4882a593Smuzhiyun case 0: chip->master_switch = kctl; kctl->private_free = snd_opl3sa2_master_free; break;
526*4882a593Smuzhiyun case 1: chip->master_volume = kctl; kctl->private_free = snd_opl3sa2_master_free; break;
527*4882a593Smuzhiyun }
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun if (chip->version > 2) {
530*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_opl3sa2_tone_controls); idx++)
531*4882a593Smuzhiyun if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_opl3sa2_tone_controls[idx], chip))) < 0)
532*4882a593Smuzhiyun return err;
533*4882a593Smuzhiyun }
534*4882a593Smuzhiyun return 0;
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun /* Power Management support functions */
538*4882a593Smuzhiyun #ifdef CONFIG_PM
snd_opl3sa2_suspend(struct snd_card * card,pm_message_t state)539*4882a593Smuzhiyun static int snd_opl3sa2_suspend(struct snd_card *card, pm_message_t state)
540*4882a593Smuzhiyun {
541*4882a593Smuzhiyun if (card) {
542*4882a593Smuzhiyun struct snd_opl3sa2 *chip = card->private_data;
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
545*4882a593Smuzhiyun chip->wss->suspend(chip->wss);
546*4882a593Smuzhiyun /* power down */
547*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA2_PM_CTRL, OPL3SA2_PM_D3);
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun return 0;
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
snd_opl3sa2_resume(struct snd_card * card)553*4882a593Smuzhiyun static int snd_opl3sa2_resume(struct snd_card *card)
554*4882a593Smuzhiyun {
555*4882a593Smuzhiyun struct snd_opl3sa2 *chip;
556*4882a593Smuzhiyun int i;
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun if (!card)
559*4882a593Smuzhiyun return 0;
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun chip = card->private_data;
562*4882a593Smuzhiyun /* power up */
563*4882a593Smuzhiyun snd_opl3sa2_write(chip, OPL3SA2_PM_CTRL, OPL3SA2_PM_D0);
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun /* restore registers */
566*4882a593Smuzhiyun for (i = 2; i <= 0x0a; i++) {
567*4882a593Smuzhiyun if (i != OPL3SA2_IRQ_STATUS)
568*4882a593Smuzhiyun snd_opl3sa2_write(chip, i, chip->ctlregs[i]);
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun if (chip->version > 2) {
571*4882a593Smuzhiyun for (i = 0x12; i <= 0x16; i++)
572*4882a593Smuzhiyun snd_opl3sa2_write(chip, i, chip->ctlregs[i]);
573*4882a593Smuzhiyun }
574*4882a593Smuzhiyun /* restore wss */
575*4882a593Smuzhiyun chip->wss->resume(chip->wss);
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun snd_power_change_state(card, SNDRV_CTL_POWER_D0);
578*4882a593Smuzhiyun return 0;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun #endif /* CONFIG_PM */
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun #ifdef CONFIG_PNP
snd_opl3sa2_pnp(int dev,struct snd_opl3sa2 * chip,struct pnp_dev * pdev)583*4882a593Smuzhiyun static int snd_opl3sa2_pnp(int dev, struct snd_opl3sa2 *chip,
584*4882a593Smuzhiyun struct pnp_dev *pdev)
585*4882a593Smuzhiyun {
586*4882a593Smuzhiyun if (pnp_activate_dev(pdev) < 0) {
587*4882a593Smuzhiyun snd_printk(KERN_ERR "PnP configure failure (out of resources?)\n");
588*4882a593Smuzhiyun return -EBUSY;
589*4882a593Smuzhiyun }
590*4882a593Smuzhiyun sb_port[dev] = pnp_port_start(pdev, 0);
591*4882a593Smuzhiyun wss_port[dev] = pnp_port_start(pdev, 1);
592*4882a593Smuzhiyun fm_port[dev] = pnp_port_start(pdev, 2);
593*4882a593Smuzhiyun midi_port[dev] = pnp_port_start(pdev, 3);
594*4882a593Smuzhiyun port[dev] = pnp_port_start(pdev, 4);
595*4882a593Smuzhiyun dma1[dev] = pnp_dma(pdev, 0);
596*4882a593Smuzhiyun dma2[dev] = pnp_dma(pdev, 1);
597*4882a593Smuzhiyun irq[dev] = pnp_irq(pdev, 0);
598*4882a593Smuzhiyun snd_printdd("%sPnP OPL3-SA: sb port=0x%lx, wss port=0x%lx, fm port=0x%lx, midi port=0x%lx\n",
599*4882a593Smuzhiyun pnp_device_is_pnpbios(pdev) ? "BIOS" : "ISA", sb_port[dev], wss_port[dev], fm_port[dev], midi_port[dev]);
600*4882a593Smuzhiyun snd_printdd("%sPnP OPL3-SA: control port=0x%lx, dma1=%i, dma2=%i, irq=%i\n",
601*4882a593Smuzhiyun pnp_device_is_pnpbios(pdev) ? "BIOS" : "ISA", port[dev], dma1[dev], dma2[dev], irq[dev]);
602*4882a593Smuzhiyun return 0;
603*4882a593Smuzhiyun }
604*4882a593Smuzhiyun #endif /* CONFIG_PNP */
605*4882a593Smuzhiyun
snd_opl3sa2_free(struct snd_card * card)606*4882a593Smuzhiyun static void snd_opl3sa2_free(struct snd_card *card)
607*4882a593Smuzhiyun {
608*4882a593Smuzhiyun struct snd_opl3sa2 *chip = card->private_data;
609*4882a593Smuzhiyun if (chip->irq >= 0)
610*4882a593Smuzhiyun free_irq(chip->irq, card);
611*4882a593Smuzhiyun release_and_free_resource(chip->res_port);
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
snd_opl3sa2_card_new(struct device * pdev,int dev,struct snd_card ** cardp)614*4882a593Smuzhiyun static int snd_opl3sa2_card_new(struct device *pdev, int dev,
615*4882a593Smuzhiyun struct snd_card **cardp)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun struct snd_card *card;
618*4882a593Smuzhiyun struct snd_opl3sa2 *chip;
619*4882a593Smuzhiyun int err;
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun err = snd_card_new(pdev, index[dev], id[dev], THIS_MODULE,
622*4882a593Smuzhiyun sizeof(struct snd_opl3sa2), &card);
623*4882a593Smuzhiyun if (err < 0)
624*4882a593Smuzhiyun return err;
625*4882a593Smuzhiyun strcpy(card->driver, "OPL3SA2");
626*4882a593Smuzhiyun strcpy(card->shortname, "Yamaha OPL3-SA");
627*4882a593Smuzhiyun chip = card->private_data;
628*4882a593Smuzhiyun spin_lock_init(&chip->reg_lock);
629*4882a593Smuzhiyun chip->irq = -1;
630*4882a593Smuzhiyun card->private_free = snd_opl3sa2_free;
631*4882a593Smuzhiyun *cardp = card;
632*4882a593Smuzhiyun return 0;
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun
snd_opl3sa2_probe(struct snd_card * card,int dev)635*4882a593Smuzhiyun static int snd_opl3sa2_probe(struct snd_card *card, int dev)
636*4882a593Smuzhiyun {
637*4882a593Smuzhiyun int xirq, xdma1, xdma2;
638*4882a593Smuzhiyun struct snd_opl3sa2 *chip;
639*4882a593Smuzhiyun struct snd_wss *wss;
640*4882a593Smuzhiyun struct snd_opl3 *opl3;
641*4882a593Smuzhiyun int err;
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun /* initialise this card from supplied (or default) parameter*/
644*4882a593Smuzhiyun chip = card->private_data;
645*4882a593Smuzhiyun chip->ymode = opl3sa3_ymode[dev] & 0x03 ;
646*4882a593Smuzhiyun chip->port = port[dev];
647*4882a593Smuzhiyun xirq = irq[dev];
648*4882a593Smuzhiyun xdma1 = dma1[dev];
649*4882a593Smuzhiyun xdma2 = dma2[dev];
650*4882a593Smuzhiyun if (xdma2 < 0)
651*4882a593Smuzhiyun chip->single_dma = 1;
652*4882a593Smuzhiyun err = snd_opl3sa2_detect(card);
653*4882a593Smuzhiyun if (err < 0)
654*4882a593Smuzhiyun return err;
655*4882a593Smuzhiyun err = request_irq(xirq, snd_opl3sa2_interrupt, 0,
656*4882a593Smuzhiyun "OPL3-SA2", card);
657*4882a593Smuzhiyun if (err) {
658*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "can't grab IRQ %d\n", xirq);
659*4882a593Smuzhiyun return -ENODEV;
660*4882a593Smuzhiyun }
661*4882a593Smuzhiyun chip->irq = xirq;
662*4882a593Smuzhiyun card->sync_irq = chip->irq;
663*4882a593Smuzhiyun err = snd_wss_create(card,
664*4882a593Smuzhiyun wss_port[dev] + 4, -1,
665*4882a593Smuzhiyun xirq, xdma1, xdma2,
666*4882a593Smuzhiyun WSS_HW_OPL3SA2, WSS_HWSHARE_IRQ, &wss);
667*4882a593Smuzhiyun if (err < 0) {
668*4882a593Smuzhiyun snd_printd("Oops, WSS not detected at 0x%lx\n", wss_port[dev] + 4);
669*4882a593Smuzhiyun return err;
670*4882a593Smuzhiyun }
671*4882a593Smuzhiyun chip->wss = wss;
672*4882a593Smuzhiyun err = snd_wss_pcm(wss, 0);
673*4882a593Smuzhiyun if (err < 0)
674*4882a593Smuzhiyun return err;
675*4882a593Smuzhiyun err = snd_wss_mixer(wss);
676*4882a593Smuzhiyun if (err < 0)
677*4882a593Smuzhiyun return err;
678*4882a593Smuzhiyun err = snd_opl3sa2_mixer(card);
679*4882a593Smuzhiyun if (err < 0)
680*4882a593Smuzhiyun return err;
681*4882a593Smuzhiyun err = snd_wss_timer(wss, 0);
682*4882a593Smuzhiyun if (err < 0)
683*4882a593Smuzhiyun return err;
684*4882a593Smuzhiyun if (fm_port[dev] >= 0x340 && fm_port[dev] < 0x400) {
685*4882a593Smuzhiyun if ((err = snd_opl3_create(card, fm_port[dev],
686*4882a593Smuzhiyun fm_port[dev] + 2,
687*4882a593Smuzhiyun OPL3_HW_OPL3, 0, &opl3)) < 0)
688*4882a593Smuzhiyun return err;
689*4882a593Smuzhiyun if ((err = snd_opl3_timer_new(opl3, 1, 2)) < 0)
690*4882a593Smuzhiyun return err;
691*4882a593Smuzhiyun if ((err = snd_opl3_hwdep_new(opl3, 0, 1, &chip->synth)) < 0)
692*4882a593Smuzhiyun return err;
693*4882a593Smuzhiyun }
694*4882a593Smuzhiyun if (midi_port[dev] >= 0x300 && midi_port[dev] < 0x340) {
695*4882a593Smuzhiyun if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_OPL3SA2,
696*4882a593Smuzhiyun midi_port[dev],
697*4882a593Smuzhiyun MPU401_INFO_IRQ_HOOK, -1,
698*4882a593Smuzhiyun &chip->rmidi)) < 0)
699*4882a593Smuzhiyun return err;
700*4882a593Smuzhiyun }
701*4882a593Smuzhiyun sprintf(card->longname, "%s at 0x%lx, irq %d, dma %d",
702*4882a593Smuzhiyun card->shortname, chip->port, xirq, xdma1);
703*4882a593Smuzhiyun if (xdma2 >= 0)
704*4882a593Smuzhiyun sprintf(card->longname + strlen(card->longname), "&%d", xdma2);
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun return snd_card_register(card);
707*4882a593Smuzhiyun }
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun #ifdef CONFIG_PNP
snd_opl3sa2_pnp_detect(struct pnp_dev * pdev,const struct pnp_device_id * id)710*4882a593Smuzhiyun static int snd_opl3sa2_pnp_detect(struct pnp_dev *pdev,
711*4882a593Smuzhiyun const struct pnp_device_id *id)
712*4882a593Smuzhiyun {
713*4882a593Smuzhiyun static int dev;
714*4882a593Smuzhiyun int err;
715*4882a593Smuzhiyun struct snd_card *card;
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun if (pnp_device_is_isapnp(pdev))
718*4882a593Smuzhiyun return -ENOENT; /* we have another procedure - card */
719*4882a593Smuzhiyun for (; dev < SNDRV_CARDS; dev++) {
720*4882a593Smuzhiyun if (enable[dev] && isapnp[dev])
721*4882a593Smuzhiyun break;
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun if (dev >= SNDRV_CARDS)
724*4882a593Smuzhiyun return -ENODEV;
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun err = snd_opl3sa2_card_new(&pdev->dev, dev, &card);
727*4882a593Smuzhiyun if (err < 0)
728*4882a593Smuzhiyun return err;
729*4882a593Smuzhiyun if ((err = snd_opl3sa2_pnp(dev, card->private_data, pdev)) < 0) {
730*4882a593Smuzhiyun snd_card_free(card);
731*4882a593Smuzhiyun return err;
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun if ((err = snd_opl3sa2_probe(card, dev)) < 0) {
734*4882a593Smuzhiyun snd_card_free(card);
735*4882a593Smuzhiyun return err;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun pnp_set_drvdata(pdev, card);
738*4882a593Smuzhiyun dev++;
739*4882a593Smuzhiyun return 0;
740*4882a593Smuzhiyun }
741*4882a593Smuzhiyun
snd_opl3sa2_pnp_remove(struct pnp_dev * pdev)742*4882a593Smuzhiyun static void snd_opl3sa2_pnp_remove(struct pnp_dev *pdev)
743*4882a593Smuzhiyun {
744*4882a593Smuzhiyun snd_card_free(pnp_get_drvdata(pdev));
745*4882a593Smuzhiyun }
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun #ifdef CONFIG_PM
snd_opl3sa2_pnp_suspend(struct pnp_dev * pdev,pm_message_t state)748*4882a593Smuzhiyun static int snd_opl3sa2_pnp_suspend(struct pnp_dev *pdev, pm_message_t state)
749*4882a593Smuzhiyun {
750*4882a593Smuzhiyun return snd_opl3sa2_suspend(pnp_get_drvdata(pdev), state);
751*4882a593Smuzhiyun }
snd_opl3sa2_pnp_resume(struct pnp_dev * pdev)752*4882a593Smuzhiyun static int snd_opl3sa2_pnp_resume(struct pnp_dev *pdev)
753*4882a593Smuzhiyun {
754*4882a593Smuzhiyun return snd_opl3sa2_resume(pnp_get_drvdata(pdev));
755*4882a593Smuzhiyun }
756*4882a593Smuzhiyun #endif
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun static struct pnp_driver opl3sa2_pnp_driver = {
759*4882a593Smuzhiyun .name = "snd-opl3sa2-pnpbios",
760*4882a593Smuzhiyun .id_table = snd_opl3sa2_pnpbiosids,
761*4882a593Smuzhiyun .probe = snd_opl3sa2_pnp_detect,
762*4882a593Smuzhiyun .remove = snd_opl3sa2_pnp_remove,
763*4882a593Smuzhiyun #ifdef CONFIG_PM
764*4882a593Smuzhiyun .suspend = snd_opl3sa2_pnp_suspend,
765*4882a593Smuzhiyun .resume = snd_opl3sa2_pnp_resume,
766*4882a593Smuzhiyun #endif
767*4882a593Smuzhiyun };
768*4882a593Smuzhiyun
snd_opl3sa2_pnp_cdetect(struct pnp_card_link * pcard,const struct pnp_card_device_id * id)769*4882a593Smuzhiyun static int snd_opl3sa2_pnp_cdetect(struct pnp_card_link *pcard,
770*4882a593Smuzhiyun const struct pnp_card_device_id *id)
771*4882a593Smuzhiyun {
772*4882a593Smuzhiyun static int dev;
773*4882a593Smuzhiyun struct pnp_dev *pdev;
774*4882a593Smuzhiyun int err;
775*4882a593Smuzhiyun struct snd_card *card;
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun pdev = pnp_request_card_device(pcard, id->devs[0].id, NULL);
778*4882a593Smuzhiyun if (pdev == NULL) {
779*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "can't get pnp device from id '%s'\n",
780*4882a593Smuzhiyun id->devs[0].id);
781*4882a593Smuzhiyun return -EBUSY;
782*4882a593Smuzhiyun }
783*4882a593Smuzhiyun for (; dev < SNDRV_CARDS; dev++) {
784*4882a593Smuzhiyun if (enable[dev] && isapnp[dev])
785*4882a593Smuzhiyun break;
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun if (dev >= SNDRV_CARDS)
788*4882a593Smuzhiyun return -ENODEV;
789*4882a593Smuzhiyun
790*4882a593Smuzhiyun err = snd_opl3sa2_card_new(&pdev->dev, dev, &card);
791*4882a593Smuzhiyun if (err < 0)
792*4882a593Smuzhiyun return err;
793*4882a593Smuzhiyun if ((err = snd_opl3sa2_pnp(dev, card->private_data, pdev)) < 0) {
794*4882a593Smuzhiyun snd_card_free(card);
795*4882a593Smuzhiyun return err;
796*4882a593Smuzhiyun }
797*4882a593Smuzhiyun if ((err = snd_opl3sa2_probe(card, dev)) < 0) {
798*4882a593Smuzhiyun snd_card_free(card);
799*4882a593Smuzhiyun return err;
800*4882a593Smuzhiyun }
801*4882a593Smuzhiyun pnp_set_card_drvdata(pcard, card);
802*4882a593Smuzhiyun dev++;
803*4882a593Smuzhiyun return 0;
804*4882a593Smuzhiyun }
805*4882a593Smuzhiyun
snd_opl3sa2_pnp_cremove(struct pnp_card_link * pcard)806*4882a593Smuzhiyun static void snd_opl3sa2_pnp_cremove(struct pnp_card_link *pcard)
807*4882a593Smuzhiyun {
808*4882a593Smuzhiyun snd_card_free(pnp_get_card_drvdata(pcard));
809*4882a593Smuzhiyun pnp_set_card_drvdata(pcard, NULL);
810*4882a593Smuzhiyun }
811*4882a593Smuzhiyun
812*4882a593Smuzhiyun #ifdef CONFIG_PM
snd_opl3sa2_pnp_csuspend(struct pnp_card_link * pcard,pm_message_t state)813*4882a593Smuzhiyun static int snd_opl3sa2_pnp_csuspend(struct pnp_card_link *pcard, pm_message_t state)
814*4882a593Smuzhiyun {
815*4882a593Smuzhiyun return snd_opl3sa2_suspend(pnp_get_card_drvdata(pcard), state);
816*4882a593Smuzhiyun }
snd_opl3sa2_pnp_cresume(struct pnp_card_link * pcard)817*4882a593Smuzhiyun static int snd_opl3sa2_pnp_cresume(struct pnp_card_link *pcard)
818*4882a593Smuzhiyun {
819*4882a593Smuzhiyun return snd_opl3sa2_resume(pnp_get_card_drvdata(pcard));
820*4882a593Smuzhiyun }
821*4882a593Smuzhiyun #endif
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun static struct pnp_card_driver opl3sa2_pnpc_driver = {
824*4882a593Smuzhiyun .flags = PNP_DRIVER_RES_DISABLE,
825*4882a593Smuzhiyun .name = "snd-opl3sa2-cpnp",
826*4882a593Smuzhiyun .id_table = snd_opl3sa2_pnpids,
827*4882a593Smuzhiyun .probe = snd_opl3sa2_pnp_cdetect,
828*4882a593Smuzhiyun .remove = snd_opl3sa2_pnp_cremove,
829*4882a593Smuzhiyun #ifdef CONFIG_PM
830*4882a593Smuzhiyun .suspend = snd_opl3sa2_pnp_csuspend,
831*4882a593Smuzhiyun .resume = snd_opl3sa2_pnp_cresume,
832*4882a593Smuzhiyun #endif
833*4882a593Smuzhiyun };
834*4882a593Smuzhiyun #endif /* CONFIG_PNP */
835*4882a593Smuzhiyun
snd_opl3sa2_isa_match(struct device * pdev,unsigned int dev)836*4882a593Smuzhiyun static int snd_opl3sa2_isa_match(struct device *pdev,
837*4882a593Smuzhiyun unsigned int dev)
838*4882a593Smuzhiyun {
839*4882a593Smuzhiyun if (!enable[dev])
840*4882a593Smuzhiyun return 0;
841*4882a593Smuzhiyun #ifdef CONFIG_PNP
842*4882a593Smuzhiyun if (isapnp[dev])
843*4882a593Smuzhiyun return 0;
844*4882a593Smuzhiyun #endif
845*4882a593Smuzhiyun if (port[dev] == SNDRV_AUTO_PORT) {
846*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "specify port\n");
847*4882a593Smuzhiyun return 0;
848*4882a593Smuzhiyun }
849*4882a593Smuzhiyun if (wss_port[dev] == SNDRV_AUTO_PORT) {
850*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "specify wss_port\n");
851*4882a593Smuzhiyun return 0;
852*4882a593Smuzhiyun }
853*4882a593Smuzhiyun if (fm_port[dev] == SNDRV_AUTO_PORT) {
854*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "specify fm_port\n");
855*4882a593Smuzhiyun return 0;
856*4882a593Smuzhiyun }
857*4882a593Smuzhiyun if (midi_port[dev] == SNDRV_AUTO_PORT) {
858*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "specify midi_port\n");
859*4882a593Smuzhiyun return 0;
860*4882a593Smuzhiyun }
861*4882a593Smuzhiyun return 1;
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun
snd_opl3sa2_isa_probe(struct device * pdev,unsigned int dev)864*4882a593Smuzhiyun static int snd_opl3sa2_isa_probe(struct device *pdev,
865*4882a593Smuzhiyun unsigned int dev)
866*4882a593Smuzhiyun {
867*4882a593Smuzhiyun struct snd_card *card;
868*4882a593Smuzhiyun int err;
869*4882a593Smuzhiyun
870*4882a593Smuzhiyun err = snd_opl3sa2_card_new(pdev, dev, &card);
871*4882a593Smuzhiyun if (err < 0)
872*4882a593Smuzhiyun return err;
873*4882a593Smuzhiyun if ((err = snd_opl3sa2_probe(card, dev)) < 0) {
874*4882a593Smuzhiyun snd_card_free(card);
875*4882a593Smuzhiyun return err;
876*4882a593Smuzhiyun }
877*4882a593Smuzhiyun dev_set_drvdata(pdev, card);
878*4882a593Smuzhiyun return 0;
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun
snd_opl3sa2_isa_remove(struct device * devptr,unsigned int dev)881*4882a593Smuzhiyun static int snd_opl3sa2_isa_remove(struct device *devptr,
882*4882a593Smuzhiyun unsigned int dev)
883*4882a593Smuzhiyun {
884*4882a593Smuzhiyun snd_card_free(dev_get_drvdata(devptr));
885*4882a593Smuzhiyun return 0;
886*4882a593Smuzhiyun }
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun #ifdef CONFIG_PM
snd_opl3sa2_isa_suspend(struct device * dev,unsigned int n,pm_message_t state)889*4882a593Smuzhiyun static int snd_opl3sa2_isa_suspend(struct device *dev, unsigned int n,
890*4882a593Smuzhiyun pm_message_t state)
891*4882a593Smuzhiyun {
892*4882a593Smuzhiyun return snd_opl3sa2_suspend(dev_get_drvdata(dev), state);
893*4882a593Smuzhiyun }
894*4882a593Smuzhiyun
snd_opl3sa2_isa_resume(struct device * dev,unsigned int n)895*4882a593Smuzhiyun static int snd_opl3sa2_isa_resume(struct device *dev, unsigned int n)
896*4882a593Smuzhiyun {
897*4882a593Smuzhiyun return snd_opl3sa2_resume(dev_get_drvdata(dev));
898*4882a593Smuzhiyun }
899*4882a593Smuzhiyun #endif
900*4882a593Smuzhiyun
901*4882a593Smuzhiyun #define DEV_NAME "opl3sa2"
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun static struct isa_driver snd_opl3sa2_isa_driver = {
904*4882a593Smuzhiyun .match = snd_opl3sa2_isa_match,
905*4882a593Smuzhiyun .probe = snd_opl3sa2_isa_probe,
906*4882a593Smuzhiyun .remove = snd_opl3sa2_isa_remove,
907*4882a593Smuzhiyun #ifdef CONFIG_PM
908*4882a593Smuzhiyun .suspend = snd_opl3sa2_isa_suspend,
909*4882a593Smuzhiyun .resume = snd_opl3sa2_isa_resume,
910*4882a593Smuzhiyun #endif
911*4882a593Smuzhiyun .driver = {
912*4882a593Smuzhiyun .name = DEV_NAME
913*4882a593Smuzhiyun },
914*4882a593Smuzhiyun };
915*4882a593Smuzhiyun
alsa_card_opl3sa2_init(void)916*4882a593Smuzhiyun static int __init alsa_card_opl3sa2_init(void)
917*4882a593Smuzhiyun {
918*4882a593Smuzhiyun int err;
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun err = isa_register_driver(&snd_opl3sa2_isa_driver, SNDRV_CARDS);
921*4882a593Smuzhiyun #ifdef CONFIG_PNP
922*4882a593Smuzhiyun if (!err)
923*4882a593Smuzhiyun isa_registered = 1;
924*4882a593Smuzhiyun
925*4882a593Smuzhiyun err = pnp_register_driver(&opl3sa2_pnp_driver);
926*4882a593Smuzhiyun if (!err)
927*4882a593Smuzhiyun pnp_registered = 1;
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun err = pnp_register_card_driver(&opl3sa2_pnpc_driver);
930*4882a593Smuzhiyun if (!err)
931*4882a593Smuzhiyun pnpc_registered = 1;
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun if (isa_registered || pnp_registered)
934*4882a593Smuzhiyun err = 0;
935*4882a593Smuzhiyun #endif
936*4882a593Smuzhiyun return err;
937*4882a593Smuzhiyun }
938*4882a593Smuzhiyun
alsa_card_opl3sa2_exit(void)939*4882a593Smuzhiyun static void __exit alsa_card_opl3sa2_exit(void)
940*4882a593Smuzhiyun {
941*4882a593Smuzhiyun #ifdef CONFIG_PNP
942*4882a593Smuzhiyun if (pnpc_registered)
943*4882a593Smuzhiyun pnp_unregister_card_driver(&opl3sa2_pnpc_driver);
944*4882a593Smuzhiyun if (pnp_registered)
945*4882a593Smuzhiyun pnp_unregister_driver(&opl3sa2_pnp_driver);
946*4882a593Smuzhiyun if (isa_registered)
947*4882a593Smuzhiyun #endif
948*4882a593Smuzhiyun isa_unregister_driver(&snd_opl3sa2_isa_driver);
949*4882a593Smuzhiyun }
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun module_init(alsa_card_opl3sa2_init)
952*4882a593Smuzhiyun module_exit(alsa_card_opl3sa2_exit)
953