1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Routines for GF1 DMA control
4*4882a593Smuzhiyun * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <asm/dma.h>
8*4882a593Smuzhiyun #include <linux/slab.h>
9*4882a593Smuzhiyun #include <sound/core.h>
10*4882a593Smuzhiyun #include <sound/gus.h>
11*4882a593Smuzhiyun
snd_gf1_dma_ack(struct snd_gus_card * gus)12*4882a593Smuzhiyun static void snd_gf1_dma_ack(struct snd_gus_card * gus)
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun unsigned long flags;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun spin_lock_irqsave(&gus->reg_lock, flags);
17*4882a593Smuzhiyun snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL, 0x00);
18*4882a593Smuzhiyun snd_gf1_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL);
19*4882a593Smuzhiyun spin_unlock_irqrestore(&gus->reg_lock, flags);
20*4882a593Smuzhiyun }
21*4882a593Smuzhiyun
snd_gf1_dma_program(struct snd_gus_card * gus,unsigned int addr,unsigned long buf_addr,unsigned int count,unsigned int cmd)22*4882a593Smuzhiyun static void snd_gf1_dma_program(struct snd_gus_card * gus,
23*4882a593Smuzhiyun unsigned int addr,
24*4882a593Smuzhiyun unsigned long buf_addr,
25*4882a593Smuzhiyun unsigned int count,
26*4882a593Smuzhiyun unsigned int cmd)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun unsigned long flags;
29*4882a593Smuzhiyun unsigned int address;
30*4882a593Smuzhiyun unsigned char dma_cmd;
31*4882a593Smuzhiyun unsigned int address_high;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun snd_printdd("dma_transfer: addr=0x%x, buf=0x%lx, count=0x%x\n",
34*4882a593Smuzhiyun addr, buf_addr, count);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun if (gus->gf1.dma1 > 3) {
37*4882a593Smuzhiyun if (gus->gf1.enh_mode) {
38*4882a593Smuzhiyun address = addr >> 1;
39*4882a593Smuzhiyun } else {
40*4882a593Smuzhiyun if (addr & 0x1f) {
41*4882a593Smuzhiyun snd_printd("snd_gf1_dma_transfer: unaligned address (0x%x)?\n", addr);
42*4882a593Smuzhiyun return;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun address = (addr & 0x000c0000) | ((addr & 0x0003ffff) >> 1);
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun } else {
47*4882a593Smuzhiyun address = addr;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun dma_cmd = SNDRV_GF1_DMA_ENABLE | (unsigned short) cmd;
51*4882a593Smuzhiyun #if 0
52*4882a593Smuzhiyun dma_cmd |= 0x08;
53*4882a593Smuzhiyun #endif
54*4882a593Smuzhiyun if (dma_cmd & SNDRV_GF1_DMA_16BIT) {
55*4882a593Smuzhiyun count++;
56*4882a593Smuzhiyun count &= ~1; /* align */
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun if (gus->gf1.dma1 > 3) {
59*4882a593Smuzhiyun dma_cmd |= SNDRV_GF1_DMA_WIDTH16;
60*4882a593Smuzhiyun count++;
61*4882a593Smuzhiyun count &= ~1; /* align */
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun snd_gf1_dma_ack(gus);
64*4882a593Smuzhiyun snd_dma_program(gus->gf1.dma1, buf_addr, count, dma_cmd & SNDRV_GF1_DMA_READ ? DMA_MODE_READ : DMA_MODE_WRITE);
65*4882a593Smuzhiyun #if 0
66*4882a593Smuzhiyun snd_printk(KERN_DEBUG "address = 0x%x, count = 0x%x, dma_cmd = 0x%x\n",
67*4882a593Smuzhiyun address << 1, count, dma_cmd);
68*4882a593Smuzhiyun #endif
69*4882a593Smuzhiyun spin_lock_irqsave(&gus->reg_lock, flags);
70*4882a593Smuzhiyun if (gus->gf1.enh_mode) {
71*4882a593Smuzhiyun address_high = ((address >> 16) & 0x000000f0) | (address & 0x0000000f);
72*4882a593Smuzhiyun snd_gf1_write16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW, (unsigned short) (address >> 4));
73*4882a593Smuzhiyun snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH, (unsigned char) address_high);
74*4882a593Smuzhiyun } else
75*4882a593Smuzhiyun snd_gf1_write16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW, (unsigned short) (address >> 4));
76*4882a593Smuzhiyun snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL, dma_cmd);
77*4882a593Smuzhiyun spin_unlock_irqrestore(&gus->reg_lock, flags);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
snd_gf1_dma_next_block(struct snd_gus_card * gus)80*4882a593Smuzhiyun static struct snd_gf1_dma_block *snd_gf1_dma_next_block(struct snd_gus_card * gus)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun struct snd_gf1_dma_block *block;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* PCM block have bigger priority than synthesizer one */
85*4882a593Smuzhiyun if (gus->gf1.dma_data_pcm) {
86*4882a593Smuzhiyun block = gus->gf1.dma_data_pcm;
87*4882a593Smuzhiyun if (gus->gf1.dma_data_pcm_last == block) {
88*4882a593Smuzhiyun gus->gf1.dma_data_pcm =
89*4882a593Smuzhiyun gus->gf1.dma_data_pcm_last = NULL;
90*4882a593Smuzhiyun } else {
91*4882a593Smuzhiyun gus->gf1.dma_data_pcm = block->next;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun } else if (gus->gf1.dma_data_synth) {
94*4882a593Smuzhiyun block = gus->gf1.dma_data_synth;
95*4882a593Smuzhiyun if (gus->gf1.dma_data_synth_last == block) {
96*4882a593Smuzhiyun gus->gf1.dma_data_synth =
97*4882a593Smuzhiyun gus->gf1.dma_data_synth_last = NULL;
98*4882a593Smuzhiyun } else {
99*4882a593Smuzhiyun gus->gf1.dma_data_synth = block->next;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun } else {
102*4882a593Smuzhiyun block = NULL;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun if (block) {
105*4882a593Smuzhiyun gus->gf1.dma_ack = block->ack;
106*4882a593Smuzhiyun gus->gf1.dma_private_data = block->private_data;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun return block;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun
snd_gf1_dma_interrupt(struct snd_gus_card * gus)112*4882a593Smuzhiyun static void snd_gf1_dma_interrupt(struct snd_gus_card * gus)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun struct snd_gf1_dma_block *block;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun snd_gf1_dma_ack(gus);
117*4882a593Smuzhiyun if (gus->gf1.dma_ack)
118*4882a593Smuzhiyun gus->gf1.dma_ack(gus, gus->gf1.dma_private_data);
119*4882a593Smuzhiyun spin_lock(&gus->dma_lock);
120*4882a593Smuzhiyun if (gus->gf1.dma_data_pcm == NULL &&
121*4882a593Smuzhiyun gus->gf1.dma_data_synth == NULL) {
122*4882a593Smuzhiyun gus->gf1.dma_ack = NULL;
123*4882a593Smuzhiyun gus->gf1.dma_flags &= ~SNDRV_GF1_DMA_TRIGGER;
124*4882a593Smuzhiyun spin_unlock(&gus->dma_lock);
125*4882a593Smuzhiyun return;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun block = snd_gf1_dma_next_block(gus);
128*4882a593Smuzhiyun spin_unlock(&gus->dma_lock);
129*4882a593Smuzhiyun if (!block)
130*4882a593Smuzhiyun return;
131*4882a593Smuzhiyun snd_gf1_dma_program(gus, block->addr, block->buf_addr, block->count, (unsigned short) block->cmd);
132*4882a593Smuzhiyun kfree(block);
133*4882a593Smuzhiyun #if 0
134*4882a593Smuzhiyun snd_printd(KERN_DEBUG "program dma (IRQ) - "
135*4882a593Smuzhiyun "addr = 0x%x, buffer = 0x%lx, count = 0x%x, cmd = 0x%x\n",
136*4882a593Smuzhiyun block->addr, block->buf_addr, block->count, block->cmd);
137*4882a593Smuzhiyun #endif
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
snd_gf1_dma_init(struct snd_gus_card * gus)140*4882a593Smuzhiyun int snd_gf1_dma_init(struct snd_gus_card * gus)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun mutex_lock(&gus->dma_mutex);
143*4882a593Smuzhiyun gus->gf1.dma_shared++;
144*4882a593Smuzhiyun if (gus->gf1.dma_shared > 1) {
145*4882a593Smuzhiyun mutex_unlock(&gus->dma_mutex);
146*4882a593Smuzhiyun return 0;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun gus->gf1.interrupt_handler_dma_write = snd_gf1_dma_interrupt;
149*4882a593Smuzhiyun gus->gf1.dma_data_pcm =
150*4882a593Smuzhiyun gus->gf1.dma_data_pcm_last =
151*4882a593Smuzhiyun gus->gf1.dma_data_synth =
152*4882a593Smuzhiyun gus->gf1.dma_data_synth_last = NULL;
153*4882a593Smuzhiyun mutex_unlock(&gus->dma_mutex);
154*4882a593Smuzhiyun return 0;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
snd_gf1_dma_done(struct snd_gus_card * gus)157*4882a593Smuzhiyun int snd_gf1_dma_done(struct snd_gus_card * gus)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun struct snd_gf1_dma_block *block;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun mutex_lock(&gus->dma_mutex);
162*4882a593Smuzhiyun gus->gf1.dma_shared--;
163*4882a593Smuzhiyun if (!gus->gf1.dma_shared) {
164*4882a593Smuzhiyun snd_dma_disable(gus->gf1.dma1);
165*4882a593Smuzhiyun snd_gf1_set_default_handlers(gus, SNDRV_GF1_HANDLER_DMA_WRITE);
166*4882a593Smuzhiyun snd_gf1_dma_ack(gus);
167*4882a593Smuzhiyun while ((block = gus->gf1.dma_data_pcm)) {
168*4882a593Smuzhiyun gus->gf1.dma_data_pcm = block->next;
169*4882a593Smuzhiyun kfree(block);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun while ((block = gus->gf1.dma_data_synth)) {
172*4882a593Smuzhiyun gus->gf1.dma_data_synth = block->next;
173*4882a593Smuzhiyun kfree(block);
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun gus->gf1.dma_data_pcm_last =
176*4882a593Smuzhiyun gus->gf1.dma_data_synth_last = NULL;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun mutex_unlock(&gus->dma_mutex);
179*4882a593Smuzhiyun return 0;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
snd_gf1_dma_transfer_block(struct snd_gus_card * gus,struct snd_gf1_dma_block * __block,int atomic,int synth)182*4882a593Smuzhiyun int snd_gf1_dma_transfer_block(struct snd_gus_card * gus,
183*4882a593Smuzhiyun struct snd_gf1_dma_block * __block,
184*4882a593Smuzhiyun int atomic,
185*4882a593Smuzhiyun int synth)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun unsigned long flags;
188*4882a593Smuzhiyun struct snd_gf1_dma_block *block;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun block = kmalloc(sizeof(*block), atomic ? GFP_ATOMIC : GFP_KERNEL);
191*4882a593Smuzhiyun if (!block)
192*4882a593Smuzhiyun return -ENOMEM;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun *block = *__block;
195*4882a593Smuzhiyun block->next = NULL;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun snd_printdd("addr = 0x%x, buffer = 0x%lx, count = 0x%x, cmd = 0x%x\n",
198*4882a593Smuzhiyun block->addr, (long) block->buffer, block->count,
199*4882a593Smuzhiyun block->cmd);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun snd_printdd("gus->gf1.dma_data_pcm_last = 0x%lx\n",
202*4882a593Smuzhiyun (long)gus->gf1.dma_data_pcm_last);
203*4882a593Smuzhiyun snd_printdd("gus->gf1.dma_data_pcm = 0x%lx\n",
204*4882a593Smuzhiyun (long)gus->gf1.dma_data_pcm);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun spin_lock_irqsave(&gus->dma_lock, flags);
207*4882a593Smuzhiyun if (synth) {
208*4882a593Smuzhiyun if (gus->gf1.dma_data_synth_last) {
209*4882a593Smuzhiyun gus->gf1.dma_data_synth_last->next = block;
210*4882a593Smuzhiyun gus->gf1.dma_data_synth_last = block;
211*4882a593Smuzhiyun } else {
212*4882a593Smuzhiyun gus->gf1.dma_data_synth =
213*4882a593Smuzhiyun gus->gf1.dma_data_synth_last = block;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun } else {
216*4882a593Smuzhiyun if (gus->gf1.dma_data_pcm_last) {
217*4882a593Smuzhiyun gus->gf1.dma_data_pcm_last->next = block;
218*4882a593Smuzhiyun gus->gf1.dma_data_pcm_last = block;
219*4882a593Smuzhiyun } else {
220*4882a593Smuzhiyun gus->gf1.dma_data_pcm =
221*4882a593Smuzhiyun gus->gf1.dma_data_pcm_last = block;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun if (!(gus->gf1.dma_flags & SNDRV_GF1_DMA_TRIGGER)) {
225*4882a593Smuzhiyun gus->gf1.dma_flags |= SNDRV_GF1_DMA_TRIGGER;
226*4882a593Smuzhiyun block = snd_gf1_dma_next_block(gus);
227*4882a593Smuzhiyun spin_unlock_irqrestore(&gus->dma_lock, flags);
228*4882a593Smuzhiyun if (block == NULL)
229*4882a593Smuzhiyun return 0;
230*4882a593Smuzhiyun snd_gf1_dma_program(gus, block->addr, block->buf_addr, block->count, (unsigned short) block->cmd);
231*4882a593Smuzhiyun kfree(block);
232*4882a593Smuzhiyun return 0;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun spin_unlock_irqrestore(&gus->dma_lock, flags);
235*4882a593Smuzhiyun return 0;
236*4882a593Smuzhiyun }
237