1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for generic ESS AudioDrive ES18xx soundcards
4*4882a593Smuzhiyun * Copyright (c) by Christian Fischbach <fishbach@pool.informatik.rwth-aachen.de>
5*4882a593Smuzhiyun * Copyright (c) by Abramo Bagnara <abramo@alsa-project.org>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun /* GENERAL NOTES:
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * BUGS:
10*4882a593Smuzhiyun * - There are pops (we can't delay in trigger function, cause midlevel
11*4882a593Smuzhiyun * often need to trigger down and then up very quickly).
12*4882a593Smuzhiyun * Any ideas?
13*4882a593Smuzhiyun * - Support for 16 bit DMA seems to be broken. I've no hardware to tune it.
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun * ES1868 NOTES:
18*4882a593Smuzhiyun * - The chip has one half duplex pcm (with very limited full duplex support).
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun * - Duplex stereophonic sound is impossible.
21*4882a593Smuzhiyun * - Record and playback must share the same frequency rate.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * - The driver use dma2 for playback and dma1 for capture.
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /*
27*4882a593Smuzhiyun * ES1869 NOTES:
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun * - there are a first full duplex pcm and a second playback only pcm
30*4882a593Smuzhiyun * (incompatible with first pcm capture)
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun * - there is support for the capture volume and ESS Spatializer 3D effect.
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun * - contrarily to some pages in DS_1869.PDF the rates can be set
35*4882a593Smuzhiyun * independently.
36*4882a593Smuzhiyun *
37*4882a593Smuzhiyun * - Zoom Video is implemented by sharing the FM DAC, thus the user can
38*4882a593Smuzhiyun * have either FM playback or Video playback but not both simultaneously.
39*4882a593Smuzhiyun * The Video Playback Switch mixer control toggles this choice.
40*4882a593Smuzhiyun *
41*4882a593Smuzhiyun * BUGS:
42*4882a593Smuzhiyun *
43*4882a593Smuzhiyun * - There is a major trouble I noted:
44*4882a593Smuzhiyun *
45*4882a593Smuzhiyun * using both channel for playback stereo 16 bit samples at 44100 Hz
46*4882a593Smuzhiyun * the second pcm (Audio1) DMA slows down irregularly and sound is garbled.
47*4882a593Smuzhiyun *
48*4882a593Smuzhiyun * The same happens using Audio1 for captureing.
49*4882a593Smuzhiyun *
50*4882a593Smuzhiyun * The Windows driver does not suffer of this (although it use Audio1
51*4882a593Smuzhiyun * only for captureing). I'm unable to discover why.
52*4882a593Smuzhiyun *
53*4882a593Smuzhiyun */
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /*
56*4882a593Smuzhiyun * ES1879 NOTES:
57*4882a593Smuzhiyun * - When Zoom Video is enabled (reg 0x71 bit 6 toggled on) the PCM playback
58*4882a593Smuzhiyun * seems to be effected (speaker_test plays a lower frequency). Can't find
59*4882a593Smuzhiyun * anything in the datasheet to account for this, so a Video Playback Switch
60*4882a593Smuzhiyun * control has been included to allow ZV to be enabled only when necessary.
61*4882a593Smuzhiyun * Then again on at least one test system the 0x71 bit 6 enable bit is not
62*4882a593Smuzhiyun * needed for ZV, so maybe the datasheet is entirely wrong here.
63*4882a593Smuzhiyun */
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun #include <linux/init.h>
66*4882a593Smuzhiyun #include <linux/err.h>
67*4882a593Smuzhiyun #include <linux/isa.h>
68*4882a593Smuzhiyun #include <linux/pnp.h>
69*4882a593Smuzhiyun #include <linux/isapnp.h>
70*4882a593Smuzhiyun #include <linux/module.h>
71*4882a593Smuzhiyun #include <linux/delay.h>
72*4882a593Smuzhiyun #include <linux/io.h>
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun #include <asm/dma.h>
75*4882a593Smuzhiyun #include <sound/core.h>
76*4882a593Smuzhiyun #include <sound/control.h>
77*4882a593Smuzhiyun #include <sound/pcm.h>
78*4882a593Smuzhiyun #include <sound/pcm_params.h>
79*4882a593Smuzhiyun #include <sound/mpu401.h>
80*4882a593Smuzhiyun #include <sound/opl3.h>
81*4882a593Smuzhiyun #define SNDRV_LEGACY_FIND_FREE_IRQ
82*4882a593Smuzhiyun #define SNDRV_LEGACY_FIND_FREE_DMA
83*4882a593Smuzhiyun #include <sound/initval.h>
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #define PFX "es18xx: "
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun struct snd_es18xx {
88*4882a593Smuzhiyun unsigned long port; /* port of ESS chip */
89*4882a593Smuzhiyun unsigned long ctrl_port; /* Control port of ESS chip */
90*4882a593Smuzhiyun struct resource *res_port;
91*4882a593Smuzhiyun struct resource *res_mpu_port;
92*4882a593Smuzhiyun struct resource *res_ctrl_port;
93*4882a593Smuzhiyun int irq; /* IRQ number of ESS chip */
94*4882a593Smuzhiyun int dma1; /* DMA1 */
95*4882a593Smuzhiyun int dma2; /* DMA2 */
96*4882a593Smuzhiyun unsigned short version; /* version of ESS chip */
97*4882a593Smuzhiyun int caps; /* Chip capabilities */
98*4882a593Smuzhiyun unsigned short audio2_vol; /* volume level of audio2 */
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun unsigned short active; /* active channel mask */
101*4882a593Smuzhiyun unsigned int dma1_shift;
102*4882a593Smuzhiyun unsigned int dma2_shift;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun struct snd_pcm *pcm;
105*4882a593Smuzhiyun struct snd_pcm_substream *playback_a_substream;
106*4882a593Smuzhiyun struct snd_pcm_substream *capture_a_substream;
107*4882a593Smuzhiyun struct snd_pcm_substream *playback_b_substream;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun struct snd_rawmidi *rmidi;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun struct snd_kcontrol *hw_volume;
112*4882a593Smuzhiyun struct snd_kcontrol *hw_switch;
113*4882a593Smuzhiyun struct snd_kcontrol *master_volume;
114*4882a593Smuzhiyun struct snd_kcontrol *master_switch;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun spinlock_t reg_lock;
117*4882a593Smuzhiyun spinlock_t mixer_lock;
118*4882a593Smuzhiyun #ifdef CONFIG_PM
119*4882a593Smuzhiyun unsigned char pm_reg;
120*4882a593Smuzhiyun #endif
121*4882a593Smuzhiyun #ifdef CONFIG_PNP
122*4882a593Smuzhiyun struct pnp_dev *dev;
123*4882a593Smuzhiyun struct pnp_dev *devc;
124*4882a593Smuzhiyun #endif
125*4882a593Smuzhiyun };
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun #define AUDIO1_IRQ 0x01
128*4882a593Smuzhiyun #define AUDIO2_IRQ 0x02
129*4882a593Smuzhiyun #define HWV_IRQ 0x04
130*4882a593Smuzhiyun #define MPU_IRQ 0x08
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun #define ES18XX_PCM2 0x0001 /* Has two useable PCM */
133*4882a593Smuzhiyun #define ES18XX_SPATIALIZER 0x0002 /* Has 3D Spatializer */
134*4882a593Smuzhiyun #define ES18XX_RECMIX 0x0004 /* Has record mixer */
135*4882a593Smuzhiyun #define ES18XX_DUPLEX_MONO 0x0008 /* Has mono duplex only */
136*4882a593Smuzhiyun #define ES18XX_DUPLEX_SAME 0x0010 /* Playback and record must share the same rate */
137*4882a593Smuzhiyun #define ES18XX_NEW_RATE 0x0020 /* More precise rate setting */
138*4882a593Smuzhiyun #define ES18XX_AUXB 0x0040 /* AuxB mixer control */
139*4882a593Smuzhiyun #define ES18XX_HWV 0x0080 /* Has separate hardware volume mixer controls*/
140*4882a593Smuzhiyun #define ES18XX_MONO 0x0100 /* Mono_in mixer control */
141*4882a593Smuzhiyun #define ES18XX_I2S 0x0200 /* I2S mixer control */
142*4882a593Smuzhiyun #define ES18XX_MUTEREC 0x0400 /* Record source can be muted */
143*4882a593Smuzhiyun #define ES18XX_CONTROL 0x0800 /* Has control ports */
144*4882a593Smuzhiyun #define ES18XX_GPO_2BIT 0x1000 /* GPO0,1 controlled by PM port */
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun /* Power Management */
147*4882a593Smuzhiyun #define ES18XX_PM 0x07
148*4882a593Smuzhiyun #define ES18XX_PM_GPO0 0x01
149*4882a593Smuzhiyun #define ES18XX_PM_GPO1 0x02
150*4882a593Smuzhiyun #define ES18XX_PM_PDR 0x04
151*4882a593Smuzhiyun #define ES18XX_PM_ANA 0x08
152*4882a593Smuzhiyun #define ES18XX_PM_FM 0x020
153*4882a593Smuzhiyun #define ES18XX_PM_SUS 0x080
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun /* Lowlevel */
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun #define DAC1 0x01
158*4882a593Smuzhiyun #define ADC1 0x02
159*4882a593Smuzhiyun #define DAC2 0x04
160*4882a593Smuzhiyun #define MILLISECOND 10000
161*4882a593Smuzhiyun
snd_es18xx_dsp_command(struct snd_es18xx * chip,unsigned char val)162*4882a593Smuzhiyun static int snd_es18xx_dsp_command(struct snd_es18xx *chip, unsigned char val)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun int i;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun for(i = MILLISECOND; i; i--)
167*4882a593Smuzhiyun if ((inb(chip->port + 0x0C) & 0x80) == 0) {
168*4882a593Smuzhiyun outb(val, chip->port + 0x0C);
169*4882a593Smuzhiyun return 0;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun snd_printk(KERN_ERR "dsp_command: timeout (0x%x)\n", val);
172*4882a593Smuzhiyun return -EINVAL;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
snd_es18xx_dsp_get_byte(struct snd_es18xx * chip)175*4882a593Smuzhiyun static int snd_es18xx_dsp_get_byte(struct snd_es18xx *chip)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun int i;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun for(i = MILLISECOND/10; i; i--)
180*4882a593Smuzhiyun if (inb(chip->port + 0x0C) & 0x40)
181*4882a593Smuzhiyun return inb(chip->port + 0x0A);
182*4882a593Smuzhiyun snd_printk(KERN_ERR "dsp_get_byte failed: 0x%lx = 0x%x!!!\n",
183*4882a593Smuzhiyun chip->port + 0x0A, inb(chip->port + 0x0A));
184*4882a593Smuzhiyun return -ENODEV;
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun #undef REG_DEBUG
188*4882a593Smuzhiyun
snd_es18xx_write(struct snd_es18xx * chip,unsigned char reg,unsigned char data)189*4882a593Smuzhiyun static int snd_es18xx_write(struct snd_es18xx *chip,
190*4882a593Smuzhiyun unsigned char reg, unsigned char data)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun unsigned long flags;
193*4882a593Smuzhiyun int ret;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
196*4882a593Smuzhiyun ret = snd_es18xx_dsp_command(chip, reg);
197*4882a593Smuzhiyun if (ret < 0)
198*4882a593Smuzhiyun goto end;
199*4882a593Smuzhiyun ret = snd_es18xx_dsp_command(chip, data);
200*4882a593Smuzhiyun end:
201*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
202*4882a593Smuzhiyun #ifdef REG_DEBUG
203*4882a593Smuzhiyun snd_printk(KERN_DEBUG "Reg %02x set to %02x\n", reg, data);
204*4882a593Smuzhiyun #endif
205*4882a593Smuzhiyun return ret;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
snd_es18xx_read(struct snd_es18xx * chip,unsigned char reg)208*4882a593Smuzhiyun static int snd_es18xx_read(struct snd_es18xx *chip, unsigned char reg)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun unsigned long flags;
211*4882a593Smuzhiyun int ret, data;
212*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
213*4882a593Smuzhiyun ret = snd_es18xx_dsp_command(chip, 0xC0);
214*4882a593Smuzhiyun if (ret < 0)
215*4882a593Smuzhiyun goto end;
216*4882a593Smuzhiyun ret = snd_es18xx_dsp_command(chip, reg);
217*4882a593Smuzhiyun if (ret < 0)
218*4882a593Smuzhiyun goto end;
219*4882a593Smuzhiyun data = snd_es18xx_dsp_get_byte(chip);
220*4882a593Smuzhiyun ret = data;
221*4882a593Smuzhiyun #ifdef REG_DEBUG
222*4882a593Smuzhiyun snd_printk(KERN_DEBUG "Reg %02x now is %02x (%d)\n", reg, data, ret);
223*4882a593Smuzhiyun #endif
224*4882a593Smuzhiyun end:
225*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
226*4882a593Smuzhiyun return ret;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun /* Return old value */
snd_es18xx_bits(struct snd_es18xx * chip,unsigned char reg,unsigned char mask,unsigned char val)230*4882a593Smuzhiyun static int snd_es18xx_bits(struct snd_es18xx *chip, unsigned char reg,
231*4882a593Smuzhiyun unsigned char mask, unsigned char val)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun int ret;
234*4882a593Smuzhiyun unsigned char old, new, oval;
235*4882a593Smuzhiyun unsigned long flags;
236*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
237*4882a593Smuzhiyun ret = snd_es18xx_dsp_command(chip, 0xC0);
238*4882a593Smuzhiyun if (ret < 0)
239*4882a593Smuzhiyun goto end;
240*4882a593Smuzhiyun ret = snd_es18xx_dsp_command(chip, reg);
241*4882a593Smuzhiyun if (ret < 0)
242*4882a593Smuzhiyun goto end;
243*4882a593Smuzhiyun ret = snd_es18xx_dsp_get_byte(chip);
244*4882a593Smuzhiyun if (ret < 0) {
245*4882a593Smuzhiyun goto end;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun old = ret;
248*4882a593Smuzhiyun oval = old & mask;
249*4882a593Smuzhiyun if (val != oval) {
250*4882a593Smuzhiyun ret = snd_es18xx_dsp_command(chip, reg);
251*4882a593Smuzhiyun if (ret < 0)
252*4882a593Smuzhiyun goto end;
253*4882a593Smuzhiyun new = (old & ~mask) | (val & mask);
254*4882a593Smuzhiyun ret = snd_es18xx_dsp_command(chip, new);
255*4882a593Smuzhiyun if (ret < 0)
256*4882a593Smuzhiyun goto end;
257*4882a593Smuzhiyun #ifdef REG_DEBUG
258*4882a593Smuzhiyun snd_printk(KERN_DEBUG "Reg %02x was %02x, set to %02x (%d)\n",
259*4882a593Smuzhiyun reg, old, new, ret);
260*4882a593Smuzhiyun #endif
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun ret = oval;
263*4882a593Smuzhiyun end:
264*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
265*4882a593Smuzhiyun return ret;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
snd_es18xx_mixer_write(struct snd_es18xx * chip,unsigned char reg,unsigned char data)268*4882a593Smuzhiyun static inline void snd_es18xx_mixer_write(struct snd_es18xx *chip,
269*4882a593Smuzhiyun unsigned char reg, unsigned char data)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun unsigned long flags;
272*4882a593Smuzhiyun spin_lock_irqsave(&chip->mixer_lock, flags);
273*4882a593Smuzhiyun outb(reg, chip->port + 0x04);
274*4882a593Smuzhiyun outb(data, chip->port + 0x05);
275*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->mixer_lock, flags);
276*4882a593Smuzhiyun #ifdef REG_DEBUG
277*4882a593Smuzhiyun snd_printk(KERN_DEBUG "Mixer reg %02x set to %02x\n", reg, data);
278*4882a593Smuzhiyun #endif
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun
snd_es18xx_mixer_read(struct snd_es18xx * chip,unsigned char reg)281*4882a593Smuzhiyun static inline int snd_es18xx_mixer_read(struct snd_es18xx *chip, unsigned char reg)
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun unsigned long flags;
284*4882a593Smuzhiyun int data;
285*4882a593Smuzhiyun spin_lock_irqsave(&chip->mixer_lock, flags);
286*4882a593Smuzhiyun outb(reg, chip->port + 0x04);
287*4882a593Smuzhiyun data = inb(chip->port + 0x05);
288*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->mixer_lock, flags);
289*4882a593Smuzhiyun #ifdef REG_DEBUG
290*4882a593Smuzhiyun snd_printk(KERN_DEBUG "Mixer reg %02x now is %02x\n", reg, data);
291*4882a593Smuzhiyun #endif
292*4882a593Smuzhiyun return data;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun /* Return old value */
snd_es18xx_mixer_bits(struct snd_es18xx * chip,unsigned char reg,unsigned char mask,unsigned char val)296*4882a593Smuzhiyun static inline int snd_es18xx_mixer_bits(struct snd_es18xx *chip, unsigned char reg,
297*4882a593Smuzhiyun unsigned char mask, unsigned char val)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun unsigned char old, new, oval;
300*4882a593Smuzhiyun unsigned long flags;
301*4882a593Smuzhiyun spin_lock_irqsave(&chip->mixer_lock, flags);
302*4882a593Smuzhiyun outb(reg, chip->port + 0x04);
303*4882a593Smuzhiyun old = inb(chip->port + 0x05);
304*4882a593Smuzhiyun oval = old & mask;
305*4882a593Smuzhiyun if (val != oval) {
306*4882a593Smuzhiyun new = (old & ~mask) | (val & mask);
307*4882a593Smuzhiyun outb(new, chip->port + 0x05);
308*4882a593Smuzhiyun #ifdef REG_DEBUG
309*4882a593Smuzhiyun snd_printk(KERN_DEBUG "Mixer reg %02x was %02x, set to %02x\n",
310*4882a593Smuzhiyun reg, old, new);
311*4882a593Smuzhiyun #endif
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->mixer_lock, flags);
314*4882a593Smuzhiyun return oval;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
snd_es18xx_mixer_writable(struct snd_es18xx * chip,unsigned char reg,unsigned char mask)317*4882a593Smuzhiyun static inline int snd_es18xx_mixer_writable(struct snd_es18xx *chip, unsigned char reg,
318*4882a593Smuzhiyun unsigned char mask)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun int old, expected, new;
321*4882a593Smuzhiyun unsigned long flags;
322*4882a593Smuzhiyun spin_lock_irqsave(&chip->mixer_lock, flags);
323*4882a593Smuzhiyun outb(reg, chip->port + 0x04);
324*4882a593Smuzhiyun old = inb(chip->port + 0x05);
325*4882a593Smuzhiyun expected = old ^ mask;
326*4882a593Smuzhiyun outb(expected, chip->port + 0x05);
327*4882a593Smuzhiyun new = inb(chip->port + 0x05);
328*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->mixer_lock, flags);
329*4882a593Smuzhiyun #ifdef REG_DEBUG
330*4882a593Smuzhiyun snd_printk(KERN_DEBUG "Mixer reg %02x was %02x, set to %02x, now is %02x\n",
331*4882a593Smuzhiyun reg, old, expected, new);
332*4882a593Smuzhiyun #endif
333*4882a593Smuzhiyun return expected == new;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun
snd_es18xx_reset(struct snd_es18xx * chip)337*4882a593Smuzhiyun static int snd_es18xx_reset(struct snd_es18xx *chip)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun int i;
340*4882a593Smuzhiyun outb(0x03, chip->port + 0x06);
341*4882a593Smuzhiyun inb(chip->port + 0x06);
342*4882a593Smuzhiyun outb(0x00, chip->port + 0x06);
343*4882a593Smuzhiyun for(i = 0; i < MILLISECOND && !(inb(chip->port + 0x0E) & 0x80); i++);
344*4882a593Smuzhiyun if (inb(chip->port + 0x0A) != 0xAA)
345*4882a593Smuzhiyun return -1;
346*4882a593Smuzhiyun return 0;
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun
snd_es18xx_reset_fifo(struct snd_es18xx * chip)349*4882a593Smuzhiyun static int snd_es18xx_reset_fifo(struct snd_es18xx *chip)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun outb(0x02, chip->port + 0x06);
352*4882a593Smuzhiyun inb(chip->port + 0x06);
353*4882a593Smuzhiyun outb(0x00, chip->port + 0x06);
354*4882a593Smuzhiyun return 0;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun static const struct snd_ratnum new_clocks[2] = {
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun .num = 793800,
360*4882a593Smuzhiyun .den_min = 1,
361*4882a593Smuzhiyun .den_max = 128,
362*4882a593Smuzhiyun .den_step = 1,
363*4882a593Smuzhiyun },
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun .num = 768000,
366*4882a593Smuzhiyun .den_min = 1,
367*4882a593Smuzhiyun .den_max = 128,
368*4882a593Smuzhiyun .den_step = 1,
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun };
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_ratnums new_hw_constraints_clocks = {
373*4882a593Smuzhiyun .nrats = 2,
374*4882a593Smuzhiyun .rats = new_clocks,
375*4882a593Smuzhiyun };
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun static const struct snd_ratnum old_clocks[2] = {
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun .num = 795444,
380*4882a593Smuzhiyun .den_min = 1,
381*4882a593Smuzhiyun .den_max = 128,
382*4882a593Smuzhiyun .den_step = 1,
383*4882a593Smuzhiyun },
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun .num = 397722,
386*4882a593Smuzhiyun .den_min = 1,
387*4882a593Smuzhiyun .den_max = 128,
388*4882a593Smuzhiyun .den_step = 1,
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun };
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_ratnums old_hw_constraints_clocks = {
393*4882a593Smuzhiyun .nrats = 2,
394*4882a593Smuzhiyun .rats = old_clocks,
395*4882a593Smuzhiyun };
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun
snd_es18xx_rate_set(struct snd_es18xx * chip,struct snd_pcm_substream * substream,int mode)398*4882a593Smuzhiyun static void snd_es18xx_rate_set(struct snd_es18xx *chip,
399*4882a593Smuzhiyun struct snd_pcm_substream *substream,
400*4882a593Smuzhiyun int mode)
401*4882a593Smuzhiyun {
402*4882a593Smuzhiyun unsigned int bits, div0;
403*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
404*4882a593Smuzhiyun if (chip->caps & ES18XX_NEW_RATE) {
405*4882a593Smuzhiyun if (runtime->rate_num == new_clocks[0].num)
406*4882a593Smuzhiyun bits = 128 - runtime->rate_den;
407*4882a593Smuzhiyun else
408*4882a593Smuzhiyun bits = 256 - runtime->rate_den;
409*4882a593Smuzhiyun } else {
410*4882a593Smuzhiyun if (runtime->rate_num == old_clocks[0].num)
411*4882a593Smuzhiyun bits = 256 - runtime->rate_den;
412*4882a593Smuzhiyun else
413*4882a593Smuzhiyun bits = 128 - runtime->rate_den;
414*4882a593Smuzhiyun }
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun /* set filter register */
417*4882a593Smuzhiyun div0 = 256 - 7160000*20/(8*82*runtime->rate);
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun if ((chip->caps & ES18XX_PCM2) && mode == DAC2) {
420*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x70, bits);
421*4882a593Smuzhiyun /*
422*4882a593Smuzhiyun * Comment from kernel oss driver:
423*4882a593Smuzhiyun * FKS: fascinating: 0x72 doesn't seem to work.
424*4882a593Smuzhiyun */
425*4882a593Smuzhiyun snd_es18xx_write(chip, 0xA2, div0);
426*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x72, div0);
427*4882a593Smuzhiyun } else {
428*4882a593Smuzhiyun snd_es18xx_write(chip, 0xA1, bits);
429*4882a593Smuzhiyun snd_es18xx_write(chip, 0xA2, div0);
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun
snd_es18xx_playback_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)433*4882a593Smuzhiyun static int snd_es18xx_playback_hw_params(struct snd_pcm_substream *substream,
434*4882a593Smuzhiyun struct snd_pcm_hw_params *hw_params)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun struct snd_es18xx *chip = snd_pcm_substream_chip(substream);
437*4882a593Smuzhiyun int shift;
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun shift = 0;
440*4882a593Smuzhiyun if (params_channels(hw_params) == 2)
441*4882a593Smuzhiyun shift++;
442*4882a593Smuzhiyun if (snd_pcm_format_width(params_format(hw_params)) == 16)
443*4882a593Smuzhiyun shift++;
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) {
446*4882a593Smuzhiyun if ((chip->caps & ES18XX_DUPLEX_MONO) &&
447*4882a593Smuzhiyun (chip->capture_a_substream) &&
448*4882a593Smuzhiyun params_channels(hw_params) != 1) {
449*4882a593Smuzhiyun _snd_pcm_hw_param_setempty(hw_params, SNDRV_PCM_HW_PARAM_CHANNELS);
450*4882a593Smuzhiyun return -EBUSY;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun chip->dma2_shift = shift;
453*4882a593Smuzhiyun } else {
454*4882a593Smuzhiyun chip->dma1_shift = shift;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun return 0;
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
snd_es18xx_playback1_prepare(struct snd_es18xx * chip,struct snd_pcm_substream * substream)459*4882a593Smuzhiyun static int snd_es18xx_playback1_prepare(struct snd_es18xx *chip,
460*4882a593Smuzhiyun struct snd_pcm_substream *substream)
461*4882a593Smuzhiyun {
462*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
463*4882a593Smuzhiyun unsigned int size = snd_pcm_lib_buffer_bytes(substream);
464*4882a593Smuzhiyun unsigned int count = snd_pcm_lib_period_bytes(substream);
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun snd_es18xx_rate_set(chip, substream, DAC2);
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun /* Transfer Count Reload */
469*4882a593Smuzhiyun count = 0x10000 - count;
470*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x74, count & 0xff);
471*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x76, count >> 8);
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun /* Set format */
474*4882a593Smuzhiyun snd_es18xx_mixer_bits(chip, 0x7A, 0x07,
475*4882a593Smuzhiyun ((runtime->channels == 1) ? 0x00 : 0x02) |
476*4882a593Smuzhiyun (snd_pcm_format_width(runtime->format) == 16 ? 0x01 : 0x00) |
477*4882a593Smuzhiyun (snd_pcm_format_unsigned(runtime->format) ? 0x00 : 0x04));
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun /* Set DMA controller */
480*4882a593Smuzhiyun snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun return 0;
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun
snd_es18xx_playback1_trigger(struct snd_es18xx * chip,struct snd_pcm_substream * substream,int cmd)485*4882a593Smuzhiyun static int snd_es18xx_playback1_trigger(struct snd_es18xx *chip,
486*4882a593Smuzhiyun struct snd_pcm_substream *substream,
487*4882a593Smuzhiyun int cmd)
488*4882a593Smuzhiyun {
489*4882a593Smuzhiyun switch (cmd) {
490*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_START:
491*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_RESUME:
492*4882a593Smuzhiyun if (chip->active & DAC2)
493*4882a593Smuzhiyun return 0;
494*4882a593Smuzhiyun chip->active |= DAC2;
495*4882a593Smuzhiyun /* Start DMA */
496*4882a593Smuzhiyun if (chip->dma2 >= 4)
497*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x78, 0xb3);
498*4882a593Smuzhiyun else
499*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x78, 0x93);
500*4882a593Smuzhiyun #ifdef AVOID_POPS
501*4882a593Smuzhiyun /* Avoid pops */
502*4882a593Smuzhiyun mdelay(100);
503*4882a593Smuzhiyun if (chip->caps & ES18XX_PCM2)
504*4882a593Smuzhiyun /* Restore Audio 2 volume */
505*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x7C, chip->audio2_vol);
506*4882a593Smuzhiyun else
507*4882a593Smuzhiyun /* Enable PCM output */
508*4882a593Smuzhiyun snd_es18xx_dsp_command(chip, 0xD1);
509*4882a593Smuzhiyun #endif
510*4882a593Smuzhiyun break;
511*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_STOP:
512*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_SUSPEND:
513*4882a593Smuzhiyun if (!(chip->active & DAC2))
514*4882a593Smuzhiyun return 0;
515*4882a593Smuzhiyun chip->active &= ~DAC2;
516*4882a593Smuzhiyun /* Stop DMA */
517*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x78, 0x00);
518*4882a593Smuzhiyun #ifdef AVOID_POPS
519*4882a593Smuzhiyun mdelay(25);
520*4882a593Smuzhiyun if (chip->caps & ES18XX_PCM2)
521*4882a593Smuzhiyun /* Set Audio 2 volume to 0 */
522*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x7C, 0);
523*4882a593Smuzhiyun else
524*4882a593Smuzhiyun /* Disable PCM output */
525*4882a593Smuzhiyun snd_es18xx_dsp_command(chip, 0xD3);
526*4882a593Smuzhiyun #endif
527*4882a593Smuzhiyun break;
528*4882a593Smuzhiyun default:
529*4882a593Smuzhiyun return -EINVAL;
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun return 0;
533*4882a593Smuzhiyun }
534*4882a593Smuzhiyun
snd_es18xx_capture_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)535*4882a593Smuzhiyun static int snd_es18xx_capture_hw_params(struct snd_pcm_substream *substream,
536*4882a593Smuzhiyun struct snd_pcm_hw_params *hw_params)
537*4882a593Smuzhiyun {
538*4882a593Smuzhiyun struct snd_es18xx *chip = snd_pcm_substream_chip(substream);
539*4882a593Smuzhiyun int shift;
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun shift = 0;
542*4882a593Smuzhiyun if ((chip->caps & ES18XX_DUPLEX_MONO) &&
543*4882a593Smuzhiyun chip->playback_a_substream &&
544*4882a593Smuzhiyun params_channels(hw_params) != 1) {
545*4882a593Smuzhiyun _snd_pcm_hw_param_setempty(hw_params, SNDRV_PCM_HW_PARAM_CHANNELS);
546*4882a593Smuzhiyun return -EBUSY;
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun if (params_channels(hw_params) == 2)
549*4882a593Smuzhiyun shift++;
550*4882a593Smuzhiyun if (snd_pcm_format_width(params_format(hw_params)) == 16)
551*4882a593Smuzhiyun shift++;
552*4882a593Smuzhiyun chip->dma1_shift = shift;
553*4882a593Smuzhiyun return 0;
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun
snd_es18xx_capture_prepare(struct snd_pcm_substream * substream)556*4882a593Smuzhiyun static int snd_es18xx_capture_prepare(struct snd_pcm_substream *substream)
557*4882a593Smuzhiyun {
558*4882a593Smuzhiyun struct snd_es18xx *chip = snd_pcm_substream_chip(substream);
559*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
560*4882a593Smuzhiyun unsigned int size = snd_pcm_lib_buffer_bytes(substream);
561*4882a593Smuzhiyun unsigned int count = snd_pcm_lib_period_bytes(substream);
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun snd_es18xx_reset_fifo(chip);
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun /* Set stereo/mono */
566*4882a593Smuzhiyun snd_es18xx_bits(chip, 0xA8, 0x03, runtime->channels == 1 ? 0x02 : 0x01);
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun snd_es18xx_rate_set(chip, substream, ADC1);
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun /* Transfer Count Reload */
571*4882a593Smuzhiyun count = 0x10000 - count;
572*4882a593Smuzhiyun snd_es18xx_write(chip, 0xA4, count & 0xff);
573*4882a593Smuzhiyun snd_es18xx_write(chip, 0xA5, count >> 8);
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun #ifdef AVOID_POPS
576*4882a593Smuzhiyun mdelay(100);
577*4882a593Smuzhiyun #endif
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun /* Set format */
580*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB7,
581*4882a593Smuzhiyun snd_pcm_format_unsigned(runtime->format) ? 0x51 : 0x71);
582*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB7, 0x90 |
583*4882a593Smuzhiyun ((runtime->channels == 1) ? 0x40 : 0x08) |
584*4882a593Smuzhiyun (snd_pcm_format_width(runtime->format) == 16 ? 0x04 : 0x00) |
585*4882a593Smuzhiyun (snd_pcm_format_unsigned(runtime->format) ? 0x00 : 0x20));
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun /* Set DMA controller */
588*4882a593Smuzhiyun snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun return 0;
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
snd_es18xx_capture_trigger(struct snd_pcm_substream * substream,int cmd)593*4882a593Smuzhiyun static int snd_es18xx_capture_trigger(struct snd_pcm_substream *substream,
594*4882a593Smuzhiyun int cmd)
595*4882a593Smuzhiyun {
596*4882a593Smuzhiyun struct snd_es18xx *chip = snd_pcm_substream_chip(substream);
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun switch (cmd) {
599*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_START:
600*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_RESUME:
601*4882a593Smuzhiyun if (chip->active & ADC1)
602*4882a593Smuzhiyun return 0;
603*4882a593Smuzhiyun chip->active |= ADC1;
604*4882a593Smuzhiyun /* Start DMA */
605*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB8, 0x0f);
606*4882a593Smuzhiyun break;
607*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_STOP:
608*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_SUSPEND:
609*4882a593Smuzhiyun if (!(chip->active & ADC1))
610*4882a593Smuzhiyun return 0;
611*4882a593Smuzhiyun chip->active &= ~ADC1;
612*4882a593Smuzhiyun /* Stop DMA */
613*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB8, 0x00);
614*4882a593Smuzhiyun break;
615*4882a593Smuzhiyun default:
616*4882a593Smuzhiyun return -EINVAL;
617*4882a593Smuzhiyun }
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun return 0;
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun
snd_es18xx_playback2_prepare(struct snd_es18xx * chip,struct snd_pcm_substream * substream)622*4882a593Smuzhiyun static int snd_es18xx_playback2_prepare(struct snd_es18xx *chip,
623*4882a593Smuzhiyun struct snd_pcm_substream *substream)
624*4882a593Smuzhiyun {
625*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
626*4882a593Smuzhiyun unsigned int size = snd_pcm_lib_buffer_bytes(substream);
627*4882a593Smuzhiyun unsigned int count = snd_pcm_lib_period_bytes(substream);
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun snd_es18xx_reset_fifo(chip);
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun /* Set stereo/mono */
632*4882a593Smuzhiyun snd_es18xx_bits(chip, 0xA8, 0x03, runtime->channels == 1 ? 0x02 : 0x01);
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun snd_es18xx_rate_set(chip, substream, DAC1);
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun /* Transfer Count Reload */
637*4882a593Smuzhiyun count = 0x10000 - count;
638*4882a593Smuzhiyun snd_es18xx_write(chip, 0xA4, count & 0xff);
639*4882a593Smuzhiyun snd_es18xx_write(chip, 0xA5, count >> 8);
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun /* Set format */
642*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB6,
643*4882a593Smuzhiyun snd_pcm_format_unsigned(runtime->format) ? 0x80 : 0x00);
644*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB7,
645*4882a593Smuzhiyun snd_pcm_format_unsigned(runtime->format) ? 0x51 : 0x71);
646*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB7, 0x90 |
647*4882a593Smuzhiyun (runtime->channels == 1 ? 0x40 : 0x08) |
648*4882a593Smuzhiyun (snd_pcm_format_width(runtime->format) == 16 ? 0x04 : 0x00) |
649*4882a593Smuzhiyun (snd_pcm_format_unsigned(runtime->format) ? 0x00 : 0x20));
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun /* Set DMA controller */
652*4882a593Smuzhiyun snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun return 0;
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun
snd_es18xx_playback2_trigger(struct snd_es18xx * chip,struct snd_pcm_substream * substream,int cmd)657*4882a593Smuzhiyun static int snd_es18xx_playback2_trigger(struct snd_es18xx *chip,
658*4882a593Smuzhiyun struct snd_pcm_substream *substream,
659*4882a593Smuzhiyun int cmd)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun switch (cmd) {
662*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_START:
663*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_RESUME:
664*4882a593Smuzhiyun if (chip->active & DAC1)
665*4882a593Smuzhiyun return 0;
666*4882a593Smuzhiyun chip->active |= DAC1;
667*4882a593Smuzhiyun /* Start DMA */
668*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB8, 0x05);
669*4882a593Smuzhiyun #ifdef AVOID_POPS
670*4882a593Smuzhiyun /* Avoid pops */
671*4882a593Smuzhiyun mdelay(100);
672*4882a593Smuzhiyun /* Enable Audio 1 */
673*4882a593Smuzhiyun snd_es18xx_dsp_command(chip, 0xD1);
674*4882a593Smuzhiyun #endif
675*4882a593Smuzhiyun break;
676*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_STOP:
677*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_SUSPEND:
678*4882a593Smuzhiyun if (!(chip->active & DAC1))
679*4882a593Smuzhiyun return 0;
680*4882a593Smuzhiyun chip->active &= ~DAC1;
681*4882a593Smuzhiyun /* Stop DMA */
682*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB8, 0x00);
683*4882a593Smuzhiyun #ifdef AVOID_POPS
684*4882a593Smuzhiyun /* Avoid pops */
685*4882a593Smuzhiyun mdelay(25);
686*4882a593Smuzhiyun /* Disable Audio 1 */
687*4882a593Smuzhiyun snd_es18xx_dsp_command(chip, 0xD3);
688*4882a593Smuzhiyun #endif
689*4882a593Smuzhiyun break;
690*4882a593Smuzhiyun default:
691*4882a593Smuzhiyun return -EINVAL;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun return 0;
695*4882a593Smuzhiyun }
696*4882a593Smuzhiyun
snd_es18xx_playback_prepare(struct snd_pcm_substream * substream)697*4882a593Smuzhiyun static int snd_es18xx_playback_prepare(struct snd_pcm_substream *substream)
698*4882a593Smuzhiyun {
699*4882a593Smuzhiyun struct snd_es18xx *chip = snd_pcm_substream_chip(substream);
700*4882a593Smuzhiyun if (substream->number == 0 && (chip->caps & ES18XX_PCM2))
701*4882a593Smuzhiyun return snd_es18xx_playback1_prepare(chip, substream);
702*4882a593Smuzhiyun else
703*4882a593Smuzhiyun return snd_es18xx_playback2_prepare(chip, substream);
704*4882a593Smuzhiyun }
705*4882a593Smuzhiyun
snd_es18xx_playback_trigger(struct snd_pcm_substream * substream,int cmd)706*4882a593Smuzhiyun static int snd_es18xx_playback_trigger(struct snd_pcm_substream *substream,
707*4882a593Smuzhiyun int cmd)
708*4882a593Smuzhiyun {
709*4882a593Smuzhiyun struct snd_es18xx *chip = snd_pcm_substream_chip(substream);
710*4882a593Smuzhiyun if (substream->number == 0 && (chip->caps & ES18XX_PCM2))
711*4882a593Smuzhiyun return snd_es18xx_playback1_trigger(chip, substream, cmd);
712*4882a593Smuzhiyun else
713*4882a593Smuzhiyun return snd_es18xx_playback2_trigger(chip, substream, cmd);
714*4882a593Smuzhiyun }
715*4882a593Smuzhiyun
snd_es18xx_interrupt(int irq,void * dev_id)716*4882a593Smuzhiyun static irqreturn_t snd_es18xx_interrupt(int irq, void *dev_id)
717*4882a593Smuzhiyun {
718*4882a593Smuzhiyun struct snd_card *card = dev_id;
719*4882a593Smuzhiyun struct snd_es18xx *chip = card->private_data;
720*4882a593Smuzhiyun unsigned char status;
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun if (chip->caps & ES18XX_CONTROL) {
723*4882a593Smuzhiyun /* Read Interrupt status */
724*4882a593Smuzhiyun status = inb(chip->ctrl_port + 6);
725*4882a593Smuzhiyun } else {
726*4882a593Smuzhiyun /* Read Interrupt status */
727*4882a593Smuzhiyun status = snd_es18xx_mixer_read(chip, 0x7f) >> 4;
728*4882a593Smuzhiyun }
729*4882a593Smuzhiyun #if 0
730*4882a593Smuzhiyun else {
731*4882a593Smuzhiyun status = 0;
732*4882a593Smuzhiyun if (inb(chip->port + 0x0C) & 0x01)
733*4882a593Smuzhiyun status |= AUDIO1_IRQ;
734*4882a593Smuzhiyun if (snd_es18xx_mixer_read(chip, 0x7A) & 0x80)
735*4882a593Smuzhiyun status |= AUDIO2_IRQ;
736*4882a593Smuzhiyun if ((chip->caps & ES18XX_HWV) &&
737*4882a593Smuzhiyun snd_es18xx_mixer_read(chip, 0x64) & 0x10)
738*4882a593Smuzhiyun status |= HWV_IRQ;
739*4882a593Smuzhiyun }
740*4882a593Smuzhiyun #endif
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun /* Audio 1 & Audio 2 */
743*4882a593Smuzhiyun if (status & AUDIO2_IRQ) {
744*4882a593Smuzhiyun if (chip->active & DAC2)
745*4882a593Smuzhiyun snd_pcm_period_elapsed(chip->playback_a_substream);
746*4882a593Smuzhiyun /* ack interrupt */
747*4882a593Smuzhiyun snd_es18xx_mixer_bits(chip, 0x7A, 0x80, 0x00);
748*4882a593Smuzhiyun }
749*4882a593Smuzhiyun if (status & AUDIO1_IRQ) {
750*4882a593Smuzhiyun /* ok.. capture is active */
751*4882a593Smuzhiyun if (chip->active & ADC1)
752*4882a593Smuzhiyun snd_pcm_period_elapsed(chip->capture_a_substream);
753*4882a593Smuzhiyun /* ok.. playback2 is active */
754*4882a593Smuzhiyun else if (chip->active & DAC1)
755*4882a593Smuzhiyun snd_pcm_period_elapsed(chip->playback_b_substream);
756*4882a593Smuzhiyun /* ack interrupt */
757*4882a593Smuzhiyun inb(chip->port + 0x0E);
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun /* MPU */
761*4882a593Smuzhiyun if ((status & MPU_IRQ) && chip->rmidi)
762*4882a593Smuzhiyun snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun /* Hardware volume */
765*4882a593Smuzhiyun if (status & HWV_IRQ) {
766*4882a593Smuzhiyun int split = 0;
767*4882a593Smuzhiyun if (chip->caps & ES18XX_HWV) {
768*4882a593Smuzhiyun split = snd_es18xx_mixer_read(chip, 0x64) & 0x80;
769*4882a593Smuzhiyun snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_VALUE,
770*4882a593Smuzhiyun &chip->hw_switch->id);
771*4882a593Smuzhiyun snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_VALUE,
772*4882a593Smuzhiyun &chip->hw_volume->id);
773*4882a593Smuzhiyun }
774*4882a593Smuzhiyun if (!split) {
775*4882a593Smuzhiyun snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_VALUE,
776*4882a593Smuzhiyun &chip->master_switch->id);
777*4882a593Smuzhiyun snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_VALUE,
778*4882a593Smuzhiyun &chip->master_volume->id);
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun /* ack interrupt */
781*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x66, 0x00);
782*4882a593Smuzhiyun }
783*4882a593Smuzhiyun return IRQ_HANDLED;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun
snd_es18xx_playback_pointer(struct snd_pcm_substream * substream)786*4882a593Smuzhiyun static snd_pcm_uframes_t snd_es18xx_playback_pointer(struct snd_pcm_substream *substream)
787*4882a593Smuzhiyun {
788*4882a593Smuzhiyun struct snd_es18xx *chip = snd_pcm_substream_chip(substream);
789*4882a593Smuzhiyun unsigned int size = snd_pcm_lib_buffer_bytes(substream);
790*4882a593Smuzhiyun int pos;
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) {
793*4882a593Smuzhiyun if (!(chip->active & DAC2))
794*4882a593Smuzhiyun return 0;
795*4882a593Smuzhiyun pos = snd_dma_pointer(chip->dma2, size);
796*4882a593Smuzhiyun return pos >> chip->dma2_shift;
797*4882a593Smuzhiyun } else {
798*4882a593Smuzhiyun if (!(chip->active & DAC1))
799*4882a593Smuzhiyun return 0;
800*4882a593Smuzhiyun pos = snd_dma_pointer(chip->dma1, size);
801*4882a593Smuzhiyun return pos >> chip->dma1_shift;
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun }
804*4882a593Smuzhiyun
snd_es18xx_capture_pointer(struct snd_pcm_substream * substream)805*4882a593Smuzhiyun static snd_pcm_uframes_t snd_es18xx_capture_pointer(struct snd_pcm_substream *substream)
806*4882a593Smuzhiyun {
807*4882a593Smuzhiyun struct snd_es18xx *chip = snd_pcm_substream_chip(substream);
808*4882a593Smuzhiyun unsigned int size = snd_pcm_lib_buffer_bytes(substream);
809*4882a593Smuzhiyun int pos;
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun if (!(chip->active & ADC1))
812*4882a593Smuzhiyun return 0;
813*4882a593Smuzhiyun pos = snd_dma_pointer(chip->dma1, size);
814*4882a593Smuzhiyun return pos >> chip->dma1_shift;
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun
817*4882a593Smuzhiyun static const struct snd_pcm_hardware snd_es18xx_playback =
818*4882a593Smuzhiyun {
819*4882a593Smuzhiyun .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
820*4882a593Smuzhiyun SNDRV_PCM_INFO_RESUME |
821*4882a593Smuzhiyun SNDRV_PCM_INFO_MMAP_VALID),
822*4882a593Smuzhiyun .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8 |
823*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE),
824*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
825*4882a593Smuzhiyun .rate_min = 4000,
826*4882a593Smuzhiyun .rate_max = 48000,
827*4882a593Smuzhiyun .channels_min = 1,
828*4882a593Smuzhiyun .channels_max = 2,
829*4882a593Smuzhiyun .buffer_bytes_max = 65536,
830*4882a593Smuzhiyun .period_bytes_min = 64,
831*4882a593Smuzhiyun .period_bytes_max = 65536,
832*4882a593Smuzhiyun .periods_min = 1,
833*4882a593Smuzhiyun .periods_max = 1024,
834*4882a593Smuzhiyun .fifo_size = 0,
835*4882a593Smuzhiyun };
836*4882a593Smuzhiyun
837*4882a593Smuzhiyun static const struct snd_pcm_hardware snd_es18xx_capture =
838*4882a593Smuzhiyun {
839*4882a593Smuzhiyun .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
840*4882a593Smuzhiyun SNDRV_PCM_INFO_RESUME |
841*4882a593Smuzhiyun SNDRV_PCM_INFO_MMAP_VALID),
842*4882a593Smuzhiyun .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8 |
843*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE),
844*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
845*4882a593Smuzhiyun .rate_min = 4000,
846*4882a593Smuzhiyun .rate_max = 48000,
847*4882a593Smuzhiyun .channels_min = 1,
848*4882a593Smuzhiyun .channels_max = 2,
849*4882a593Smuzhiyun .buffer_bytes_max = 65536,
850*4882a593Smuzhiyun .period_bytes_min = 64,
851*4882a593Smuzhiyun .period_bytes_max = 65536,
852*4882a593Smuzhiyun .periods_min = 1,
853*4882a593Smuzhiyun .periods_max = 1024,
854*4882a593Smuzhiyun .fifo_size = 0,
855*4882a593Smuzhiyun };
856*4882a593Smuzhiyun
snd_es18xx_playback_open(struct snd_pcm_substream * substream)857*4882a593Smuzhiyun static int snd_es18xx_playback_open(struct snd_pcm_substream *substream)
858*4882a593Smuzhiyun {
859*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
860*4882a593Smuzhiyun struct snd_es18xx *chip = snd_pcm_substream_chip(substream);
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) {
863*4882a593Smuzhiyun if ((chip->caps & ES18XX_DUPLEX_MONO) &&
864*4882a593Smuzhiyun chip->capture_a_substream &&
865*4882a593Smuzhiyun chip->capture_a_substream->runtime->channels != 1)
866*4882a593Smuzhiyun return -EAGAIN;
867*4882a593Smuzhiyun chip->playback_a_substream = substream;
868*4882a593Smuzhiyun } else if (substream->number <= 1) {
869*4882a593Smuzhiyun if (chip->capture_a_substream)
870*4882a593Smuzhiyun return -EAGAIN;
871*4882a593Smuzhiyun chip->playback_b_substream = substream;
872*4882a593Smuzhiyun } else {
873*4882a593Smuzhiyun snd_BUG();
874*4882a593Smuzhiyun return -EINVAL;
875*4882a593Smuzhiyun }
876*4882a593Smuzhiyun substream->runtime->hw = snd_es18xx_playback;
877*4882a593Smuzhiyun snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
878*4882a593Smuzhiyun (chip->caps & ES18XX_NEW_RATE) ? &new_hw_constraints_clocks : &old_hw_constraints_clocks);
879*4882a593Smuzhiyun return 0;
880*4882a593Smuzhiyun }
881*4882a593Smuzhiyun
snd_es18xx_capture_open(struct snd_pcm_substream * substream)882*4882a593Smuzhiyun static int snd_es18xx_capture_open(struct snd_pcm_substream *substream)
883*4882a593Smuzhiyun {
884*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
885*4882a593Smuzhiyun struct snd_es18xx *chip = snd_pcm_substream_chip(substream);
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun if (chip->playback_b_substream)
888*4882a593Smuzhiyun return -EAGAIN;
889*4882a593Smuzhiyun if ((chip->caps & ES18XX_DUPLEX_MONO) &&
890*4882a593Smuzhiyun chip->playback_a_substream &&
891*4882a593Smuzhiyun chip->playback_a_substream->runtime->channels != 1)
892*4882a593Smuzhiyun return -EAGAIN;
893*4882a593Smuzhiyun chip->capture_a_substream = substream;
894*4882a593Smuzhiyun substream->runtime->hw = snd_es18xx_capture;
895*4882a593Smuzhiyun snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
896*4882a593Smuzhiyun (chip->caps & ES18XX_NEW_RATE) ? &new_hw_constraints_clocks : &old_hw_constraints_clocks);
897*4882a593Smuzhiyun return 0;
898*4882a593Smuzhiyun }
899*4882a593Smuzhiyun
snd_es18xx_playback_close(struct snd_pcm_substream * substream)900*4882a593Smuzhiyun static int snd_es18xx_playback_close(struct snd_pcm_substream *substream)
901*4882a593Smuzhiyun {
902*4882a593Smuzhiyun struct snd_es18xx *chip = snd_pcm_substream_chip(substream);
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun if (substream->number == 0 && (chip->caps & ES18XX_PCM2))
905*4882a593Smuzhiyun chip->playback_a_substream = NULL;
906*4882a593Smuzhiyun else
907*4882a593Smuzhiyun chip->playback_b_substream = NULL;
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun return 0;
910*4882a593Smuzhiyun }
911*4882a593Smuzhiyun
snd_es18xx_capture_close(struct snd_pcm_substream * substream)912*4882a593Smuzhiyun static int snd_es18xx_capture_close(struct snd_pcm_substream *substream)
913*4882a593Smuzhiyun {
914*4882a593Smuzhiyun struct snd_es18xx *chip = snd_pcm_substream_chip(substream);
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun chip->capture_a_substream = NULL;
917*4882a593Smuzhiyun return 0;
918*4882a593Smuzhiyun }
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun /*
921*4882a593Smuzhiyun * MIXER part
922*4882a593Smuzhiyun */
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun /* Record source mux routines:
925*4882a593Smuzhiyun * Depending on the chipset this mux switches between 4, 5, or 8 possible inputs.
926*4882a593Smuzhiyun * bit table for the 4/5 source mux:
927*4882a593Smuzhiyun * reg 1C:
928*4882a593Smuzhiyun * b2 b1 b0 muxSource
929*4882a593Smuzhiyun * x 0 x microphone
930*4882a593Smuzhiyun * 0 1 x CD
931*4882a593Smuzhiyun * 1 1 0 line
932*4882a593Smuzhiyun * 1 1 1 mixer
933*4882a593Smuzhiyun * if it's "mixer" and it's a 5 source mux chipset then reg 7A bit 3 determines
934*4882a593Smuzhiyun * either the play mixer or the capture mixer.
935*4882a593Smuzhiyun *
936*4882a593Smuzhiyun * "map4Source" translates from source number to reg bit pattern
937*4882a593Smuzhiyun * "invMap4Source" translates from reg bit pattern to source number
938*4882a593Smuzhiyun */
939*4882a593Smuzhiyun
snd_es18xx_info_mux(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)940*4882a593Smuzhiyun static int snd_es18xx_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
941*4882a593Smuzhiyun {
942*4882a593Smuzhiyun static const char * const texts5Source[5] = {
943*4882a593Smuzhiyun "Mic", "CD", "Line", "Master", "Mix"
944*4882a593Smuzhiyun };
945*4882a593Smuzhiyun static const char * const texts8Source[8] = {
946*4882a593Smuzhiyun "Mic", "Mic Master", "CD", "AOUT",
947*4882a593Smuzhiyun "Mic1", "Mix", "Line", "Master"
948*4882a593Smuzhiyun };
949*4882a593Smuzhiyun struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol);
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun switch (chip->version) {
952*4882a593Smuzhiyun case 0x1868:
953*4882a593Smuzhiyun case 0x1878:
954*4882a593Smuzhiyun return snd_ctl_enum_info(uinfo, 1, 4, texts5Source);
955*4882a593Smuzhiyun case 0x1887:
956*4882a593Smuzhiyun case 0x1888:
957*4882a593Smuzhiyun return snd_ctl_enum_info(uinfo, 1, 5, texts5Source);
958*4882a593Smuzhiyun case 0x1869: /* DS somewhat contradictory for 1869: could be 5 or 8 */
959*4882a593Smuzhiyun case 0x1879:
960*4882a593Smuzhiyun return snd_ctl_enum_info(uinfo, 1, 8, texts8Source);
961*4882a593Smuzhiyun default:
962*4882a593Smuzhiyun return -EINVAL;
963*4882a593Smuzhiyun }
964*4882a593Smuzhiyun }
965*4882a593Smuzhiyun
snd_es18xx_get_mux(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)966*4882a593Smuzhiyun static int snd_es18xx_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
967*4882a593Smuzhiyun {
968*4882a593Smuzhiyun static const unsigned char invMap4Source[8] = {0, 0, 1, 1, 0, 0, 2, 3};
969*4882a593Smuzhiyun struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol);
970*4882a593Smuzhiyun int muxSource = snd_es18xx_mixer_read(chip, 0x1c) & 0x07;
971*4882a593Smuzhiyun if (!(chip->version == 0x1869 || chip->version == 0x1879)) {
972*4882a593Smuzhiyun muxSource = invMap4Source[muxSource];
973*4882a593Smuzhiyun if (muxSource==3 &&
974*4882a593Smuzhiyun (chip->version == 0x1887 || chip->version == 0x1888) &&
975*4882a593Smuzhiyun (snd_es18xx_mixer_read(chip, 0x7a) & 0x08)
976*4882a593Smuzhiyun )
977*4882a593Smuzhiyun muxSource = 4;
978*4882a593Smuzhiyun }
979*4882a593Smuzhiyun ucontrol->value.enumerated.item[0] = muxSource;
980*4882a593Smuzhiyun return 0;
981*4882a593Smuzhiyun }
982*4882a593Smuzhiyun
snd_es18xx_put_mux(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)983*4882a593Smuzhiyun static int snd_es18xx_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
984*4882a593Smuzhiyun {
985*4882a593Smuzhiyun static const unsigned char map4Source[4] = {0, 2, 6, 7};
986*4882a593Smuzhiyun struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol);
987*4882a593Smuzhiyun unsigned char val = ucontrol->value.enumerated.item[0];
988*4882a593Smuzhiyun unsigned char retVal = 0;
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun switch (chip->version) {
991*4882a593Smuzhiyun /* 5 source chips */
992*4882a593Smuzhiyun case 0x1887:
993*4882a593Smuzhiyun case 0x1888:
994*4882a593Smuzhiyun if (val > 4)
995*4882a593Smuzhiyun return -EINVAL;
996*4882a593Smuzhiyun if (val == 4) {
997*4882a593Smuzhiyun retVal = snd_es18xx_mixer_bits(chip, 0x7a, 0x08, 0x08) != 0x08;
998*4882a593Smuzhiyun val = 3;
999*4882a593Smuzhiyun } else
1000*4882a593Smuzhiyun retVal = snd_es18xx_mixer_bits(chip, 0x7a, 0x08, 0x00) != 0x00;
1001*4882a593Smuzhiyun fallthrough;
1002*4882a593Smuzhiyun /* 4 source chips */
1003*4882a593Smuzhiyun case 0x1868:
1004*4882a593Smuzhiyun case 0x1878:
1005*4882a593Smuzhiyun if (val > 3)
1006*4882a593Smuzhiyun return -EINVAL;
1007*4882a593Smuzhiyun val = map4Source[val];
1008*4882a593Smuzhiyun break;
1009*4882a593Smuzhiyun /* 8 source chips */
1010*4882a593Smuzhiyun case 0x1869:
1011*4882a593Smuzhiyun case 0x1879:
1012*4882a593Smuzhiyun if (val > 7)
1013*4882a593Smuzhiyun return -EINVAL;
1014*4882a593Smuzhiyun break;
1015*4882a593Smuzhiyun default:
1016*4882a593Smuzhiyun return -EINVAL;
1017*4882a593Smuzhiyun }
1018*4882a593Smuzhiyun return (snd_es18xx_mixer_bits(chip, 0x1c, 0x07, val) != val) || retVal;
1019*4882a593Smuzhiyun }
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun #define snd_es18xx_info_spatializer_enable snd_ctl_boolean_mono_info
1022*4882a593Smuzhiyun
snd_es18xx_get_spatializer_enable(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1023*4882a593Smuzhiyun static int snd_es18xx_get_spatializer_enable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1024*4882a593Smuzhiyun {
1025*4882a593Smuzhiyun struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol);
1026*4882a593Smuzhiyun unsigned char val = snd_es18xx_mixer_read(chip, 0x50);
1027*4882a593Smuzhiyun ucontrol->value.integer.value[0] = !!(val & 8);
1028*4882a593Smuzhiyun return 0;
1029*4882a593Smuzhiyun }
1030*4882a593Smuzhiyun
snd_es18xx_put_spatializer_enable(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1031*4882a593Smuzhiyun static int snd_es18xx_put_spatializer_enable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1032*4882a593Smuzhiyun {
1033*4882a593Smuzhiyun struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol);
1034*4882a593Smuzhiyun unsigned char oval, nval;
1035*4882a593Smuzhiyun int change;
1036*4882a593Smuzhiyun nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1037*4882a593Smuzhiyun oval = snd_es18xx_mixer_read(chip, 0x50) & 0x0c;
1038*4882a593Smuzhiyun change = nval != oval;
1039*4882a593Smuzhiyun if (change) {
1040*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x50, nval & ~0x04);
1041*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x50, nval);
1042*4882a593Smuzhiyun }
1043*4882a593Smuzhiyun return change;
1044*4882a593Smuzhiyun }
1045*4882a593Smuzhiyun
snd_es18xx_info_hw_volume(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1046*4882a593Smuzhiyun static int snd_es18xx_info_hw_volume(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1047*4882a593Smuzhiyun {
1048*4882a593Smuzhiyun uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1049*4882a593Smuzhiyun uinfo->count = 2;
1050*4882a593Smuzhiyun uinfo->value.integer.min = 0;
1051*4882a593Smuzhiyun uinfo->value.integer.max = 63;
1052*4882a593Smuzhiyun return 0;
1053*4882a593Smuzhiyun }
1054*4882a593Smuzhiyun
snd_es18xx_get_hw_volume(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1055*4882a593Smuzhiyun static int snd_es18xx_get_hw_volume(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1056*4882a593Smuzhiyun {
1057*4882a593Smuzhiyun struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol);
1058*4882a593Smuzhiyun ucontrol->value.integer.value[0] = snd_es18xx_mixer_read(chip, 0x61) & 0x3f;
1059*4882a593Smuzhiyun ucontrol->value.integer.value[1] = snd_es18xx_mixer_read(chip, 0x63) & 0x3f;
1060*4882a593Smuzhiyun return 0;
1061*4882a593Smuzhiyun }
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun #define snd_es18xx_info_hw_switch snd_ctl_boolean_stereo_info
1064*4882a593Smuzhiyun
snd_es18xx_get_hw_switch(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1065*4882a593Smuzhiyun static int snd_es18xx_get_hw_switch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1066*4882a593Smuzhiyun {
1067*4882a593Smuzhiyun struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol);
1068*4882a593Smuzhiyun ucontrol->value.integer.value[0] = !(snd_es18xx_mixer_read(chip, 0x61) & 0x40);
1069*4882a593Smuzhiyun ucontrol->value.integer.value[1] = !(snd_es18xx_mixer_read(chip, 0x63) & 0x40);
1070*4882a593Smuzhiyun return 0;
1071*4882a593Smuzhiyun }
1072*4882a593Smuzhiyun
snd_es18xx_hwv_free(struct snd_kcontrol * kcontrol)1073*4882a593Smuzhiyun static void snd_es18xx_hwv_free(struct snd_kcontrol *kcontrol)
1074*4882a593Smuzhiyun {
1075*4882a593Smuzhiyun struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol);
1076*4882a593Smuzhiyun chip->master_volume = NULL;
1077*4882a593Smuzhiyun chip->master_switch = NULL;
1078*4882a593Smuzhiyun chip->hw_volume = NULL;
1079*4882a593Smuzhiyun chip->hw_switch = NULL;
1080*4882a593Smuzhiyun }
1081*4882a593Smuzhiyun
snd_es18xx_reg_bits(struct snd_es18xx * chip,unsigned char reg,unsigned char mask,unsigned char val)1082*4882a593Smuzhiyun static int snd_es18xx_reg_bits(struct snd_es18xx *chip, unsigned char reg,
1083*4882a593Smuzhiyun unsigned char mask, unsigned char val)
1084*4882a593Smuzhiyun {
1085*4882a593Smuzhiyun if (reg < 0xa0)
1086*4882a593Smuzhiyun return snd_es18xx_mixer_bits(chip, reg, mask, val);
1087*4882a593Smuzhiyun else
1088*4882a593Smuzhiyun return snd_es18xx_bits(chip, reg, mask, val);
1089*4882a593Smuzhiyun }
1090*4882a593Smuzhiyun
snd_es18xx_reg_read(struct snd_es18xx * chip,unsigned char reg)1091*4882a593Smuzhiyun static int snd_es18xx_reg_read(struct snd_es18xx *chip, unsigned char reg)
1092*4882a593Smuzhiyun {
1093*4882a593Smuzhiyun if (reg < 0xa0)
1094*4882a593Smuzhiyun return snd_es18xx_mixer_read(chip, reg);
1095*4882a593Smuzhiyun else
1096*4882a593Smuzhiyun return snd_es18xx_read(chip, reg);
1097*4882a593Smuzhiyun }
1098*4882a593Smuzhiyun
1099*4882a593Smuzhiyun #define ES18XX_SINGLE(xname, xindex, reg, shift, mask, flags) \
1100*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1101*4882a593Smuzhiyun .info = snd_es18xx_info_single, \
1102*4882a593Smuzhiyun .get = snd_es18xx_get_single, .put = snd_es18xx_put_single, \
1103*4882a593Smuzhiyun .private_value = reg | (shift << 8) | (mask << 16) | (flags << 24) }
1104*4882a593Smuzhiyun
1105*4882a593Smuzhiyun #define ES18XX_FL_INVERT (1 << 0)
1106*4882a593Smuzhiyun #define ES18XX_FL_PMPORT (1 << 1)
1107*4882a593Smuzhiyun
snd_es18xx_info_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1108*4882a593Smuzhiyun static int snd_es18xx_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1109*4882a593Smuzhiyun {
1110*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 16) & 0xff;
1111*4882a593Smuzhiyun
1112*4882a593Smuzhiyun uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1113*4882a593Smuzhiyun uinfo->count = 1;
1114*4882a593Smuzhiyun uinfo->value.integer.min = 0;
1115*4882a593Smuzhiyun uinfo->value.integer.max = mask;
1116*4882a593Smuzhiyun return 0;
1117*4882a593Smuzhiyun }
1118*4882a593Smuzhiyun
snd_es18xx_get_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1119*4882a593Smuzhiyun static int snd_es18xx_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1120*4882a593Smuzhiyun {
1121*4882a593Smuzhiyun struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol);
1122*4882a593Smuzhiyun int reg = kcontrol->private_value & 0xff;
1123*4882a593Smuzhiyun int shift = (kcontrol->private_value >> 8) & 0xff;
1124*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 16) & 0xff;
1125*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 24) & ES18XX_FL_INVERT;
1126*4882a593Smuzhiyun int pm_port = (kcontrol->private_value >> 24) & ES18XX_FL_PMPORT;
1127*4882a593Smuzhiyun int val;
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun if (pm_port)
1130*4882a593Smuzhiyun val = inb(chip->port + ES18XX_PM);
1131*4882a593Smuzhiyun else
1132*4882a593Smuzhiyun val = snd_es18xx_reg_read(chip, reg);
1133*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val >> shift) & mask;
1134*4882a593Smuzhiyun if (invert)
1135*4882a593Smuzhiyun ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1136*4882a593Smuzhiyun return 0;
1137*4882a593Smuzhiyun }
1138*4882a593Smuzhiyun
snd_es18xx_put_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1139*4882a593Smuzhiyun static int snd_es18xx_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1140*4882a593Smuzhiyun {
1141*4882a593Smuzhiyun struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol);
1142*4882a593Smuzhiyun int reg = kcontrol->private_value & 0xff;
1143*4882a593Smuzhiyun int shift = (kcontrol->private_value >> 8) & 0xff;
1144*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 16) & 0xff;
1145*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 24) & ES18XX_FL_INVERT;
1146*4882a593Smuzhiyun int pm_port = (kcontrol->private_value >> 24) & ES18XX_FL_PMPORT;
1147*4882a593Smuzhiyun unsigned char val;
1148*4882a593Smuzhiyun
1149*4882a593Smuzhiyun val = (ucontrol->value.integer.value[0] & mask);
1150*4882a593Smuzhiyun if (invert)
1151*4882a593Smuzhiyun val = mask - val;
1152*4882a593Smuzhiyun mask <<= shift;
1153*4882a593Smuzhiyun val <<= shift;
1154*4882a593Smuzhiyun if (pm_port) {
1155*4882a593Smuzhiyun unsigned char cur = inb(chip->port + ES18XX_PM);
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun if ((cur & mask) == val)
1158*4882a593Smuzhiyun return 0;
1159*4882a593Smuzhiyun outb((cur & ~mask) | val, chip->port + ES18XX_PM);
1160*4882a593Smuzhiyun return 1;
1161*4882a593Smuzhiyun }
1162*4882a593Smuzhiyun
1163*4882a593Smuzhiyun return snd_es18xx_reg_bits(chip, reg, mask, val) != val;
1164*4882a593Smuzhiyun }
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun #define ES18XX_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1167*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1168*4882a593Smuzhiyun .info = snd_es18xx_info_double, \
1169*4882a593Smuzhiyun .get = snd_es18xx_get_double, .put = snd_es18xx_put_double, \
1170*4882a593Smuzhiyun .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1171*4882a593Smuzhiyun
snd_es18xx_info_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1172*4882a593Smuzhiyun static int snd_es18xx_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1173*4882a593Smuzhiyun {
1174*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 24) & 0xff;
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1177*4882a593Smuzhiyun uinfo->count = 2;
1178*4882a593Smuzhiyun uinfo->value.integer.min = 0;
1179*4882a593Smuzhiyun uinfo->value.integer.max = mask;
1180*4882a593Smuzhiyun return 0;
1181*4882a593Smuzhiyun }
1182*4882a593Smuzhiyun
snd_es18xx_get_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1183*4882a593Smuzhiyun static int snd_es18xx_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1184*4882a593Smuzhiyun {
1185*4882a593Smuzhiyun struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol);
1186*4882a593Smuzhiyun int left_reg = kcontrol->private_value & 0xff;
1187*4882a593Smuzhiyun int right_reg = (kcontrol->private_value >> 8) & 0xff;
1188*4882a593Smuzhiyun int shift_left = (kcontrol->private_value >> 16) & 0x07;
1189*4882a593Smuzhiyun int shift_right = (kcontrol->private_value >> 19) & 0x07;
1190*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 24) & 0xff;
1191*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 22) & 1;
1192*4882a593Smuzhiyun unsigned char left, right;
1193*4882a593Smuzhiyun
1194*4882a593Smuzhiyun left = snd_es18xx_reg_read(chip, left_reg);
1195*4882a593Smuzhiyun if (left_reg != right_reg)
1196*4882a593Smuzhiyun right = snd_es18xx_reg_read(chip, right_reg);
1197*4882a593Smuzhiyun else
1198*4882a593Smuzhiyun right = left;
1199*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1200*4882a593Smuzhiyun ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1201*4882a593Smuzhiyun if (invert) {
1202*4882a593Smuzhiyun ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1203*4882a593Smuzhiyun ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1204*4882a593Smuzhiyun }
1205*4882a593Smuzhiyun return 0;
1206*4882a593Smuzhiyun }
1207*4882a593Smuzhiyun
snd_es18xx_put_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1208*4882a593Smuzhiyun static int snd_es18xx_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1209*4882a593Smuzhiyun {
1210*4882a593Smuzhiyun struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol);
1211*4882a593Smuzhiyun int left_reg = kcontrol->private_value & 0xff;
1212*4882a593Smuzhiyun int right_reg = (kcontrol->private_value >> 8) & 0xff;
1213*4882a593Smuzhiyun int shift_left = (kcontrol->private_value >> 16) & 0x07;
1214*4882a593Smuzhiyun int shift_right = (kcontrol->private_value >> 19) & 0x07;
1215*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 24) & 0xff;
1216*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 22) & 1;
1217*4882a593Smuzhiyun int change;
1218*4882a593Smuzhiyun unsigned char val1, val2, mask1, mask2;
1219*4882a593Smuzhiyun
1220*4882a593Smuzhiyun val1 = ucontrol->value.integer.value[0] & mask;
1221*4882a593Smuzhiyun val2 = ucontrol->value.integer.value[1] & mask;
1222*4882a593Smuzhiyun if (invert) {
1223*4882a593Smuzhiyun val1 = mask - val1;
1224*4882a593Smuzhiyun val2 = mask - val2;
1225*4882a593Smuzhiyun }
1226*4882a593Smuzhiyun val1 <<= shift_left;
1227*4882a593Smuzhiyun val2 <<= shift_right;
1228*4882a593Smuzhiyun mask1 = mask << shift_left;
1229*4882a593Smuzhiyun mask2 = mask << shift_right;
1230*4882a593Smuzhiyun if (left_reg != right_reg) {
1231*4882a593Smuzhiyun change = 0;
1232*4882a593Smuzhiyun if (snd_es18xx_reg_bits(chip, left_reg, mask1, val1) != val1)
1233*4882a593Smuzhiyun change = 1;
1234*4882a593Smuzhiyun if (snd_es18xx_reg_bits(chip, right_reg, mask2, val2) != val2)
1235*4882a593Smuzhiyun change = 1;
1236*4882a593Smuzhiyun } else {
1237*4882a593Smuzhiyun change = (snd_es18xx_reg_bits(chip, left_reg, mask1 | mask2,
1238*4882a593Smuzhiyun val1 | val2) != (val1 | val2));
1239*4882a593Smuzhiyun }
1240*4882a593Smuzhiyun return change;
1241*4882a593Smuzhiyun }
1242*4882a593Smuzhiyun
1243*4882a593Smuzhiyun /* Mixer controls
1244*4882a593Smuzhiyun * These arrays contain setup data for mixer controls.
1245*4882a593Smuzhiyun *
1246*4882a593Smuzhiyun * The controls that are universal to all chipsets are fully initialized
1247*4882a593Smuzhiyun * here.
1248*4882a593Smuzhiyun */
1249*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_base_controls[] = {
1250*4882a593Smuzhiyun ES18XX_DOUBLE("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0),
1251*4882a593Smuzhiyun ES18XX_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1252*4882a593Smuzhiyun ES18XX_DOUBLE("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0),
1253*4882a593Smuzhiyun ES18XX_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
1254*4882a593Smuzhiyun ES18XX_DOUBLE("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0),
1255*4882a593Smuzhiyun ES18XX_DOUBLE("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0),
1256*4882a593Smuzhiyun ES18XX_DOUBLE("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0),
1257*4882a593Smuzhiyun ES18XX_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1258*4882a593Smuzhiyun ES18XX_DOUBLE("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0),
1259*4882a593Smuzhiyun {
1260*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1261*4882a593Smuzhiyun .name = "Capture Source",
1262*4882a593Smuzhiyun .info = snd_es18xx_info_mux,
1263*4882a593Smuzhiyun .get = snd_es18xx_get_mux,
1264*4882a593Smuzhiyun .put = snd_es18xx_put_mux,
1265*4882a593Smuzhiyun }
1266*4882a593Smuzhiyun };
1267*4882a593Smuzhiyun
1268*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_recmix_controls[] = {
1269*4882a593Smuzhiyun ES18XX_DOUBLE("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0),
1270*4882a593Smuzhiyun ES18XX_DOUBLE("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0),
1271*4882a593Smuzhiyun ES18XX_DOUBLE("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0),
1272*4882a593Smuzhiyun ES18XX_DOUBLE("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0),
1273*4882a593Smuzhiyun ES18XX_DOUBLE("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0),
1274*4882a593Smuzhiyun ES18XX_DOUBLE("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0)
1275*4882a593Smuzhiyun };
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun /*
1278*4882a593Smuzhiyun * The chipset specific mixer controls
1279*4882a593Smuzhiyun */
1280*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_opt_speaker =
1281*4882a593Smuzhiyun ES18XX_SINGLE("Beep Playback Volume", 0, 0x3c, 0, 7, 0);
1282*4882a593Smuzhiyun
1283*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_opt_1869[] = {
1284*4882a593Smuzhiyun ES18XX_SINGLE("Capture Switch", 0, 0x1c, 4, 1, ES18XX_FL_INVERT),
1285*4882a593Smuzhiyun ES18XX_SINGLE("Video Playback Switch", 0, 0x7f, 0, 1, 0),
1286*4882a593Smuzhiyun ES18XX_DOUBLE("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0),
1287*4882a593Smuzhiyun ES18XX_DOUBLE("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0)
1288*4882a593Smuzhiyun };
1289*4882a593Smuzhiyun
1290*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_opt_1878 =
1291*4882a593Smuzhiyun ES18XX_DOUBLE("Video Playback Volume", 0, 0x68, 0x68, 4, 0, 15, 0);
1292*4882a593Smuzhiyun
1293*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_opt_1879[] = {
1294*4882a593Smuzhiyun ES18XX_SINGLE("Video Playback Switch", 0, 0x71, 6, 1, 0),
1295*4882a593Smuzhiyun ES18XX_DOUBLE("Video Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0),
1296*4882a593Smuzhiyun ES18XX_DOUBLE("Video Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0)
1297*4882a593Smuzhiyun };
1298*4882a593Smuzhiyun
1299*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_pcm1_controls[] = {
1300*4882a593Smuzhiyun ES18XX_DOUBLE("PCM Playback Volume", 0, 0x14, 0x14, 4, 0, 15, 0),
1301*4882a593Smuzhiyun };
1302*4882a593Smuzhiyun
1303*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_pcm2_controls[] = {
1304*4882a593Smuzhiyun ES18XX_DOUBLE("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0),
1305*4882a593Smuzhiyun ES18XX_DOUBLE("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0)
1306*4882a593Smuzhiyun };
1307*4882a593Smuzhiyun
1308*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_spatializer_controls[] = {
1309*4882a593Smuzhiyun ES18XX_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1310*4882a593Smuzhiyun {
1311*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1312*4882a593Smuzhiyun .name = "3D Control - Switch",
1313*4882a593Smuzhiyun .info = snd_es18xx_info_spatializer_enable,
1314*4882a593Smuzhiyun .get = snd_es18xx_get_spatializer_enable,
1315*4882a593Smuzhiyun .put = snd_es18xx_put_spatializer_enable,
1316*4882a593Smuzhiyun }
1317*4882a593Smuzhiyun };
1318*4882a593Smuzhiyun
1319*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_micpre1_control =
1320*4882a593Smuzhiyun ES18XX_SINGLE("Mic Boost (+26dB)", 0, 0xa9, 2, 1, 0);
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_micpre2_control =
1323*4882a593Smuzhiyun ES18XX_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0);
1324*4882a593Smuzhiyun
1325*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_hw_volume_controls[] = {
1326*4882a593Smuzhiyun {
1327*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1328*4882a593Smuzhiyun .name = "Hardware Master Playback Volume",
1329*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ,
1330*4882a593Smuzhiyun .info = snd_es18xx_info_hw_volume,
1331*4882a593Smuzhiyun .get = snd_es18xx_get_hw_volume,
1332*4882a593Smuzhiyun },
1333*4882a593Smuzhiyun {
1334*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1335*4882a593Smuzhiyun .name = "Hardware Master Playback Switch",
1336*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ,
1337*4882a593Smuzhiyun .info = snd_es18xx_info_hw_switch,
1338*4882a593Smuzhiyun .get = snd_es18xx_get_hw_switch,
1339*4882a593Smuzhiyun },
1340*4882a593Smuzhiyun ES18XX_SINGLE("Hardware Master Volume Split", 0, 0x64, 7, 1, 0),
1341*4882a593Smuzhiyun };
1342*4882a593Smuzhiyun
1343*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es18xx_opt_gpo_2bit[] = {
1344*4882a593Smuzhiyun ES18XX_SINGLE("GPO0 Switch", 0, ES18XX_PM, 0, 1, ES18XX_FL_PMPORT),
1345*4882a593Smuzhiyun ES18XX_SINGLE("GPO1 Switch", 0, ES18XX_PM, 1, 1, ES18XX_FL_PMPORT),
1346*4882a593Smuzhiyun };
1347*4882a593Smuzhiyun
snd_es18xx_config_read(struct snd_es18xx * chip,unsigned char reg)1348*4882a593Smuzhiyun static int snd_es18xx_config_read(struct snd_es18xx *chip, unsigned char reg)
1349*4882a593Smuzhiyun {
1350*4882a593Smuzhiyun int data;
1351*4882a593Smuzhiyun
1352*4882a593Smuzhiyun outb(reg, chip->ctrl_port);
1353*4882a593Smuzhiyun data = inb(chip->ctrl_port + 1);
1354*4882a593Smuzhiyun return data;
1355*4882a593Smuzhiyun }
1356*4882a593Smuzhiyun
snd_es18xx_config_write(struct snd_es18xx * chip,unsigned char reg,unsigned char data)1357*4882a593Smuzhiyun static void snd_es18xx_config_write(struct snd_es18xx *chip,
1358*4882a593Smuzhiyun unsigned char reg, unsigned char data)
1359*4882a593Smuzhiyun {
1360*4882a593Smuzhiyun /* No need for spinlocks, this function is used only in
1361*4882a593Smuzhiyun otherwise protected init code */
1362*4882a593Smuzhiyun outb(reg, chip->ctrl_port);
1363*4882a593Smuzhiyun outb(data, chip->ctrl_port + 1);
1364*4882a593Smuzhiyun #ifdef REG_DEBUG
1365*4882a593Smuzhiyun snd_printk(KERN_DEBUG "Config reg %02x set to %02x\n", reg, data);
1366*4882a593Smuzhiyun #endif
1367*4882a593Smuzhiyun }
1368*4882a593Smuzhiyun
snd_es18xx_initialize(struct snd_es18xx * chip,unsigned long mpu_port,unsigned long fm_port)1369*4882a593Smuzhiyun static int snd_es18xx_initialize(struct snd_es18xx *chip,
1370*4882a593Smuzhiyun unsigned long mpu_port,
1371*4882a593Smuzhiyun unsigned long fm_port)
1372*4882a593Smuzhiyun {
1373*4882a593Smuzhiyun int mask = 0;
1374*4882a593Smuzhiyun
1375*4882a593Smuzhiyun /* enable extended mode */
1376*4882a593Smuzhiyun snd_es18xx_dsp_command(chip, 0xC6);
1377*4882a593Smuzhiyun /* Reset mixer registers */
1378*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x00, 0x00);
1379*4882a593Smuzhiyun
1380*4882a593Smuzhiyun /* Audio 1 DMA demand mode (4 bytes/request) */
1381*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB9, 2);
1382*4882a593Smuzhiyun if (chip->caps & ES18XX_CONTROL) {
1383*4882a593Smuzhiyun /* Hardware volume IRQ */
1384*4882a593Smuzhiyun snd_es18xx_config_write(chip, 0x27, chip->irq);
1385*4882a593Smuzhiyun if (fm_port > 0 && fm_port != SNDRV_AUTO_PORT) {
1386*4882a593Smuzhiyun /* FM I/O */
1387*4882a593Smuzhiyun snd_es18xx_config_write(chip, 0x62, fm_port >> 8);
1388*4882a593Smuzhiyun snd_es18xx_config_write(chip, 0x63, fm_port & 0xff);
1389*4882a593Smuzhiyun }
1390*4882a593Smuzhiyun if (mpu_port > 0 && mpu_port != SNDRV_AUTO_PORT) {
1391*4882a593Smuzhiyun /* MPU-401 I/O */
1392*4882a593Smuzhiyun snd_es18xx_config_write(chip, 0x64, mpu_port >> 8);
1393*4882a593Smuzhiyun snd_es18xx_config_write(chip, 0x65, mpu_port & 0xff);
1394*4882a593Smuzhiyun /* MPU-401 IRQ */
1395*4882a593Smuzhiyun snd_es18xx_config_write(chip, 0x28, chip->irq);
1396*4882a593Smuzhiyun }
1397*4882a593Smuzhiyun /* Audio1 IRQ */
1398*4882a593Smuzhiyun snd_es18xx_config_write(chip, 0x70, chip->irq);
1399*4882a593Smuzhiyun /* Audio2 IRQ */
1400*4882a593Smuzhiyun snd_es18xx_config_write(chip, 0x72, chip->irq);
1401*4882a593Smuzhiyun /* Audio1 DMA */
1402*4882a593Smuzhiyun snd_es18xx_config_write(chip, 0x74, chip->dma1);
1403*4882a593Smuzhiyun /* Audio2 DMA */
1404*4882a593Smuzhiyun snd_es18xx_config_write(chip, 0x75, chip->dma2);
1405*4882a593Smuzhiyun
1406*4882a593Smuzhiyun /* Enable Audio 1 IRQ */
1407*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB1, 0x50);
1408*4882a593Smuzhiyun /* Enable Audio 2 IRQ */
1409*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x7A, 0x40);
1410*4882a593Smuzhiyun /* Enable Audio 1 DMA */
1411*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB2, 0x50);
1412*4882a593Smuzhiyun /* Enable MPU and hardware volume interrupt */
1413*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x64, 0x42);
1414*4882a593Smuzhiyun /* Enable ESS wavetable input */
1415*4882a593Smuzhiyun snd_es18xx_mixer_bits(chip, 0x48, 0x10, 0x10);
1416*4882a593Smuzhiyun }
1417*4882a593Smuzhiyun else {
1418*4882a593Smuzhiyun int irqmask, dma1mask, dma2mask;
1419*4882a593Smuzhiyun switch (chip->irq) {
1420*4882a593Smuzhiyun case 2:
1421*4882a593Smuzhiyun case 9:
1422*4882a593Smuzhiyun irqmask = 0;
1423*4882a593Smuzhiyun break;
1424*4882a593Smuzhiyun case 5:
1425*4882a593Smuzhiyun irqmask = 1;
1426*4882a593Smuzhiyun break;
1427*4882a593Smuzhiyun case 7:
1428*4882a593Smuzhiyun irqmask = 2;
1429*4882a593Smuzhiyun break;
1430*4882a593Smuzhiyun case 10:
1431*4882a593Smuzhiyun irqmask = 3;
1432*4882a593Smuzhiyun break;
1433*4882a593Smuzhiyun default:
1434*4882a593Smuzhiyun snd_printk(KERN_ERR "invalid irq %d\n", chip->irq);
1435*4882a593Smuzhiyun return -ENODEV;
1436*4882a593Smuzhiyun }
1437*4882a593Smuzhiyun switch (chip->dma1) {
1438*4882a593Smuzhiyun case 0:
1439*4882a593Smuzhiyun dma1mask = 1;
1440*4882a593Smuzhiyun break;
1441*4882a593Smuzhiyun case 1:
1442*4882a593Smuzhiyun dma1mask = 2;
1443*4882a593Smuzhiyun break;
1444*4882a593Smuzhiyun case 3:
1445*4882a593Smuzhiyun dma1mask = 3;
1446*4882a593Smuzhiyun break;
1447*4882a593Smuzhiyun default:
1448*4882a593Smuzhiyun snd_printk(KERN_ERR "invalid dma1 %d\n", chip->dma1);
1449*4882a593Smuzhiyun return -ENODEV;
1450*4882a593Smuzhiyun }
1451*4882a593Smuzhiyun switch (chip->dma2) {
1452*4882a593Smuzhiyun case 0:
1453*4882a593Smuzhiyun dma2mask = 0;
1454*4882a593Smuzhiyun break;
1455*4882a593Smuzhiyun case 1:
1456*4882a593Smuzhiyun dma2mask = 1;
1457*4882a593Smuzhiyun break;
1458*4882a593Smuzhiyun case 3:
1459*4882a593Smuzhiyun dma2mask = 2;
1460*4882a593Smuzhiyun break;
1461*4882a593Smuzhiyun case 5:
1462*4882a593Smuzhiyun dma2mask = 3;
1463*4882a593Smuzhiyun break;
1464*4882a593Smuzhiyun default:
1465*4882a593Smuzhiyun snd_printk(KERN_ERR "invalid dma2 %d\n", chip->dma2);
1466*4882a593Smuzhiyun return -ENODEV;
1467*4882a593Smuzhiyun }
1468*4882a593Smuzhiyun
1469*4882a593Smuzhiyun /* Enable and set Audio 1 IRQ */
1470*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB1, 0x50 | (irqmask << 2));
1471*4882a593Smuzhiyun /* Enable and set Audio 1 DMA */
1472*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB2, 0x50 | (dma1mask << 2));
1473*4882a593Smuzhiyun /* Set Audio 2 DMA */
1474*4882a593Smuzhiyun snd_es18xx_mixer_bits(chip, 0x7d, 0x07, 0x04 | dma2mask);
1475*4882a593Smuzhiyun /* Enable Audio 2 IRQ and DMA
1476*4882a593Smuzhiyun Set capture mixer input */
1477*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x7A, 0x68);
1478*4882a593Smuzhiyun /* Enable and set hardware volume interrupt */
1479*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x64, 0x06);
1480*4882a593Smuzhiyun if (mpu_port > 0 && mpu_port != SNDRV_AUTO_PORT) {
1481*4882a593Smuzhiyun /* MPU401 share irq with audio
1482*4882a593Smuzhiyun Joystick enabled
1483*4882a593Smuzhiyun FM enabled */
1484*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x40,
1485*4882a593Smuzhiyun 0x43 | (mpu_port & 0xf0) >> 1);
1486*4882a593Smuzhiyun }
1487*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x7f, ((irqmask + 1) << 1) | 0x01);
1488*4882a593Smuzhiyun }
1489*4882a593Smuzhiyun if (chip->caps & ES18XX_NEW_RATE) {
1490*4882a593Smuzhiyun /* Change behaviour of register A1
1491*4882a593Smuzhiyun 4x oversampling
1492*4882a593Smuzhiyun 2nd channel DAC asynchronous */
1493*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x71, 0x32);
1494*4882a593Smuzhiyun }
1495*4882a593Smuzhiyun if (!(chip->caps & ES18XX_PCM2)) {
1496*4882a593Smuzhiyun /* Enable DMA FIFO */
1497*4882a593Smuzhiyun snd_es18xx_write(chip, 0xB7, 0x80);
1498*4882a593Smuzhiyun }
1499*4882a593Smuzhiyun if (chip->caps & ES18XX_SPATIALIZER) {
1500*4882a593Smuzhiyun /* Set spatializer parameters to recommended values */
1501*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x54, 0x8f);
1502*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x56, 0x95);
1503*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x58, 0x94);
1504*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x5a, 0x80);
1505*4882a593Smuzhiyun }
1506*4882a593Smuzhiyun /* Flip the "enable I2S" bits for those chipsets that need it */
1507*4882a593Smuzhiyun switch (chip->version) {
1508*4882a593Smuzhiyun case 0x1879:
1509*4882a593Smuzhiyun //Leaving I2S enabled on the 1879 screws up the PCM playback (rate effected somehow)
1510*4882a593Smuzhiyun //so a Switch control has been added to toggle this 0x71 bit on/off:
1511*4882a593Smuzhiyun //snd_es18xx_mixer_bits(chip, 0x71, 0x40, 0x40);
1512*4882a593Smuzhiyun /* Note: we fall through on purpose here. */
1513*4882a593Smuzhiyun case 0x1878:
1514*4882a593Smuzhiyun snd_es18xx_config_write(chip, 0x29, snd_es18xx_config_read(chip, 0x29) | 0x40);
1515*4882a593Smuzhiyun break;
1516*4882a593Smuzhiyun }
1517*4882a593Smuzhiyun /* Mute input source */
1518*4882a593Smuzhiyun if (chip->caps & ES18XX_MUTEREC)
1519*4882a593Smuzhiyun mask = 0x10;
1520*4882a593Smuzhiyun if (chip->caps & ES18XX_RECMIX)
1521*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x1c, 0x05 | mask);
1522*4882a593Smuzhiyun else {
1523*4882a593Smuzhiyun snd_es18xx_mixer_write(chip, 0x1c, 0x00 | mask);
1524*4882a593Smuzhiyun snd_es18xx_write(chip, 0xb4, 0x00);
1525*4882a593Smuzhiyun }
1526*4882a593Smuzhiyun #ifndef AVOID_POPS
1527*4882a593Smuzhiyun /* Enable PCM output */
1528*4882a593Smuzhiyun snd_es18xx_dsp_command(chip, 0xD1);
1529*4882a593Smuzhiyun #endif
1530*4882a593Smuzhiyun
1531*4882a593Smuzhiyun return 0;
1532*4882a593Smuzhiyun }
1533*4882a593Smuzhiyun
snd_es18xx_identify(struct snd_es18xx * chip)1534*4882a593Smuzhiyun static int snd_es18xx_identify(struct snd_es18xx *chip)
1535*4882a593Smuzhiyun {
1536*4882a593Smuzhiyun int hi,lo;
1537*4882a593Smuzhiyun
1538*4882a593Smuzhiyun /* reset */
1539*4882a593Smuzhiyun if (snd_es18xx_reset(chip) < 0) {
1540*4882a593Smuzhiyun snd_printk(KERN_ERR "reset at 0x%lx failed!!!\n", chip->port);
1541*4882a593Smuzhiyun return -ENODEV;
1542*4882a593Smuzhiyun }
1543*4882a593Smuzhiyun
1544*4882a593Smuzhiyun snd_es18xx_dsp_command(chip, 0xe7);
1545*4882a593Smuzhiyun hi = snd_es18xx_dsp_get_byte(chip);
1546*4882a593Smuzhiyun if (hi < 0) {
1547*4882a593Smuzhiyun return hi;
1548*4882a593Smuzhiyun }
1549*4882a593Smuzhiyun lo = snd_es18xx_dsp_get_byte(chip);
1550*4882a593Smuzhiyun if ((lo & 0xf0) != 0x80) {
1551*4882a593Smuzhiyun return -ENODEV;
1552*4882a593Smuzhiyun }
1553*4882a593Smuzhiyun if (hi == 0x48) {
1554*4882a593Smuzhiyun chip->version = 0x488;
1555*4882a593Smuzhiyun return 0;
1556*4882a593Smuzhiyun }
1557*4882a593Smuzhiyun if (hi != 0x68) {
1558*4882a593Smuzhiyun return -ENODEV;
1559*4882a593Smuzhiyun }
1560*4882a593Smuzhiyun if ((lo & 0x0f) < 8) {
1561*4882a593Smuzhiyun chip->version = 0x688;
1562*4882a593Smuzhiyun return 0;
1563*4882a593Smuzhiyun }
1564*4882a593Smuzhiyun
1565*4882a593Smuzhiyun outb(0x40, chip->port + 0x04);
1566*4882a593Smuzhiyun udelay(10);
1567*4882a593Smuzhiyun hi = inb(chip->port + 0x05);
1568*4882a593Smuzhiyun udelay(10);
1569*4882a593Smuzhiyun lo = inb(chip->port + 0x05);
1570*4882a593Smuzhiyun if (hi != lo) {
1571*4882a593Smuzhiyun chip->version = hi << 8 | lo;
1572*4882a593Smuzhiyun chip->ctrl_port = inb(chip->port + 0x05) << 8;
1573*4882a593Smuzhiyun udelay(10);
1574*4882a593Smuzhiyun chip->ctrl_port += inb(chip->port + 0x05);
1575*4882a593Smuzhiyun
1576*4882a593Smuzhiyun if ((chip->res_ctrl_port = request_region(chip->ctrl_port, 8, "ES18xx - CTRL")) == NULL) {
1577*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "unable go grab port 0x%lx\n", chip->ctrl_port);
1578*4882a593Smuzhiyun return -EBUSY;
1579*4882a593Smuzhiyun }
1580*4882a593Smuzhiyun
1581*4882a593Smuzhiyun return 0;
1582*4882a593Smuzhiyun }
1583*4882a593Smuzhiyun
1584*4882a593Smuzhiyun /* If has Hardware volume */
1585*4882a593Smuzhiyun if (snd_es18xx_mixer_writable(chip, 0x64, 0x04)) {
1586*4882a593Smuzhiyun /* If has Audio2 */
1587*4882a593Smuzhiyun if (snd_es18xx_mixer_writable(chip, 0x70, 0x7f)) {
1588*4882a593Smuzhiyun /* If has volume count */
1589*4882a593Smuzhiyun if (snd_es18xx_mixer_writable(chip, 0x64, 0x20)) {
1590*4882a593Smuzhiyun chip->version = 0x1887;
1591*4882a593Smuzhiyun } else {
1592*4882a593Smuzhiyun chip->version = 0x1888;
1593*4882a593Smuzhiyun }
1594*4882a593Smuzhiyun } else {
1595*4882a593Smuzhiyun chip->version = 0x1788;
1596*4882a593Smuzhiyun }
1597*4882a593Smuzhiyun }
1598*4882a593Smuzhiyun else
1599*4882a593Smuzhiyun chip->version = 0x1688;
1600*4882a593Smuzhiyun return 0;
1601*4882a593Smuzhiyun }
1602*4882a593Smuzhiyun
snd_es18xx_probe(struct snd_es18xx * chip,unsigned long mpu_port,unsigned long fm_port)1603*4882a593Smuzhiyun static int snd_es18xx_probe(struct snd_es18xx *chip,
1604*4882a593Smuzhiyun unsigned long mpu_port,
1605*4882a593Smuzhiyun unsigned long fm_port)
1606*4882a593Smuzhiyun {
1607*4882a593Smuzhiyun if (snd_es18xx_identify(chip) < 0) {
1608*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "[0x%lx] ESS chip not found\n", chip->port);
1609*4882a593Smuzhiyun return -ENODEV;
1610*4882a593Smuzhiyun }
1611*4882a593Smuzhiyun
1612*4882a593Smuzhiyun switch (chip->version) {
1613*4882a593Smuzhiyun case 0x1868:
1614*4882a593Smuzhiyun chip->caps = ES18XX_DUPLEX_MONO | ES18XX_DUPLEX_SAME | ES18XX_CONTROL | ES18XX_GPO_2BIT;
1615*4882a593Smuzhiyun break;
1616*4882a593Smuzhiyun case 0x1869:
1617*4882a593Smuzhiyun chip->caps = ES18XX_PCM2 | ES18XX_SPATIALIZER | ES18XX_RECMIX | ES18XX_NEW_RATE | ES18XX_AUXB | ES18XX_MONO | ES18XX_MUTEREC | ES18XX_CONTROL | ES18XX_HWV | ES18XX_GPO_2BIT;
1618*4882a593Smuzhiyun break;
1619*4882a593Smuzhiyun case 0x1878:
1620*4882a593Smuzhiyun chip->caps = ES18XX_DUPLEX_MONO | ES18XX_DUPLEX_SAME | ES18XX_I2S | ES18XX_CONTROL;
1621*4882a593Smuzhiyun break;
1622*4882a593Smuzhiyun case 0x1879:
1623*4882a593Smuzhiyun chip->caps = ES18XX_PCM2 | ES18XX_SPATIALIZER | ES18XX_RECMIX | ES18XX_NEW_RATE | ES18XX_AUXB | ES18XX_I2S | ES18XX_CONTROL | ES18XX_HWV;
1624*4882a593Smuzhiyun break;
1625*4882a593Smuzhiyun case 0x1887:
1626*4882a593Smuzhiyun case 0x1888:
1627*4882a593Smuzhiyun chip->caps = ES18XX_PCM2 | ES18XX_RECMIX | ES18XX_AUXB | ES18XX_DUPLEX_SAME | ES18XX_GPO_2BIT;
1628*4882a593Smuzhiyun break;
1629*4882a593Smuzhiyun default:
1630*4882a593Smuzhiyun snd_printk(KERN_ERR "[0x%lx] unsupported chip ES%x\n",
1631*4882a593Smuzhiyun chip->port, chip->version);
1632*4882a593Smuzhiyun return -ENODEV;
1633*4882a593Smuzhiyun }
1634*4882a593Smuzhiyun
1635*4882a593Smuzhiyun snd_printd("[0x%lx] ESS%x chip found\n", chip->port, chip->version);
1636*4882a593Smuzhiyun
1637*4882a593Smuzhiyun if (chip->dma1 == chip->dma2)
1638*4882a593Smuzhiyun chip->caps &= ~(ES18XX_PCM2 | ES18XX_DUPLEX_SAME);
1639*4882a593Smuzhiyun
1640*4882a593Smuzhiyun return snd_es18xx_initialize(chip, mpu_port, fm_port);
1641*4882a593Smuzhiyun }
1642*4882a593Smuzhiyun
1643*4882a593Smuzhiyun static const struct snd_pcm_ops snd_es18xx_playback_ops = {
1644*4882a593Smuzhiyun .open = snd_es18xx_playback_open,
1645*4882a593Smuzhiyun .close = snd_es18xx_playback_close,
1646*4882a593Smuzhiyun .hw_params = snd_es18xx_playback_hw_params,
1647*4882a593Smuzhiyun .prepare = snd_es18xx_playback_prepare,
1648*4882a593Smuzhiyun .trigger = snd_es18xx_playback_trigger,
1649*4882a593Smuzhiyun .pointer = snd_es18xx_playback_pointer,
1650*4882a593Smuzhiyun };
1651*4882a593Smuzhiyun
1652*4882a593Smuzhiyun static const struct snd_pcm_ops snd_es18xx_capture_ops = {
1653*4882a593Smuzhiyun .open = snd_es18xx_capture_open,
1654*4882a593Smuzhiyun .close = snd_es18xx_capture_close,
1655*4882a593Smuzhiyun .hw_params = snd_es18xx_capture_hw_params,
1656*4882a593Smuzhiyun .prepare = snd_es18xx_capture_prepare,
1657*4882a593Smuzhiyun .trigger = snd_es18xx_capture_trigger,
1658*4882a593Smuzhiyun .pointer = snd_es18xx_capture_pointer,
1659*4882a593Smuzhiyun };
1660*4882a593Smuzhiyun
snd_es18xx_pcm(struct snd_card * card,int device)1661*4882a593Smuzhiyun static int snd_es18xx_pcm(struct snd_card *card, int device)
1662*4882a593Smuzhiyun {
1663*4882a593Smuzhiyun struct snd_es18xx *chip = card->private_data;
1664*4882a593Smuzhiyun struct snd_pcm *pcm;
1665*4882a593Smuzhiyun char str[16];
1666*4882a593Smuzhiyun int err;
1667*4882a593Smuzhiyun
1668*4882a593Smuzhiyun sprintf(str, "ES%x", chip->version);
1669*4882a593Smuzhiyun if (chip->caps & ES18XX_PCM2)
1670*4882a593Smuzhiyun err = snd_pcm_new(card, str, device, 2, 1, &pcm);
1671*4882a593Smuzhiyun else
1672*4882a593Smuzhiyun err = snd_pcm_new(card, str, device, 1, 1, &pcm);
1673*4882a593Smuzhiyun if (err < 0)
1674*4882a593Smuzhiyun return err;
1675*4882a593Smuzhiyun
1676*4882a593Smuzhiyun snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es18xx_playback_ops);
1677*4882a593Smuzhiyun snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es18xx_capture_ops);
1678*4882a593Smuzhiyun
1679*4882a593Smuzhiyun /* global setup */
1680*4882a593Smuzhiyun pcm->private_data = chip;
1681*4882a593Smuzhiyun pcm->info_flags = 0;
1682*4882a593Smuzhiyun if (chip->caps & ES18XX_DUPLEX_SAME)
1683*4882a593Smuzhiyun pcm->info_flags |= SNDRV_PCM_INFO_JOINT_DUPLEX;
1684*4882a593Smuzhiyun if (! (chip->caps & ES18XX_PCM2))
1685*4882a593Smuzhiyun pcm->info_flags |= SNDRV_PCM_INFO_HALF_DUPLEX;
1686*4882a593Smuzhiyun sprintf(pcm->name, "ESS AudioDrive ES%x", chip->version);
1687*4882a593Smuzhiyun chip->pcm = pcm;
1688*4882a593Smuzhiyun
1689*4882a593Smuzhiyun snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, card->dev,
1690*4882a593Smuzhiyun 64*1024,
1691*4882a593Smuzhiyun chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
1692*4882a593Smuzhiyun return 0;
1693*4882a593Smuzhiyun }
1694*4882a593Smuzhiyun
1695*4882a593Smuzhiyun /* Power Management support functions */
1696*4882a593Smuzhiyun #ifdef CONFIG_PM
snd_es18xx_suspend(struct snd_card * card,pm_message_t state)1697*4882a593Smuzhiyun static int snd_es18xx_suspend(struct snd_card *card, pm_message_t state)
1698*4882a593Smuzhiyun {
1699*4882a593Smuzhiyun struct snd_es18xx *chip = card->private_data;
1700*4882a593Smuzhiyun
1701*4882a593Smuzhiyun snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1702*4882a593Smuzhiyun
1703*4882a593Smuzhiyun /* power down */
1704*4882a593Smuzhiyun chip->pm_reg = (unsigned char)snd_es18xx_read(chip, ES18XX_PM);
1705*4882a593Smuzhiyun chip->pm_reg |= (ES18XX_PM_FM | ES18XX_PM_SUS);
1706*4882a593Smuzhiyun snd_es18xx_write(chip, ES18XX_PM, chip->pm_reg);
1707*4882a593Smuzhiyun snd_es18xx_write(chip, ES18XX_PM, chip->pm_reg ^= ES18XX_PM_SUS);
1708*4882a593Smuzhiyun
1709*4882a593Smuzhiyun return 0;
1710*4882a593Smuzhiyun }
1711*4882a593Smuzhiyun
snd_es18xx_resume(struct snd_card * card)1712*4882a593Smuzhiyun static int snd_es18xx_resume(struct snd_card *card)
1713*4882a593Smuzhiyun {
1714*4882a593Smuzhiyun struct snd_es18xx *chip = card->private_data;
1715*4882a593Smuzhiyun
1716*4882a593Smuzhiyun /* restore PM register, we won't wake till (not 0x07) i/o activity though */
1717*4882a593Smuzhiyun snd_es18xx_write(chip, ES18XX_PM, chip->pm_reg ^= ES18XX_PM_FM);
1718*4882a593Smuzhiyun
1719*4882a593Smuzhiyun snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1720*4882a593Smuzhiyun return 0;
1721*4882a593Smuzhiyun }
1722*4882a593Smuzhiyun #endif /* CONFIG_PM */
1723*4882a593Smuzhiyun
snd_es18xx_free(struct snd_card * card)1724*4882a593Smuzhiyun static int snd_es18xx_free(struct snd_card *card)
1725*4882a593Smuzhiyun {
1726*4882a593Smuzhiyun struct snd_es18xx *chip = card->private_data;
1727*4882a593Smuzhiyun
1728*4882a593Smuzhiyun release_and_free_resource(chip->res_port);
1729*4882a593Smuzhiyun release_and_free_resource(chip->res_ctrl_port);
1730*4882a593Smuzhiyun release_and_free_resource(chip->res_mpu_port);
1731*4882a593Smuzhiyun if (chip->irq >= 0)
1732*4882a593Smuzhiyun free_irq(chip->irq, (void *) card);
1733*4882a593Smuzhiyun if (chip->dma1 >= 0) {
1734*4882a593Smuzhiyun disable_dma(chip->dma1);
1735*4882a593Smuzhiyun free_dma(chip->dma1);
1736*4882a593Smuzhiyun }
1737*4882a593Smuzhiyun if (chip->dma2 >= 0 && chip->dma1 != chip->dma2) {
1738*4882a593Smuzhiyun disable_dma(chip->dma2);
1739*4882a593Smuzhiyun free_dma(chip->dma2);
1740*4882a593Smuzhiyun }
1741*4882a593Smuzhiyun return 0;
1742*4882a593Smuzhiyun }
1743*4882a593Smuzhiyun
snd_es18xx_dev_free(struct snd_device * device)1744*4882a593Smuzhiyun static int snd_es18xx_dev_free(struct snd_device *device)
1745*4882a593Smuzhiyun {
1746*4882a593Smuzhiyun return snd_es18xx_free(device->card);
1747*4882a593Smuzhiyun }
1748*4882a593Smuzhiyun
snd_es18xx_new_device(struct snd_card * card,unsigned long port,unsigned long mpu_port,unsigned long fm_port,int irq,int dma1,int dma2)1749*4882a593Smuzhiyun static int snd_es18xx_new_device(struct snd_card *card,
1750*4882a593Smuzhiyun unsigned long port,
1751*4882a593Smuzhiyun unsigned long mpu_port,
1752*4882a593Smuzhiyun unsigned long fm_port,
1753*4882a593Smuzhiyun int irq, int dma1, int dma2)
1754*4882a593Smuzhiyun {
1755*4882a593Smuzhiyun struct snd_es18xx *chip = card->private_data;
1756*4882a593Smuzhiyun static const struct snd_device_ops ops = {
1757*4882a593Smuzhiyun .dev_free = snd_es18xx_dev_free,
1758*4882a593Smuzhiyun };
1759*4882a593Smuzhiyun int err;
1760*4882a593Smuzhiyun
1761*4882a593Smuzhiyun spin_lock_init(&chip->reg_lock);
1762*4882a593Smuzhiyun spin_lock_init(&chip->mixer_lock);
1763*4882a593Smuzhiyun chip->port = port;
1764*4882a593Smuzhiyun chip->irq = -1;
1765*4882a593Smuzhiyun chip->dma1 = -1;
1766*4882a593Smuzhiyun chip->dma2 = -1;
1767*4882a593Smuzhiyun chip->audio2_vol = 0x00;
1768*4882a593Smuzhiyun chip->active = 0;
1769*4882a593Smuzhiyun
1770*4882a593Smuzhiyun chip->res_port = request_region(port, 16, "ES18xx");
1771*4882a593Smuzhiyun if (chip->res_port == NULL) {
1772*4882a593Smuzhiyun snd_es18xx_free(card);
1773*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "unable to grap ports 0x%lx-0x%lx\n", port, port + 16 - 1);
1774*4882a593Smuzhiyun return -EBUSY;
1775*4882a593Smuzhiyun }
1776*4882a593Smuzhiyun
1777*4882a593Smuzhiyun if (request_irq(irq, snd_es18xx_interrupt, 0, "ES18xx",
1778*4882a593Smuzhiyun (void *) card)) {
1779*4882a593Smuzhiyun snd_es18xx_free(card);
1780*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "unable to grap IRQ %d\n", irq);
1781*4882a593Smuzhiyun return -EBUSY;
1782*4882a593Smuzhiyun }
1783*4882a593Smuzhiyun chip->irq = irq;
1784*4882a593Smuzhiyun card->sync_irq = chip->irq;
1785*4882a593Smuzhiyun
1786*4882a593Smuzhiyun if (request_dma(dma1, "ES18xx DMA 1")) {
1787*4882a593Smuzhiyun snd_es18xx_free(card);
1788*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "unable to grap DMA1 %d\n", dma1);
1789*4882a593Smuzhiyun return -EBUSY;
1790*4882a593Smuzhiyun }
1791*4882a593Smuzhiyun chip->dma1 = dma1;
1792*4882a593Smuzhiyun
1793*4882a593Smuzhiyun if (dma2 != dma1 && request_dma(dma2, "ES18xx DMA 2")) {
1794*4882a593Smuzhiyun snd_es18xx_free(card);
1795*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "unable to grap DMA2 %d\n", dma2);
1796*4882a593Smuzhiyun return -EBUSY;
1797*4882a593Smuzhiyun }
1798*4882a593Smuzhiyun chip->dma2 = dma2;
1799*4882a593Smuzhiyun
1800*4882a593Smuzhiyun if (snd_es18xx_probe(chip, mpu_port, fm_port) < 0) {
1801*4882a593Smuzhiyun snd_es18xx_free(card);
1802*4882a593Smuzhiyun return -ENODEV;
1803*4882a593Smuzhiyun }
1804*4882a593Smuzhiyun err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1805*4882a593Smuzhiyun if (err < 0) {
1806*4882a593Smuzhiyun snd_es18xx_free(card);
1807*4882a593Smuzhiyun return err;
1808*4882a593Smuzhiyun }
1809*4882a593Smuzhiyun return 0;
1810*4882a593Smuzhiyun }
1811*4882a593Smuzhiyun
snd_es18xx_mixer(struct snd_card * card)1812*4882a593Smuzhiyun static int snd_es18xx_mixer(struct snd_card *card)
1813*4882a593Smuzhiyun {
1814*4882a593Smuzhiyun struct snd_es18xx *chip = card->private_data;
1815*4882a593Smuzhiyun int err;
1816*4882a593Smuzhiyun unsigned int idx;
1817*4882a593Smuzhiyun
1818*4882a593Smuzhiyun strcpy(card->mixername, chip->pcm->name);
1819*4882a593Smuzhiyun
1820*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_es18xx_base_controls); idx++) {
1821*4882a593Smuzhiyun struct snd_kcontrol *kctl;
1822*4882a593Smuzhiyun kctl = snd_ctl_new1(&snd_es18xx_base_controls[idx], chip);
1823*4882a593Smuzhiyun if (chip->caps & ES18XX_HWV) {
1824*4882a593Smuzhiyun switch (idx) {
1825*4882a593Smuzhiyun case 0:
1826*4882a593Smuzhiyun chip->master_volume = kctl;
1827*4882a593Smuzhiyun kctl->private_free = snd_es18xx_hwv_free;
1828*4882a593Smuzhiyun break;
1829*4882a593Smuzhiyun case 1:
1830*4882a593Smuzhiyun chip->master_switch = kctl;
1831*4882a593Smuzhiyun kctl->private_free = snd_es18xx_hwv_free;
1832*4882a593Smuzhiyun break;
1833*4882a593Smuzhiyun }
1834*4882a593Smuzhiyun }
1835*4882a593Smuzhiyun if ((err = snd_ctl_add(card, kctl)) < 0)
1836*4882a593Smuzhiyun return err;
1837*4882a593Smuzhiyun }
1838*4882a593Smuzhiyun if (chip->caps & ES18XX_PCM2) {
1839*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_es18xx_pcm2_controls); idx++) {
1840*4882a593Smuzhiyun if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_pcm2_controls[idx], chip))) < 0)
1841*4882a593Smuzhiyun return err;
1842*4882a593Smuzhiyun }
1843*4882a593Smuzhiyun } else {
1844*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_es18xx_pcm1_controls); idx++) {
1845*4882a593Smuzhiyun if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_pcm1_controls[idx], chip))) < 0)
1846*4882a593Smuzhiyun return err;
1847*4882a593Smuzhiyun }
1848*4882a593Smuzhiyun }
1849*4882a593Smuzhiyun
1850*4882a593Smuzhiyun if (chip->caps & ES18XX_RECMIX) {
1851*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_es18xx_recmix_controls); idx++) {
1852*4882a593Smuzhiyun if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_recmix_controls[idx], chip))) < 0)
1853*4882a593Smuzhiyun return err;
1854*4882a593Smuzhiyun }
1855*4882a593Smuzhiyun }
1856*4882a593Smuzhiyun switch (chip->version) {
1857*4882a593Smuzhiyun default:
1858*4882a593Smuzhiyun if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_micpre1_control, chip))) < 0)
1859*4882a593Smuzhiyun return err;
1860*4882a593Smuzhiyun break;
1861*4882a593Smuzhiyun case 0x1869:
1862*4882a593Smuzhiyun case 0x1879:
1863*4882a593Smuzhiyun if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_micpre2_control, chip))) < 0)
1864*4882a593Smuzhiyun return err;
1865*4882a593Smuzhiyun break;
1866*4882a593Smuzhiyun }
1867*4882a593Smuzhiyun if (chip->caps & ES18XX_SPATIALIZER) {
1868*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_es18xx_spatializer_controls); idx++) {
1869*4882a593Smuzhiyun if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_spatializer_controls[idx], chip))) < 0)
1870*4882a593Smuzhiyun return err;
1871*4882a593Smuzhiyun }
1872*4882a593Smuzhiyun }
1873*4882a593Smuzhiyun if (chip->caps & ES18XX_HWV) {
1874*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_es18xx_hw_volume_controls); idx++) {
1875*4882a593Smuzhiyun struct snd_kcontrol *kctl;
1876*4882a593Smuzhiyun kctl = snd_ctl_new1(&snd_es18xx_hw_volume_controls[idx], chip);
1877*4882a593Smuzhiyun if (idx == 0)
1878*4882a593Smuzhiyun chip->hw_volume = kctl;
1879*4882a593Smuzhiyun else
1880*4882a593Smuzhiyun chip->hw_switch = kctl;
1881*4882a593Smuzhiyun kctl->private_free = snd_es18xx_hwv_free;
1882*4882a593Smuzhiyun if ((err = snd_ctl_add(card, kctl)) < 0)
1883*4882a593Smuzhiyun return err;
1884*4882a593Smuzhiyun
1885*4882a593Smuzhiyun }
1886*4882a593Smuzhiyun }
1887*4882a593Smuzhiyun /* finish initializing other chipset specific controls
1888*4882a593Smuzhiyun */
1889*4882a593Smuzhiyun if (chip->version != 0x1868) {
1890*4882a593Smuzhiyun err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_opt_speaker,
1891*4882a593Smuzhiyun chip));
1892*4882a593Smuzhiyun if (err < 0)
1893*4882a593Smuzhiyun return err;
1894*4882a593Smuzhiyun }
1895*4882a593Smuzhiyun if (chip->version == 0x1869) {
1896*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_es18xx_opt_1869); idx++) {
1897*4882a593Smuzhiyun err = snd_ctl_add(card,
1898*4882a593Smuzhiyun snd_ctl_new1(&snd_es18xx_opt_1869[idx],
1899*4882a593Smuzhiyun chip));
1900*4882a593Smuzhiyun if (err < 0)
1901*4882a593Smuzhiyun return err;
1902*4882a593Smuzhiyun }
1903*4882a593Smuzhiyun } else if (chip->version == 0x1878) {
1904*4882a593Smuzhiyun err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_opt_1878,
1905*4882a593Smuzhiyun chip));
1906*4882a593Smuzhiyun if (err < 0)
1907*4882a593Smuzhiyun return err;
1908*4882a593Smuzhiyun } else if (chip->version == 0x1879) {
1909*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_es18xx_opt_1879); idx++) {
1910*4882a593Smuzhiyun err = snd_ctl_add(card,
1911*4882a593Smuzhiyun snd_ctl_new1(&snd_es18xx_opt_1879[idx],
1912*4882a593Smuzhiyun chip));
1913*4882a593Smuzhiyun if (err < 0)
1914*4882a593Smuzhiyun return err;
1915*4882a593Smuzhiyun }
1916*4882a593Smuzhiyun }
1917*4882a593Smuzhiyun if (chip->caps & ES18XX_GPO_2BIT) {
1918*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_es18xx_opt_gpo_2bit); idx++) {
1919*4882a593Smuzhiyun err = snd_ctl_add(card,
1920*4882a593Smuzhiyun snd_ctl_new1(&snd_es18xx_opt_gpo_2bit[idx],
1921*4882a593Smuzhiyun chip));
1922*4882a593Smuzhiyun if (err < 0)
1923*4882a593Smuzhiyun return err;
1924*4882a593Smuzhiyun }
1925*4882a593Smuzhiyun }
1926*4882a593Smuzhiyun return 0;
1927*4882a593Smuzhiyun }
1928*4882a593Smuzhiyun
1929*4882a593Smuzhiyun
1930*4882a593Smuzhiyun /* Card level */
1931*4882a593Smuzhiyun
1932*4882a593Smuzhiyun MODULE_AUTHOR("Christian Fischbach <fishbach@pool.informatik.rwth-aachen.de>, Abramo Bagnara <abramo@alsa-project.org>");
1933*4882a593Smuzhiyun MODULE_DESCRIPTION("ESS ES18xx AudioDrive");
1934*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1935*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("{{ESS,ES1868 PnP AudioDrive},"
1936*4882a593Smuzhiyun "{ESS,ES1869 PnP AudioDrive},"
1937*4882a593Smuzhiyun "{ESS,ES1878 PnP AudioDrive},"
1938*4882a593Smuzhiyun "{ESS,ES1879 PnP AudioDrive},"
1939*4882a593Smuzhiyun "{ESS,ES1887 PnP AudioDrive},"
1940*4882a593Smuzhiyun "{ESS,ES1888 PnP AudioDrive},"
1941*4882a593Smuzhiyun "{ESS,ES1887 AudioDrive},"
1942*4882a593Smuzhiyun "{ESS,ES1888 AudioDrive}}");
1943*4882a593Smuzhiyun
1944*4882a593Smuzhiyun static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
1945*4882a593Smuzhiyun static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
1946*4882a593Smuzhiyun static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_ISAPNP; /* Enable this card */
1947*4882a593Smuzhiyun #ifdef CONFIG_PNP
1948*4882a593Smuzhiyun static bool isapnp[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_ISAPNP;
1949*4882a593Smuzhiyun #endif
1950*4882a593Smuzhiyun static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260,0x280 */
1951*4882a593Smuzhiyun #ifndef CONFIG_PNP
1952*4882a593Smuzhiyun static long mpu_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
1953*4882a593Smuzhiyun #else
1954*4882a593Smuzhiyun static long mpu_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT;
1955*4882a593Smuzhiyun #endif
1956*4882a593Smuzhiyun static long fm_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT;
1957*4882a593Smuzhiyun static int irq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ; /* 5,7,9,10 */
1958*4882a593Smuzhiyun static int dma1[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0,1,3 */
1959*4882a593Smuzhiyun static int dma2[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0,1,3 */
1960*4882a593Smuzhiyun
1961*4882a593Smuzhiyun module_param_array(index, int, NULL, 0444);
1962*4882a593Smuzhiyun MODULE_PARM_DESC(index, "Index value for ES18xx soundcard.");
1963*4882a593Smuzhiyun module_param_array(id, charp, NULL, 0444);
1964*4882a593Smuzhiyun MODULE_PARM_DESC(id, "ID string for ES18xx soundcard.");
1965*4882a593Smuzhiyun module_param_array(enable, bool, NULL, 0444);
1966*4882a593Smuzhiyun MODULE_PARM_DESC(enable, "Enable ES18xx soundcard.");
1967*4882a593Smuzhiyun #ifdef CONFIG_PNP
1968*4882a593Smuzhiyun module_param_array(isapnp, bool, NULL, 0444);
1969*4882a593Smuzhiyun MODULE_PARM_DESC(isapnp, "PnP detection for specified soundcard.");
1970*4882a593Smuzhiyun #endif
1971*4882a593Smuzhiyun module_param_hw_array(port, long, ioport, NULL, 0444);
1972*4882a593Smuzhiyun MODULE_PARM_DESC(port, "Port # for ES18xx driver.");
1973*4882a593Smuzhiyun module_param_hw_array(mpu_port, long, ioport, NULL, 0444);
1974*4882a593Smuzhiyun MODULE_PARM_DESC(mpu_port, "MPU-401 port # for ES18xx driver.");
1975*4882a593Smuzhiyun module_param_hw_array(fm_port, long, ioport, NULL, 0444);
1976*4882a593Smuzhiyun MODULE_PARM_DESC(fm_port, "FM port # for ES18xx driver.");
1977*4882a593Smuzhiyun module_param_hw_array(irq, int, irq, NULL, 0444);
1978*4882a593Smuzhiyun MODULE_PARM_DESC(irq, "IRQ # for ES18xx driver.");
1979*4882a593Smuzhiyun module_param_hw_array(dma1, int, dma, NULL, 0444);
1980*4882a593Smuzhiyun MODULE_PARM_DESC(dma1, "DMA 1 # for ES18xx driver.");
1981*4882a593Smuzhiyun module_param_hw_array(dma2, int, dma, NULL, 0444);
1982*4882a593Smuzhiyun MODULE_PARM_DESC(dma2, "DMA 2 # for ES18xx driver.");
1983*4882a593Smuzhiyun
1984*4882a593Smuzhiyun #ifdef CONFIG_PNP
1985*4882a593Smuzhiyun static int isa_registered;
1986*4882a593Smuzhiyun static int pnp_registered;
1987*4882a593Smuzhiyun static int pnpc_registered;
1988*4882a593Smuzhiyun
1989*4882a593Smuzhiyun static const struct pnp_device_id snd_audiodrive_pnpbiosids[] = {
1990*4882a593Smuzhiyun { .id = "ESS1869" },
1991*4882a593Smuzhiyun { .id = "ESS1879" },
1992*4882a593Smuzhiyun { .id = "" } /* end */
1993*4882a593Smuzhiyun };
1994*4882a593Smuzhiyun
1995*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pnp, snd_audiodrive_pnpbiosids);
1996*4882a593Smuzhiyun
1997*4882a593Smuzhiyun /* PnP main device initialization */
snd_audiodrive_pnp_init_main(int dev,struct pnp_dev * pdev)1998*4882a593Smuzhiyun static int snd_audiodrive_pnp_init_main(int dev, struct pnp_dev *pdev)
1999*4882a593Smuzhiyun {
2000*4882a593Smuzhiyun if (pnp_activate_dev(pdev) < 0) {
2001*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "PnP configure failure (out of resources?)\n");
2002*4882a593Smuzhiyun return -EBUSY;
2003*4882a593Smuzhiyun }
2004*4882a593Smuzhiyun /* ok. hack using Vendor-Defined Card-Level registers */
2005*4882a593Smuzhiyun /* skip csn and logdev initialization - already done in isapnp_configure */
2006*4882a593Smuzhiyun if (pnp_device_is_isapnp(pdev)) {
2007*4882a593Smuzhiyun isapnp_cfg_begin(isapnp_card_number(pdev), isapnp_csn_number(pdev));
2008*4882a593Smuzhiyun isapnp_write_byte(0x27, pnp_irq(pdev, 0)); /* Hardware Volume IRQ Number */
2009*4882a593Smuzhiyun if (mpu_port[dev] != SNDRV_AUTO_PORT)
2010*4882a593Smuzhiyun isapnp_write_byte(0x28, pnp_irq(pdev, 0)); /* MPU-401 IRQ Number */
2011*4882a593Smuzhiyun isapnp_write_byte(0x72, pnp_irq(pdev, 0)); /* second IRQ */
2012*4882a593Smuzhiyun isapnp_cfg_end();
2013*4882a593Smuzhiyun }
2014*4882a593Smuzhiyun port[dev] = pnp_port_start(pdev, 0);
2015*4882a593Smuzhiyun fm_port[dev] = pnp_port_start(pdev, 1);
2016*4882a593Smuzhiyun mpu_port[dev] = pnp_port_start(pdev, 2);
2017*4882a593Smuzhiyun dma1[dev] = pnp_dma(pdev, 0);
2018*4882a593Smuzhiyun dma2[dev] = pnp_dma(pdev, 1);
2019*4882a593Smuzhiyun irq[dev] = pnp_irq(pdev, 0);
2020*4882a593Smuzhiyun snd_printdd("PnP ES18xx: port=0x%lx, fm port=0x%lx, mpu port=0x%lx\n", port[dev], fm_port[dev], mpu_port[dev]);
2021*4882a593Smuzhiyun snd_printdd("PnP ES18xx: dma1=%i, dma2=%i, irq=%i\n", dma1[dev], dma2[dev], irq[dev]);
2022*4882a593Smuzhiyun return 0;
2023*4882a593Smuzhiyun }
2024*4882a593Smuzhiyun
snd_audiodrive_pnp(int dev,struct snd_es18xx * chip,struct pnp_dev * pdev)2025*4882a593Smuzhiyun static int snd_audiodrive_pnp(int dev, struct snd_es18xx *chip,
2026*4882a593Smuzhiyun struct pnp_dev *pdev)
2027*4882a593Smuzhiyun {
2028*4882a593Smuzhiyun chip->dev = pdev;
2029*4882a593Smuzhiyun if (snd_audiodrive_pnp_init_main(dev, chip->dev) < 0)
2030*4882a593Smuzhiyun return -EBUSY;
2031*4882a593Smuzhiyun return 0;
2032*4882a593Smuzhiyun }
2033*4882a593Smuzhiyun
2034*4882a593Smuzhiyun static const struct pnp_card_device_id snd_audiodrive_pnpids[] = {
2035*4882a593Smuzhiyun /* ESS 1868 (integrated on Compaq dual P-Pro motherboard and Genius 18PnP 3D) */
2036*4882a593Smuzhiyun { .id = "ESS1868", .devs = { { "ESS1868" }, { "ESS0000" } } },
2037*4882a593Smuzhiyun /* ESS 1868 (integrated on Maxisound Cards) */
2038*4882a593Smuzhiyun { .id = "ESS1868", .devs = { { "ESS8601" }, { "ESS8600" } } },
2039*4882a593Smuzhiyun /* ESS 1868 (integrated on Maxisound Cards) */
2040*4882a593Smuzhiyun { .id = "ESS1868", .devs = { { "ESS8611" }, { "ESS8610" } } },
2041*4882a593Smuzhiyun /* ESS ES1869 Plug and Play AudioDrive */
2042*4882a593Smuzhiyun { .id = "ESS0003", .devs = { { "ESS1869" }, { "ESS0006" } } },
2043*4882a593Smuzhiyun /* ESS 1869 */
2044*4882a593Smuzhiyun { .id = "ESS1869", .devs = { { "ESS1869" }, { "ESS0006" } } },
2045*4882a593Smuzhiyun /* ESS 1878 */
2046*4882a593Smuzhiyun { .id = "ESS1878", .devs = { { "ESS1878" }, { "ESS0004" } } },
2047*4882a593Smuzhiyun /* ESS 1879 */
2048*4882a593Smuzhiyun { .id = "ESS1879", .devs = { { "ESS1879" }, { "ESS0009" } } },
2049*4882a593Smuzhiyun /* --- */
2050*4882a593Smuzhiyun { .id = "" } /* end */
2051*4882a593Smuzhiyun };
2052*4882a593Smuzhiyun
2053*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pnp_card, snd_audiodrive_pnpids);
2054*4882a593Smuzhiyun
snd_audiodrive_pnpc(int dev,struct snd_es18xx * chip,struct pnp_card_link * card,const struct pnp_card_device_id * id)2055*4882a593Smuzhiyun static int snd_audiodrive_pnpc(int dev, struct snd_es18xx *chip,
2056*4882a593Smuzhiyun struct pnp_card_link *card,
2057*4882a593Smuzhiyun const struct pnp_card_device_id *id)
2058*4882a593Smuzhiyun {
2059*4882a593Smuzhiyun chip->dev = pnp_request_card_device(card, id->devs[0].id, NULL);
2060*4882a593Smuzhiyun if (chip->dev == NULL)
2061*4882a593Smuzhiyun return -EBUSY;
2062*4882a593Smuzhiyun
2063*4882a593Smuzhiyun chip->devc = pnp_request_card_device(card, id->devs[1].id, NULL);
2064*4882a593Smuzhiyun if (chip->devc == NULL)
2065*4882a593Smuzhiyun return -EBUSY;
2066*4882a593Smuzhiyun
2067*4882a593Smuzhiyun /* Control port initialization */
2068*4882a593Smuzhiyun if (pnp_activate_dev(chip->devc) < 0) {
2069*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "PnP control configure failure (out of resources?)\n");
2070*4882a593Smuzhiyun return -EAGAIN;
2071*4882a593Smuzhiyun }
2072*4882a593Smuzhiyun snd_printdd("pnp: port=0x%llx\n",
2073*4882a593Smuzhiyun (unsigned long long)pnp_port_start(chip->devc, 0));
2074*4882a593Smuzhiyun if (snd_audiodrive_pnp_init_main(dev, chip->dev) < 0)
2075*4882a593Smuzhiyun return -EBUSY;
2076*4882a593Smuzhiyun
2077*4882a593Smuzhiyun return 0;
2078*4882a593Smuzhiyun }
2079*4882a593Smuzhiyun #endif /* CONFIG_PNP */
2080*4882a593Smuzhiyun
2081*4882a593Smuzhiyun #ifdef CONFIG_PNP
2082*4882a593Smuzhiyun #define is_isapnp_selected(dev) isapnp[dev]
2083*4882a593Smuzhiyun #else
2084*4882a593Smuzhiyun #define is_isapnp_selected(dev) 0
2085*4882a593Smuzhiyun #endif
2086*4882a593Smuzhiyun
snd_es18xx_card_new(struct device * pdev,int dev,struct snd_card ** cardp)2087*4882a593Smuzhiyun static int snd_es18xx_card_new(struct device *pdev, int dev,
2088*4882a593Smuzhiyun struct snd_card **cardp)
2089*4882a593Smuzhiyun {
2090*4882a593Smuzhiyun return snd_card_new(pdev, index[dev], id[dev], THIS_MODULE,
2091*4882a593Smuzhiyun sizeof(struct snd_es18xx), cardp);
2092*4882a593Smuzhiyun }
2093*4882a593Smuzhiyun
snd_audiodrive_probe(struct snd_card * card,int dev)2094*4882a593Smuzhiyun static int snd_audiodrive_probe(struct snd_card *card, int dev)
2095*4882a593Smuzhiyun {
2096*4882a593Smuzhiyun struct snd_es18xx *chip = card->private_data;
2097*4882a593Smuzhiyun struct snd_opl3 *opl3;
2098*4882a593Smuzhiyun int err;
2099*4882a593Smuzhiyun
2100*4882a593Smuzhiyun err = snd_es18xx_new_device(card,
2101*4882a593Smuzhiyun port[dev], mpu_port[dev], fm_port[dev],
2102*4882a593Smuzhiyun irq[dev], dma1[dev], dma2[dev]);
2103*4882a593Smuzhiyun if (err < 0)
2104*4882a593Smuzhiyun return err;
2105*4882a593Smuzhiyun
2106*4882a593Smuzhiyun sprintf(card->driver, "ES%x", chip->version);
2107*4882a593Smuzhiyun
2108*4882a593Smuzhiyun sprintf(card->shortname, "ESS AudioDrive ES%x", chip->version);
2109*4882a593Smuzhiyun if (dma1[dev] != dma2[dev])
2110*4882a593Smuzhiyun sprintf(card->longname, "%s at 0x%lx, irq %d, dma1 %d, dma2 %d",
2111*4882a593Smuzhiyun card->shortname,
2112*4882a593Smuzhiyun chip->port,
2113*4882a593Smuzhiyun irq[dev], dma1[dev], dma2[dev]);
2114*4882a593Smuzhiyun else
2115*4882a593Smuzhiyun sprintf(card->longname, "%s at 0x%lx, irq %d, dma %d",
2116*4882a593Smuzhiyun card->shortname,
2117*4882a593Smuzhiyun chip->port,
2118*4882a593Smuzhiyun irq[dev], dma1[dev]);
2119*4882a593Smuzhiyun
2120*4882a593Smuzhiyun err = snd_es18xx_pcm(card, 0);
2121*4882a593Smuzhiyun if (err < 0)
2122*4882a593Smuzhiyun return err;
2123*4882a593Smuzhiyun
2124*4882a593Smuzhiyun err = snd_es18xx_mixer(card);
2125*4882a593Smuzhiyun if (err < 0)
2126*4882a593Smuzhiyun return err;
2127*4882a593Smuzhiyun
2128*4882a593Smuzhiyun if (fm_port[dev] > 0 && fm_port[dev] != SNDRV_AUTO_PORT) {
2129*4882a593Smuzhiyun if (snd_opl3_create(card, fm_port[dev], fm_port[dev] + 2,
2130*4882a593Smuzhiyun OPL3_HW_OPL3, 0, &opl3) < 0) {
2131*4882a593Smuzhiyun snd_printk(KERN_WARNING PFX
2132*4882a593Smuzhiyun "opl3 not detected at 0x%lx\n",
2133*4882a593Smuzhiyun fm_port[dev]);
2134*4882a593Smuzhiyun } else {
2135*4882a593Smuzhiyun err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
2136*4882a593Smuzhiyun if (err < 0)
2137*4882a593Smuzhiyun return err;
2138*4882a593Smuzhiyun }
2139*4882a593Smuzhiyun }
2140*4882a593Smuzhiyun
2141*4882a593Smuzhiyun if (mpu_port[dev] > 0 && mpu_port[dev] != SNDRV_AUTO_PORT) {
2142*4882a593Smuzhiyun err = snd_mpu401_uart_new(card, 0, MPU401_HW_ES18XX,
2143*4882a593Smuzhiyun mpu_port[dev], MPU401_INFO_IRQ_HOOK,
2144*4882a593Smuzhiyun -1, &chip->rmidi);
2145*4882a593Smuzhiyun if (err < 0)
2146*4882a593Smuzhiyun return err;
2147*4882a593Smuzhiyun }
2148*4882a593Smuzhiyun
2149*4882a593Smuzhiyun return snd_card_register(card);
2150*4882a593Smuzhiyun }
2151*4882a593Smuzhiyun
snd_es18xx_isa_match(struct device * pdev,unsigned int dev)2152*4882a593Smuzhiyun static int snd_es18xx_isa_match(struct device *pdev, unsigned int dev)
2153*4882a593Smuzhiyun {
2154*4882a593Smuzhiyun return enable[dev] && !is_isapnp_selected(dev);
2155*4882a593Smuzhiyun }
2156*4882a593Smuzhiyun
snd_es18xx_isa_probe1(int dev,struct device * devptr)2157*4882a593Smuzhiyun static int snd_es18xx_isa_probe1(int dev, struct device *devptr)
2158*4882a593Smuzhiyun {
2159*4882a593Smuzhiyun struct snd_card *card;
2160*4882a593Smuzhiyun int err;
2161*4882a593Smuzhiyun
2162*4882a593Smuzhiyun err = snd_es18xx_card_new(devptr, dev, &card);
2163*4882a593Smuzhiyun if (err < 0)
2164*4882a593Smuzhiyun return err;
2165*4882a593Smuzhiyun if ((err = snd_audiodrive_probe(card, dev)) < 0) {
2166*4882a593Smuzhiyun snd_card_free(card);
2167*4882a593Smuzhiyun return err;
2168*4882a593Smuzhiyun }
2169*4882a593Smuzhiyun dev_set_drvdata(devptr, card);
2170*4882a593Smuzhiyun return 0;
2171*4882a593Smuzhiyun }
2172*4882a593Smuzhiyun
snd_es18xx_isa_probe(struct device * pdev,unsigned int dev)2173*4882a593Smuzhiyun static int snd_es18xx_isa_probe(struct device *pdev, unsigned int dev)
2174*4882a593Smuzhiyun {
2175*4882a593Smuzhiyun int err;
2176*4882a593Smuzhiyun static const int possible_irqs[] = {5, 9, 10, 7, 11, 12, -1};
2177*4882a593Smuzhiyun static const int possible_dmas[] = {1, 0, 3, 5, -1};
2178*4882a593Smuzhiyun
2179*4882a593Smuzhiyun if (irq[dev] == SNDRV_AUTO_IRQ) {
2180*4882a593Smuzhiyun if ((irq[dev] = snd_legacy_find_free_irq(possible_irqs)) < 0) {
2181*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "unable to find a free IRQ\n");
2182*4882a593Smuzhiyun return -EBUSY;
2183*4882a593Smuzhiyun }
2184*4882a593Smuzhiyun }
2185*4882a593Smuzhiyun if (dma1[dev] == SNDRV_AUTO_DMA) {
2186*4882a593Smuzhiyun if ((dma1[dev] = snd_legacy_find_free_dma(possible_dmas)) < 0) {
2187*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "unable to find a free DMA1\n");
2188*4882a593Smuzhiyun return -EBUSY;
2189*4882a593Smuzhiyun }
2190*4882a593Smuzhiyun }
2191*4882a593Smuzhiyun if (dma2[dev] == SNDRV_AUTO_DMA) {
2192*4882a593Smuzhiyun if ((dma2[dev] = snd_legacy_find_free_dma(possible_dmas)) < 0) {
2193*4882a593Smuzhiyun snd_printk(KERN_ERR PFX "unable to find a free DMA2\n");
2194*4882a593Smuzhiyun return -EBUSY;
2195*4882a593Smuzhiyun }
2196*4882a593Smuzhiyun }
2197*4882a593Smuzhiyun
2198*4882a593Smuzhiyun if (port[dev] != SNDRV_AUTO_PORT) {
2199*4882a593Smuzhiyun return snd_es18xx_isa_probe1(dev, pdev);
2200*4882a593Smuzhiyun } else {
2201*4882a593Smuzhiyun static const unsigned long possible_ports[] = {0x220, 0x240, 0x260, 0x280};
2202*4882a593Smuzhiyun int i;
2203*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(possible_ports); i++) {
2204*4882a593Smuzhiyun port[dev] = possible_ports[i];
2205*4882a593Smuzhiyun err = snd_es18xx_isa_probe1(dev, pdev);
2206*4882a593Smuzhiyun if (! err)
2207*4882a593Smuzhiyun return 0;
2208*4882a593Smuzhiyun }
2209*4882a593Smuzhiyun return err;
2210*4882a593Smuzhiyun }
2211*4882a593Smuzhiyun }
2212*4882a593Smuzhiyun
snd_es18xx_isa_remove(struct device * devptr,unsigned int dev)2213*4882a593Smuzhiyun static int snd_es18xx_isa_remove(struct device *devptr,
2214*4882a593Smuzhiyun unsigned int dev)
2215*4882a593Smuzhiyun {
2216*4882a593Smuzhiyun snd_card_free(dev_get_drvdata(devptr));
2217*4882a593Smuzhiyun return 0;
2218*4882a593Smuzhiyun }
2219*4882a593Smuzhiyun
2220*4882a593Smuzhiyun #ifdef CONFIG_PM
snd_es18xx_isa_suspend(struct device * dev,unsigned int n,pm_message_t state)2221*4882a593Smuzhiyun static int snd_es18xx_isa_suspend(struct device *dev, unsigned int n,
2222*4882a593Smuzhiyun pm_message_t state)
2223*4882a593Smuzhiyun {
2224*4882a593Smuzhiyun return snd_es18xx_suspend(dev_get_drvdata(dev), state);
2225*4882a593Smuzhiyun }
2226*4882a593Smuzhiyun
snd_es18xx_isa_resume(struct device * dev,unsigned int n)2227*4882a593Smuzhiyun static int snd_es18xx_isa_resume(struct device *dev, unsigned int n)
2228*4882a593Smuzhiyun {
2229*4882a593Smuzhiyun return snd_es18xx_resume(dev_get_drvdata(dev));
2230*4882a593Smuzhiyun }
2231*4882a593Smuzhiyun #endif
2232*4882a593Smuzhiyun
2233*4882a593Smuzhiyun #define DEV_NAME "es18xx"
2234*4882a593Smuzhiyun
2235*4882a593Smuzhiyun static struct isa_driver snd_es18xx_isa_driver = {
2236*4882a593Smuzhiyun .match = snd_es18xx_isa_match,
2237*4882a593Smuzhiyun .probe = snd_es18xx_isa_probe,
2238*4882a593Smuzhiyun .remove = snd_es18xx_isa_remove,
2239*4882a593Smuzhiyun #ifdef CONFIG_PM
2240*4882a593Smuzhiyun .suspend = snd_es18xx_isa_suspend,
2241*4882a593Smuzhiyun .resume = snd_es18xx_isa_resume,
2242*4882a593Smuzhiyun #endif
2243*4882a593Smuzhiyun .driver = {
2244*4882a593Smuzhiyun .name = DEV_NAME
2245*4882a593Smuzhiyun },
2246*4882a593Smuzhiyun };
2247*4882a593Smuzhiyun
2248*4882a593Smuzhiyun
2249*4882a593Smuzhiyun #ifdef CONFIG_PNP
snd_audiodrive_pnp_detect(struct pnp_dev * pdev,const struct pnp_device_id * id)2250*4882a593Smuzhiyun static int snd_audiodrive_pnp_detect(struct pnp_dev *pdev,
2251*4882a593Smuzhiyun const struct pnp_device_id *id)
2252*4882a593Smuzhiyun {
2253*4882a593Smuzhiyun static int dev;
2254*4882a593Smuzhiyun int err;
2255*4882a593Smuzhiyun struct snd_card *card;
2256*4882a593Smuzhiyun
2257*4882a593Smuzhiyun if (pnp_device_is_isapnp(pdev))
2258*4882a593Smuzhiyun return -ENOENT; /* we have another procedure - card */
2259*4882a593Smuzhiyun for (; dev < SNDRV_CARDS; dev++) {
2260*4882a593Smuzhiyun if (enable[dev] && isapnp[dev])
2261*4882a593Smuzhiyun break;
2262*4882a593Smuzhiyun }
2263*4882a593Smuzhiyun if (dev >= SNDRV_CARDS)
2264*4882a593Smuzhiyun return -ENODEV;
2265*4882a593Smuzhiyun
2266*4882a593Smuzhiyun err = snd_es18xx_card_new(&pdev->dev, dev, &card);
2267*4882a593Smuzhiyun if (err < 0)
2268*4882a593Smuzhiyun return err;
2269*4882a593Smuzhiyun if ((err = snd_audiodrive_pnp(dev, card->private_data, pdev)) < 0) {
2270*4882a593Smuzhiyun snd_card_free(card);
2271*4882a593Smuzhiyun return err;
2272*4882a593Smuzhiyun }
2273*4882a593Smuzhiyun if ((err = snd_audiodrive_probe(card, dev)) < 0) {
2274*4882a593Smuzhiyun snd_card_free(card);
2275*4882a593Smuzhiyun return err;
2276*4882a593Smuzhiyun }
2277*4882a593Smuzhiyun pnp_set_drvdata(pdev, card);
2278*4882a593Smuzhiyun dev++;
2279*4882a593Smuzhiyun return 0;
2280*4882a593Smuzhiyun }
2281*4882a593Smuzhiyun
snd_audiodrive_pnp_remove(struct pnp_dev * pdev)2282*4882a593Smuzhiyun static void snd_audiodrive_pnp_remove(struct pnp_dev *pdev)
2283*4882a593Smuzhiyun {
2284*4882a593Smuzhiyun snd_card_free(pnp_get_drvdata(pdev));
2285*4882a593Smuzhiyun }
2286*4882a593Smuzhiyun
2287*4882a593Smuzhiyun #ifdef CONFIG_PM
snd_audiodrive_pnp_suspend(struct pnp_dev * pdev,pm_message_t state)2288*4882a593Smuzhiyun static int snd_audiodrive_pnp_suspend(struct pnp_dev *pdev, pm_message_t state)
2289*4882a593Smuzhiyun {
2290*4882a593Smuzhiyun return snd_es18xx_suspend(pnp_get_drvdata(pdev), state);
2291*4882a593Smuzhiyun }
snd_audiodrive_pnp_resume(struct pnp_dev * pdev)2292*4882a593Smuzhiyun static int snd_audiodrive_pnp_resume(struct pnp_dev *pdev)
2293*4882a593Smuzhiyun {
2294*4882a593Smuzhiyun return snd_es18xx_resume(pnp_get_drvdata(pdev));
2295*4882a593Smuzhiyun }
2296*4882a593Smuzhiyun #endif
2297*4882a593Smuzhiyun
2298*4882a593Smuzhiyun static struct pnp_driver es18xx_pnp_driver = {
2299*4882a593Smuzhiyun .name = "es18xx-pnpbios",
2300*4882a593Smuzhiyun .id_table = snd_audiodrive_pnpbiosids,
2301*4882a593Smuzhiyun .probe = snd_audiodrive_pnp_detect,
2302*4882a593Smuzhiyun .remove = snd_audiodrive_pnp_remove,
2303*4882a593Smuzhiyun #ifdef CONFIG_PM
2304*4882a593Smuzhiyun .suspend = snd_audiodrive_pnp_suspend,
2305*4882a593Smuzhiyun .resume = snd_audiodrive_pnp_resume,
2306*4882a593Smuzhiyun #endif
2307*4882a593Smuzhiyun };
2308*4882a593Smuzhiyun
snd_audiodrive_pnpc_detect(struct pnp_card_link * pcard,const struct pnp_card_device_id * pid)2309*4882a593Smuzhiyun static int snd_audiodrive_pnpc_detect(struct pnp_card_link *pcard,
2310*4882a593Smuzhiyun const struct pnp_card_device_id *pid)
2311*4882a593Smuzhiyun {
2312*4882a593Smuzhiyun static int dev;
2313*4882a593Smuzhiyun struct snd_card *card;
2314*4882a593Smuzhiyun int res;
2315*4882a593Smuzhiyun
2316*4882a593Smuzhiyun for ( ; dev < SNDRV_CARDS; dev++) {
2317*4882a593Smuzhiyun if (enable[dev] && isapnp[dev])
2318*4882a593Smuzhiyun break;
2319*4882a593Smuzhiyun }
2320*4882a593Smuzhiyun if (dev >= SNDRV_CARDS)
2321*4882a593Smuzhiyun return -ENODEV;
2322*4882a593Smuzhiyun
2323*4882a593Smuzhiyun res = snd_es18xx_card_new(&pcard->card->dev, dev, &card);
2324*4882a593Smuzhiyun if (res < 0)
2325*4882a593Smuzhiyun return res;
2326*4882a593Smuzhiyun
2327*4882a593Smuzhiyun if ((res = snd_audiodrive_pnpc(dev, card->private_data, pcard, pid)) < 0) {
2328*4882a593Smuzhiyun snd_card_free(card);
2329*4882a593Smuzhiyun return res;
2330*4882a593Smuzhiyun }
2331*4882a593Smuzhiyun if ((res = snd_audiodrive_probe(card, dev)) < 0) {
2332*4882a593Smuzhiyun snd_card_free(card);
2333*4882a593Smuzhiyun return res;
2334*4882a593Smuzhiyun }
2335*4882a593Smuzhiyun
2336*4882a593Smuzhiyun pnp_set_card_drvdata(pcard, card);
2337*4882a593Smuzhiyun dev++;
2338*4882a593Smuzhiyun return 0;
2339*4882a593Smuzhiyun }
2340*4882a593Smuzhiyun
snd_audiodrive_pnpc_remove(struct pnp_card_link * pcard)2341*4882a593Smuzhiyun static void snd_audiodrive_pnpc_remove(struct pnp_card_link *pcard)
2342*4882a593Smuzhiyun {
2343*4882a593Smuzhiyun snd_card_free(pnp_get_card_drvdata(pcard));
2344*4882a593Smuzhiyun pnp_set_card_drvdata(pcard, NULL);
2345*4882a593Smuzhiyun }
2346*4882a593Smuzhiyun
2347*4882a593Smuzhiyun #ifdef CONFIG_PM
snd_audiodrive_pnpc_suspend(struct pnp_card_link * pcard,pm_message_t state)2348*4882a593Smuzhiyun static int snd_audiodrive_pnpc_suspend(struct pnp_card_link *pcard, pm_message_t state)
2349*4882a593Smuzhiyun {
2350*4882a593Smuzhiyun return snd_es18xx_suspend(pnp_get_card_drvdata(pcard), state);
2351*4882a593Smuzhiyun }
2352*4882a593Smuzhiyun
snd_audiodrive_pnpc_resume(struct pnp_card_link * pcard)2353*4882a593Smuzhiyun static int snd_audiodrive_pnpc_resume(struct pnp_card_link *pcard)
2354*4882a593Smuzhiyun {
2355*4882a593Smuzhiyun return snd_es18xx_resume(pnp_get_card_drvdata(pcard));
2356*4882a593Smuzhiyun }
2357*4882a593Smuzhiyun
2358*4882a593Smuzhiyun #endif
2359*4882a593Smuzhiyun
2360*4882a593Smuzhiyun static struct pnp_card_driver es18xx_pnpc_driver = {
2361*4882a593Smuzhiyun .flags = PNP_DRIVER_RES_DISABLE,
2362*4882a593Smuzhiyun .name = "es18xx",
2363*4882a593Smuzhiyun .id_table = snd_audiodrive_pnpids,
2364*4882a593Smuzhiyun .probe = snd_audiodrive_pnpc_detect,
2365*4882a593Smuzhiyun .remove = snd_audiodrive_pnpc_remove,
2366*4882a593Smuzhiyun #ifdef CONFIG_PM
2367*4882a593Smuzhiyun .suspend = snd_audiodrive_pnpc_suspend,
2368*4882a593Smuzhiyun .resume = snd_audiodrive_pnpc_resume,
2369*4882a593Smuzhiyun #endif
2370*4882a593Smuzhiyun };
2371*4882a593Smuzhiyun #endif /* CONFIG_PNP */
2372*4882a593Smuzhiyun
alsa_card_es18xx_init(void)2373*4882a593Smuzhiyun static int __init alsa_card_es18xx_init(void)
2374*4882a593Smuzhiyun {
2375*4882a593Smuzhiyun int err;
2376*4882a593Smuzhiyun
2377*4882a593Smuzhiyun err = isa_register_driver(&snd_es18xx_isa_driver, SNDRV_CARDS);
2378*4882a593Smuzhiyun #ifdef CONFIG_PNP
2379*4882a593Smuzhiyun if (!err)
2380*4882a593Smuzhiyun isa_registered = 1;
2381*4882a593Smuzhiyun
2382*4882a593Smuzhiyun err = pnp_register_driver(&es18xx_pnp_driver);
2383*4882a593Smuzhiyun if (!err)
2384*4882a593Smuzhiyun pnp_registered = 1;
2385*4882a593Smuzhiyun
2386*4882a593Smuzhiyun err = pnp_register_card_driver(&es18xx_pnpc_driver);
2387*4882a593Smuzhiyun if (!err)
2388*4882a593Smuzhiyun pnpc_registered = 1;
2389*4882a593Smuzhiyun
2390*4882a593Smuzhiyun if (isa_registered || pnp_registered)
2391*4882a593Smuzhiyun err = 0;
2392*4882a593Smuzhiyun #endif
2393*4882a593Smuzhiyun return err;
2394*4882a593Smuzhiyun }
2395*4882a593Smuzhiyun
alsa_card_es18xx_exit(void)2396*4882a593Smuzhiyun static void __exit alsa_card_es18xx_exit(void)
2397*4882a593Smuzhiyun {
2398*4882a593Smuzhiyun #ifdef CONFIG_PNP
2399*4882a593Smuzhiyun if (pnpc_registered)
2400*4882a593Smuzhiyun pnp_unregister_card_driver(&es18xx_pnpc_driver);
2401*4882a593Smuzhiyun if (pnp_registered)
2402*4882a593Smuzhiyun pnp_unregister_driver(&es18xx_pnp_driver);
2403*4882a593Smuzhiyun if (isa_registered)
2404*4882a593Smuzhiyun #endif
2405*4882a593Smuzhiyun isa_unregister_driver(&snd_es18xx_isa_driver);
2406*4882a593Smuzhiyun }
2407*4882a593Smuzhiyun
2408*4882a593Smuzhiyun module_init(alsa_card_es18xx_init)
2409*4882a593Smuzhiyun module_exit(alsa_card_es18xx_exit)
2410