1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4*4882a593Smuzhiyun * Routines for control of ESS ES1688/688/488 chip
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/init.h>
8*4882a593Smuzhiyun #include <linux/interrupt.h>
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/ioport.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <sound/core.h>
15*4882a593Smuzhiyun #include <sound/es1688.h>
16*4882a593Smuzhiyun #include <sound/initval.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <asm/dma.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
21*4882a593Smuzhiyun MODULE_DESCRIPTION("ESS ESx688 lowlevel module");
22*4882a593Smuzhiyun MODULE_LICENSE("GPL");
23*4882a593Smuzhiyun
snd_es1688_dsp_command(struct snd_es1688 * chip,unsigned char val)24*4882a593Smuzhiyun static int snd_es1688_dsp_command(struct snd_es1688 *chip, unsigned char val)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun int i;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun for (i = 10000; i; i--)
29*4882a593Smuzhiyun if ((inb(ES1688P(chip, STATUS)) & 0x80) == 0) {
30*4882a593Smuzhiyun outb(val, ES1688P(chip, COMMAND));
31*4882a593Smuzhiyun return 1;
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun #ifdef CONFIG_SND_DEBUG
34*4882a593Smuzhiyun printk(KERN_DEBUG "snd_es1688_dsp_command: timeout (0x%x)\n", val);
35*4882a593Smuzhiyun #endif
36*4882a593Smuzhiyun return 0;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
snd_es1688_dsp_get_byte(struct snd_es1688 * chip)39*4882a593Smuzhiyun static int snd_es1688_dsp_get_byte(struct snd_es1688 *chip)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun int i;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun for (i = 1000; i; i--)
44*4882a593Smuzhiyun if (inb(ES1688P(chip, DATA_AVAIL)) & 0x80)
45*4882a593Smuzhiyun return inb(ES1688P(chip, READ));
46*4882a593Smuzhiyun snd_printd("es1688 get byte failed: 0x%lx = 0x%x!!!\n", ES1688P(chip, DATA_AVAIL), inb(ES1688P(chip, DATA_AVAIL)));
47*4882a593Smuzhiyun return -ENODEV;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
snd_es1688_write(struct snd_es1688 * chip,unsigned char reg,unsigned char data)50*4882a593Smuzhiyun static int snd_es1688_write(struct snd_es1688 *chip,
51*4882a593Smuzhiyun unsigned char reg, unsigned char data)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun if (!snd_es1688_dsp_command(chip, reg))
54*4882a593Smuzhiyun return 0;
55*4882a593Smuzhiyun return snd_es1688_dsp_command(chip, data);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
snd_es1688_read(struct snd_es1688 * chip,unsigned char reg)58*4882a593Smuzhiyun static int snd_es1688_read(struct snd_es1688 *chip, unsigned char reg)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun /* Read a byte from an extended mode register of ES1688 */
61*4882a593Smuzhiyun if (!snd_es1688_dsp_command(chip, 0xc0))
62*4882a593Smuzhiyun return -1;
63*4882a593Smuzhiyun if (!snd_es1688_dsp_command(chip, reg))
64*4882a593Smuzhiyun return -1;
65*4882a593Smuzhiyun return snd_es1688_dsp_get_byte(chip);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
snd_es1688_mixer_write(struct snd_es1688 * chip,unsigned char reg,unsigned char data)68*4882a593Smuzhiyun void snd_es1688_mixer_write(struct snd_es1688 *chip,
69*4882a593Smuzhiyun unsigned char reg, unsigned char data)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun outb(reg, ES1688P(chip, MIXER_ADDR));
72*4882a593Smuzhiyun udelay(10);
73*4882a593Smuzhiyun outb(data, ES1688P(chip, MIXER_DATA));
74*4882a593Smuzhiyun udelay(10);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
snd_es1688_mixer_read(struct snd_es1688 * chip,unsigned char reg)77*4882a593Smuzhiyun static unsigned char snd_es1688_mixer_read(struct snd_es1688 *chip, unsigned char reg)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun unsigned char result;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun outb(reg, ES1688P(chip, MIXER_ADDR));
82*4882a593Smuzhiyun udelay(10);
83*4882a593Smuzhiyun result = inb(ES1688P(chip, MIXER_DATA));
84*4882a593Smuzhiyun udelay(10);
85*4882a593Smuzhiyun return result;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
snd_es1688_reset(struct snd_es1688 * chip)88*4882a593Smuzhiyun int snd_es1688_reset(struct snd_es1688 *chip)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun int i;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun outb(3, ES1688P(chip, RESET)); /* valid only for ESS chips, SB -> 1 */
93*4882a593Smuzhiyun udelay(10);
94*4882a593Smuzhiyun outb(0, ES1688P(chip, RESET));
95*4882a593Smuzhiyun udelay(30);
96*4882a593Smuzhiyun for (i = 0; i < 1000 && !(inb(ES1688P(chip, DATA_AVAIL)) & 0x80); i++);
97*4882a593Smuzhiyun if (inb(ES1688P(chip, READ)) != 0xaa) {
98*4882a593Smuzhiyun snd_printd("ess_reset at 0x%lx: failed!!!\n", chip->port);
99*4882a593Smuzhiyun return -ENODEV;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun snd_es1688_dsp_command(chip, 0xc6); /* enable extended mode */
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun EXPORT_SYMBOL(snd_es1688_reset);
105*4882a593Smuzhiyun
snd_es1688_probe(struct snd_es1688 * chip)106*4882a593Smuzhiyun static int snd_es1688_probe(struct snd_es1688 *chip)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun unsigned long flags;
109*4882a593Smuzhiyun unsigned short major, minor;
110*4882a593Smuzhiyun int i;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /*
113*4882a593Smuzhiyun * initialization sequence
114*4882a593Smuzhiyun */
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags); /* Some ESS1688 cards need this */
117*4882a593Smuzhiyun inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */
118*4882a593Smuzhiyun inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */
119*4882a593Smuzhiyun inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */
120*4882a593Smuzhiyun inb(ES1688P(chip, ENABLE2)); /* ENABLE2 */
121*4882a593Smuzhiyun inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */
122*4882a593Smuzhiyun inb(ES1688P(chip, ENABLE2)); /* ENABLE2 */
123*4882a593Smuzhiyun inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */
124*4882a593Smuzhiyun inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */
125*4882a593Smuzhiyun inb(ES1688P(chip, ENABLE2)); /* ENABLE2 */
126*4882a593Smuzhiyun inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */
127*4882a593Smuzhiyun inb(ES1688P(chip, ENABLE0)); /* ENABLE0 */
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun if (snd_es1688_reset(chip) < 0) {
130*4882a593Smuzhiyun snd_printdd("ESS: [0x%lx] reset failed... 0x%x\n", chip->port, inb(ES1688P(chip, READ)));
131*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
132*4882a593Smuzhiyun return -ENODEV;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun snd_es1688_dsp_command(chip, 0xe7); /* return identification */
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun for (i = 1000, major = minor = 0; i; i--) {
137*4882a593Smuzhiyun if (inb(ES1688P(chip, DATA_AVAIL)) & 0x80) {
138*4882a593Smuzhiyun if (major == 0) {
139*4882a593Smuzhiyun major = inb(ES1688P(chip, READ));
140*4882a593Smuzhiyun } else {
141*4882a593Smuzhiyun minor = inb(ES1688P(chip, READ));
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun snd_printdd("ESS: [0x%lx] found.. major = 0x%x, minor = 0x%x\n", chip->port, major, minor);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun chip->version = (major << 8) | minor;
151*4882a593Smuzhiyun if (!chip->version)
152*4882a593Smuzhiyun return -ENODEV; /* probably SB */
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun switch (chip->version & 0xfff0) {
155*4882a593Smuzhiyun case 0x4880:
156*4882a593Smuzhiyun snd_printk(KERN_ERR "[0x%lx] ESS: AudioDrive ES488 detected, "
157*4882a593Smuzhiyun "but driver is in another place\n", chip->port);
158*4882a593Smuzhiyun return -ENODEV;
159*4882a593Smuzhiyun case 0x6880:
160*4882a593Smuzhiyun break;
161*4882a593Smuzhiyun default:
162*4882a593Smuzhiyun snd_printk(KERN_ERR "[0x%lx] ESS: unknown AudioDrive chip "
163*4882a593Smuzhiyun "with version 0x%x (Jazz16 soundcard?)\n",
164*4882a593Smuzhiyun chip->port, chip->version);
165*4882a593Smuzhiyun return -ENODEV;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
169*4882a593Smuzhiyun snd_es1688_write(chip, 0xb1, 0x10); /* disable IRQ */
170*4882a593Smuzhiyun snd_es1688_write(chip, 0xb2, 0x00); /* disable DMA */
171*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun /* enable joystick, but disable OPL3 */
174*4882a593Smuzhiyun spin_lock_irqsave(&chip->mixer_lock, flags);
175*4882a593Smuzhiyun snd_es1688_mixer_write(chip, 0x40, 0x01);
176*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->mixer_lock, flags);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun return 0;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
snd_es1688_init(struct snd_es1688 * chip,int enable)181*4882a593Smuzhiyun static int snd_es1688_init(struct snd_es1688 * chip, int enable)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun static const int irqs[16] = {-1, -1, 0, -1, -1, 1, -1, 2, -1, 0, 3, -1, -1, -1, -1, -1};
184*4882a593Smuzhiyun unsigned long flags;
185*4882a593Smuzhiyun int cfg, irq_bits, dma, dma_bits, tmp, tmp1;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /* ok.. setup MPU-401 port and joystick and OPL3 */
188*4882a593Smuzhiyun cfg = 0x01; /* enable joystick, but disable OPL3 */
189*4882a593Smuzhiyun if (enable && chip->mpu_port >= 0x300 && chip->mpu_irq > 0 && chip->hardware != ES1688_HW_688) {
190*4882a593Smuzhiyun tmp = (chip->mpu_port & 0x0f0) >> 4;
191*4882a593Smuzhiyun if (tmp <= 3) {
192*4882a593Smuzhiyun switch (chip->mpu_irq) {
193*4882a593Smuzhiyun case 9:
194*4882a593Smuzhiyun tmp1 = 4;
195*4882a593Smuzhiyun break;
196*4882a593Smuzhiyun case 5:
197*4882a593Smuzhiyun tmp1 = 5;
198*4882a593Smuzhiyun break;
199*4882a593Smuzhiyun case 7:
200*4882a593Smuzhiyun tmp1 = 6;
201*4882a593Smuzhiyun break;
202*4882a593Smuzhiyun case 10:
203*4882a593Smuzhiyun tmp1 = 7;
204*4882a593Smuzhiyun break;
205*4882a593Smuzhiyun default:
206*4882a593Smuzhiyun tmp1 = 0;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun if (tmp1) {
209*4882a593Smuzhiyun cfg |= (tmp << 3) | (tmp1 << 5);
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun #if 0
214*4882a593Smuzhiyun snd_printk(KERN_DEBUG "mpu cfg = 0x%x\n", cfg);
215*4882a593Smuzhiyun #endif
216*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
217*4882a593Smuzhiyun snd_es1688_mixer_write(chip, 0x40, cfg);
218*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
219*4882a593Smuzhiyun /* --- */
220*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
221*4882a593Smuzhiyun snd_es1688_read(chip, 0xb1);
222*4882a593Smuzhiyun snd_es1688_read(chip, 0xb2);
223*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
224*4882a593Smuzhiyun if (enable) {
225*4882a593Smuzhiyun cfg = 0xf0; /* enable only DMA counter interrupt */
226*4882a593Smuzhiyun irq_bits = irqs[chip->irq & 0x0f];
227*4882a593Smuzhiyun if (irq_bits < 0) {
228*4882a593Smuzhiyun snd_printk(KERN_ERR "[0x%lx] ESS: bad IRQ %d "
229*4882a593Smuzhiyun "for ES1688 chip!!\n",
230*4882a593Smuzhiyun chip->port, chip->irq);
231*4882a593Smuzhiyun #if 0
232*4882a593Smuzhiyun irq_bits = 0;
233*4882a593Smuzhiyun cfg = 0x10;
234*4882a593Smuzhiyun #endif
235*4882a593Smuzhiyun return -EINVAL;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
238*4882a593Smuzhiyun snd_es1688_write(chip, 0xb1, cfg | (irq_bits << 2));
239*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
240*4882a593Smuzhiyun cfg = 0xf0; /* extended mode DMA enable */
241*4882a593Smuzhiyun dma = chip->dma8;
242*4882a593Smuzhiyun if (dma > 3 || dma == 2) {
243*4882a593Smuzhiyun snd_printk(KERN_ERR "[0x%lx] ESS: bad DMA channel %d "
244*4882a593Smuzhiyun "for ES1688 chip!!\n", chip->port, dma);
245*4882a593Smuzhiyun #if 0
246*4882a593Smuzhiyun dma_bits = 0;
247*4882a593Smuzhiyun cfg = 0x00; /* disable all DMA */
248*4882a593Smuzhiyun #endif
249*4882a593Smuzhiyun return -EINVAL;
250*4882a593Smuzhiyun } else {
251*4882a593Smuzhiyun dma_bits = dma;
252*4882a593Smuzhiyun if (dma != 3)
253*4882a593Smuzhiyun dma_bits++;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
256*4882a593Smuzhiyun snd_es1688_write(chip, 0xb2, cfg | (dma_bits << 2));
257*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
258*4882a593Smuzhiyun } else {
259*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
260*4882a593Smuzhiyun snd_es1688_write(chip, 0xb1, 0x10); /* disable IRQ */
261*4882a593Smuzhiyun snd_es1688_write(chip, 0xb2, 0x00); /* disable DMA */
262*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
265*4882a593Smuzhiyun snd_es1688_read(chip, 0xb1);
266*4882a593Smuzhiyun snd_es1688_read(chip, 0xb2);
267*4882a593Smuzhiyun snd_es1688_reset(chip);
268*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
269*4882a593Smuzhiyun return 0;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /*
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun */
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun static const struct snd_ratnum clocks[2] = {
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun .num = 795444,
279*4882a593Smuzhiyun .den_min = 1,
280*4882a593Smuzhiyun .den_max = 128,
281*4882a593Smuzhiyun .den_step = 1,
282*4882a593Smuzhiyun },
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun .num = 397722,
285*4882a593Smuzhiyun .den_min = 1,
286*4882a593Smuzhiyun .den_max = 128,
287*4882a593Smuzhiyun .den_step = 1,
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun };
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
292*4882a593Smuzhiyun .nrats = 2,
293*4882a593Smuzhiyun .rats = clocks,
294*4882a593Smuzhiyun };
295*4882a593Smuzhiyun
snd_es1688_set_rate(struct snd_es1688 * chip,struct snd_pcm_substream * substream)296*4882a593Smuzhiyun static void snd_es1688_set_rate(struct snd_es1688 *chip, struct snd_pcm_substream *substream)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
299*4882a593Smuzhiyun unsigned int bits, divider;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun if (runtime->rate_num == clocks[0].num)
302*4882a593Smuzhiyun bits = 256 - runtime->rate_den;
303*4882a593Smuzhiyun else
304*4882a593Smuzhiyun bits = 128 - runtime->rate_den;
305*4882a593Smuzhiyun /* set filter register */
306*4882a593Smuzhiyun divider = 256 - 7160000*20/(8*82*runtime->rate);
307*4882a593Smuzhiyun /* write result to hardware */
308*4882a593Smuzhiyun snd_es1688_write(chip, 0xa1, bits);
309*4882a593Smuzhiyun snd_es1688_write(chip, 0xa2, divider);
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
snd_es1688_trigger(struct snd_es1688 * chip,int cmd,unsigned char value)312*4882a593Smuzhiyun static int snd_es1688_trigger(struct snd_es1688 *chip, int cmd, unsigned char value)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun int val;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun if (cmd == SNDRV_PCM_TRIGGER_STOP) {
317*4882a593Smuzhiyun value = 0x00;
318*4882a593Smuzhiyun } else if (cmd != SNDRV_PCM_TRIGGER_START) {
319*4882a593Smuzhiyun return -EINVAL;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun spin_lock(&chip->reg_lock);
322*4882a593Smuzhiyun chip->trigger_value = value;
323*4882a593Smuzhiyun val = snd_es1688_read(chip, 0xb8);
324*4882a593Smuzhiyun if ((val < 0) || (val & 0x0f) == value) {
325*4882a593Smuzhiyun spin_unlock(&chip->reg_lock);
326*4882a593Smuzhiyun return -EINVAL; /* something is wrong */
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun #if 0
329*4882a593Smuzhiyun printk(KERN_DEBUG "trigger: val = 0x%x, value = 0x%x\n", val, value);
330*4882a593Smuzhiyun printk(KERN_DEBUG "trigger: pointer = 0x%x\n",
331*4882a593Smuzhiyun snd_dma_pointer(chip->dma8, chip->dma_size));
332*4882a593Smuzhiyun #endif
333*4882a593Smuzhiyun snd_es1688_write(chip, 0xb8, (val & 0xf0) | value);
334*4882a593Smuzhiyun spin_unlock(&chip->reg_lock);
335*4882a593Smuzhiyun return 0;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
snd_es1688_playback_prepare(struct snd_pcm_substream * substream)338*4882a593Smuzhiyun static int snd_es1688_playback_prepare(struct snd_pcm_substream *substream)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun unsigned long flags;
341*4882a593Smuzhiyun struct snd_es1688 *chip = snd_pcm_substream_chip(substream);
342*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
343*4882a593Smuzhiyun unsigned int size = snd_pcm_lib_buffer_bytes(substream);
344*4882a593Smuzhiyun unsigned int count = snd_pcm_lib_period_bytes(substream);
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun chip->dma_size = size;
347*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
348*4882a593Smuzhiyun snd_es1688_reset(chip);
349*4882a593Smuzhiyun snd_es1688_set_rate(chip, substream);
350*4882a593Smuzhiyun snd_es1688_write(chip, 0xb8, 4); /* auto init DMA mode */
351*4882a593Smuzhiyun snd_es1688_write(chip, 0xa8, (snd_es1688_read(chip, 0xa8) & ~0x03) | (3 - runtime->channels));
352*4882a593Smuzhiyun snd_es1688_write(chip, 0xb9, 2); /* demand mode (4 bytes/request) */
353*4882a593Smuzhiyun if (runtime->channels == 1) {
354*4882a593Smuzhiyun if (snd_pcm_format_width(runtime->format) == 8) {
355*4882a593Smuzhiyun /* 8. bit mono */
356*4882a593Smuzhiyun snd_es1688_write(chip, 0xb6, 0x80);
357*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0x51);
358*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0xd0);
359*4882a593Smuzhiyun } else {
360*4882a593Smuzhiyun /* 16. bit mono */
361*4882a593Smuzhiyun snd_es1688_write(chip, 0xb6, 0x00);
362*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0x71);
363*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0xf4);
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun } else {
366*4882a593Smuzhiyun if (snd_pcm_format_width(runtime->format) == 8) {
367*4882a593Smuzhiyun /* 8. bit stereo */
368*4882a593Smuzhiyun snd_es1688_write(chip, 0xb6, 0x80);
369*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0x51);
370*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0x98);
371*4882a593Smuzhiyun } else {
372*4882a593Smuzhiyun /* 16. bit stereo */
373*4882a593Smuzhiyun snd_es1688_write(chip, 0xb6, 0x00);
374*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0x71);
375*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0xbc);
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun snd_es1688_write(chip, 0xb1, (snd_es1688_read(chip, 0xb1) & 0x0f) | 0x50);
379*4882a593Smuzhiyun snd_es1688_write(chip, 0xb2, (snd_es1688_read(chip, 0xb2) & 0x0f) | 0x50);
380*4882a593Smuzhiyun snd_es1688_dsp_command(chip, ES1688_DSP_CMD_SPKON);
381*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
382*4882a593Smuzhiyun /* --- */
383*4882a593Smuzhiyun count = -count;
384*4882a593Smuzhiyun snd_dma_program(chip->dma8, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
385*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
386*4882a593Smuzhiyun snd_es1688_write(chip, 0xa4, (unsigned char) count);
387*4882a593Smuzhiyun snd_es1688_write(chip, 0xa5, (unsigned char) (count >> 8));
388*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
389*4882a593Smuzhiyun return 0;
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun
snd_es1688_playback_trigger(struct snd_pcm_substream * substream,int cmd)392*4882a593Smuzhiyun static int snd_es1688_playback_trigger(struct snd_pcm_substream *substream,
393*4882a593Smuzhiyun int cmd)
394*4882a593Smuzhiyun {
395*4882a593Smuzhiyun struct snd_es1688 *chip = snd_pcm_substream_chip(substream);
396*4882a593Smuzhiyun return snd_es1688_trigger(chip, cmd, 0x05);
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun
snd_es1688_capture_prepare(struct snd_pcm_substream * substream)399*4882a593Smuzhiyun static int snd_es1688_capture_prepare(struct snd_pcm_substream *substream)
400*4882a593Smuzhiyun {
401*4882a593Smuzhiyun unsigned long flags;
402*4882a593Smuzhiyun struct snd_es1688 *chip = snd_pcm_substream_chip(substream);
403*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
404*4882a593Smuzhiyun unsigned int size = snd_pcm_lib_buffer_bytes(substream);
405*4882a593Smuzhiyun unsigned int count = snd_pcm_lib_period_bytes(substream);
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun chip->dma_size = size;
408*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
409*4882a593Smuzhiyun snd_es1688_reset(chip);
410*4882a593Smuzhiyun snd_es1688_set_rate(chip, substream);
411*4882a593Smuzhiyun snd_es1688_dsp_command(chip, ES1688_DSP_CMD_SPKOFF);
412*4882a593Smuzhiyun snd_es1688_write(chip, 0xb8, 0x0e); /* auto init DMA mode */
413*4882a593Smuzhiyun snd_es1688_write(chip, 0xa8, (snd_es1688_read(chip, 0xa8) & ~0x03) | (3 - runtime->channels));
414*4882a593Smuzhiyun snd_es1688_write(chip, 0xb9, 2); /* demand mode (4 bytes/request) */
415*4882a593Smuzhiyun if (runtime->channels == 1) {
416*4882a593Smuzhiyun if (snd_pcm_format_width(runtime->format) == 8) {
417*4882a593Smuzhiyun /* 8. bit mono */
418*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0x51);
419*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0xd0);
420*4882a593Smuzhiyun } else {
421*4882a593Smuzhiyun /* 16. bit mono */
422*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0x71);
423*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0xf4);
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun } else {
426*4882a593Smuzhiyun if (snd_pcm_format_width(runtime->format) == 8) {
427*4882a593Smuzhiyun /* 8. bit stereo */
428*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0x51);
429*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0x98);
430*4882a593Smuzhiyun } else {
431*4882a593Smuzhiyun /* 16. bit stereo */
432*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0x71);
433*4882a593Smuzhiyun snd_es1688_write(chip, 0xb7, 0xbc);
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun snd_es1688_write(chip, 0xb1, (snd_es1688_read(chip, 0xb1) & 0x0f) | 0x50);
437*4882a593Smuzhiyun snd_es1688_write(chip, 0xb2, (snd_es1688_read(chip, 0xb2) & 0x0f) | 0x50);
438*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
439*4882a593Smuzhiyun /* --- */
440*4882a593Smuzhiyun count = -count;
441*4882a593Smuzhiyun snd_dma_program(chip->dma8, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
442*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
443*4882a593Smuzhiyun snd_es1688_write(chip, 0xa4, (unsigned char) count);
444*4882a593Smuzhiyun snd_es1688_write(chip, 0xa5, (unsigned char) (count >> 8));
445*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
446*4882a593Smuzhiyun return 0;
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun
snd_es1688_capture_trigger(struct snd_pcm_substream * substream,int cmd)449*4882a593Smuzhiyun static int snd_es1688_capture_trigger(struct snd_pcm_substream *substream,
450*4882a593Smuzhiyun int cmd)
451*4882a593Smuzhiyun {
452*4882a593Smuzhiyun struct snd_es1688 *chip = snd_pcm_substream_chip(substream);
453*4882a593Smuzhiyun return snd_es1688_trigger(chip, cmd, 0x0f);
454*4882a593Smuzhiyun }
455*4882a593Smuzhiyun
snd_es1688_interrupt(int irq,void * dev_id)456*4882a593Smuzhiyun static irqreturn_t snd_es1688_interrupt(int irq, void *dev_id)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun struct snd_es1688 *chip = dev_id;
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun if (chip->trigger_value == 0x05) /* ok.. playback is active */
461*4882a593Smuzhiyun snd_pcm_period_elapsed(chip->playback_substream);
462*4882a593Smuzhiyun if (chip->trigger_value == 0x0f) /* ok.. capture is active */
463*4882a593Smuzhiyun snd_pcm_period_elapsed(chip->capture_substream);
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun inb(ES1688P(chip, DATA_AVAIL)); /* ack interrupt */
466*4882a593Smuzhiyun return IRQ_HANDLED;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun
snd_es1688_playback_pointer(struct snd_pcm_substream * substream)469*4882a593Smuzhiyun static snd_pcm_uframes_t snd_es1688_playback_pointer(struct snd_pcm_substream *substream)
470*4882a593Smuzhiyun {
471*4882a593Smuzhiyun struct snd_es1688 *chip = snd_pcm_substream_chip(substream);
472*4882a593Smuzhiyun size_t ptr;
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun if (chip->trigger_value != 0x05)
475*4882a593Smuzhiyun return 0;
476*4882a593Smuzhiyun ptr = snd_dma_pointer(chip->dma8, chip->dma_size);
477*4882a593Smuzhiyun return bytes_to_frames(substream->runtime, ptr);
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun
snd_es1688_capture_pointer(struct snd_pcm_substream * substream)480*4882a593Smuzhiyun static snd_pcm_uframes_t snd_es1688_capture_pointer(struct snd_pcm_substream *substream)
481*4882a593Smuzhiyun {
482*4882a593Smuzhiyun struct snd_es1688 *chip = snd_pcm_substream_chip(substream);
483*4882a593Smuzhiyun size_t ptr;
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun if (chip->trigger_value != 0x0f)
486*4882a593Smuzhiyun return 0;
487*4882a593Smuzhiyun ptr = snd_dma_pointer(chip->dma8, chip->dma_size);
488*4882a593Smuzhiyun return bytes_to_frames(substream->runtime, ptr);
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun /*
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun */
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun static const struct snd_pcm_hardware snd_es1688_playback =
496*4882a593Smuzhiyun {
497*4882a593Smuzhiyun .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
498*4882a593Smuzhiyun SNDRV_PCM_INFO_MMAP_VALID),
499*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
500*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
501*4882a593Smuzhiyun .rate_min = 4000,
502*4882a593Smuzhiyun .rate_max = 48000,
503*4882a593Smuzhiyun .channels_min = 1,
504*4882a593Smuzhiyun .channels_max = 2,
505*4882a593Smuzhiyun .buffer_bytes_max = 65536,
506*4882a593Smuzhiyun .period_bytes_min = 64,
507*4882a593Smuzhiyun .period_bytes_max = 65536,
508*4882a593Smuzhiyun .periods_min = 1,
509*4882a593Smuzhiyun .periods_max = 1024,
510*4882a593Smuzhiyun .fifo_size = 0,
511*4882a593Smuzhiyun };
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun static const struct snd_pcm_hardware snd_es1688_capture =
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
516*4882a593Smuzhiyun SNDRV_PCM_INFO_MMAP_VALID),
517*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
518*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
519*4882a593Smuzhiyun .rate_min = 4000,
520*4882a593Smuzhiyun .rate_max = 48000,
521*4882a593Smuzhiyun .channels_min = 1,
522*4882a593Smuzhiyun .channels_max = 2,
523*4882a593Smuzhiyun .buffer_bytes_max = 65536,
524*4882a593Smuzhiyun .period_bytes_min = 64,
525*4882a593Smuzhiyun .period_bytes_max = 65536,
526*4882a593Smuzhiyun .periods_min = 1,
527*4882a593Smuzhiyun .periods_max = 1024,
528*4882a593Smuzhiyun .fifo_size = 0,
529*4882a593Smuzhiyun };
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun /*
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun */
534*4882a593Smuzhiyun
snd_es1688_playback_open(struct snd_pcm_substream * substream)535*4882a593Smuzhiyun static int snd_es1688_playback_open(struct snd_pcm_substream *substream)
536*4882a593Smuzhiyun {
537*4882a593Smuzhiyun struct snd_es1688 *chip = snd_pcm_substream_chip(substream);
538*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun if (chip->capture_substream != NULL)
541*4882a593Smuzhiyun return -EAGAIN;
542*4882a593Smuzhiyun chip->playback_substream = substream;
543*4882a593Smuzhiyun runtime->hw = snd_es1688_playback;
544*4882a593Smuzhiyun snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
545*4882a593Smuzhiyun &hw_constraints_clocks);
546*4882a593Smuzhiyun return 0;
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun
snd_es1688_capture_open(struct snd_pcm_substream * substream)549*4882a593Smuzhiyun static int snd_es1688_capture_open(struct snd_pcm_substream *substream)
550*4882a593Smuzhiyun {
551*4882a593Smuzhiyun struct snd_es1688 *chip = snd_pcm_substream_chip(substream);
552*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun if (chip->playback_substream != NULL)
555*4882a593Smuzhiyun return -EAGAIN;
556*4882a593Smuzhiyun chip->capture_substream = substream;
557*4882a593Smuzhiyun runtime->hw = snd_es1688_capture;
558*4882a593Smuzhiyun snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
559*4882a593Smuzhiyun &hw_constraints_clocks);
560*4882a593Smuzhiyun return 0;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun
snd_es1688_playback_close(struct snd_pcm_substream * substream)563*4882a593Smuzhiyun static int snd_es1688_playback_close(struct snd_pcm_substream *substream)
564*4882a593Smuzhiyun {
565*4882a593Smuzhiyun struct snd_es1688 *chip = snd_pcm_substream_chip(substream);
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun chip->playback_substream = NULL;
568*4882a593Smuzhiyun return 0;
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun
snd_es1688_capture_close(struct snd_pcm_substream * substream)571*4882a593Smuzhiyun static int snd_es1688_capture_close(struct snd_pcm_substream *substream)
572*4882a593Smuzhiyun {
573*4882a593Smuzhiyun struct snd_es1688 *chip = snd_pcm_substream_chip(substream);
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun chip->capture_substream = NULL;
576*4882a593Smuzhiyun return 0;
577*4882a593Smuzhiyun }
578*4882a593Smuzhiyun
snd_es1688_free(struct snd_es1688 * chip)579*4882a593Smuzhiyun static int snd_es1688_free(struct snd_es1688 *chip)
580*4882a593Smuzhiyun {
581*4882a593Smuzhiyun if (chip->hardware != ES1688_HW_UNDEF)
582*4882a593Smuzhiyun snd_es1688_init(chip, 0);
583*4882a593Smuzhiyun release_and_free_resource(chip->res_port);
584*4882a593Smuzhiyun if (chip->irq >= 0)
585*4882a593Smuzhiyun free_irq(chip->irq, (void *) chip);
586*4882a593Smuzhiyun if (chip->dma8 >= 0) {
587*4882a593Smuzhiyun disable_dma(chip->dma8);
588*4882a593Smuzhiyun free_dma(chip->dma8);
589*4882a593Smuzhiyun }
590*4882a593Smuzhiyun return 0;
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
snd_es1688_dev_free(struct snd_device * device)593*4882a593Smuzhiyun static int snd_es1688_dev_free(struct snd_device *device)
594*4882a593Smuzhiyun {
595*4882a593Smuzhiyun struct snd_es1688 *chip = device->device_data;
596*4882a593Smuzhiyun return snd_es1688_free(chip);
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun
snd_es1688_chip_id(struct snd_es1688 * chip)599*4882a593Smuzhiyun static const char *snd_es1688_chip_id(struct snd_es1688 *chip)
600*4882a593Smuzhiyun {
601*4882a593Smuzhiyun static char tmp[16];
602*4882a593Smuzhiyun sprintf(tmp, "ES%s688 rev %i", chip->hardware == ES1688_HW_688 ? "" : "1", chip->version & 0x0f);
603*4882a593Smuzhiyun return tmp;
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun
snd_es1688_create(struct snd_card * card,struct snd_es1688 * chip,unsigned long port,unsigned long mpu_port,int irq,int mpu_irq,int dma8,unsigned short hardware)606*4882a593Smuzhiyun int snd_es1688_create(struct snd_card *card,
607*4882a593Smuzhiyun struct snd_es1688 *chip,
608*4882a593Smuzhiyun unsigned long port,
609*4882a593Smuzhiyun unsigned long mpu_port,
610*4882a593Smuzhiyun int irq,
611*4882a593Smuzhiyun int mpu_irq,
612*4882a593Smuzhiyun int dma8,
613*4882a593Smuzhiyun unsigned short hardware)
614*4882a593Smuzhiyun {
615*4882a593Smuzhiyun static const struct snd_device_ops ops = {
616*4882a593Smuzhiyun .dev_free = snd_es1688_dev_free,
617*4882a593Smuzhiyun };
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun int err;
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun if (chip == NULL)
622*4882a593Smuzhiyun return -ENOMEM;
623*4882a593Smuzhiyun chip->irq = -1;
624*4882a593Smuzhiyun chip->dma8 = -1;
625*4882a593Smuzhiyun chip->hardware = ES1688_HW_UNDEF;
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun chip->res_port = request_region(port + 4, 12, "ES1688");
628*4882a593Smuzhiyun if (chip->res_port == NULL) {
629*4882a593Smuzhiyun snd_printk(KERN_ERR "es1688: can't grab port 0x%lx\n", port + 4);
630*4882a593Smuzhiyun err = -EBUSY;
631*4882a593Smuzhiyun goto exit;
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun err = request_irq(irq, snd_es1688_interrupt, 0, "ES1688", (void *) chip);
635*4882a593Smuzhiyun if (err < 0) {
636*4882a593Smuzhiyun snd_printk(KERN_ERR "es1688: can't grab IRQ %d\n", irq);
637*4882a593Smuzhiyun goto exit;
638*4882a593Smuzhiyun }
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun chip->irq = irq;
641*4882a593Smuzhiyun card->sync_irq = chip->irq;
642*4882a593Smuzhiyun err = request_dma(dma8, "ES1688");
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun if (err < 0) {
645*4882a593Smuzhiyun snd_printk(KERN_ERR "es1688: can't grab DMA8 %d\n", dma8);
646*4882a593Smuzhiyun goto exit;
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun chip->dma8 = dma8;
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun spin_lock_init(&chip->reg_lock);
651*4882a593Smuzhiyun spin_lock_init(&chip->mixer_lock);
652*4882a593Smuzhiyun chip->port = port;
653*4882a593Smuzhiyun mpu_port &= ~0x000f;
654*4882a593Smuzhiyun if (mpu_port < 0x300 || mpu_port > 0x330)
655*4882a593Smuzhiyun mpu_port = 0;
656*4882a593Smuzhiyun chip->mpu_port = mpu_port;
657*4882a593Smuzhiyun chip->mpu_irq = mpu_irq;
658*4882a593Smuzhiyun chip->hardware = hardware;
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun err = snd_es1688_probe(chip);
661*4882a593Smuzhiyun if (err < 0)
662*4882a593Smuzhiyun goto exit;
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun err = snd_es1688_init(chip, 1);
665*4882a593Smuzhiyun if (err < 0)
666*4882a593Smuzhiyun goto exit;
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun /* Register device */
669*4882a593Smuzhiyun err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
670*4882a593Smuzhiyun exit:
671*4882a593Smuzhiyun if (err)
672*4882a593Smuzhiyun snd_es1688_free(chip);
673*4882a593Smuzhiyun return err;
674*4882a593Smuzhiyun }
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun static const struct snd_pcm_ops snd_es1688_playback_ops = {
677*4882a593Smuzhiyun .open = snd_es1688_playback_open,
678*4882a593Smuzhiyun .close = snd_es1688_playback_close,
679*4882a593Smuzhiyun .prepare = snd_es1688_playback_prepare,
680*4882a593Smuzhiyun .trigger = snd_es1688_playback_trigger,
681*4882a593Smuzhiyun .pointer = snd_es1688_playback_pointer,
682*4882a593Smuzhiyun };
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun static const struct snd_pcm_ops snd_es1688_capture_ops = {
685*4882a593Smuzhiyun .open = snd_es1688_capture_open,
686*4882a593Smuzhiyun .close = snd_es1688_capture_close,
687*4882a593Smuzhiyun .prepare = snd_es1688_capture_prepare,
688*4882a593Smuzhiyun .trigger = snd_es1688_capture_trigger,
689*4882a593Smuzhiyun .pointer = snd_es1688_capture_pointer,
690*4882a593Smuzhiyun };
691*4882a593Smuzhiyun
snd_es1688_pcm(struct snd_card * card,struct snd_es1688 * chip,int device)692*4882a593Smuzhiyun int snd_es1688_pcm(struct snd_card *card, struct snd_es1688 *chip, int device)
693*4882a593Smuzhiyun {
694*4882a593Smuzhiyun struct snd_pcm *pcm;
695*4882a593Smuzhiyun int err;
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun err = snd_pcm_new(card, "ESx688", device, 1, 1, &pcm);
698*4882a593Smuzhiyun if (err < 0)
699*4882a593Smuzhiyun return err;
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1688_playback_ops);
702*4882a593Smuzhiyun snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1688_capture_ops);
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun pcm->private_data = chip;
705*4882a593Smuzhiyun pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
706*4882a593Smuzhiyun strcpy(pcm->name, snd_es1688_chip_id(chip));
707*4882a593Smuzhiyun chip->pcm = pcm;
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, card->dev,
710*4882a593Smuzhiyun 64*1024, 64*1024);
711*4882a593Smuzhiyun return 0;
712*4882a593Smuzhiyun }
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun /*
715*4882a593Smuzhiyun * MIXER part
716*4882a593Smuzhiyun */
717*4882a593Smuzhiyun
snd_es1688_info_mux(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)718*4882a593Smuzhiyun static int snd_es1688_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
719*4882a593Smuzhiyun {
720*4882a593Smuzhiyun static const char * const texts[8] = {
721*4882a593Smuzhiyun "Mic", "Mic Master", "CD", "AOUT",
722*4882a593Smuzhiyun "Mic1", "Mix", "Line", "Master"
723*4882a593Smuzhiyun };
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun return snd_ctl_enum_info(uinfo, 1, 8, texts);
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun
snd_es1688_get_mux(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)728*4882a593Smuzhiyun static int snd_es1688_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
729*4882a593Smuzhiyun {
730*4882a593Smuzhiyun struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol);
731*4882a593Smuzhiyun ucontrol->value.enumerated.item[0] = snd_es1688_mixer_read(chip, ES1688_REC_DEV) & 7;
732*4882a593Smuzhiyun return 0;
733*4882a593Smuzhiyun }
734*4882a593Smuzhiyun
snd_es1688_put_mux(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)735*4882a593Smuzhiyun static int snd_es1688_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
736*4882a593Smuzhiyun {
737*4882a593Smuzhiyun struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol);
738*4882a593Smuzhiyun unsigned long flags;
739*4882a593Smuzhiyun unsigned char oval, nval;
740*4882a593Smuzhiyun int change;
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun if (ucontrol->value.enumerated.item[0] > 8)
743*4882a593Smuzhiyun return -EINVAL;
744*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
745*4882a593Smuzhiyun oval = snd_es1688_mixer_read(chip, ES1688_REC_DEV);
746*4882a593Smuzhiyun nval = (ucontrol->value.enumerated.item[0] & 7) | (oval & ~15);
747*4882a593Smuzhiyun change = nval != oval;
748*4882a593Smuzhiyun if (change)
749*4882a593Smuzhiyun snd_es1688_mixer_write(chip, ES1688_REC_DEV, nval);
750*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
751*4882a593Smuzhiyun return change;
752*4882a593Smuzhiyun }
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun #define ES1688_SINGLE(xname, xindex, reg, shift, mask, invert) \
755*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
756*4882a593Smuzhiyun .info = snd_es1688_info_single, \
757*4882a593Smuzhiyun .get = snd_es1688_get_single, .put = snd_es1688_put_single, \
758*4882a593Smuzhiyun .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
759*4882a593Smuzhiyun
snd_es1688_info_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)760*4882a593Smuzhiyun static int snd_es1688_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
761*4882a593Smuzhiyun {
762*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 16) & 0xff;
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
765*4882a593Smuzhiyun uinfo->count = 1;
766*4882a593Smuzhiyun uinfo->value.integer.min = 0;
767*4882a593Smuzhiyun uinfo->value.integer.max = mask;
768*4882a593Smuzhiyun return 0;
769*4882a593Smuzhiyun }
770*4882a593Smuzhiyun
snd_es1688_get_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)771*4882a593Smuzhiyun static int snd_es1688_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
772*4882a593Smuzhiyun {
773*4882a593Smuzhiyun struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol);
774*4882a593Smuzhiyun unsigned long flags;
775*4882a593Smuzhiyun int reg = kcontrol->private_value & 0xff;
776*4882a593Smuzhiyun int shift = (kcontrol->private_value >> 8) & 0xff;
777*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 16) & 0xff;
778*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 24) & 0xff;
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
781*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (snd_es1688_mixer_read(chip, reg) >> shift) & mask;
782*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
783*4882a593Smuzhiyun if (invert)
784*4882a593Smuzhiyun ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
785*4882a593Smuzhiyun return 0;
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun
snd_es1688_put_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)788*4882a593Smuzhiyun static int snd_es1688_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
789*4882a593Smuzhiyun {
790*4882a593Smuzhiyun struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol);
791*4882a593Smuzhiyun unsigned long flags;
792*4882a593Smuzhiyun int reg = kcontrol->private_value & 0xff;
793*4882a593Smuzhiyun int shift = (kcontrol->private_value >> 8) & 0xff;
794*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 16) & 0xff;
795*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 24) & 0xff;
796*4882a593Smuzhiyun int change;
797*4882a593Smuzhiyun unsigned char oval, nval;
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun nval = (ucontrol->value.integer.value[0] & mask);
800*4882a593Smuzhiyun if (invert)
801*4882a593Smuzhiyun nval = mask - nval;
802*4882a593Smuzhiyun nval <<= shift;
803*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
804*4882a593Smuzhiyun oval = snd_es1688_mixer_read(chip, reg);
805*4882a593Smuzhiyun nval = (oval & ~(mask << shift)) | nval;
806*4882a593Smuzhiyun change = nval != oval;
807*4882a593Smuzhiyun if (change)
808*4882a593Smuzhiyun snd_es1688_mixer_write(chip, reg, nval);
809*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
810*4882a593Smuzhiyun return change;
811*4882a593Smuzhiyun }
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun #define ES1688_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
814*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
815*4882a593Smuzhiyun .info = snd_es1688_info_double, \
816*4882a593Smuzhiyun .get = snd_es1688_get_double, .put = snd_es1688_put_double, \
817*4882a593Smuzhiyun .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
818*4882a593Smuzhiyun
snd_es1688_info_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)819*4882a593Smuzhiyun static int snd_es1688_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
820*4882a593Smuzhiyun {
821*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 24) & 0xff;
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
824*4882a593Smuzhiyun uinfo->count = 2;
825*4882a593Smuzhiyun uinfo->value.integer.min = 0;
826*4882a593Smuzhiyun uinfo->value.integer.max = mask;
827*4882a593Smuzhiyun return 0;
828*4882a593Smuzhiyun }
829*4882a593Smuzhiyun
snd_es1688_get_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)830*4882a593Smuzhiyun static int snd_es1688_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
831*4882a593Smuzhiyun {
832*4882a593Smuzhiyun struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol);
833*4882a593Smuzhiyun unsigned long flags;
834*4882a593Smuzhiyun int left_reg = kcontrol->private_value & 0xff;
835*4882a593Smuzhiyun int right_reg = (kcontrol->private_value >> 8) & 0xff;
836*4882a593Smuzhiyun int shift_left = (kcontrol->private_value >> 16) & 0x07;
837*4882a593Smuzhiyun int shift_right = (kcontrol->private_value >> 19) & 0x07;
838*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 24) & 0xff;
839*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 22) & 1;
840*4882a593Smuzhiyun unsigned char left, right;
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
843*4882a593Smuzhiyun if (left_reg < 0xa0)
844*4882a593Smuzhiyun left = snd_es1688_mixer_read(chip, left_reg);
845*4882a593Smuzhiyun else
846*4882a593Smuzhiyun left = snd_es1688_read(chip, left_reg);
847*4882a593Smuzhiyun if (left_reg != right_reg) {
848*4882a593Smuzhiyun if (right_reg < 0xa0)
849*4882a593Smuzhiyun right = snd_es1688_mixer_read(chip, right_reg);
850*4882a593Smuzhiyun else
851*4882a593Smuzhiyun right = snd_es1688_read(chip, right_reg);
852*4882a593Smuzhiyun } else
853*4882a593Smuzhiyun right = left;
854*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
855*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
856*4882a593Smuzhiyun ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
857*4882a593Smuzhiyun if (invert) {
858*4882a593Smuzhiyun ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
859*4882a593Smuzhiyun ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
860*4882a593Smuzhiyun }
861*4882a593Smuzhiyun return 0;
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun
snd_es1688_put_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)864*4882a593Smuzhiyun static int snd_es1688_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
865*4882a593Smuzhiyun {
866*4882a593Smuzhiyun struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol);
867*4882a593Smuzhiyun unsigned long flags;
868*4882a593Smuzhiyun int left_reg = kcontrol->private_value & 0xff;
869*4882a593Smuzhiyun int right_reg = (kcontrol->private_value >> 8) & 0xff;
870*4882a593Smuzhiyun int shift_left = (kcontrol->private_value >> 16) & 0x07;
871*4882a593Smuzhiyun int shift_right = (kcontrol->private_value >> 19) & 0x07;
872*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 24) & 0xff;
873*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 22) & 1;
874*4882a593Smuzhiyun int change;
875*4882a593Smuzhiyun unsigned char val1, val2, oval1, oval2;
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun val1 = ucontrol->value.integer.value[0] & mask;
878*4882a593Smuzhiyun val2 = ucontrol->value.integer.value[1] & mask;
879*4882a593Smuzhiyun if (invert) {
880*4882a593Smuzhiyun val1 = mask - val1;
881*4882a593Smuzhiyun val2 = mask - val2;
882*4882a593Smuzhiyun }
883*4882a593Smuzhiyun val1 <<= shift_left;
884*4882a593Smuzhiyun val2 <<= shift_right;
885*4882a593Smuzhiyun spin_lock_irqsave(&chip->reg_lock, flags);
886*4882a593Smuzhiyun if (left_reg != right_reg) {
887*4882a593Smuzhiyun if (left_reg < 0xa0)
888*4882a593Smuzhiyun oval1 = snd_es1688_mixer_read(chip, left_reg);
889*4882a593Smuzhiyun else
890*4882a593Smuzhiyun oval1 = snd_es1688_read(chip, left_reg);
891*4882a593Smuzhiyun if (right_reg < 0xa0)
892*4882a593Smuzhiyun oval2 = snd_es1688_mixer_read(chip, right_reg);
893*4882a593Smuzhiyun else
894*4882a593Smuzhiyun oval2 = snd_es1688_read(chip, right_reg);
895*4882a593Smuzhiyun val1 = (oval1 & ~(mask << shift_left)) | val1;
896*4882a593Smuzhiyun val2 = (oval2 & ~(mask << shift_right)) | val2;
897*4882a593Smuzhiyun change = val1 != oval1 || val2 != oval2;
898*4882a593Smuzhiyun if (change) {
899*4882a593Smuzhiyun if (left_reg < 0xa0)
900*4882a593Smuzhiyun snd_es1688_mixer_write(chip, left_reg, val1);
901*4882a593Smuzhiyun else
902*4882a593Smuzhiyun snd_es1688_write(chip, left_reg, val1);
903*4882a593Smuzhiyun if (right_reg < 0xa0)
904*4882a593Smuzhiyun snd_es1688_mixer_write(chip, right_reg, val1);
905*4882a593Smuzhiyun else
906*4882a593Smuzhiyun snd_es1688_write(chip, right_reg, val1);
907*4882a593Smuzhiyun }
908*4882a593Smuzhiyun } else {
909*4882a593Smuzhiyun if (left_reg < 0xa0)
910*4882a593Smuzhiyun oval1 = snd_es1688_mixer_read(chip, left_reg);
911*4882a593Smuzhiyun else
912*4882a593Smuzhiyun oval1 = snd_es1688_read(chip, left_reg);
913*4882a593Smuzhiyun val1 = (oval1 & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
914*4882a593Smuzhiyun change = val1 != oval1;
915*4882a593Smuzhiyun if (change) {
916*4882a593Smuzhiyun if (left_reg < 0xa0)
917*4882a593Smuzhiyun snd_es1688_mixer_write(chip, left_reg, val1);
918*4882a593Smuzhiyun else
919*4882a593Smuzhiyun snd_es1688_write(chip, left_reg, val1);
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun }
923*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->reg_lock, flags);
924*4882a593Smuzhiyun return change;
925*4882a593Smuzhiyun }
926*4882a593Smuzhiyun
927*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_es1688_controls[] = {
928*4882a593Smuzhiyun ES1688_DOUBLE("Master Playback Volume", 0, ES1688_MASTER_DEV, ES1688_MASTER_DEV, 4, 0, 15, 0),
929*4882a593Smuzhiyun ES1688_DOUBLE("PCM Playback Volume", 0, ES1688_PCM_DEV, ES1688_PCM_DEV, 4, 0, 15, 0),
930*4882a593Smuzhiyun ES1688_DOUBLE("Line Playback Volume", 0, ES1688_LINE_DEV, ES1688_LINE_DEV, 4, 0, 15, 0),
931*4882a593Smuzhiyun ES1688_DOUBLE("CD Playback Volume", 0, ES1688_CD_DEV, ES1688_CD_DEV, 4, 0, 15, 0),
932*4882a593Smuzhiyun ES1688_DOUBLE("FM Playback Volume", 0, ES1688_FM_DEV, ES1688_FM_DEV, 4, 0, 15, 0),
933*4882a593Smuzhiyun ES1688_DOUBLE("Mic Playback Volume", 0, ES1688_MIC_DEV, ES1688_MIC_DEV, 4, 0, 15, 0),
934*4882a593Smuzhiyun ES1688_DOUBLE("Aux Playback Volume", 0, ES1688_AUX_DEV, ES1688_AUX_DEV, 4, 0, 15, 0),
935*4882a593Smuzhiyun ES1688_SINGLE("Beep Playback Volume", 0, ES1688_SPEAKER_DEV, 0, 7, 0),
936*4882a593Smuzhiyun ES1688_DOUBLE("Capture Volume", 0, ES1688_RECLEV_DEV, ES1688_RECLEV_DEV, 4, 0, 15, 0),
937*4882a593Smuzhiyun ES1688_SINGLE("Capture Switch", 0, ES1688_REC_DEV, 4, 1, 1),
938*4882a593Smuzhiyun {
939*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
940*4882a593Smuzhiyun .name = "Capture Source",
941*4882a593Smuzhiyun .info = snd_es1688_info_mux,
942*4882a593Smuzhiyun .get = snd_es1688_get_mux,
943*4882a593Smuzhiyun .put = snd_es1688_put_mux,
944*4882a593Smuzhiyun },
945*4882a593Smuzhiyun };
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun #define ES1688_INIT_TABLE_SIZE (sizeof(snd_es1688_init_table)/2)
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun static const unsigned char snd_es1688_init_table[][2] = {
950*4882a593Smuzhiyun { ES1688_MASTER_DEV, 0 },
951*4882a593Smuzhiyun { ES1688_PCM_DEV, 0 },
952*4882a593Smuzhiyun { ES1688_LINE_DEV, 0 },
953*4882a593Smuzhiyun { ES1688_CD_DEV, 0 },
954*4882a593Smuzhiyun { ES1688_FM_DEV, 0 },
955*4882a593Smuzhiyun { ES1688_MIC_DEV, 0 },
956*4882a593Smuzhiyun { ES1688_AUX_DEV, 0 },
957*4882a593Smuzhiyun { ES1688_SPEAKER_DEV, 0 },
958*4882a593Smuzhiyun { ES1688_RECLEV_DEV, 0 },
959*4882a593Smuzhiyun { ES1688_REC_DEV, 0x17 }
960*4882a593Smuzhiyun };
961*4882a593Smuzhiyun
snd_es1688_mixer(struct snd_card * card,struct snd_es1688 * chip)962*4882a593Smuzhiyun int snd_es1688_mixer(struct snd_card *card, struct snd_es1688 *chip)
963*4882a593Smuzhiyun {
964*4882a593Smuzhiyun unsigned int idx;
965*4882a593Smuzhiyun int err;
966*4882a593Smuzhiyun unsigned char reg, val;
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun if (snd_BUG_ON(!chip || !card))
969*4882a593Smuzhiyun return -EINVAL;
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun strcpy(card->mixername, snd_es1688_chip_id(chip));
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_es1688_controls); idx++) {
974*4882a593Smuzhiyun if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es1688_controls[idx], chip))) < 0)
975*4882a593Smuzhiyun return err;
976*4882a593Smuzhiyun }
977*4882a593Smuzhiyun for (idx = 0; idx < ES1688_INIT_TABLE_SIZE; idx++) {
978*4882a593Smuzhiyun reg = snd_es1688_init_table[idx][0];
979*4882a593Smuzhiyun val = snd_es1688_init_table[idx][1];
980*4882a593Smuzhiyun if (reg < 0xa0)
981*4882a593Smuzhiyun snd_es1688_mixer_write(chip, reg, val);
982*4882a593Smuzhiyun else
983*4882a593Smuzhiyun snd_es1688_write(chip, reg, val);
984*4882a593Smuzhiyun }
985*4882a593Smuzhiyun return 0;
986*4882a593Smuzhiyun }
987*4882a593Smuzhiyun
988*4882a593Smuzhiyun EXPORT_SYMBOL(snd_es1688_mixer_write);
989*4882a593Smuzhiyun EXPORT_SYMBOL(snd_es1688_create);
990*4882a593Smuzhiyun EXPORT_SYMBOL(snd_es1688_pcm);
991*4882a593Smuzhiyun EXPORT_SYMBOL(snd_es1688_mixer);
992