1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Routines for control of the AK4114 via I2C and 4-wire serial interface
4*4882a593Smuzhiyun * IEC958 (S/PDIF) receiver by Asahi Kasei
5*4882a593Smuzhiyun * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/slab.h>
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <sound/core.h>
12*4882a593Smuzhiyun #include <sound/control.h>
13*4882a593Smuzhiyun #include <sound/pcm.h>
14*4882a593Smuzhiyun #include <sound/ak4114.h>
15*4882a593Smuzhiyun #include <sound/asoundef.h>
16*4882a593Smuzhiyun #include <sound/info.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
19*4882a593Smuzhiyun MODULE_DESCRIPTION("AK4114 IEC958 (S/PDIF) receiver by Asahi Kasei");
20*4882a593Smuzhiyun MODULE_LICENSE("GPL");
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define AK4114_ADDR 0x00 /* fixed address */
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun static void ak4114_stats(struct work_struct *work);
25*4882a593Smuzhiyun static void ak4114_init_regs(struct ak4114 *chip);
26*4882a593Smuzhiyun
reg_write(struct ak4114 * ak4114,unsigned char reg,unsigned char val)27*4882a593Smuzhiyun static void reg_write(struct ak4114 *ak4114, unsigned char reg, unsigned char val)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun ak4114->write(ak4114->private_data, reg, val);
30*4882a593Smuzhiyun if (reg <= AK4114_REG_INT1_MASK)
31*4882a593Smuzhiyun ak4114->regmap[reg] = val;
32*4882a593Smuzhiyun else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4)
33*4882a593Smuzhiyun ak4114->txcsb[reg-AK4114_REG_TXCSB0] = val;
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
reg_read(struct ak4114 * ak4114,unsigned char reg)36*4882a593Smuzhiyun static inline unsigned char reg_read(struct ak4114 *ak4114, unsigned char reg)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun return ak4114->read(ak4114->private_data, reg);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #if 0
42*4882a593Smuzhiyun static void reg_dump(struct ak4114 *ak4114)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun int i;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun printk(KERN_DEBUG "AK4114 REG DUMP:\n");
47*4882a593Smuzhiyun for (i = 0; i < 0x20; i++)
48*4882a593Smuzhiyun printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4114, i), i < ARRAY_SIZE(ak4114->regmap) ? ak4114->regmap[i] : 0);
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun #endif
51*4882a593Smuzhiyun
snd_ak4114_free(struct ak4114 * chip)52*4882a593Smuzhiyun static void snd_ak4114_free(struct ak4114 *chip)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun atomic_inc(&chip->wq_processing); /* don't schedule new work */
55*4882a593Smuzhiyun cancel_delayed_work_sync(&chip->work);
56*4882a593Smuzhiyun kfree(chip);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
snd_ak4114_dev_free(struct snd_device * device)59*4882a593Smuzhiyun static int snd_ak4114_dev_free(struct snd_device *device)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun struct ak4114 *chip = device->device_data;
62*4882a593Smuzhiyun snd_ak4114_free(chip);
63*4882a593Smuzhiyun return 0;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
snd_ak4114_create(struct snd_card * card,ak4114_read_t * read,ak4114_write_t * write,const unsigned char pgm[6],const unsigned char txcsb[5],void * private_data,struct ak4114 ** r_ak4114)66*4882a593Smuzhiyun int snd_ak4114_create(struct snd_card *card,
67*4882a593Smuzhiyun ak4114_read_t *read, ak4114_write_t *write,
68*4882a593Smuzhiyun const unsigned char pgm[6], const unsigned char txcsb[5],
69*4882a593Smuzhiyun void *private_data, struct ak4114 **r_ak4114)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun struct ak4114 *chip;
72*4882a593Smuzhiyun int err = 0;
73*4882a593Smuzhiyun unsigned char reg;
74*4882a593Smuzhiyun static const struct snd_device_ops ops = {
75*4882a593Smuzhiyun .dev_free = snd_ak4114_dev_free,
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun chip = kzalloc(sizeof(*chip), GFP_KERNEL);
79*4882a593Smuzhiyun if (chip == NULL)
80*4882a593Smuzhiyun return -ENOMEM;
81*4882a593Smuzhiyun spin_lock_init(&chip->lock);
82*4882a593Smuzhiyun chip->card = card;
83*4882a593Smuzhiyun chip->read = read;
84*4882a593Smuzhiyun chip->write = write;
85*4882a593Smuzhiyun chip->private_data = private_data;
86*4882a593Smuzhiyun INIT_DELAYED_WORK(&chip->work, ak4114_stats);
87*4882a593Smuzhiyun atomic_set(&chip->wq_processing, 0);
88*4882a593Smuzhiyun mutex_init(&chip->reinit_mutex);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun for (reg = 0; reg < 6; reg++)
91*4882a593Smuzhiyun chip->regmap[reg] = pgm[reg];
92*4882a593Smuzhiyun for (reg = 0; reg < 5; reg++)
93*4882a593Smuzhiyun chip->txcsb[reg] = txcsb[reg];
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun ak4114_init_regs(chip);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun chip->rcs0 = reg_read(chip, AK4114_REG_RCS0) & ~(AK4114_QINT | AK4114_CINT);
98*4882a593Smuzhiyun chip->rcs1 = reg_read(chip, AK4114_REG_RCS1);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0)
101*4882a593Smuzhiyun goto __fail;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun if (r_ak4114)
104*4882a593Smuzhiyun *r_ak4114 = chip;
105*4882a593Smuzhiyun return 0;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun __fail:
108*4882a593Smuzhiyun snd_ak4114_free(chip);
109*4882a593Smuzhiyun return err;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun EXPORT_SYMBOL(snd_ak4114_create);
112*4882a593Smuzhiyun
snd_ak4114_reg_write(struct ak4114 * chip,unsigned char reg,unsigned char mask,unsigned char val)113*4882a593Smuzhiyun void snd_ak4114_reg_write(struct ak4114 *chip, unsigned char reg, unsigned char mask, unsigned char val)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun if (reg <= AK4114_REG_INT1_MASK)
116*4882a593Smuzhiyun reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
117*4882a593Smuzhiyun else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4)
118*4882a593Smuzhiyun reg_write(chip, reg,
119*4882a593Smuzhiyun (chip->txcsb[reg-AK4114_REG_TXCSB0] & ~mask) | val);
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun EXPORT_SYMBOL(snd_ak4114_reg_write);
122*4882a593Smuzhiyun
ak4114_init_regs(struct ak4114 * chip)123*4882a593Smuzhiyun static void ak4114_init_regs(struct ak4114 *chip)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun unsigned char old = chip->regmap[AK4114_REG_PWRDN], reg;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /* bring the chip to reset state and powerdown state */
128*4882a593Smuzhiyun reg_write(chip, AK4114_REG_PWRDN, old & ~(AK4114_RST|AK4114_PWN));
129*4882a593Smuzhiyun udelay(200);
130*4882a593Smuzhiyun /* release reset, but leave powerdown */
131*4882a593Smuzhiyun reg_write(chip, AK4114_REG_PWRDN, (old | AK4114_RST) & ~AK4114_PWN);
132*4882a593Smuzhiyun udelay(200);
133*4882a593Smuzhiyun for (reg = 1; reg < 6; reg++)
134*4882a593Smuzhiyun reg_write(chip, reg, chip->regmap[reg]);
135*4882a593Smuzhiyun for (reg = 0; reg < 5; reg++)
136*4882a593Smuzhiyun reg_write(chip, reg + AK4114_REG_TXCSB0, chip->txcsb[reg]);
137*4882a593Smuzhiyun /* release powerdown, everything is initialized now */
138*4882a593Smuzhiyun reg_write(chip, AK4114_REG_PWRDN, old | AK4114_RST | AK4114_PWN);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
snd_ak4114_reinit(struct ak4114 * chip)141*4882a593Smuzhiyun void snd_ak4114_reinit(struct ak4114 *chip)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun if (atomic_inc_return(&chip->wq_processing) == 1)
144*4882a593Smuzhiyun cancel_delayed_work_sync(&chip->work);
145*4882a593Smuzhiyun mutex_lock(&chip->reinit_mutex);
146*4882a593Smuzhiyun ak4114_init_regs(chip);
147*4882a593Smuzhiyun mutex_unlock(&chip->reinit_mutex);
148*4882a593Smuzhiyun /* bring up statistics / event queing */
149*4882a593Smuzhiyun if (atomic_dec_and_test(&chip->wq_processing))
150*4882a593Smuzhiyun schedule_delayed_work(&chip->work, HZ / 10);
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun EXPORT_SYMBOL(snd_ak4114_reinit);
153*4882a593Smuzhiyun
external_rate(unsigned char rcs1)154*4882a593Smuzhiyun static unsigned int external_rate(unsigned char rcs1)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun switch (rcs1 & (AK4114_FS0|AK4114_FS1|AK4114_FS2|AK4114_FS3)) {
157*4882a593Smuzhiyun case AK4114_FS_32000HZ: return 32000;
158*4882a593Smuzhiyun case AK4114_FS_44100HZ: return 44100;
159*4882a593Smuzhiyun case AK4114_FS_48000HZ: return 48000;
160*4882a593Smuzhiyun case AK4114_FS_88200HZ: return 88200;
161*4882a593Smuzhiyun case AK4114_FS_96000HZ: return 96000;
162*4882a593Smuzhiyun case AK4114_FS_176400HZ: return 176400;
163*4882a593Smuzhiyun case AK4114_FS_192000HZ: return 192000;
164*4882a593Smuzhiyun default: return 0;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
snd_ak4114_in_error_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)168*4882a593Smuzhiyun static int snd_ak4114_in_error_info(struct snd_kcontrol *kcontrol,
169*4882a593Smuzhiyun struct snd_ctl_elem_info *uinfo)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
172*4882a593Smuzhiyun uinfo->count = 1;
173*4882a593Smuzhiyun uinfo->value.integer.min = 0;
174*4882a593Smuzhiyun uinfo->value.integer.max = LONG_MAX;
175*4882a593Smuzhiyun return 0;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
snd_ak4114_in_error_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)178*4882a593Smuzhiyun static int snd_ak4114_in_error_get(struct snd_kcontrol *kcontrol,
179*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun spin_lock_irq(&chip->lock);
184*4882a593Smuzhiyun ucontrol->value.integer.value[0] =
185*4882a593Smuzhiyun chip->errors[kcontrol->private_value];
186*4882a593Smuzhiyun chip->errors[kcontrol->private_value] = 0;
187*4882a593Smuzhiyun spin_unlock_irq(&chip->lock);
188*4882a593Smuzhiyun return 0;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun #define snd_ak4114_in_bit_info snd_ctl_boolean_mono_info
192*4882a593Smuzhiyun
snd_ak4114_in_bit_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)193*4882a593Smuzhiyun static int snd_ak4114_in_bit_get(struct snd_kcontrol *kcontrol,
194*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
197*4882a593Smuzhiyun unsigned char reg = kcontrol->private_value & 0xff;
198*4882a593Smuzhiyun unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
199*4882a593Smuzhiyun unsigned char inv = (kcontrol->private_value >> 31) & 1;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
202*4882a593Smuzhiyun return 0;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
snd_ak4114_rate_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)205*4882a593Smuzhiyun static int snd_ak4114_rate_info(struct snd_kcontrol *kcontrol,
206*4882a593Smuzhiyun struct snd_ctl_elem_info *uinfo)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
209*4882a593Smuzhiyun uinfo->count = 1;
210*4882a593Smuzhiyun uinfo->value.integer.min = 0;
211*4882a593Smuzhiyun uinfo->value.integer.max = 192000;
212*4882a593Smuzhiyun return 0;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun
snd_ak4114_rate_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)215*4882a593Smuzhiyun static int snd_ak4114_rate_get(struct snd_kcontrol *kcontrol,
216*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4114_REG_RCS1));
221*4882a593Smuzhiyun return 0;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
snd_ak4114_spdif_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)224*4882a593Smuzhiyun static int snd_ak4114_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
227*4882a593Smuzhiyun uinfo->count = 1;
228*4882a593Smuzhiyun return 0;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
snd_ak4114_spdif_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)231*4882a593Smuzhiyun static int snd_ak4114_spdif_get(struct snd_kcontrol *kcontrol,
232*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
235*4882a593Smuzhiyun unsigned i;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun for (i = 0; i < AK4114_REG_RXCSB_SIZE; i++)
238*4882a593Smuzhiyun ucontrol->value.iec958.status[i] = reg_read(chip, AK4114_REG_RXCSB0 + i);
239*4882a593Smuzhiyun return 0;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
snd_ak4114_spdif_playback_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)242*4882a593Smuzhiyun static int snd_ak4114_spdif_playback_get(struct snd_kcontrol *kcontrol,
243*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
246*4882a593Smuzhiyun unsigned i;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++)
249*4882a593Smuzhiyun ucontrol->value.iec958.status[i] = chip->txcsb[i];
250*4882a593Smuzhiyun return 0;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
snd_ak4114_spdif_playback_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)253*4882a593Smuzhiyun static int snd_ak4114_spdif_playback_put(struct snd_kcontrol *kcontrol,
254*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
257*4882a593Smuzhiyun unsigned i;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++)
260*4882a593Smuzhiyun reg_write(chip, AK4114_REG_TXCSB0 + i, ucontrol->value.iec958.status[i]);
261*4882a593Smuzhiyun return 0;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
snd_ak4114_spdif_mask_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)264*4882a593Smuzhiyun static int snd_ak4114_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
267*4882a593Smuzhiyun uinfo->count = 1;
268*4882a593Smuzhiyun return 0;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
snd_ak4114_spdif_mask_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)271*4882a593Smuzhiyun static int snd_ak4114_spdif_mask_get(struct snd_kcontrol *kcontrol,
272*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun memset(ucontrol->value.iec958.status, 0xff, AK4114_REG_RXCSB_SIZE);
275*4882a593Smuzhiyun return 0;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
snd_ak4114_spdif_pinfo(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)278*4882a593Smuzhiyun static int snd_ak4114_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
281*4882a593Smuzhiyun uinfo->value.integer.min = 0;
282*4882a593Smuzhiyun uinfo->value.integer.max = 0xffff;
283*4882a593Smuzhiyun uinfo->count = 4;
284*4882a593Smuzhiyun return 0;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
snd_ak4114_spdif_pget(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)287*4882a593Smuzhiyun static int snd_ak4114_spdif_pget(struct snd_kcontrol *kcontrol,
288*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
291*4882a593Smuzhiyun unsigned short tmp;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun ucontrol->value.integer.value[0] = 0xf8f2;
294*4882a593Smuzhiyun ucontrol->value.integer.value[1] = 0x4e1f;
295*4882a593Smuzhiyun tmp = reg_read(chip, AK4114_REG_Pc0) | (reg_read(chip, AK4114_REG_Pc1) << 8);
296*4882a593Smuzhiyun ucontrol->value.integer.value[2] = tmp;
297*4882a593Smuzhiyun tmp = reg_read(chip, AK4114_REG_Pd0) | (reg_read(chip, AK4114_REG_Pd1) << 8);
298*4882a593Smuzhiyun ucontrol->value.integer.value[3] = tmp;
299*4882a593Smuzhiyun return 0;
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun
snd_ak4114_spdif_qinfo(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)302*4882a593Smuzhiyun static int snd_ak4114_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
305*4882a593Smuzhiyun uinfo->count = AK4114_REG_QSUB_SIZE;
306*4882a593Smuzhiyun return 0;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
snd_ak4114_spdif_qget(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)309*4882a593Smuzhiyun static int snd_ak4114_spdif_qget(struct snd_kcontrol *kcontrol,
310*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
313*4882a593Smuzhiyun unsigned i;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun for (i = 0; i < AK4114_REG_QSUB_SIZE; i++)
316*4882a593Smuzhiyun ucontrol->value.bytes.data[i] = reg_read(chip, AK4114_REG_QSUB_ADDR + i);
317*4882a593Smuzhiyun return 0;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun /* Don't forget to change AK4114_CONTROLS define!!! */
321*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_ak4114_iec958_controls[] = {
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
324*4882a593Smuzhiyun .name = "IEC958 Parity Errors",
325*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
326*4882a593Smuzhiyun .info = snd_ak4114_in_error_info,
327*4882a593Smuzhiyun .get = snd_ak4114_in_error_get,
328*4882a593Smuzhiyun .private_value = AK4114_PARITY_ERRORS,
329*4882a593Smuzhiyun },
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
332*4882a593Smuzhiyun .name = "IEC958 V-Bit Errors",
333*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
334*4882a593Smuzhiyun .info = snd_ak4114_in_error_info,
335*4882a593Smuzhiyun .get = snd_ak4114_in_error_get,
336*4882a593Smuzhiyun .private_value = AK4114_V_BIT_ERRORS,
337*4882a593Smuzhiyun },
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
340*4882a593Smuzhiyun .name = "IEC958 C-CRC Errors",
341*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
342*4882a593Smuzhiyun .info = snd_ak4114_in_error_info,
343*4882a593Smuzhiyun .get = snd_ak4114_in_error_get,
344*4882a593Smuzhiyun .private_value = AK4114_CCRC_ERRORS,
345*4882a593Smuzhiyun },
346*4882a593Smuzhiyun {
347*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
348*4882a593Smuzhiyun .name = "IEC958 Q-CRC Errors",
349*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
350*4882a593Smuzhiyun .info = snd_ak4114_in_error_info,
351*4882a593Smuzhiyun .get = snd_ak4114_in_error_get,
352*4882a593Smuzhiyun .private_value = AK4114_QCRC_ERRORS,
353*4882a593Smuzhiyun },
354*4882a593Smuzhiyun {
355*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
356*4882a593Smuzhiyun .name = "IEC958 External Rate",
357*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
358*4882a593Smuzhiyun .info = snd_ak4114_rate_info,
359*4882a593Smuzhiyun .get = snd_ak4114_rate_get,
360*4882a593Smuzhiyun },
361*4882a593Smuzhiyun {
362*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
363*4882a593Smuzhiyun .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
364*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ,
365*4882a593Smuzhiyun .info = snd_ak4114_spdif_mask_info,
366*4882a593Smuzhiyun .get = snd_ak4114_spdif_mask_get,
367*4882a593Smuzhiyun },
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
370*4882a593Smuzhiyun .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
371*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
372*4882a593Smuzhiyun .info = snd_ak4114_spdif_info,
373*4882a593Smuzhiyun .get = snd_ak4114_spdif_playback_get,
374*4882a593Smuzhiyun .put = snd_ak4114_spdif_playback_put,
375*4882a593Smuzhiyun },
376*4882a593Smuzhiyun {
377*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
378*4882a593Smuzhiyun .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
379*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ,
380*4882a593Smuzhiyun .info = snd_ak4114_spdif_mask_info,
381*4882a593Smuzhiyun .get = snd_ak4114_spdif_mask_get,
382*4882a593Smuzhiyun },
383*4882a593Smuzhiyun {
384*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
385*4882a593Smuzhiyun .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
386*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
387*4882a593Smuzhiyun .info = snd_ak4114_spdif_info,
388*4882a593Smuzhiyun .get = snd_ak4114_spdif_get,
389*4882a593Smuzhiyun },
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
392*4882a593Smuzhiyun .name = "IEC958 Preamble Capture Default",
393*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
394*4882a593Smuzhiyun .info = snd_ak4114_spdif_pinfo,
395*4882a593Smuzhiyun .get = snd_ak4114_spdif_pget,
396*4882a593Smuzhiyun },
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
399*4882a593Smuzhiyun .name = "IEC958 Q-subcode Capture Default",
400*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
401*4882a593Smuzhiyun .info = snd_ak4114_spdif_qinfo,
402*4882a593Smuzhiyun .get = snd_ak4114_spdif_qget,
403*4882a593Smuzhiyun },
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
406*4882a593Smuzhiyun .name = "IEC958 Audio",
407*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
408*4882a593Smuzhiyun .info = snd_ak4114_in_bit_info,
409*4882a593Smuzhiyun .get = snd_ak4114_in_bit_get,
410*4882a593Smuzhiyun .private_value = (1<<31) | (1<<8) | AK4114_REG_RCS0,
411*4882a593Smuzhiyun },
412*4882a593Smuzhiyun {
413*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
414*4882a593Smuzhiyun .name = "IEC958 Non-PCM Bitstream",
415*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
416*4882a593Smuzhiyun .info = snd_ak4114_in_bit_info,
417*4882a593Smuzhiyun .get = snd_ak4114_in_bit_get,
418*4882a593Smuzhiyun .private_value = (6<<8) | AK4114_REG_RCS0,
419*4882a593Smuzhiyun },
420*4882a593Smuzhiyun {
421*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
422*4882a593Smuzhiyun .name = "IEC958 DTS Bitstream",
423*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
424*4882a593Smuzhiyun .info = snd_ak4114_in_bit_info,
425*4882a593Smuzhiyun .get = snd_ak4114_in_bit_get,
426*4882a593Smuzhiyun .private_value = (3<<8) | AK4114_REG_RCS0,
427*4882a593Smuzhiyun },
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
430*4882a593Smuzhiyun .name = "IEC958 PPL Lock Status",
431*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
432*4882a593Smuzhiyun .info = snd_ak4114_in_bit_info,
433*4882a593Smuzhiyun .get = snd_ak4114_in_bit_get,
434*4882a593Smuzhiyun .private_value = (1<<31) | (4<<8) | AK4114_REG_RCS0,
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun };
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun
snd_ak4114_proc_regs_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)439*4882a593Smuzhiyun static void snd_ak4114_proc_regs_read(struct snd_info_entry *entry,
440*4882a593Smuzhiyun struct snd_info_buffer *buffer)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun struct ak4114 *ak4114 = entry->private_data;
443*4882a593Smuzhiyun int reg, val;
444*4882a593Smuzhiyun /* all ak4114 registers 0x00 - 0x1f */
445*4882a593Smuzhiyun for (reg = 0; reg < 0x20; reg++) {
446*4882a593Smuzhiyun val = reg_read(ak4114, reg);
447*4882a593Smuzhiyun snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun
snd_ak4114_proc_init(struct ak4114 * ak4114)451*4882a593Smuzhiyun static void snd_ak4114_proc_init(struct ak4114 *ak4114)
452*4882a593Smuzhiyun {
453*4882a593Smuzhiyun snd_card_ro_proc_new(ak4114->card, "ak4114", ak4114,
454*4882a593Smuzhiyun snd_ak4114_proc_regs_read);
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
snd_ak4114_build(struct ak4114 * ak4114,struct snd_pcm_substream * ply_substream,struct snd_pcm_substream * cap_substream)457*4882a593Smuzhiyun int snd_ak4114_build(struct ak4114 *ak4114,
458*4882a593Smuzhiyun struct snd_pcm_substream *ply_substream,
459*4882a593Smuzhiyun struct snd_pcm_substream *cap_substream)
460*4882a593Smuzhiyun {
461*4882a593Smuzhiyun struct snd_kcontrol *kctl;
462*4882a593Smuzhiyun unsigned int idx;
463*4882a593Smuzhiyun int err;
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun if (snd_BUG_ON(!cap_substream))
466*4882a593Smuzhiyun return -EINVAL;
467*4882a593Smuzhiyun ak4114->playback_substream = ply_substream;
468*4882a593Smuzhiyun ak4114->capture_substream = cap_substream;
469*4882a593Smuzhiyun for (idx = 0; idx < AK4114_CONTROLS; idx++) {
470*4882a593Smuzhiyun kctl = snd_ctl_new1(&snd_ak4114_iec958_controls[idx], ak4114);
471*4882a593Smuzhiyun if (kctl == NULL)
472*4882a593Smuzhiyun return -ENOMEM;
473*4882a593Smuzhiyun if (strstr(kctl->id.name, "Playback")) {
474*4882a593Smuzhiyun if (ply_substream == NULL) {
475*4882a593Smuzhiyun snd_ctl_free_one(kctl);
476*4882a593Smuzhiyun ak4114->kctls[idx] = NULL;
477*4882a593Smuzhiyun continue;
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun kctl->id.device = ply_substream->pcm->device;
480*4882a593Smuzhiyun kctl->id.subdevice = ply_substream->number;
481*4882a593Smuzhiyun } else {
482*4882a593Smuzhiyun kctl->id.device = cap_substream->pcm->device;
483*4882a593Smuzhiyun kctl->id.subdevice = cap_substream->number;
484*4882a593Smuzhiyun }
485*4882a593Smuzhiyun err = snd_ctl_add(ak4114->card, kctl);
486*4882a593Smuzhiyun if (err < 0)
487*4882a593Smuzhiyun return err;
488*4882a593Smuzhiyun ak4114->kctls[idx] = kctl;
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun snd_ak4114_proc_init(ak4114);
491*4882a593Smuzhiyun /* trigger workq */
492*4882a593Smuzhiyun schedule_delayed_work(&ak4114->work, HZ / 10);
493*4882a593Smuzhiyun return 0;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun EXPORT_SYMBOL(snd_ak4114_build);
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun /* notify kcontrols if any parameters are changed */
ak4114_notify(struct ak4114 * ak4114,unsigned char rcs0,unsigned char rcs1,unsigned char c0,unsigned char c1)498*4882a593Smuzhiyun static void ak4114_notify(struct ak4114 *ak4114,
499*4882a593Smuzhiyun unsigned char rcs0, unsigned char rcs1,
500*4882a593Smuzhiyun unsigned char c0, unsigned char c1)
501*4882a593Smuzhiyun {
502*4882a593Smuzhiyun if (!ak4114->kctls[0])
503*4882a593Smuzhiyun return;
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun if (rcs0 & AK4114_PAR)
506*4882a593Smuzhiyun snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
507*4882a593Smuzhiyun &ak4114->kctls[0]->id);
508*4882a593Smuzhiyun if (rcs0 & AK4114_V)
509*4882a593Smuzhiyun snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
510*4882a593Smuzhiyun &ak4114->kctls[1]->id);
511*4882a593Smuzhiyun if (rcs1 & AK4114_CCRC)
512*4882a593Smuzhiyun snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
513*4882a593Smuzhiyun &ak4114->kctls[2]->id);
514*4882a593Smuzhiyun if (rcs1 & AK4114_QCRC)
515*4882a593Smuzhiyun snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
516*4882a593Smuzhiyun &ak4114->kctls[3]->id);
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun /* rate change */
519*4882a593Smuzhiyun if (c1 & 0xf0)
520*4882a593Smuzhiyun snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
521*4882a593Smuzhiyun &ak4114->kctls[4]->id);
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun if ((c0 & AK4114_PEM) | (c0 & AK4114_CINT))
524*4882a593Smuzhiyun snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
525*4882a593Smuzhiyun &ak4114->kctls[9]->id);
526*4882a593Smuzhiyun if (c0 & AK4114_QINT)
527*4882a593Smuzhiyun snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
528*4882a593Smuzhiyun &ak4114->kctls[10]->id);
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun if (c0 & AK4114_AUDION)
531*4882a593Smuzhiyun snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
532*4882a593Smuzhiyun &ak4114->kctls[11]->id);
533*4882a593Smuzhiyun if (c0 & AK4114_AUTO)
534*4882a593Smuzhiyun snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
535*4882a593Smuzhiyun &ak4114->kctls[12]->id);
536*4882a593Smuzhiyun if (c0 & AK4114_DTSCD)
537*4882a593Smuzhiyun snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
538*4882a593Smuzhiyun &ak4114->kctls[13]->id);
539*4882a593Smuzhiyun if (c0 & AK4114_UNLCK)
540*4882a593Smuzhiyun snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
541*4882a593Smuzhiyun &ak4114->kctls[14]->id);
542*4882a593Smuzhiyun }
543*4882a593Smuzhiyun
snd_ak4114_external_rate(struct ak4114 * ak4114)544*4882a593Smuzhiyun int snd_ak4114_external_rate(struct ak4114 *ak4114)
545*4882a593Smuzhiyun {
546*4882a593Smuzhiyun unsigned char rcs1;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun rcs1 = reg_read(ak4114, AK4114_REG_RCS1);
549*4882a593Smuzhiyun return external_rate(rcs1);
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun EXPORT_SYMBOL(snd_ak4114_external_rate);
552*4882a593Smuzhiyun
snd_ak4114_check_rate_and_errors(struct ak4114 * ak4114,unsigned int flags)553*4882a593Smuzhiyun int snd_ak4114_check_rate_and_errors(struct ak4114 *ak4114, unsigned int flags)
554*4882a593Smuzhiyun {
555*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = ak4114->capture_substream ? ak4114->capture_substream->runtime : NULL;
556*4882a593Smuzhiyun unsigned long _flags;
557*4882a593Smuzhiyun int res = 0;
558*4882a593Smuzhiyun unsigned char rcs0, rcs1;
559*4882a593Smuzhiyun unsigned char c0, c1;
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun rcs1 = reg_read(ak4114, AK4114_REG_RCS1);
562*4882a593Smuzhiyun if (flags & AK4114_CHECK_NO_STAT)
563*4882a593Smuzhiyun goto __rate;
564*4882a593Smuzhiyun rcs0 = reg_read(ak4114, AK4114_REG_RCS0);
565*4882a593Smuzhiyun spin_lock_irqsave(&ak4114->lock, _flags);
566*4882a593Smuzhiyun if (rcs0 & AK4114_PAR)
567*4882a593Smuzhiyun ak4114->errors[AK4114_PARITY_ERRORS]++;
568*4882a593Smuzhiyun if (rcs1 & AK4114_V)
569*4882a593Smuzhiyun ak4114->errors[AK4114_V_BIT_ERRORS]++;
570*4882a593Smuzhiyun if (rcs1 & AK4114_CCRC)
571*4882a593Smuzhiyun ak4114->errors[AK4114_CCRC_ERRORS]++;
572*4882a593Smuzhiyun if (rcs1 & AK4114_QCRC)
573*4882a593Smuzhiyun ak4114->errors[AK4114_QCRC_ERRORS]++;
574*4882a593Smuzhiyun c0 = (ak4114->rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK)) ^
575*4882a593Smuzhiyun (rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK));
576*4882a593Smuzhiyun c1 = (ak4114->rcs1 & 0xf0) ^ (rcs1 & 0xf0);
577*4882a593Smuzhiyun ak4114->rcs0 = rcs0 & ~(AK4114_QINT | AK4114_CINT);
578*4882a593Smuzhiyun ak4114->rcs1 = rcs1;
579*4882a593Smuzhiyun spin_unlock_irqrestore(&ak4114->lock, _flags);
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun ak4114_notify(ak4114, rcs0, rcs1, c0, c1);
582*4882a593Smuzhiyun if (ak4114->change_callback && (c0 | c1) != 0)
583*4882a593Smuzhiyun ak4114->change_callback(ak4114, c0, c1);
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun __rate:
586*4882a593Smuzhiyun /* compare rate */
587*4882a593Smuzhiyun res = external_rate(rcs1);
588*4882a593Smuzhiyun if (!(flags & AK4114_CHECK_NO_RATE) && runtime && runtime->rate != res) {
589*4882a593Smuzhiyun snd_pcm_stream_lock_irqsave(ak4114->capture_substream, _flags);
590*4882a593Smuzhiyun if (snd_pcm_running(ak4114->capture_substream)) {
591*4882a593Smuzhiyun // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
592*4882a593Smuzhiyun snd_pcm_stop(ak4114->capture_substream, SNDRV_PCM_STATE_DRAINING);
593*4882a593Smuzhiyun res = 1;
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun snd_pcm_stream_unlock_irqrestore(ak4114->capture_substream, _flags);
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun return res;
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun EXPORT_SYMBOL(snd_ak4114_check_rate_and_errors);
600*4882a593Smuzhiyun
ak4114_stats(struct work_struct * work)601*4882a593Smuzhiyun static void ak4114_stats(struct work_struct *work)
602*4882a593Smuzhiyun {
603*4882a593Smuzhiyun struct ak4114 *chip = container_of(work, struct ak4114, work.work);
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun if (atomic_inc_return(&chip->wq_processing) == 1)
606*4882a593Smuzhiyun snd_ak4114_check_rate_and_errors(chip, chip->check_flags);
607*4882a593Smuzhiyun if (atomic_dec_and_test(&chip->wq_processing))
608*4882a593Smuzhiyun schedule_delayed_work(&chip->work, HZ / 10);
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun #ifdef CONFIG_PM
snd_ak4114_suspend(struct ak4114 * chip)612*4882a593Smuzhiyun void snd_ak4114_suspend(struct ak4114 *chip)
613*4882a593Smuzhiyun {
614*4882a593Smuzhiyun atomic_inc(&chip->wq_processing); /* don't schedule new work */
615*4882a593Smuzhiyun cancel_delayed_work_sync(&chip->work);
616*4882a593Smuzhiyun }
617*4882a593Smuzhiyun EXPORT_SYMBOL(snd_ak4114_suspend);
618*4882a593Smuzhiyun
snd_ak4114_resume(struct ak4114 * chip)619*4882a593Smuzhiyun void snd_ak4114_resume(struct ak4114 *chip)
620*4882a593Smuzhiyun {
621*4882a593Smuzhiyun atomic_dec(&chip->wq_processing);
622*4882a593Smuzhiyun snd_ak4114_reinit(chip);
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun EXPORT_SYMBOL(snd_ak4114_resume);
625*4882a593Smuzhiyun #endif
626