1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Regmap support for HD-audio verbs
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * A virtual register is translated to one or more hda verbs for write,
6*4882a593Smuzhiyun * vice versa for read.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * A few limitations:
9*4882a593Smuzhiyun * - Provided for not all verbs but only subset standard non-volatile verbs.
10*4882a593Smuzhiyun * - For reading, only AC_VERB_GET_* variants can be used.
11*4882a593Smuzhiyun * - For writing, mapped to the *corresponding* AC_VERB_SET_* variants,
12*4882a593Smuzhiyun * so can't handle asymmetric verbs for read and write
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/device.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun #include <linux/export.h>
19*4882a593Smuzhiyun #include <linux/pm.h>
20*4882a593Smuzhiyun #include <linux/pm_runtime.h>
21*4882a593Smuzhiyun #include <sound/core.h>
22*4882a593Smuzhiyun #include <sound/hdaudio.h>
23*4882a593Smuzhiyun #include <sound/hda_regmap.h>
24*4882a593Smuzhiyun #include "local.h"
25*4882a593Smuzhiyun
codec_pm_lock(struct hdac_device * codec)26*4882a593Smuzhiyun static int codec_pm_lock(struct hdac_device *codec)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun return snd_hdac_keep_power_up(codec);
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
codec_pm_unlock(struct hdac_device * codec,int lock)31*4882a593Smuzhiyun static void codec_pm_unlock(struct hdac_device *codec, int lock)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun if (lock == 1)
34*4882a593Smuzhiyun snd_hdac_power_down_pm(codec);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define get_verb(reg) (((reg) >> 8) & 0xfff)
38*4882a593Smuzhiyun
hda_volatile_reg(struct device * dev,unsigned int reg)39*4882a593Smuzhiyun static bool hda_volatile_reg(struct device *dev, unsigned int reg)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun struct hdac_device *codec = dev_to_hdac_dev(dev);
42*4882a593Smuzhiyun unsigned int verb = get_verb(reg);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun switch (verb) {
45*4882a593Smuzhiyun case AC_VERB_GET_PROC_COEF:
46*4882a593Smuzhiyun return !codec->cache_coef;
47*4882a593Smuzhiyun case AC_VERB_GET_COEF_INDEX:
48*4882a593Smuzhiyun case AC_VERB_GET_PROC_STATE:
49*4882a593Smuzhiyun case AC_VERB_GET_POWER_STATE:
50*4882a593Smuzhiyun case AC_VERB_GET_PIN_SENSE:
51*4882a593Smuzhiyun case AC_VERB_GET_HDMI_DIP_SIZE:
52*4882a593Smuzhiyun case AC_VERB_GET_HDMI_ELDD:
53*4882a593Smuzhiyun case AC_VERB_GET_HDMI_DIP_INDEX:
54*4882a593Smuzhiyun case AC_VERB_GET_HDMI_DIP_DATA:
55*4882a593Smuzhiyun case AC_VERB_GET_HDMI_DIP_XMIT:
56*4882a593Smuzhiyun case AC_VERB_GET_HDMI_CP_CTRL:
57*4882a593Smuzhiyun case AC_VERB_GET_HDMI_CHAN_SLOT:
58*4882a593Smuzhiyun case AC_VERB_GET_DEVICE_SEL:
59*4882a593Smuzhiyun case AC_VERB_GET_DEVICE_LIST: /* read-only volatile */
60*4882a593Smuzhiyun return true;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun return false;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
hda_writeable_reg(struct device * dev,unsigned int reg)66*4882a593Smuzhiyun static bool hda_writeable_reg(struct device *dev, unsigned int reg)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun struct hdac_device *codec = dev_to_hdac_dev(dev);
69*4882a593Smuzhiyun unsigned int verb = get_verb(reg);
70*4882a593Smuzhiyun const unsigned int *v;
71*4882a593Smuzhiyun int i;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun snd_array_for_each(&codec->vendor_verbs, i, v) {
74*4882a593Smuzhiyun if (verb == *v)
75*4882a593Smuzhiyun return true;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if (codec->caps_overwriting)
79*4882a593Smuzhiyun return true;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun switch (verb & 0xf00) {
82*4882a593Smuzhiyun case AC_VERB_GET_STREAM_FORMAT:
83*4882a593Smuzhiyun case AC_VERB_GET_AMP_GAIN_MUTE:
84*4882a593Smuzhiyun return true;
85*4882a593Smuzhiyun case AC_VERB_GET_PROC_COEF:
86*4882a593Smuzhiyun return codec->cache_coef;
87*4882a593Smuzhiyun case 0xf00:
88*4882a593Smuzhiyun break;
89*4882a593Smuzhiyun default:
90*4882a593Smuzhiyun return false;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun switch (verb) {
94*4882a593Smuzhiyun case AC_VERB_GET_CONNECT_SEL:
95*4882a593Smuzhiyun case AC_VERB_GET_SDI_SELECT:
96*4882a593Smuzhiyun case AC_VERB_GET_PIN_WIDGET_CONTROL:
97*4882a593Smuzhiyun case AC_VERB_GET_UNSOLICITED_RESPONSE: /* only as SET_UNSOLICITED_ENABLE */
98*4882a593Smuzhiyun case AC_VERB_GET_BEEP_CONTROL:
99*4882a593Smuzhiyun case AC_VERB_GET_EAPD_BTLENABLE:
100*4882a593Smuzhiyun case AC_VERB_GET_DIGI_CONVERT_1:
101*4882a593Smuzhiyun case AC_VERB_GET_DIGI_CONVERT_2: /* only for beep control */
102*4882a593Smuzhiyun case AC_VERB_GET_VOLUME_KNOB_CONTROL:
103*4882a593Smuzhiyun case AC_VERB_GET_GPIO_MASK:
104*4882a593Smuzhiyun case AC_VERB_GET_GPIO_DIRECTION:
105*4882a593Smuzhiyun case AC_VERB_GET_GPIO_DATA: /* not for volatile read */
106*4882a593Smuzhiyun case AC_VERB_GET_GPIO_WAKE_MASK:
107*4882a593Smuzhiyun case AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK:
108*4882a593Smuzhiyun case AC_VERB_GET_GPIO_STICKY_MASK:
109*4882a593Smuzhiyun return true;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun return false;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
hda_readable_reg(struct device * dev,unsigned int reg)115*4882a593Smuzhiyun static bool hda_readable_reg(struct device *dev, unsigned int reg)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun struct hdac_device *codec = dev_to_hdac_dev(dev);
118*4882a593Smuzhiyun unsigned int verb = get_verb(reg);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun if (codec->caps_overwriting)
121*4882a593Smuzhiyun return true;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun switch (verb) {
124*4882a593Smuzhiyun case AC_VERB_PARAMETERS:
125*4882a593Smuzhiyun case AC_VERB_GET_CONNECT_LIST:
126*4882a593Smuzhiyun case AC_VERB_GET_SUBSYSTEM_ID:
127*4882a593Smuzhiyun return true;
128*4882a593Smuzhiyun /* below are basically writable, but disabled for reducing unnecessary
129*4882a593Smuzhiyun * writes at sync
130*4882a593Smuzhiyun */
131*4882a593Smuzhiyun case AC_VERB_GET_CONFIG_DEFAULT: /* usually just read */
132*4882a593Smuzhiyun case AC_VERB_GET_CONV: /* managed in PCM code */
133*4882a593Smuzhiyun case AC_VERB_GET_CVT_CHAN_COUNT: /* managed in HDMI CA code */
134*4882a593Smuzhiyun return true;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun return hda_writeable_reg(dev, reg);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /*
141*4882a593Smuzhiyun * Stereo amp pseudo register:
142*4882a593Smuzhiyun * for making easier to handle the stereo volume control, we provide a
143*4882a593Smuzhiyun * fake register to deal both left and right channels by a single
144*4882a593Smuzhiyun * (pseudo) register access. A verb consisting of SET_AMP_GAIN with
145*4882a593Smuzhiyun * *both* SET_LEFT and SET_RIGHT bits takes a 16bit value, the lower 8bit
146*4882a593Smuzhiyun * for the left and the upper 8bit for the right channel.
147*4882a593Smuzhiyun */
is_stereo_amp_verb(unsigned int reg)148*4882a593Smuzhiyun static bool is_stereo_amp_verb(unsigned int reg)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun if (((reg >> 8) & 0x700) != AC_VERB_SET_AMP_GAIN_MUTE)
151*4882a593Smuzhiyun return false;
152*4882a593Smuzhiyun return (reg & (AC_AMP_SET_LEFT | AC_AMP_SET_RIGHT)) ==
153*4882a593Smuzhiyun (AC_AMP_SET_LEFT | AC_AMP_SET_RIGHT);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /* read a pseudo stereo amp register (16bit left+right) */
hda_reg_read_stereo_amp(struct hdac_device * codec,unsigned int reg,unsigned int * val)157*4882a593Smuzhiyun static int hda_reg_read_stereo_amp(struct hdac_device *codec,
158*4882a593Smuzhiyun unsigned int reg, unsigned int *val)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun unsigned int left, right;
161*4882a593Smuzhiyun int err;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun reg &= ~(AC_AMP_SET_LEFT | AC_AMP_SET_RIGHT);
164*4882a593Smuzhiyun err = snd_hdac_exec_verb(codec, reg | AC_AMP_GET_LEFT, 0, &left);
165*4882a593Smuzhiyun if (err < 0)
166*4882a593Smuzhiyun return err;
167*4882a593Smuzhiyun err = snd_hdac_exec_verb(codec, reg | AC_AMP_GET_RIGHT, 0, &right);
168*4882a593Smuzhiyun if (err < 0)
169*4882a593Smuzhiyun return err;
170*4882a593Smuzhiyun *val = left | (right << 8);
171*4882a593Smuzhiyun return 0;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun /* write a pseudo stereo amp register (16bit left+right) */
hda_reg_write_stereo_amp(struct hdac_device * codec,unsigned int reg,unsigned int val)175*4882a593Smuzhiyun static int hda_reg_write_stereo_amp(struct hdac_device *codec,
176*4882a593Smuzhiyun unsigned int reg, unsigned int val)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun int err;
179*4882a593Smuzhiyun unsigned int verb, left, right;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun verb = AC_VERB_SET_AMP_GAIN_MUTE << 8;
182*4882a593Smuzhiyun if (reg & AC_AMP_GET_OUTPUT)
183*4882a593Smuzhiyun verb |= AC_AMP_SET_OUTPUT;
184*4882a593Smuzhiyun else
185*4882a593Smuzhiyun verb |= AC_AMP_SET_INPUT | ((reg & 0xf) << 8);
186*4882a593Smuzhiyun reg = (reg & ~0xfffff) | verb;
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun left = val & 0xff;
189*4882a593Smuzhiyun right = (val >> 8) & 0xff;
190*4882a593Smuzhiyun if (left == right) {
191*4882a593Smuzhiyun reg |= AC_AMP_SET_LEFT | AC_AMP_SET_RIGHT;
192*4882a593Smuzhiyun return snd_hdac_exec_verb(codec, reg | left, 0, NULL);
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun err = snd_hdac_exec_verb(codec, reg | AC_AMP_SET_LEFT | left, 0, NULL);
196*4882a593Smuzhiyun if (err < 0)
197*4882a593Smuzhiyun return err;
198*4882a593Smuzhiyun err = snd_hdac_exec_verb(codec, reg | AC_AMP_SET_RIGHT | right, 0, NULL);
199*4882a593Smuzhiyun if (err < 0)
200*4882a593Smuzhiyun return err;
201*4882a593Smuzhiyun return 0;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /* read a pseudo coef register (16bit) */
hda_reg_read_coef(struct hdac_device * codec,unsigned int reg,unsigned int * val)205*4882a593Smuzhiyun static int hda_reg_read_coef(struct hdac_device *codec, unsigned int reg,
206*4882a593Smuzhiyun unsigned int *val)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun unsigned int verb;
209*4882a593Smuzhiyun int err;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun if (!codec->cache_coef)
212*4882a593Smuzhiyun return -EINVAL;
213*4882a593Smuzhiyun /* LSB 8bit = coef index */
214*4882a593Smuzhiyun verb = (reg & ~0xfff00) | (AC_VERB_SET_COEF_INDEX << 8);
215*4882a593Smuzhiyun err = snd_hdac_exec_verb(codec, verb, 0, NULL);
216*4882a593Smuzhiyun if (err < 0)
217*4882a593Smuzhiyun return err;
218*4882a593Smuzhiyun verb = (reg & ~0xfffff) | (AC_VERB_GET_COEF_INDEX << 8);
219*4882a593Smuzhiyun return snd_hdac_exec_verb(codec, verb, 0, val);
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun /* write a pseudo coef register (16bit) */
hda_reg_write_coef(struct hdac_device * codec,unsigned int reg,unsigned int val)223*4882a593Smuzhiyun static int hda_reg_write_coef(struct hdac_device *codec, unsigned int reg,
224*4882a593Smuzhiyun unsigned int val)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun unsigned int verb;
227*4882a593Smuzhiyun int err;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun if (!codec->cache_coef)
230*4882a593Smuzhiyun return -EINVAL;
231*4882a593Smuzhiyun /* LSB 8bit = coef index */
232*4882a593Smuzhiyun verb = (reg & ~0xfff00) | (AC_VERB_SET_COEF_INDEX << 8);
233*4882a593Smuzhiyun err = snd_hdac_exec_verb(codec, verb, 0, NULL);
234*4882a593Smuzhiyun if (err < 0)
235*4882a593Smuzhiyun return err;
236*4882a593Smuzhiyun verb = (reg & ~0xfffff) | (AC_VERB_GET_COEF_INDEX << 8) |
237*4882a593Smuzhiyun (val & 0xffff);
238*4882a593Smuzhiyun return snd_hdac_exec_verb(codec, verb, 0, NULL);
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
hda_reg_read(void * context,unsigned int reg,unsigned int * val)241*4882a593Smuzhiyun static int hda_reg_read(void *context, unsigned int reg, unsigned int *val)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun struct hdac_device *codec = context;
244*4882a593Smuzhiyun int verb = get_verb(reg);
245*4882a593Smuzhiyun int err;
246*4882a593Smuzhiyun int pm_lock = 0;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun if (verb != AC_VERB_GET_POWER_STATE) {
249*4882a593Smuzhiyun pm_lock = codec_pm_lock(codec);
250*4882a593Smuzhiyun if (pm_lock < 0)
251*4882a593Smuzhiyun return -EAGAIN;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun reg |= (codec->addr << 28);
254*4882a593Smuzhiyun if (is_stereo_amp_verb(reg)) {
255*4882a593Smuzhiyun err = hda_reg_read_stereo_amp(codec, reg, val);
256*4882a593Smuzhiyun goto out;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun if (verb == AC_VERB_GET_PROC_COEF) {
259*4882a593Smuzhiyun err = hda_reg_read_coef(codec, reg, val);
260*4882a593Smuzhiyun goto out;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun if ((verb & 0x700) == AC_VERB_SET_AMP_GAIN_MUTE)
263*4882a593Smuzhiyun reg &= ~AC_AMP_FAKE_MUTE;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun err = snd_hdac_exec_verb(codec, reg, 0, val);
266*4882a593Smuzhiyun if (err < 0)
267*4882a593Smuzhiyun goto out;
268*4882a593Smuzhiyun /* special handling for asymmetric reads */
269*4882a593Smuzhiyun if (verb == AC_VERB_GET_POWER_STATE) {
270*4882a593Smuzhiyun if (*val & AC_PWRST_ERROR)
271*4882a593Smuzhiyun *val = -1;
272*4882a593Smuzhiyun else /* take only the actual state */
273*4882a593Smuzhiyun *val = (*val >> 4) & 0x0f;
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun out:
276*4882a593Smuzhiyun codec_pm_unlock(codec, pm_lock);
277*4882a593Smuzhiyun return err;
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun
hda_reg_write(void * context,unsigned int reg,unsigned int val)280*4882a593Smuzhiyun static int hda_reg_write(void *context, unsigned int reg, unsigned int val)
281*4882a593Smuzhiyun {
282*4882a593Smuzhiyun struct hdac_device *codec = context;
283*4882a593Smuzhiyun unsigned int verb;
284*4882a593Smuzhiyun int i, bytes, err;
285*4882a593Smuzhiyun int pm_lock = 0;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun if (codec->caps_overwriting)
288*4882a593Smuzhiyun return 0;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun reg &= ~0x00080000U; /* drop GET bit */
291*4882a593Smuzhiyun reg |= (codec->addr << 28);
292*4882a593Smuzhiyun verb = get_verb(reg);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun if (verb != AC_VERB_SET_POWER_STATE) {
295*4882a593Smuzhiyun pm_lock = codec_pm_lock(codec);
296*4882a593Smuzhiyun if (pm_lock < 0)
297*4882a593Smuzhiyun return codec->lazy_cache ? 0 : -EAGAIN;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun if (is_stereo_amp_verb(reg)) {
301*4882a593Smuzhiyun err = hda_reg_write_stereo_amp(codec, reg, val);
302*4882a593Smuzhiyun goto out;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun if (verb == AC_VERB_SET_PROC_COEF) {
306*4882a593Smuzhiyun err = hda_reg_write_coef(codec, reg, val);
307*4882a593Smuzhiyun goto out;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun switch (verb & 0xf00) {
311*4882a593Smuzhiyun case AC_VERB_SET_AMP_GAIN_MUTE:
312*4882a593Smuzhiyun if ((reg & AC_AMP_FAKE_MUTE) && (val & AC_AMP_MUTE))
313*4882a593Smuzhiyun val = 0;
314*4882a593Smuzhiyun verb = AC_VERB_SET_AMP_GAIN_MUTE;
315*4882a593Smuzhiyun if (reg & AC_AMP_GET_LEFT)
316*4882a593Smuzhiyun verb |= AC_AMP_SET_LEFT >> 8;
317*4882a593Smuzhiyun else
318*4882a593Smuzhiyun verb |= AC_AMP_SET_RIGHT >> 8;
319*4882a593Smuzhiyun if (reg & AC_AMP_GET_OUTPUT) {
320*4882a593Smuzhiyun verb |= AC_AMP_SET_OUTPUT >> 8;
321*4882a593Smuzhiyun } else {
322*4882a593Smuzhiyun verb |= AC_AMP_SET_INPUT >> 8;
323*4882a593Smuzhiyun verb |= reg & 0xf;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun break;
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun switch (verb) {
329*4882a593Smuzhiyun case AC_VERB_SET_DIGI_CONVERT_1:
330*4882a593Smuzhiyun bytes = 2;
331*4882a593Smuzhiyun break;
332*4882a593Smuzhiyun case AC_VERB_SET_CONFIG_DEFAULT_BYTES_0:
333*4882a593Smuzhiyun bytes = 4;
334*4882a593Smuzhiyun break;
335*4882a593Smuzhiyun default:
336*4882a593Smuzhiyun bytes = 1;
337*4882a593Smuzhiyun break;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun for (i = 0; i < bytes; i++) {
341*4882a593Smuzhiyun reg &= ~0xfffff;
342*4882a593Smuzhiyun reg |= (verb + i) << 8 | ((val >> (8 * i)) & 0xff);
343*4882a593Smuzhiyun err = snd_hdac_exec_verb(codec, reg, 0, NULL);
344*4882a593Smuzhiyun if (err < 0)
345*4882a593Smuzhiyun goto out;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun out:
349*4882a593Smuzhiyun codec_pm_unlock(codec, pm_lock);
350*4882a593Smuzhiyun return err;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun static const struct regmap_config hda_regmap_cfg = {
354*4882a593Smuzhiyun .name = "hdaudio",
355*4882a593Smuzhiyun .reg_bits = 32,
356*4882a593Smuzhiyun .val_bits = 32,
357*4882a593Smuzhiyun .max_register = 0xfffffff,
358*4882a593Smuzhiyun .writeable_reg = hda_writeable_reg,
359*4882a593Smuzhiyun .readable_reg = hda_readable_reg,
360*4882a593Smuzhiyun .volatile_reg = hda_volatile_reg,
361*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
362*4882a593Smuzhiyun .reg_read = hda_reg_read,
363*4882a593Smuzhiyun .reg_write = hda_reg_write,
364*4882a593Smuzhiyun .use_single_read = true,
365*4882a593Smuzhiyun .use_single_write = true,
366*4882a593Smuzhiyun .disable_locking = true,
367*4882a593Smuzhiyun };
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun /**
370*4882a593Smuzhiyun * snd_hdac_regmap_init - Initialize regmap for HDA register accesses
371*4882a593Smuzhiyun * @codec: the codec object
372*4882a593Smuzhiyun *
373*4882a593Smuzhiyun * Returns zero for success or a negative error code.
374*4882a593Smuzhiyun */
snd_hdac_regmap_init(struct hdac_device * codec)375*4882a593Smuzhiyun int snd_hdac_regmap_init(struct hdac_device *codec)
376*4882a593Smuzhiyun {
377*4882a593Smuzhiyun struct regmap *regmap;
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun regmap = regmap_init(&codec->dev, NULL, codec, &hda_regmap_cfg);
380*4882a593Smuzhiyun if (IS_ERR(regmap))
381*4882a593Smuzhiyun return PTR_ERR(regmap);
382*4882a593Smuzhiyun codec->regmap = regmap;
383*4882a593Smuzhiyun snd_array_init(&codec->vendor_verbs, sizeof(unsigned int), 8);
384*4882a593Smuzhiyun return 0;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_regmap_init);
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun /**
389*4882a593Smuzhiyun * snd_hdac_regmap_init - Release the regmap from HDA codec
390*4882a593Smuzhiyun * @codec: the codec object
391*4882a593Smuzhiyun */
snd_hdac_regmap_exit(struct hdac_device * codec)392*4882a593Smuzhiyun void snd_hdac_regmap_exit(struct hdac_device *codec)
393*4882a593Smuzhiyun {
394*4882a593Smuzhiyun if (codec->regmap) {
395*4882a593Smuzhiyun regmap_exit(codec->regmap);
396*4882a593Smuzhiyun codec->regmap = NULL;
397*4882a593Smuzhiyun snd_array_free(&codec->vendor_verbs);
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_regmap_exit);
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun /**
403*4882a593Smuzhiyun * snd_hdac_regmap_add_vendor_verb - add a vendor-specific verb to regmap
404*4882a593Smuzhiyun * @codec: the codec object
405*4882a593Smuzhiyun * @verb: verb to allow accessing via regmap
406*4882a593Smuzhiyun *
407*4882a593Smuzhiyun * Returns zero for success or a negative error code.
408*4882a593Smuzhiyun */
snd_hdac_regmap_add_vendor_verb(struct hdac_device * codec,unsigned int verb)409*4882a593Smuzhiyun int snd_hdac_regmap_add_vendor_verb(struct hdac_device *codec,
410*4882a593Smuzhiyun unsigned int verb)
411*4882a593Smuzhiyun {
412*4882a593Smuzhiyun unsigned int *p = snd_array_new(&codec->vendor_verbs);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun if (!p)
415*4882a593Smuzhiyun return -ENOMEM;
416*4882a593Smuzhiyun *p = verb | 0x800; /* set GET bit */
417*4882a593Smuzhiyun return 0;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_regmap_add_vendor_verb);
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun /*
422*4882a593Smuzhiyun * helper functions
423*4882a593Smuzhiyun */
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun /* write a pseudo-register value (w/o power sequence) */
reg_raw_write(struct hdac_device * codec,unsigned int reg,unsigned int val)426*4882a593Smuzhiyun static int reg_raw_write(struct hdac_device *codec, unsigned int reg,
427*4882a593Smuzhiyun unsigned int val)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun int err;
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun mutex_lock(&codec->regmap_lock);
432*4882a593Smuzhiyun if (!codec->regmap)
433*4882a593Smuzhiyun err = hda_reg_write(codec, reg, val);
434*4882a593Smuzhiyun else
435*4882a593Smuzhiyun err = regmap_write(codec->regmap, reg, val);
436*4882a593Smuzhiyun mutex_unlock(&codec->regmap_lock);
437*4882a593Smuzhiyun return err;
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun /* a helper macro to call @func_call; retry with power-up if failed */
441*4882a593Smuzhiyun #define CALL_RAW_FUNC(codec, func_call) \
442*4882a593Smuzhiyun ({ \
443*4882a593Smuzhiyun int _err = func_call; \
444*4882a593Smuzhiyun if (_err == -EAGAIN) { \
445*4882a593Smuzhiyun _err = snd_hdac_power_up_pm(codec); \
446*4882a593Smuzhiyun if (_err >= 0) \
447*4882a593Smuzhiyun _err = func_call; \
448*4882a593Smuzhiyun snd_hdac_power_down_pm(codec); \
449*4882a593Smuzhiyun } \
450*4882a593Smuzhiyun _err;})
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun /**
453*4882a593Smuzhiyun * snd_hdac_regmap_write_raw - write a pseudo register with power mgmt
454*4882a593Smuzhiyun * @codec: the codec object
455*4882a593Smuzhiyun * @reg: pseudo register
456*4882a593Smuzhiyun * @val: value to write
457*4882a593Smuzhiyun *
458*4882a593Smuzhiyun * Returns zero if successful or a negative error code.
459*4882a593Smuzhiyun */
snd_hdac_regmap_write_raw(struct hdac_device * codec,unsigned int reg,unsigned int val)460*4882a593Smuzhiyun int snd_hdac_regmap_write_raw(struct hdac_device *codec, unsigned int reg,
461*4882a593Smuzhiyun unsigned int val)
462*4882a593Smuzhiyun {
463*4882a593Smuzhiyun return CALL_RAW_FUNC(codec, reg_raw_write(codec, reg, val));
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_regmap_write_raw);
466*4882a593Smuzhiyun
reg_raw_read(struct hdac_device * codec,unsigned int reg,unsigned int * val,bool uncached)467*4882a593Smuzhiyun static int reg_raw_read(struct hdac_device *codec, unsigned int reg,
468*4882a593Smuzhiyun unsigned int *val, bool uncached)
469*4882a593Smuzhiyun {
470*4882a593Smuzhiyun int err;
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun mutex_lock(&codec->regmap_lock);
473*4882a593Smuzhiyun if (uncached || !codec->regmap)
474*4882a593Smuzhiyun err = hda_reg_read(codec, reg, val);
475*4882a593Smuzhiyun else
476*4882a593Smuzhiyun err = regmap_read(codec->regmap, reg, val);
477*4882a593Smuzhiyun mutex_unlock(&codec->regmap_lock);
478*4882a593Smuzhiyun return err;
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun
__snd_hdac_regmap_read_raw(struct hdac_device * codec,unsigned int reg,unsigned int * val,bool uncached)481*4882a593Smuzhiyun static int __snd_hdac_regmap_read_raw(struct hdac_device *codec,
482*4882a593Smuzhiyun unsigned int reg, unsigned int *val,
483*4882a593Smuzhiyun bool uncached)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun return CALL_RAW_FUNC(codec, reg_raw_read(codec, reg, val, uncached));
486*4882a593Smuzhiyun }
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun /**
489*4882a593Smuzhiyun * snd_hdac_regmap_read_raw - read a pseudo register with power mgmt
490*4882a593Smuzhiyun * @codec: the codec object
491*4882a593Smuzhiyun * @reg: pseudo register
492*4882a593Smuzhiyun * @val: pointer to store the read value
493*4882a593Smuzhiyun *
494*4882a593Smuzhiyun * Returns zero if successful or a negative error code.
495*4882a593Smuzhiyun */
snd_hdac_regmap_read_raw(struct hdac_device * codec,unsigned int reg,unsigned int * val)496*4882a593Smuzhiyun int snd_hdac_regmap_read_raw(struct hdac_device *codec, unsigned int reg,
497*4882a593Smuzhiyun unsigned int *val)
498*4882a593Smuzhiyun {
499*4882a593Smuzhiyun return __snd_hdac_regmap_read_raw(codec, reg, val, false);
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_regmap_read_raw);
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun /* Works like snd_hdac_regmap_read_raw(), but this doesn't read from the
504*4882a593Smuzhiyun * cache but always via hda verbs.
505*4882a593Smuzhiyun */
snd_hdac_regmap_read_raw_uncached(struct hdac_device * codec,unsigned int reg,unsigned int * val)506*4882a593Smuzhiyun int snd_hdac_regmap_read_raw_uncached(struct hdac_device *codec,
507*4882a593Smuzhiyun unsigned int reg, unsigned int *val)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun return __snd_hdac_regmap_read_raw(codec, reg, val, true);
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun
reg_raw_update(struct hdac_device * codec,unsigned int reg,unsigned int mask,unsigned int val)512*4882a593Smuzhiyun static int reg_raw_update(struct hdac_device *codec, unsigned int reg,
513*4882a593Smuzhiyun unsigned int mask, unsigned int val)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun unsigned int orig;
516*4882a593Smuzhiyun bool change;
517*4882a593Smuzhiyun int err;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun mutex_lock(&codec->regmap_lock);
520*4882a593Smuzhiyun if (codec->regmap) {
521*4882a593Smuzhiyun err = regmap_update_bits_check(codec->regmap, reg, mask, val,
522*4882a593Smuzhiyun &change);
523*4882a593Smuzhiyun if (!err)
524*4882a593Smuzhiyun err = change ? 1 : 0;
525*4882a593Smuzhiyun } else {
526*4882a593Smuzhiyun err = hda_reg_read(codec, reg, &orig);
527*4882a593Smuzhiyun if (!err) {
528*4882a593Smuzhiyun val &= mask;
529*4882a593Smuzhiyun val |= orig & ~mask;
530*4882a593Smuzhiyun if (val != orig) {
531*4882a593Smuzhiyun err = hda_reg_write(codec, reg, val);
532*4882a593Smuzhiyun if (!err)
533*4882a593Smuzhiyun err = 1;
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun mutex_unlock(&codec->regmap_lock);
538*4882a593Smuzhiyun return err;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun /**
542*4882a593Smuzhiyun * snd_hdac_regmap_update_raw - update a pseudo register with power mgmt
543*4882a593Smuzhiyun * @codec: the codec object
544*4882a593Smuzhiyun * @reg: pseudo register
545*4882a593Smuzhiyun * @mask: bit mask to update
546*4882a593Smuzhiyun * @val: value to update
547*4882a593Smuzhiyun *
548*4882a593Smuzhiyun * Returns zero if successful or a negative error code.
549*4882a593Smuzhiyun */
snd_hdac_regmap_update_raw(struct hdac_device * codec,unsigned int reg,unsigned int mask,unsigned int val)550*4882a593Smuzhiyun int snd_hdac_regmap_update_raw(struct hdac_device *codec, unsigned int reg,
551*4882a593Smuzhiyun unsigned int mask, unsigned int val)
552*4882a593Smuzhiyun {
553*4882a593Smuzhiyun return CALL_RAW_FUNC(codec, reg_raw_update(codec, reg, mask, val));
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_regmap_update_raw);
556*4882a593Smuzhiyun
reg_raw_update_once(struct hdac_device * codec,unsigned int reg,unsigned int mask,unsigned int val)557*4882a593Smuzhiyun static int reg_raw_update_once(struct hdac_device *codec, unsigned int reg,
558*4882a593Smuzhiyun unsigned int mask, unsigned int val)
559*4882a593Smuzhiyun {
560*4882a593Smuzhiyun unsigned int orig;
561*4882a593Smuzhiyun int err;
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun if (!codec->regmap)
564*4882a593Smuzhiyun return reg_raw_update(codec, reg, mask, val);
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun mutex_lock(&codec->regmap_lock);
567*4882a593Smuzhiyun regcache_cache_only(codec->regmap, true);
568*4882a593Smuzhiyun err = regmap_read(codec->regmap, reg, &orig);
569*4882a593Smuzhiyun regcache_cache_only(codec->regmap, false);
570*4882a593Smuzhiyun if (err < 0)
571*4882a593Smuzhiyun err = regmap_update_bits(codec->regmap, reg, mask, val);
572*4882a593Smuzhiyun mutex_unlock(&codec->regmap_lock);
573*4882a593Smuzhiyun return err;
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun /**
577*4882a593Smuzhiyun * snd_hdac_regmap_update_raw_once - initialize the register value only once
578*4882a593Smuzhiyun * @codec: the codec object
579*4882a593Smuzhiyun * @reg: pseudo register
580*4882a593Smuzhiyun * @mask: bit mask to update
581*4882a593Smuzhiyun * @val: value to update
582*4882a593Smuzhiyun *
583*4882a593Smuzhiyun * Performs the update of the register bits only once when the register
584*4882a593Smuzhiyun * hasn't been initialized yet. Used in HD-audio legacy driver.
585*4882a593Smuzhiyun * Returns zero if successful or a negative error code
586*4882a593Smuzhiyun */
snd_hdac_regmap_update_raw_once(struct hdac_device * codec,unsigned int reg,unsigned int mask,unsigned int val)587*4882a593Smuzhiyun int snd_hdac_regmap_update_raw_once(struct hdac_device *codec, unsigned int reg,
588*4882a593Smuzhiyun unsigned int mask, unsigned int val)
589*4882a593Smuzhiyun {
590*4882a593Smuzhiyun return CALL_RAW_FUNC(codec, reg_raw_update_once(codec, reg, mask, val));
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_regmap_update_raw_once);
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun /**
595*4882a593Smuzhiyun * snd_hdac_regmap_sync - sync out the cached values for PM resume
596*4882a593Smuzhiyun * @codec: the codec object
597*4882a593Smuzhiyun */
snd_hdac_regmap_sync(struct hdac_device * codec)598*4882a593Smuzhiyun void snd_hdac_regmap_sync(struct hdac_device *codec)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun if (codec->regmap) {
601*4882a593Smuzhiyun mutex_lock(&codec->regmap_lock);
602*4882a593Smuzhiyun regcache_sync(codec->regmap);
603*4882a593Smuzhiyun mutex_unlock(&codec->regmap_lock);
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun }
606*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_regmap_sync);
607