1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * HD-audio core bus driver
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/init.h>
7*4882a593Smuzhiyun #include <linux/io.h>
8*4882a593Smuzhiyun #include <linux/device.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/export.h>
11*4882a593Smuzhiyun #include <sound/hdaudio.h>
12*4882a593Smuzhiyun #include "local.h"
13*4882a593Smuzhiyun #include "trace.h"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun static void snd_hdac_bus_process_unsol_events(struct work_struct *work);
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun static const struct hdac_bus_ops default_ops = {
18*4882a593Smuzhiyun .command = snd_hdac_bus_send_cmd,
19*4882a593Smuzhiyun .get_response = snd_hdac_bus_get_response,
20*4882a593Smuzhiyun };
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /**
23*4882a593Smuzhiyun * snd_hdac_bus_init - initialize a HD-audio bas bus
24*4882a593Smuzhiyun * @bus: the pointer to bus object
25*4882a593Smuzhiyun * @dev: device pointer
26*4882a593Smuzhiyun * @ops: bus verb operators
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * Returns 0 if successful, or a negative error code.
29*4882a593Smuzhiyun */
snd_hdac_bus_init(struct hdac_bus * bus,struct device * dev,const struct hdac_bus_ops * ops)30*4882a593Smuzhiyun int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
31*4882a593Smuzhiyun const struct hdac_bus_ops *ops)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun memset(bus, 0, sizeof(*bus));
34*4882a593Smuzhiyun bus->dev = dev;
35*4882a593Smuzhiyun if (ops)
36*4882a593Smuzhiyun bus->ops = ops;
37*4882a593Smuzhiyun else
38*4882a593Smuzhiyun bus->ops = &default_ops;
39*4882a593Smuzhiyun bus->dma_type = SNDRV_DMA_TYPE_DEV;
40*4882a593Smuzhiyun INIT_LIST_HEAD(&bus->stream_list);
41*4882a593Smuzhiyun INIT_LIST_HEAD(&bus->codec_list);
42*4882a593Smuzhiyun INIT_WORK(&bus->unsol_work, snd_hdac_bus_process_unsol_events);
43*4882a593Smuzhiyun spin_lock_init(&bus->reg_lock);
44*4882a593Smuzhiyun mutex_init(&bus->cmd_mutex);
45*4882a593Smuzhiyun mutex_init(&bus->lock);
46*4882a593Smuzhiyun INIT_LIST_HEAD(&bus->hlink_list);
47*4882a593Smuzhiyun init_waitqueue_head(&bus->rirb_wq);
48*4882a593Smuzhiyun bus->irq = -1;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun * Default value of '8' is as per the HD audio specification (Rev 1.0a).
52*4882a593Smuzhiyun * Following relation is used to derive STRIPE control value.
53*4882a593Smuzhiyun * For sample rate <= 48K:
54*4882a593Smuzhiyun * { ((num_channels * bits_per_sample) / number of SDOs) >= 8 }
55*4882a593Smuzhiyun * For sample rate > 48K:
56*4882a593Smuzhiyun * { ((num_channels * bits_per_sample * rate/48000) /
57*4882a593Smuzhiyun * number of SDOs) >= 8 }
58*4882a593Smuzhiyun */
59*4882a593Smuzhiyun bus->sdo_limit = 8;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun return 0;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_bus_init);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /**
66*4882a593Smuzhiyun * snd_hdac_bus_exit - clean up a HD-audio bas bus
67*4882a593Smuzhiyun * @bus: the pointer to bus object
68*4882a593Smuzhiyun */
snd_hdac_bus_exit(struct hdac_bus * bus)69*4882a593Smuzhiyun void snd_hdac_bus_exit(struct hdac_bus *bus)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun WARN_ON(!list_empty(&bus->stream_list));
72*4882a593Smuzhiyun WARN_ON(!list_empty(&bus->codec_list));
73*4882a593Smuzhiyun cancel_work_sync(&bus->unsol_work);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_bus_exit);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /**
78*4882a593Smuzhiyun * snd_hdac_bus_exec_verb - execute a HD-audio verb on the given bus
79*4882a593Smuzhiyun * @bus: bus object
80*4882a593Smuzhiyun * @addr: the HDAC device address
81*4882a593Smuzhiyun * @cmd: HD-audio encoded verb
82*4882a593Smuzhiyun * @res: pointer to store the response, NULL if performing asynchronously
83*4882a593Smuzhiyun *
84*4882a593Smuzhiyun * Returns 0 if successful, or a negative error code.
85*4882a593Smuzhiyun */
snd_hdac_bus_exec_verb(struct hdac_bus * bus,unsigned int addr,unsigned int cmd,unsigned int * res)86*4882a593Smuzhiyun int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
87*4882a593Smuzhiyun unsigned int cmd, unsigned int *res)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun int err;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun mutex_lock(&bus->cmd_mutex);
92*4882a593Smuzhiyun err = snd_hdac_bus_exec_verb_unlocked(bus, addr, cmd, res);
93*4882a593Smuzhiyun mutex_unlock(&bus->cmd_mutex);
94*4882a593Smuzhiyun return err;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /**
98*4882a593Smuzhiyun * snd_hdac_bus_exec_verb_unlocked - unlocked version
99*4882a593Smuzhiyun * @bus: bus object
100*4882a593Smuzhiyun * @addr: the HDAC device address
101*4882a593Smuzhiyun * @cmd: HD-audio encoded verb
102*4882a593Smuzhiyun * @res: pointer to store the response, NULL if performing asynchronously
103*4882a593Smuzhiyun *
104*4882a593Smuzhiyun * Returns 0 if successful, or a negative error code.
105*4882a593Smuzhiyun */
snd_hdac_bus_exec_verb_unlocked(struct hdac_bus * bus,unsigned int addr,unsigned int cmd,unsigned int * res)106*4882a593Smuzhiyun int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
107*4882a593Smuzhiyun unsigned int cmd, unsigned int *res)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun unsigned int tmp;
110*4882a593Smuzhiyun int err;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun if (cmd == ~0)
113*4882a593Smuzhiyun return -EINVAL;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun if (res)
116*4882a593Smuzhiyun *res = -1;
117*4882a593Smuzhiyun else if (bus->sync_write)
118*4882a593Smuzhiyun res = &tmp;
119*4882a593Smuzhiyun for (;;) {
120*4882a593Smuzhiyun trace_hda_send_cmd(bus, cmd);
121*4882a593Smuzhiyun err = bus->ops->command(bus, cmd);
122*4882a593Smuzhiyun if (err != -EAGAIN)
123*4882a593Smuzhiyun break;
124*4882a593Smuzhiyun /* process pending verbs */
125*4882a593Smuzhiyun err = bus->ops->get_response(bus, addr, &tmp);
126*4882a593Smuzhiyun if (err)
127*4882a593Smuzhiyun break;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun if (!err && res) {
130*4882a593Smuzhiyun err = bus->ops->get_response(bus, addr, res);
131*4882a593Smuzhiyun trace_hda_get_response(bus, addr, *res);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun return err;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_bus_exec_verb_unlocked);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /**
138*4882a593Smuzhiyun * snd_hdac_bus_queue_event - add an unsolicited event to queue
139*4882a593Smuzhiyun * @bus: the BUS
140*4882a593Smuzhiyun * @res: unsolicited event (lower 32bit of RIRB entry)
141*4882a593Smuzhiyun * @res_ex: codec addr and flags (upper 32bit or RIRB entry)
142*4882a593Smuzhiyun *
143*4882a593Smuzhiyun * Adds the given event to the queue. The events are processed in
144*4882a593Smuzhiyun * the workqueue asynchronously. Call this function in the interrupt
145*4882a593Smuzhiyun * hanlder when RIRB receives an unsolicited event.
146*4882a593Smuzhiyun */
snd_hdac_bus_queue_event(struct hdac_bus * bus,u32 res,u32 res_ex)147*4882a593Smuzhiyun void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun unsigned int wp;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun if (!bus)
152*4882a593Smuzhiyun return;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun trace_hda_unsol_event(bus, res, res_ex);
155*4882a593Smuzhiyun wp = (bus->unsol_wp + 1) % HDA_UNSOL_QUEUE_SIZE;
156*4882a593Smuzhiyun bus->unsol_wp = wp;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun wp <<= 1;
159*4882a593Smuzhiyun bus->unsol_queue[wp] = res;
160*4882a593Smuzhiyun bus->unsol_queue[wp + 1] = res_ex;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun schedule_work(&bus->unsol_work);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /*
166*4882a593Smuzhiyun * process queued unsolicited events
167*4882a593Smuzhiyun */
snd_hdac_bus_process_unsol_events(struct work_struct * work)168*4882a593Smuzhiyun static void snd_hdac_bus_process_unsol_events(struct work_struct *work)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct hdac_bus *bus = container_of(work, struct hdac_bus, unsol_work);
171*4882a593Smuzhiyun struct hdac_device *codec;
172*4882a593Smuzhiyun struct hdac_driver *drv;
173*4882a593Smuzhiyun unsigned int rp, caddr, res;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun spin_lock_irq(&bus->reg_lock);
176*4882a593Smuzhiyun while (bus->unsol_rp != bus->unsol_wp) {
177*4882a593Smuzhiyun rp = (bus->unsol_rp + 1) % HDA_UNSOL_QUEUE_SIZE;
178*4882a593Smuzhiyun bus->unsol_rp = rp;
179*4882a593Smuzhiyun rp <<= 1;
180*4882a593Smuzhiyun res = bus->unsol_queue[rp];
181*4882a593Smuzhiyun caddr = bus->unsol_queue[rp + 1];
182*4882a593Smuzhiyun if (!(caddr & (1 << 4))) /* no unsolicited event? */
183*4882a593Smuzhiyun continue;
184*4882a593Smuzhiyun codec = bus->caddr_tbl[caddr & 0x0f];
185*4882a593Smuzhiyun if (!codec || !codec->dev.driver)
186*4882a593Smuzhiyun continue;
187*4882a593Smuzhiyun spin_unlock_irq(&bus->reg_lock);
188*4882a593Smuzhiyun drv = drv_to_hdac_driver(codec->dev.driver);
189*4882a593Smuzhiyun if (drv->unsol_event)
190*4882a593Smuzhiyun drv->unsol_event(codec, res);
191*4882a593Smuzhiyun spin_lock_irq(&bus->reg_lock);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun spin_unlock_irq(&bus->reg_lock);
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun /**
197*4882a593Smuzhiyun * snd_hdac_bus_add_device - Add a codec to bus
198*4882a593Smuzhiyun * @bus: HDA core bus
199*4882a593Smuzhiyun * @codec: HDA core device to add
200*4882a593Smuzhiyun *
201*4882a593Smuzhiyun * Adds the given codec to the list in the bus. The caddr_tbl array
202*4882a593Smuzhiyun * and codec_powered bits are updated, as well.
203*4882a593Smuzhiyun * Returns zero if success, or a negative error code.
204*4882a593Smuzhiyun */
snd_hdac_bus_add_device(struct hdac_bus * bus,struct hdac_device * codec)205*4882a593Smuzhiyun int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun if (bus->caddr_tbl[codec->addr]) {
208*4882a593Smuzhiyun dev_err(bus->dev, "address 0x%x is already occupied\n",
209*4882a593Smuzhiyun codec->addr);
210*4882a593Smuzhiyun return -EBUSY;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun list_add_tail(&codec->list, &bus->codec_list);
214*4882a593Smuzhiyun bus->caddr_tbl[codec->addr] = codec;
215*4882a593Smuzhiyun set_bit(codec->addr, &bus->codec_powered);
216*4882a593Smuzhiyun bus->num_codecs++;
217*4882a593Smuzhiyun return 0;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun /**
221*4882a593Smuzhiyun * snd_hdac_bus_remove_device - Remove a codec from bus
222*4882a593Smuzhiyun * @bus: HDA core bus
223*4882a593Smuzhiyun * @codec: HDA core device to remove
224*4882a593Smuzhiyun */
snd_hdac_bus_remove_device(struct hdac_bus * bus,struct hdac_device * codec)225*4882a593Smuzhiyun void snd_hdac_bus_remove_device(struct hdac_bus *bus,
226*4882a593Smuzhiyun struct hdac_device *codec)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun WARN_ON(bus != codec->bus);
229*4882a593Smuzhiyun if (list_empty(&codec->list))
230*4882a593Smuzhiyun return;
231*4882a593Smuzhiyun list_del_init(&codec->list);
232*4882a593Smuzhiyun bus->caddr_tbl[codec->addr] = NULL;
233*4882a593Smuzhiyun clear_bit(codec->addr, &bus->codec_powered);
234*4882a593Smuzhiyun bus->num_codecs--;
235*4882a593Smuzhiyun flush_work(&bus->unsol_work);
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun #ifdef CONFIG_SND_HDA_ALIGNED_MMIO
239*4882a593Smuzhiyun /* Helpers for aligned read/write of mmio space, for Tegra */
snd_hdac_aligned_read(void __iomem * addr,unsigned int mask)240*4882a593Smuzhiyun unsigned int snd_hdac_aligned_read(void __iomem *addr, unsigned int mask)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun void __iomem *aligned_addr =
243*4882a593Smuzhiyun (void __iomem *)((unsigned long)(addr) & ~0x3);
244*4882a593Smuzhiyun unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;
245*4882a593Smuzhiyun unsigned int v;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun v = readl(aligned_addr);
248*4882a593Smuzhiyun return (v >> shift) & mask;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_aligned_read);
251*4882a593Smuzhiyun
snd_hdac_aligned_write(unsigned int val,void __iomem * addr,unsigned int mask)252*4882a593Smuzhiyun void snd_hdac_aligned_write(unsigned int val, void __iomem *addr,
253*4882a593Smuzhiyun unsigned int mask)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun void __iomem *aligned_addr =
256*4882a593Smuzhiyun (void __iomem *)((unsigned long)(addr) & ~0x3);
257*4882a593Smuzhiyun unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;
258*4882a593Smuzhiyun unsigned int v;
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun v = readl(aligned_addr);
261*4882a593Smuzhiyun v &= ~(mask << shift);
262*4882a593Smuzhiyun v |= val << shift;
263*4882a593Smuzhiyun writel(v, aligned_addr);
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_hdac_aligned_write);
266*4882a593Smuzhiyun #endif /* CONFIG_SND_HDA_ALIGNED_MMIO */
267