1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * fireworks_transaction.c - a part of driver for Fireworks based devices
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2013-2014 Takashi Sakamoto
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun /*
9*4882a593Smuzhiyun * Fireworks have its own transaction. The transaction can be delivered by AV/C
10*4882a593Smuzhiyun * Vendor Specific command frame or usual asynchronous transaction. At least,
11*4882a593Smuzhiyun * Windows driver and firmware version 5.5 or later don't use AV/C command.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * Transaction substance:
14*4882a593Smuzhiyun * At first, 6 data exist. Following to the data, parameters for each command
15*4882a593Smuzhiyun * exist. All of the parameters are 32 bit aligned to big endian.
16*4882a593Smuzhiyun * data[0]: Length of transaction substance
17*4882a593Smuzhiyun * data[1]: Transaction version
18*4882a593Smuzhiyun * data[2]: Sequence number. This is incremented by the device
19*4882a593Smuzhiyun * data[3]: Transaction category
20*4882a593Smuzhiyun * data[4]: Transaction command
21*4882a593Smuzhiyun * data[5]: Return value in response.
22*4882a593Smuzhiyun * data[6-]: Parameters
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * Transaction address:
25*4882a593Smuzhiyun * command: 0xecc000000000
26*4882a593Smuzhiyun * response: 0xecc080000000 (default)
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * I note that the address for response can be changed by command. But this
29*4882a593Smuzhiyun * module uses the default address.
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun #include "./fireworks.h"
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define MEMORY_SPACE_EFW_COMMAND 0xecc000000000ULL
34*4882a593Smuzhiyun #define MEMORY_SPACE_EFW_RESPONSE 0xecc080000000ULL
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define ERROR_RETRIES 3
37*4882a593Smuzhiyun #define ERROR_DELAY_MS 5
38*4882a593Smuzhiyun #define EFC_TIMEOUT_MS 125
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun static DEFINE_SPINLOCK(instances_lock);
41*4882a593Smuzhiyun static struct snd_efw *instances[SNDRV_CARDS] = SNDRV_DEFAULT_PTR;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun static DEFINE_SPINLOCK(transaction_queues_lock);
44*4882a593Smuzhiyun static LIST_HEAD(transaction_queues);
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun enum transaction_queue_state {
47*4882a593Smuzhiyun STATE_PENDING,
48*4882a593Smuzhiyun STATE_BUS_RESET,
49*4882a593Smuzhiyun STATE_COMPLETE
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun struct transaction_queue {
53*4882a593Smuzhiyun struct list_head list;
54*4882a593Smuzhiyun struct fw_unit *unit;
55*4882a593Smuzhiyun void *buf;
56*4882a593Smuzhiyun unsigned int size;
57*4882a593Smuzhiyun u32 seqnum;
58*4882a593Smuzhiyun enum transaction_queue_state state;
59*4882a593Smuzhiyun wait_queue_head_t wait;
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun
snd_efw_transaction_cmd(struct fw_unit * unit,const void * cmd,unsigned int size)62*4882a593Smuzhiyun int snd_efw_transaction_cmd(struct fw_unit *unit,
63*4882a593Smuzhiyun const void *cmd, unsigned int size)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun return snd_fw_transaction(unit, TCODE_WRITE_BLOCK_REQUEST,
66*4882a593Smuzhiyun MEMORY_SPACE_EFW_COMMAND,
67*4882a593Smuzhiyun (void *)cmd, size, 0);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
snd_efw_transaction_run(struct fw_unit * unit,const void * cmd,unsigned int cmd_size,void * resp,unsigned int resp_size)70*4882a593Smuzhiyun int snd_efw_transaction_run(struct fw_unit *unit,
71*4882a593Smuzhiyun const void *cmd, unsigned int cmd_size,
72*4882a593Smuzhiyun void *resp, unsigned int resp_size)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun struct transaction_queue t;
75*4882a593Smuzhiyun unsigned int tries;
76*4882a593Smuzhiyun int ret;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun t.unit = unit;
79*4882a593Smuzhiyun t.buf = resp;
80*4882a593Smuzhiyun t.size = resp_size;
81*4882a593Smuzhiyun t.seqnum = be32_to_cpu(((struct snd_efw_transaction *)cmd)->seqnum) + 1;
82*4882a593Smuzhiyun t.state = STATE_PENDING;
83*4882a593Smuzhiyun init_waitqueue_head(&t.wait);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun spin_lock_irq(&transaction_queues_lock);
86*4882a593Smuzhiyun list_add_tail(&t.list, &transaction_queues);
87*4882a593Smuzhiyun spin_unlock_irq(&transaction_queues_lock);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun tries = 0;
90*4882a593Smuzhiyun do {
91*4882a593Smuzhiyun ret = snd_efw_transaction_cmd(t.unit, (void *)cmd, cmd_size);
92*4882a593Smuzhiyun if (ret < 0)
93*4882a593Smuzhiyun break;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun wait_event_timeout(t.wait, t.state != STATE_PENDING,
96*4882a593Smuzhiyun msecs_to_jiffies(EFC_TIMEOUT_MS));
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (t.state == STATE_COMPLETE) {
99*4882a593Smuzhiyun ret = t.size;
100*4882a593Smuzhiyun break;
101*4882a593Smuzhiyun } else if (t.state == STATE_BUS_RESET) {
102*4882a593Smuzhiyun msleep(ERROR_DELAY_MS);
103*4882a593Smuzhiyun } else if (++tries >= ERROR_RETRIES) {
104*4882a593Smuzhiyun dev_err(&t.unit->device, "EFW transaction timed out\n");
105*4882a593Smuzhiyun ret = -EIO;
106*4882a593Smuzhiyun break;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun } while (1);
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun spin_lock_irq(&transaction_queues_lock);
111*4882a593Smuzhiyun list_del(&t.list);
112*4882a593Smuzhiyun spin_unlock_irq(&transaction_queues_lock);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return ret;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun static void
copy_resp_to_buf(struct snd_efw * efw,void * data,size_t length,int * rcode)118*4882a593Smuzhiyun copy_resp_to_buf(struct snd_efw *efw, void *data, size_t length, int *rcode)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun size_t capacity, till_end;
121*4882a593Smuzhiyun struct snd_efw_transaction *t;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun t = (struct snd_efw_transaction *)data;
124*4882a593Smuzhiyun length = min_t(size_t, be32_to_cpu(t->length) * sizeof(u32), length);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun spin_lock(&efw->lock);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun if (efw->push_ptr < efw->pull_ptr)
129*4882a593Smuzhiyun capacity = (unsigned int)(efw->pull_ptr - efw->push_ptr);
130*4882a593Smuzhiyun else
131*4882a593Smuzhiyun capacity = snd_efw_resp_buf_size -
132*4882a593Smuzhiyun (unsigned int)(efw->push_ptr - efw->pull_ptr);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun /* confirm enough space for this response */
135*4882a593Smuzhiyun if (capacity < length) {
136*4882a593Smuzhiyun *rcode = RCODE_CONFLICT_ERROR;
137*4882a593Smuzhiyun goto end;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* copy to ring buffer */
141*4882a593Smuzhiyun while (length > 0) {
142*4882a593Smuzhiyun till_end = snd_efw_resp_buf_size -
143*4882a593Smuzhiyun (unsigned int)(efw->push_ptr - efw->resp_buf);
144*4882a593Smuzhiyun till_end = min_t(unsigned int, length, till_end);
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun memcpy(efw->push_ptr, data, till_end);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun efw->push_ptr += till_end;
149*4882a593Smuzhiyun if (efw->push_ptr >= efw->resp_buf + snd_efw_resp_buf_size)
150*4882a593Smuzhiyun efw->push_ptr -= snd_efw_resp_buf_size;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun length -= till_end;
153*4882a593Smuzhiyun data += till_end;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /* for hwdep */
157*4882a593Smuzhiyun wake_up(&efw->hwdep_wait);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun *rcode = RCODE_COMPLETE;
160*4882a593Smuzhiyun end:
161*4882a593Smuzhiyun spin_unlock_irq(&efw->lock);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun static void
handle_resp_for_user(struct fw_card * card,int generation,int source,void * data,size_t length,int * rcode)165*4882a593Smuzhiyun handle_resp_for_user(struct fw_card *card, int generation, int source,
166*4882a593Smuzhiyun void *data, size_t length, int *rcode)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun struct fw_device *device;
169*4882a593Smuzhiyun struct snd_efw *efw;
170*4882a593Smuzhiyun unsigned int i;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun spin_lock_irq(&instances_lock);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun for (i = 0; i < SNDRV_CARDS; i++) {
175*4882a593Smuzhiyun efw = instances[i];
176*4882a593Smuzhiyun if (efw == NULL)
177*4882a593Smuzhiyun continue;
178*4882a593Smuzhiyun device = fw_parent_device(efw->unit);
179*4882a593Smuzhiyun if ((device->card != card) ||
180*4882a593Smuzhiyun (device->generation != generation))
181*4882a593Smuzhiyun continue;
182*4882a593Smuzhiyun smp_rmb(); /* node id vs. generation */
183*4882a593Smuzhiyun if (device->node_id != source)
184*4882a593Smuzhiyun continue;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun break;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun if (i == SNDRV_CARDS)
189*4882a593Smuzhiyun goto end;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun copy_resp_to_buf(efw, data, length, rcode);
192*4882a593Smuzhiyun end:
193*4882a593Smuzhiyun spin_unlock(&instances_lock);
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun static void
handle_resp_for_kernel(struct fw_card * card,int generation,int source,void * data,size_t length,int * rcode,u32 seqnum)197*4882a593Smuzhiyun handle_resp_for_kernel(struct fw_card *card, int generation, int source,
198*4882a593Smuzhiyun void *data, size_t length, int *rcode, u32 seqnum)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun struct fw_device *device;
201*4882a593Smuzhiyun struct transaction_queue *t;
202*4882a593Smuzhiyun unsigned long flags;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun spin_lock_irqsave(&transaction_queues_lock, flags);
205*4882a593Smuzhiyun list_for_each_entry(t, &transaction_queues, list) {
206*4882a593Smuzhiyun device = fw_parent_device(t->unit);
207*4882a593Smuzhiyun if ((device->card != card) ||
208*4882a593Smuzhiyun (device->generation != generation))
209*4882a593Smuzhiyun continue;
210*4882a593Smuzhiyun smp_rmb(); /* node_id vs. generation */
211*4882a593Smuzhiyun if (device->node_id != source)
212*4882a593Smuzhiyun continue;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun if ((t->state == STATE_PENDING) && (t->seqnum == seqnum)) {
215*4882a593Smuzhiyun t->state = STATE_COMPLETE;
216*4882a593Smuzhiyun t->size = min_t(unsigned int, length, t->size);
217*4882a593Smuzhiyun memcpy(t->buf, data, t->size);
218*4882a593Smuzhiyun wake_up(&t->wait);
219*4882a593Smuzhiyun *rcode = RCODE_COMPLETE;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun spin_unlock_irqrestore(&transaction_queues_lock, flags);
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun static void
efw_response(struct fw_card * card,struct fw_request * request,int tcode,int destination,int source,int generation,unsigned long long offset,void * data,size_t length,void * callback_data)226*4882a593Smuzhiyun efw_response(struct fw_card *card, struct fw_request *request,
227*4882a593Smuzhiyun int tcode, int destination, int source,
228*4882a593Smuzhiyun int generation, unsigned long long offset,
229*4882a593Smuzhiyun void *data, size_t length, void *callback_data)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun int rcode, dummy;
232*4882a593Smuzhiyun u32 seqnum;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun rcode = RCODE_TYPE_ERROR;
235*4882a593Smuzhiyun if (length < sizeof(struct snd_efw_transaction)) {
236*4882a593Smuzhiyun rcode = RCODE_DATA_ERROR;
237*4882a593Smuzhiyun goto end;
238*4882a593Smuzhiyun } else if (offset != MEMORY_SPACE_EFW_RESPONSE) {
239*4882a593Smuzhiyun rcode = RCODE_ADDRESS_ERROR;
240*4882a593Smuzhiyun goto end;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun seqnum = be32_to_cpu(((struct snd_efw_transaction *)data)->seqnum);
244*4882a593Smuzhiyun if (seqnum > SND_EFW_TRANSACTION_USER_SEQNUM_MAX + 1) {
245*4882a593Smuzhiyun handle_resp_for_kernel(card, generation, source,
246*4882a593Smuzhiyun data, length, &rcode, seqnum);
247*4882a593Smuzhiyun if (snd_efw_resp_buf_debug)
248*4882a593Smuzhiyun handle_resp_for_user(card, generation, source,
249*4882a593Smuzhiyun data, length, &dummy);
250*4882a593Smuzhiyun } else {
251*4882a593Smuzhiyun handle_resp_for_user(card, generation, source,
252*4882a593Smuzhiyun data, length, &rcode);
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun end:
255*4882a593Smuzhiyun fw_send_response(card, request, rcode);
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
snd_efw_transaction_add_instance(struct snd_efw * efw)258*4882a593Smuzhiyun void snd_efw_transaction_add_instance(struct snd_efw *efw)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun unsigned int i;
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun spin_lock_irq(&instances_lock);
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun for (i = 0; i < SNDRV_CARDS; i++) {
265*4882a593Smuzhiyun if (instances[i] != NULL)
266*4882a593Smuzhiyun continue;
267*4882a593Smuzhiyun instances[i] = efw;
268*4882a593Smuzhiyun break;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun spin_unlock_irq(&instances_lock);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
snd_efw_transaction_remove_instance(struct snd_efw * efw)274*4882a593Smuzhiyun void snd_efw_transaction_remove_instance(struct snd_efw *efw)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun unsigned int i;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun spin_lock_irq(&instances_lock);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun for (i = 0; i < SNDRV_CARDS; i++) {
281*4882a593Smuzhiyun if (instances[i] != efw)
282*4882a593Smuzhiyun continue;
283*4882a593Smuzhiyun instances[i] = NULL;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun spin_unlock_irq(&instances_lock);
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
snd_efw_transaction_bus_reset(struct fw_unit * unit)289*4882a593Smuzhiyun void snd_efw_transaction_bus_reset(struct fw_unit *unit)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun struct transaction_queue *t;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun spin_lock_irq(&transaction_queues_lock);
294*4882a593Smuzhiyun list_for_each_entry(t, &transaction_queues, list) {
295*4882a593Smuzhiyun if ((t->unit == unit) &&
296*4882a593Smuzhiyun (t->state == STATE_PENDING)) {
297*4882a593Smuzhiyun t->state = STATE_BUS_RESET;
298*4882a593Smuzhiyun wake_up(&t->wait);
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun spin_unlock_irq(&transaction_queues_lock);
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun static struct fw_address_handler resp_register_handler = {
305*4882a593Smuzhiyun .length = SND_EFW_RESPONSE_MAXIMUM_BYTES,
306*4882a593Smuzhiyun .address_callback = efw_response
307*4882a593Smuzhiyun };
308*4882a593Smuzhiyun
snd_efw_transaction_register(void)309*4882a593Smuzhiyun int snd_efw_transaction_register(void)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun static const struct fw_address_region resp_register_region = {
312*4882a593Smuzhiyun .start = MEMORY_SPACE_EFW_RESPONSE,
313*4882a593Smuzhiyun .end = MEMORY_SPACE_EFW_RESPONSE +
314*4882a593Smuzhiyun SND_EFW_RESPONSE_MAXIMUM_BYTES
315*4882a593Smuzhiyun };
316*4882a593Smuzhiyun return fw_core_add_address_handler(&resp_register_handler,
317*4882a593Smuzhiyun &resp_register_region);
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
snd_efw_transaction_unregister(void)320*4882a593Smuzhiyun void snd_efw_transaction_unregister(void)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun WARN_ON(!list_empty(&transaction_queues));
323*4882a593Smuzhiyun fw_core_remove_address_handler(&resp_register_handler);
324*4882a593Smuzhiyun }
325