1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * fireworks_pcm.c - a part of driver for Fireworks based devices
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2009-2010 Clemens Ladisch
6*4882a593Smuzhiyun * Copyright (c) 2013-2014 Takashi Sakamoto
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #include "./fireworks.h"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun /*
11*4882a593Smuzhiyun * NOTE:
12*4882a593Smuzhiyun * Fireworks changes its AMDTP channels for PCM data according to its sampling
13*4882a593Smuzhiyun * rate. There are three modes. Here _XX is either _rx or _tx.
14*4882a593Smuzhiyun * 0: 32.0- 48.0 kHz then snd_efw_hwinfo.amdtp_XX_pcm_channels applied
15*4882a593Smuzhiyun * 1: 88.2- 96.0 kHz then snd_efw_hwinfo.amdtp_XX_pcm_channels_2x applied
16*4882a593Smuzhiyun * 2: 176.4-192.0 kHz then snd_efw_hwinfo.amdtp_XX_pcm_channels_4x applied
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * The number of PCM channels for analog input and output are always fixed but
19*4882a593Smuzhiyun * the number of PCM channels for digital input and output are differed.
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * Additionally, according to "AudioFire Owner's Manual Version 2.2", in some
22*4882a593Smuzhiyun * model, the number of PCM channels for digital input has more restriction
23*4882a593Smuzhiyun * depending on which digital interface is selected.
24*4882a593Smuzhiyun * - S/PDIF coaxial and optical : use input 1-2
25*4882a593Smuzhiyun * - ADAT optical at 32.0-48.0 kHz : use input 1-8
26*4882a593Smuzhiyun * - ADAT optical at 88.2-96.0 kHz : use input 1-4 (S/MUX format)
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * The data in AMDTP channels for blank PCM channels are zero.
29*4882a593Smuzhiyun */
30*4882a593Smuzhiyun static const unsigned int freq_table[] = {
31*4882a593Smuzhiyun /* multiplier mode 0 */
32*4882a593Smuzhiyun [0] = 32000,
33*4882a593Smuzhiyun [1] = 44100,
34*4882a593Smuzhiyun [2] = 48000,
35*4882a593Smuzhiyun /* multiplier mode 1 */
36*4882a593Smuzhiyun [3] = 88200,
37*4882a593Smuzhiyun [4] = 96000,
38*4882a593Smuzhiyun /* multiplier mode 2 */
39*4882a593Smuzhiyun [5] = 176400,
40*4882a593Smuzhiyun [6] = 192000,
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun static inline unsigned int
get_multiplier_mode_with_index(unsigned int index)44*4882a593Smuzhiyun get_multiplier_mode_with_index(unsigned int index)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun return ((int)index - 1) / 2;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
snd_efw_get_multiplier_mode(unsigned int sampling_rate,unsigned int * mode)49*4882a593Smuzhiyun int snd_efw_get_multiplier_mode(unsigned int sampling_rate, unsigned int *mode)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun unsigned int i;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(freq_table); i++) {
54*4882a593Smuzhiyun if (freq_table[i] == sampling_rate) {
55*4882a593Smuzhiyun *mode = get_multiplier_mode_with_index(i);
56*4882a593Smuzhiyun return 0;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun return -EINVAL;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun static int
hw_rule_rate(struct snd_pcm_hw_params * params,struct snd_pcm_hw_rule * rule)64*4882a593Smuzhiyun hw_rule_rate(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun unsigned int *pcm_channels = rule->private;
67*4882a593Smuzhiyun struct snd_interval *r =
68*4882a593Smuzhiyun hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
69*4882a593Smuzhiyun const struct snd_interval *c =
70*4882a593Smuzhiyun hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_CHANNELS);
71*4882a593Smuzhiyun struct snd_interval t = {
72*4882a593Smuzhiyun .min = UINT_MAX, .max = 0, .integer = 1
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun unsigned int i, mode;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(freq_table); i++) {
77*4882a593Smuzhiyun mode = get_multiplier_mode_with_index(i);
78*4882a593Smuzhiyun if (!snd_interval_test(c, pcm_channels[mode]))
79*4882a593Smuzhiyun continue;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun t.min = min(t.min, freq_table[i]);
82*4882a593Smuzhiyun t.max = max(t.max, freq_table[i]);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun return snd_interval_refine(r, &t);
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun static int
hw_rule_channels(struct snd_pcm_hw_params * params,struct snd_pcm_hw_rule * rule)89*4882a593Smuzhiyun hw_rule_channels(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun unsigned int *pcm_channels = rule->private;
92*4882a593Smuzhiyun struct snd_interval *c =
93*4882a593Smuzhiyun hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
94*4882a593Smuzhiyun const struct snd_interval *r =
95*4882a593Smuzhiyun hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_RATE);
96*4882a593Smuzhiyun struct snd_interval t = {
97*4882a593Smuzhiyun .min = UINT_MAX, .max = 0, .integer = 1
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun unsigned int i, mode;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(freq_table); i++) {
102*4882a593Smuzhiyun mode = get_multiplier_mode_with_index(i);
103*4882a593Smuzhiyun if (!snd_interval_test(r, freq_table[i]))
104*4882a593Smuzhiyun continue;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun t.min = min(t.min, pcm_channels[mode]);
107*4882a593Smuzhiyun t.max = max(t.max, pcm_channels[mode]);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun return snd_interval_refine(c, &t);
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun static void
limit_channels(struct snd_pcm_hardware * hw,unsigned int * pcm_channels)114*4882a593Smuzhiyun limit_channels(struct snd_pcm_hardware *hw, unsigned int *pcm_channels)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun unsigned int i, mode;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun hw->channels_min = UINT_MAX;
119*4882a593Smuzhiyun hw->channels_max = 0;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(freq_table); i++) {
122*4882a593Smuzhiyun mode = get_multiplier_mode_with_index(i);
123*4882a593Smuzhiyun if (pcm_channels[mode] == 0)
124*4882a593Smuzhiyun continue;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun hw->channels_min = min(hw->channels_min, pcm_channels[mode]);
127*4882a593Smuzhiyun hw->channels_max = max(hw->channels_max, pcm_channels[mode]);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun static int
pcm_init_hw_params(struct snd_efw * efw,struct snd_pcm_substream * substream)132*4882a593Smuzhiyun pcm_init_hw_params(struct snd_efw *efw,
133*4882a593Smuzhiyun struct snd_pcm_substream *substream)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
136*4882a593Smuzhiyun struct amdtp_stream *s;
137*4882a593Smuzhiyun unsigned int *pcm_channels;
138*4882a593Smuzhiyun int err;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
141*4882a593Smuzhiyun runtime->hw.formats = AM824_IN_PCM_FORMAT_BITS;
142*4882a593Smuzhiyun s = &efw->tx_stream;
143*4882a593Smuzhiyun pcm_channels = efw->pcm_capture_channels;
144*4882a593Smuzhiyun } else {
145*4882a593Smuzhiyun runtime->hw.formats = AM824_OUT_PCM_FORMAT_BITS;
146*4882a593Smuzhiyun s = &efw->rx_stream;
147*4882a593Smuzhiyun pcm_channels = efw->pcm_playback_channels;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun /* limit rates */
151*4882a593Smuzhiyun runtime->hw.rates = efw->supported_sampling_rate;
152*4882a593Smuzhiyun snd_pcm_limit_hw_rates(runtime);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun limit_channels(&runtime->hw, pcm_channels);
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
157*4882a593Smuzhiyun hw_rule_channels, pcm_channels,
158*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_RATE, -1);
159*4882a593Smuzhiyun if (err < 0)
160*4882a593Smuzhiyun goto end;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
163*4882a593Smuzhiyun hw_rule_rate, pcm_channels,
164*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_CHANNELS, -1);
165*4882a593Smuzhiyun if (err < 0)
166*4882a593Smuzhiyun goto end;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun err = amdtp_am824_add_pcm_hw_constraints(s, runtime);
169*4882a593Smuzhiyun end:
170*4882a593Smuzhiyun return err;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
pcm_open(struct snd_pcm_substream * substream)173*4882a593Smuzhiyun static int pcm_open(struct snd_pcm_substream *substream)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun struct snd_efw *efw = substream->private_data;
176*4882a593Smuzhiyun struct amdtp_domain *d = &efw->domain;
177*4882a593Smuzhiyun enum snd_efw_clock_source clock_source;
178*4882a593Smuzhiyun int err;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun err = snd_efw_stream_lock_try(efw);
181*4882a593Smuzhiyun if (err < 0)
182*4882a593Smuzhiyun return err;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun err = pcm_init_hw_params(efw, substream);
185*4882a593Smuzhiyun if (err < 0)
186*4882a593Smuzhiyun goto err_locked;
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun err = snd_efw_command_get_clock_source(efw, &clock_source);
189*4882a593Smuzhiyun if (err < 0)
190*4882a593Smuzhiyun goto err_locked;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun mutex_lock(&efw->mutex);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun // When source of clock is not internal or any stream is reserved for
195*4882a593Smuzhiyun // transmission of PCM frames, the available sampling rate is limited
196*4882a593Smuzhiyun // at current one.
197*4882a593Smuzhiyun if ((clock_source != SND_EFW_CLOCK_SOURCE_INTERNAL) ||
198*4882a593Smuzhiyun (efw->substreams_counter > 0 && d->events_per_period > 0)) {
199*4882a593Smuzhiyun unsigned int frames_per_period = d->events_per_period;
200*4882a593Smuzhiyun unsigned int frames_per_buffer = d->events_per_buffer;
201*4882a593Smuzhiyun unsigned int sampling_rate;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun err = snd_efw_command_get_sampling_rate(efw, &sampling_rate);
204*4882a593Smuzhiyun if (err < 0) {
205*4882a593Smuzhiyun mutex_unlock(&efw->mutex);
206*4882a593Smuzhiyun goto err_locked;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun substream->runtime->hw.rate_min = sampling_rate;
209*4882a593Smuzhiyun substream->runtime->hw.rate_max = sampling_rate;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun if (frames_per_period > 0) {
212*4882a593Smuzhiyun err = snd_pcm_hw_constraint_minmax(substream->runtime,
213*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
214*4882a593Smuzhiyun frames_per_period, frames_per_period);
215*4882a593Smuzhiyun if (err < 0) {
216*4882a593Smuzhiyun mutex_unlock(&efw->mutex);
217*4882a593Smuzhiyun goto err_locked;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun err = snd_pcm_hw_constraint_minmax(substream->runtime,
221*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
222*4882a593Smuzhiyun frames_per_buffer, frames_per_buffer);
223*4882a593Smuzhiyun if (err < 0) {
224*4882a593Smuzhiyun mutex_unlock(&efw->mutex);
225*4882a593Smuzhiyun goto err_locked;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun mutex_unlock(&efw->mutex);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun snd_pcm_set_sync(substream);
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun return 0;
235*4882a593Smuzhiyun err_locked:
236*4882a593Smuzhiyun snd_efw_stream_lock_release(efw);
237*4882a593Smuzhiyun return err;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
pcm_close(struct snd_pcm_substream * substream)240*4882a593Smuzhiyun static int pcm_close(struct snd_pcm_substream *substream)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun struct snd_efw *efw = substream->private_data;
243*4882a593Smuzhiyun snd_efw_stream_lock_release(efw);
244*4882a593Smuzhiyun return 0;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)247*4882a593Smuzhiyun static int pcm_hw_params(struct snd_pcm_substream *substream,
248*4882a593Smuzhiyun struct snd_pcm_hw_params *hw_params)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun struct snd_efw *efw = substream->private_data;
251*4882a593Smuzhiyun int err = 0;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun if (substream->runtime->status->state == SNDRV_PCM_STATE_OPEN) {
254*4882a593Smuzhiyun unsigned int rate = params_rate(hw_params);
255*4882a593Smuzhiyun unsigned int frames_per_period = params_period_size(hw_params);
256*4882a593Smuzhiyun unsigned int frames_per_buffer = params_buffer_size(hw_params);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun mutex_lock(&efw->mutex);
259*4882a593Smuzhiyun err = snd_efw_stream_reserve_duplex(efw, rate,
260*4882a593Smuzhiyun frames_per_period, frames_per_buffer);
261*4882a593Smuzhiyun if (err >= 0)
262*4882a593Smuzhiyun ++efw->substreams_counter;
263*4882a593Smuzhiyun mutex_unlock(&efw->mutex);
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun return err;
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun
pcm_hw_free(struct snd_pcm_substream * substream)269*4882a593Smuzhiyun static int pcm_hw_free(struct snd_pcm_substream *substream)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun struct snd_efw *efw = substream->private_data;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun mutex_lock(&efw->mutex);
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun if (substream->runtime->status->state != SNDRV_PCM_STATE_OPEN)
276*4882a593Smuzhiyun --efw->substreams_counter;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun snd_efw_stream_stop_duplex(efw);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun mutex_unlock(&efw->mutex);
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun return 0;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
pcm_capture_prepare(struct snd_pcm_substream * substream)285*4882a593Smuzhiyun static int pcm_capture_prepare(struct snd_pcm_substream *substream)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun struct snd_efw *efw = substream->private_data;
288*4882a593Smuzhiyun int err;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun err = snd_efw_stream_start_duplex(efw);
291*4882a593Smuzhiyun if (err >= 0)
292*4882a593Smuzhiyun amdtp_stream_pcm_prepare(&efw->tx_stream);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun return err;
295*4882a593Smuzhiyun }
pcm_playback_prepare(struct snd_pcm_substream * substream)296*4882a593Smuzhiyun static int pcm_playback_prepare(struct snd_pcm_substream *substream)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun struct snd_efw *efw = substream->private_data;
299*4882a593Smuzhiyun int err;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun err = snd_efw_stream_start_duplex(efw);
302*4882a593Smuzhiyun if (err >= 0)
303*4882a593Smuzhiyun amdtp_stream_pcm_prepare(&efw->rx_stream);
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun return err;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun
pcm_capture_trigger(struct snd_pcm_substream * substream,int cmd)308*4882a593Smuzhiyun static int pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun struct snd_efw *efw = substream->private_data;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun switch (cmd) {
313*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_START:
314*4882a593Smuzhiyun amdtp_stream_pcm_trigger(&efw->tx_stream, substream);
315*4882a593Smuzhiyun break;
316*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_STOP:
317*4882a593Smuzhiyun amdtp_stream_pcm_trigger(&efw->tx_stream, NULL);
318*4882a593Smuzhiyun break;
319*4882a593Smuzhiyun default:
320*4882a593Smuzhiyun return -EINVAL;
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun return 0;
324*4882a593Smuzhiyun }
pcm_playback_trigger(struct snd_pcm_substream * substream,int cmd)325*4882a593Smuzhiyun static int pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
326*4882a593Smuzhiyun {
327*4882a593Smuzhiyun struct snd_efw *efw = substream->private_data;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun switch (cmd) {
330*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_START:
331*4882a593Smuzhiyun amdtp_stream_pcm_trigger(&efw->rx_stream, substream);
332*4882a593Smuzhiyun break;
333*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_STOP:
334*4882a593Smuzhiyun amdtp_stream_pcm_trigger(&efw->rx_stream, NULL);
335*4882a593Smuzhiyun break;
336*4882a593Smuzhiyun default:
337*4882a593Smuzhiyun return -EINVAL;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun return 0;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
pcm_capture_pointer(struct snd_pcm_substream * sbstrm)343*4882a593Smuzhiyun static snd_pcm_uframes_t pcm_capture_pointer(struct snd_pcm_substream *sbstrm)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun struct snd_efw *efw = sbstrm->private_data;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun return amdtp_domain_stream_pcm_pointer(&efw->domain, &efw->tx_stream);
348*4882a593Smuzhiyun }
pcm_playback_pointer(struct snd_pcm_substream * sbstrm)349*4882a593Smuzhiyun static snd_pcm_uframes_t pcm_playback_pointer(struct snd_pcm_substream *sbstrm)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun struct snd_efw *efw = sbstrm->private_data;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun return amdtp_domain_stream_pcm_pointer(&efw->domain, &efw->rx_stream);
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun
pcm_capture_ack(struct snd_pcm_substream * substream)356*4882a593Smuzhiyun static int pcm_capture_ack(struct snd_pcm_substream *substream)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun struct snd_efw *efw = substream->private_data;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun return amdtp_domain_stream_pcm_ack(&efw->domain, &efw->tx_stream);
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun
pcm_playback_ack(struct snd_pcm_substream * substream)363*4882a593Smuzhiyun static int pcm_playback_ack(struct snd_pcm_substream *substream)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun struct snd_efw *efw = substream->private_data;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun return amdtp_domain_stream_pcm_ack(&efw->domain, &efw->rx_stream);
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun
snd_efw_create_pcm_devices(struct snd_efw * efw)370*4882a593Smuzhiyun int snd_efw_create_pcm_devices(struct snd_efw *efw)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun static const struct snd_pcm_ops capture_ops = {
373*4882a593Smuzhiyun .open = pcm_open,
374*4882a593Smuzhiyun .close = pcm_close,
375*4882a593Smuzhiyun .hw_params = pcm_hw_params,
376*4882a593Smuzhiyun .hw_free = pcm_hw_free,
377*4882a593Smuzhiyun .prepare = pcm_capture_prepare,
378*4882a593Smuzhiyun .trigger = pcm_capture_trigger,
379*4882a593Smuzhiyun .pointer = pcm_capture_pointer,
380*4882a593Smuzhiyun .ack = pcm_capture_ack,
381*4882a593Smuzhiyun };
382*4882a593Smuzhiyun static const struct snd_pcm_ops playback_ops = {
383*4882a593Smuzhiyun .open = pcm_open,
384*4882a593Smuzhiyun .close = pcm_close,
385*4882a593Smuzhiyun .hw_params = pcm_hw_params,
386*4882a593Smuzhiyun .hw_free = pcm_hw_free,
387*4882a593Smuzhiyun .prepare = pcm_playback_prepare,
388*4882a593Smuzhiyun .trigger = pcm_playback_trigger,
389*4882a593Smuzhiyun .pointer = pcm_playback_pointer,
390*4882a593Smuzhiyun .ack = pcm_playback_ack,
391*4882a593Smuzhiyun };
392*4882a593Smuzhiyun struct snd_pcm *pcm;
393*4882a593Smuzhiyun int err;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun err = snd_pcm_new(efw->card, efw->card->driver, 0, 1, 1, &pcm);
396*4882a593Smuzhiyun if (err < 0)
397*4882a593Smuzhiyun goto end;
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun pcm->private_data = efw;
400*4882a593Smuzhiyun snprintf(pcm->name, sizeof(pcm->name), "%s PCM", efw->card->shortname);
401*4882a593Smuzhiyun snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &playback_ops);
402*4882a593Smuzhiyun snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &capture_ops);
403*4882a593Smuzhiyun snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_VMALLOC, NULL, 0, 0);
404*4882a593Smuzhiyun end:
405*4882a593Smuzhiyun return err;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun
408